1 /* 2 * Copyright 2011 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Alex Deucher 23 * 24 * $FreeBSD: head/sys/dev/drm2/radeon/atombios_i2c.c 254885 2013-08-25 19:37:15Z dumbbell $ 25 */ 26 27 #include <drm/drmP.h> 28 #include <uapi_drm/radeon_drm.h> 29 #include <bus/iicbus/iic.h> 30 #include <bus/iicbus/iiconf.h> 31 #include <bus/iicbus/iicbus.h> 32 #include "radeon.h" 33 #include "atom.h" 34 #include "iicbus_if.h" 35 #include "iicbb_if.h" 36 37 #define TARGET_HW_I2C_CLOCK 50 38 39 /* these are a limitation of ProcessI2cChannelTransaction not the hw */ 40 #define ATOM_MAX_HW_I2C_WRITE 3 41 #define ATOM_MAX_HW_I2C_READ 255 42 43 static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan, 44 u8 slave_addr, u8 flags, 45 u8 *buf, u8 num) 46 { 47 struct drm_device *dev = chan->dev; 48 struct radeon_device *rdev = dev->dev_private; 49 PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args; 50 int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction); 51 unsigned char *base; 52 u16 out = cpu_to_le16(0); 53 int r = 0; 54 55 memset(&args, 0, sizeof(args)); 56 57 lockmgr(&rdev->mode_info.atom_context->scratch_mutex, LK_EXCLUSIVE); 58 59 base = (unsigned char *)rdev->mode_info.atom_context->scratch; 60 61 if (flags & HW_I2C_WRITE) { 62 if (num > ATOM_MAX_HW_I2C_WRITE) { 63 DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 3)\n", num); 64 r = -EINVAL; 65 goto done; 66 } 67 if (buf == NULL) 68 args.ucRegIndex = 0; 69 else 70 args.ucRegIndex = buf[0]; 71 if (num) 72 num--; 73 if (num) 74 memcpy(&out, &buf[1], num); 75 args.lpI2CDataOut = cpu_to_le16(out); 76 } else { 77 if (num > ATOM_MAX_HW_I2C_READ) { 78 DRM_ERROR("hw i2c: tried to read too many bytes (%d vs 255)\n", num); 79 r = -EINVAL; 80 goto done; 81 } 82 args.ucRegIndex = 0; 83 args.lpI2CDataOut = 0; 84 } 85 86 args.ucFlag = flags; 87 args.ucI2CSpeed = TARGET_HW_I2C_CLOCK; 88 args.ucTransBytes = num; 89 args.ucSlaveAddr = slave_addr << 1; 90 args.ucLineNumber = chan->rec.i2c_id; 91 92 atom_execute_table_scratch_unlocked(rdev->mode_info.atom_context, index, (uint32_t *)&args); 93 94 /* error */ 95 if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) { 96 DRM_DEBUG_KMS("hw_i2c error\n"); 97 r = -EIO; 98 goto done; 99 } 100 101 if (!(flags & HW_I2C_WRITE)) 102 radeon_atom_copy_swap(buf, base, num, false); 103 104 done: 105 lockmgr(&rdev->mode_info.atom_context->scratch_mutex, LK_RELEASE); 106 107 return r; 108 } 109 110 static int 111 radeon_atom_hw_i2c_xfer(device_t dev, struct iic_msg *msgs, u_int num) 112 { 113 struct radeon_i2c_chan *i2c = device_get_softc(dev); 114 struct iic_msg *p; 115 int i, remaining, current_count, buffer_offset, max_bytes, ret; 116 u8 flags; 117 118 /* check for bus probe */ 119 p = &msgs[0]; 120 if ((num == 1) && (p->len == 0)) { 121 ret = radeon_process_i2c_ch(i2c, 122 p->slave, HW_I2C_WRITE, 123 NULL, 0); 124 if (ret) 125 return ret; 126 else 127 return (0); 128 } 129 130 for (i = 0; i < num; i++) { 131 p = &msgs[i]; 132 remaining = p->len; 133 buffer_offset = 0; 134 /* max_bytes are a limitation of ProcessI2cChannelTransaction not the hw */ 135 if (p->flags & IIC_M_RD) { 136 max_bytes = ATOM_MAX_HW_I2C_READ; 137 flags = HW_I2C_READ; 138 } else { 139 max_bytes = ATOM_MAX_HW_I2C_WRITE; 140 flags = HW_I2C_WRITE; 141 } 142 while (remaining) { 143 if (remaining > max_bytes) 144 current_count = max_bytes; 145 else 146 current_count = remaining; 147 ret = radeon_process_i2c_ch(i2c, 148 p->slave, flags, 149 &p->buf[buffer_offset], current_count); 150 if (ret) 151 return ret; 152 remaining -= current_count; 153 buffer_offset += current_count; 154 } 155 } 156 157 return (0); 158 } 159 160 static int 161 radeon_atom_hw_i2c_probe(device_t dev) 162 { 163 164 return (BUS_PROBE_SPECIFIC); 165 } 166 167 static int 168 radeon_atom_hw_i2c_attach(device_t dev) 169 { 170 struct radeon_i2c_chan *i2c; 171 device_t iic_dev; 172 173 i2c = device_get_softc(dev); 174 device_set_desc(dev, i2c->name); 175 176 /* add generic bit-banging code */ 177 iic_dev = device_add_child(dev, "iicbus", -1); 178 if (iic_dev == NULL) 179 return (ENXIO); 180 device_quiet(iic_dev); 181 182 /* attach and probe added child */ 183 bus_generic_attach(dev); 184 185 return (0); 186 } 187 188 static int 189 radeon_atom_hw_i2c_detach(device_t dev) 190 { 191 /* detach bit-banding code. */ 192 bus_generic_detach(dev); 193 194 /* delete bit-banding code. */ 195 device_delete_children(dev); 196 return (0); 197 } 198 199 static int 200 radeon_atom_hw_i2c_reset(device_t dev, u_char speed, 201 u_char addr, u_char *oldaddr) 202 { 203 204 return (0); 205 } 206 207 static device_method_t radeon_atom_hw_i2c_methods[] = { 208 DEVMETHOD(device_probe, radeon_atom_hw_i2c_probe), 209 DEVMETHOD(device_attach, radeon_atom_hw_i2c_attach), 210 DEVMETHOD(device_detach, radeon_atom_hw_i2c_detach), 211 DEVMETHOD(iicbus_reset, radeon_atom_hw_i2c_reset), 212 DEVMETHOD(iicbus_transfer, radeon_atom_hw_i2c_xfer), 213 DEVMETHOD_END 214 }; 215 216 static driver_t radeon_atom_hw_i2c_driver = { 217 "radeon_atom_hw_i2c", 218 radeon_atom_hw_i2c_methods, 219 0 220 }; 221 222 static devclass_t radeon_atom_hw_i2c_devclass; 223 DRIVER_MODULE_ORDERED(radeon_atom_hw_i2c, drm, radeon_atom_hw_i2c_driver, 224 radeon_atom_hw_i2c_devclass, NULL, NULL, SI_ORDER_ANY); 225