1 /*- 2 * Copyright (c) 2006-2008 Stanislav Sedov <stas@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: head/sys/dev/cpuctl/cpuctl.c 275960 2014-12-20 16:40:49Z kib $ 27 */ 28 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/conf.h> 33 #include <sys/fcntl.h> 34 #include <sys/ioccom.h> 35 #include <sys/malloc.h> 36 #include <sys/module.h> 37 #include <sys/priv.h> 38 #include <sys/proc.h> 39 #include <sys/queue.h> 40 #include <sys/sched.h> 41 #include <sys/kernel.h> 42 #include <sys/sysctl.h> 43 #include <sys/uio.h> 44 #include <sys/cpuctl.h> 45 #include <sys/device.h> 46 #include <sys/thread2.h> 47 48 #include <machine/cpufunc.h> 49 #include <machine/md_var.h> 50 #include <machine/specialreg.h> 51 52 static d_open_t cpuctl_open; 53 static d_ioctl_t cpuctl_ioctl; 54 55 #define CPUCTL_VERSION 1 56 57 #ifdef DEBUG 58 # define DPRINTF(format,...) kprintf(format, __VA_ARGS__); 59 #else 60 # define DPRINTF(format,...) 61 #endif 62 63 #define UCODE_SIZE_MAX (32 * 1024) 64 65 static int cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd); 66 static void cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data); 67 static void cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data); 68 static int cpuctl_do_update(int cpu, cpuctl_update_args_t *data); 69 static int update_intel(int cpu, cpuctl_update_args_t *args); 70 static int update_amd(int cpu, cpuctl_update_args_t *args); 71 static int update_via(int cpu, cpuctl_update_args_t *args); 72 73 static cdev_t *cpuctl_devs; 74 static MALLOC_DEFINE(M_CPUCTL, "cpuctl", "CPUCTL buffer"); 75 76 static struct dev_ops cpuctl_cdevsw = { 77 .d_open = cpuctl_open, 78 .d_ioctl = cpuctl_ioctl, 79 .head = { .name = "cpuctl" }, 80 }; 81 82 int 83 cpuctl_ioctl(struct dev_ioctl_args *ap) 84 { 85 int ret; 86 int cpu = dev2unit(ap->a_head.a_dev); 87 u_long cmd = ap->a_cmd; 88 int flags = ap->a_fflag; 89 caddr_t data = ap->a_data; 90 91 if (cpu >= ncpus) { 92 DPRINTF("[cpuctl,%d]: bad cpu number %d\n", __LINE__, cpu); 93 return (ENXIO); 94 } 95 /* Require write flag for "write" requests. */ 96 if ((cmd == CPUCTL_WRMSR || cmd == CPUCTL_UPDATE || 97 cmd == CPUCTL_MSRSBIT || cmd == CPUCTL_MSRCBIT) && 98 ((flags & FWRITE) == 0)) 99 return (EPERM); 100 switch (cmd) { 101 case CPUCTL_RDMSR: 102 ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd); 103 break; 104 case CPUCTL_MSRSBIT: 105 case CPUCTL_MSRCBIT: 106 case CPUCTL_WRMSR: 107 ret = priv_check(curthread, PRIV_CPUCTL_WRMSR); 108 if (ret != 0) 109 goto fail; 110 ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd); 111 break; 112 case CPUCTL_CPUID: 113 cpuctl_do_cpuid(cpu, (cpuctl_cpuid_args_t *)data); 114 ret = 0; 115 break; 116 case CPUCTL_UPDATE: 117 ret = priv_check(curthread, PRIV_CPUCTL_UPDATE); 118 if (ret != 0) 119 goto fail; 120 ret = cpuctl_do_update(cpu, (cpuctl_update_args_t *)data); 121 break; 122 case CPUCTL_CPUID_COUNT: 123 cpuctl_do_cpuid_count(cpu, (cpuctl_cpuid_count_args_t *)data); 124 ret = 0; 125 break; 126 default: 127 ret = EINVAL; 128 break; 129 } 130 fail: 131 return (ret); 132 } 133 134 /* 135 * Actually perform cpuid operation. 136 */ 137 static void 138 cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data) 139 { 140 int oldcpu; 141 142 KASSERT(cpu >= 0 && cpu < ncpus, 143 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 144 145 /* Explicitly clear cpuid data to avoid returning stale info. */ 146 bzero(data->data, sizeof(data->data)); 147 DPRINTF("[cpuctl,%d]: retrieving cpuid lev %#0x type %#0x for %d cpu\n", 148 __LINE__, data->level, data->level_type, cpu); 149 oldcpu = mycpuid; 150 lwkt_migratecpu(cpu); 151 cpuid_count(data->level, data->level_type, data->data); 152 lwkt_migratecpu(oldcpu); 153 } 154 155 static void 156 cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data) 157 { 158 cpuctl_cpuid_count_args_t cdata; 159 160 cdata.level = data->level; 161 /* Override the level type. */ 162 cdata.level_type = 0; 163 cpuctl_do_cpuid_count(cpu, &cdata); 164 bcopy(cdata.data, data->data, sizeof(data->data)); /* Ignore error */ 165 } 166 167 /* 168 * Actually perform MSR operations. 169 */ 170 static int 171 cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd) 172 { 173 uint64_t reg; 174 int oldcpu; 175 int ret; 176 177 KASSERT(cpu >= 0 && cpu < ncpus, 178 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 179 180 /* 181 * Explicitly clear cpuid data to avoid returning stale 182 * info 183 */ 184 DPRINTF("[cpuctl,%d]: operating on MSR %#0x for %d cpu\n", __LINE__, 185 data->msr, cpu); 186 oldcpu = mycpuid; 187 lwkt_migratecpu(cpu); 188 if (cmd == CPUCTL_RDMSR) { 189 data->data = 0; 190 ret = rdmsr_safe(data->msr, &data->data); 191 } else if (cmd == CPUCTL_WRMSR) { 192 ret = wrmsr_safe(data->msr, data->data); 193 } else if (cmd == CPUCTL_MSRSBIT) { 194 crit_enter(); 195 ret = rdmsr_safe(data->msr, ®); 196 if (ret == 0) 197 ret = wrmsr_safe(data->msr, reg | data->data); 198 crit_exit(); 199 } else if (cmd == CPUCTL_MSRCBIT) { 200 crit_enter(); 201 ret = rdmsr_safe(data->msr, ®); 202 if (ret == 0) 203 ret = wrmsr_safe(data->msr, reg & ~data->data); 204 crit_exit(); 205 } else 206 panic("[cpuctl,%d]: unknown operation requested: %lu", __LINE__, cmd); 207 lwkt_migratecpu(oldcpu); 208 return (ret); 209 } 210 211 /* 212 * Actually perform microcode update. 213 */ 214 static int 215 cpuctl_do_update(int cpu, cpuctl_update_args_t *data) 216 { 217 cpuctl_cpuid_args_t args = { 218 .level = 0, 219 }; 220 char vendor[13]; 221 int ret; 222 223 KASSERT(cpu >= 0 && cpu < ncpus, 224 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 225 DPRINTF("[cpuctl,%d]: XXX %d", __LINE__, cpu); 226 227 cpuctl_do_cpuid(cpu, &args); 228 ((uint32_t *)vendor)[0] = args.data[1]; 229 ((uint32_t *)vendor)[1] = args.data[3]; 230 ((uint32_t *)vendor)[2] = args.data[2]; 231 vendor[12] = '\0'; 232 if (strncmp(vendor, INTEL_VENDOR_ID, sizeof(INTEL_VENDOR_ID)) == 0) 233 ret = update_intel(cpu, data); 234 else if(strncmp(vendor, AMD_VENDOR_ID, sizeof(AMD_VENDOR_ID)) == 0) 235 ret = update_amd(cpu, data); 236 else if(strncmp(vendor, CENTAUR_VENDOR_ID, sizeof(CENTAUR_VENDOR_ID)) == 0) 237 ret = update_via(cpu, data); 238 else 239 ret = ENXIO; 240 return (ret); 241 } 242 243 static int 244 update_intel(int cpu, cpuctl_update_args_t *args) 245 { 246 void *ptr; 247 uint64_t rev0, rev1; 248 uint32_t tmp[4]; 249 int oldcpu; 250 int ret; 251 252 if (args->size == 0 || args->data == NULL) { 253 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__); 254 return (EINVAL); 255 } 256 if (args->size > UCODE_SIZE_MAX) { 257 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__); 258 return (EINVAL); 259 } 260 261 /* 262 * 16 byte alignment required. Rely on the fact that 263 * malloc(9) always returns the pointer aligned at least on 264 * the size of the allocation. 265 */ 266 ptr = kmalloc(args->size + 16, M_CPUCTL, M_WAITOK); 267 if (copyin(args->data, ptr, args->size) != 0) { 268 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed", 269 __LINE__, args->data, ptr, args->size); 270 ret = EFAULT; 271 goto fail; 272 } 273 oldcpu = mycpuid; 274 lwkt_migratecpu(cpu); 275 crit_enter(); 276 rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */ 277 278 /* 279 * Perform update. 280 */ 281 wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr)); 282 wrmsr_safe(MSR_BIOS_SIGN, 0); 283 284 /* 285 * Serialize instruction flow. 286 */ 287 do_cpuid(0, tmp); 288 crit_exit(); 289 rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */ 290 lwkt_migratecpu(oldcpu); 291 kprintf("[cpu %d]: updated microcode from rev=0x%x to rev=0x%x\n", cpu, 292 (unsigned)(rev0 >> 32), (unsigned)(rev1 >> 32)); 293 294 if (rev1 > rev0) 295 ret = 0; 296 else 297 ret = EEXIST; 298 fail: 299 kfree(ptr, M_CPUCTL); 300 return (ret); 301 } 302 303 static int 304 update_amd(int cpu, cpuctl_update_args_t *args) 305 { 306 void *ptr = NULL; 307 uint32_t tmp[4]; 308 int oldcpu; 309 int ret; 310 311 if (args->size == 0 || args->data == NULL) { 312 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__); 313 return (EINVAL); 314 } 315 if (args->size > UCODE_SIZE_MAX) { 316 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__); 317 return (EINVAL); 318 } 319 /* 320 * XXX Might not require contignous address space - needs check 321 */ 322 ptr = contigmalloc(args->size, M_CPUCTL, 0, 0, 0xffffffff, 16, 0); 323 if (ptr == NULL) { 324 DPRINTF("[cpuctl,%d]: cannot allocate %zd bytes of memory", 325 __LINE__, args->size); 326 return (ENOMEM); 327 } 328 if (copyin(args->data, ptr, args->size) != 0) { 329 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed", 330 __LINE__, args->data, ptr, args->size); 331 ret = EFAULT; 332 goto fail; 333 } 334 oldcpu = mycpuid; 335 lwkt_migratecpu(cpu); 336 crit_enter(); 337 338 /* 339 * Perform update. 340 */ 341 wrmsr_safe(MSR_K8_UCODE_UPDATE, (uintptr_t)ptr); 342 343 /* 344 * Serialize instruction flow. 345 */ 346 do_cpuid(0, tmp); 347 crit_exit(); 348 lwkt_migratecpu(oldcpu); 349 ret = 0; 350 fail: 351 if (ptr != NULL) 352 contigfree(ptr, args->size, M_CPUCTL); 353 return (ret); 354 } 355 356 static int 357 update_via(int cpu, cpuctl_update_args_t *args) 358 { 359 void *ptr; 360 uint64_t rev0, rev1, res; 361 uint32_t tmp[4]; 362 int oldcpu; 363 int ret; 364 365 if (args->size == 0 || args->data == NULL) { 366 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__); 367 return (EINVAL); 368 } 369 if (args->size > UCODE_SIZE_MAX) { 370 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__); 371 return (EINVAL); 372 } 373 374 /* 375 * 4 byte alignment required. 376 */ 377 ptr = kmalloc(args->size, M_CPUCTL, M_WAITOK); 378 if (copyin(args->data, ptr, args->size) != 0) { 379 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed", 380 __LINE__, args->data, ptr, args->size); 381 ret = EFAULT; 382 goto fail; 383 } 384 oldcpu = mycpuid; 385 lwkt_migratecpu(cpu); 386 crit_enter(); 387 rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */ 388 389 /* 390 * Perform update. 391 */ 392 wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr)); 393 do_cpuid(1, tmp); 394 395 /* 396 * Result are in low byte of MSR FCR5: 397 * 0x00: No update has been attempted since RESET. 398 * 0x01: The last attempted update was successful. 399 * 0x02: The last attempted update was unsuccessful due to a bad 400 * environment. No update was loaded and any preexisting 401 * patches are still active. 402 * 0x03: The last attempted update was not applicable to this processor. 403 * No update was loaded and any preexisting patches are still 404 * active. 405 * 0x04: The last attempted update was not successful due to an invalid 406 * update data block. No update was loaded and any preexisting 407 * patches are still active 408 */ 409 rdmsr_safe(0x1205, &res); 410 res &= 0xff; 411 crit_exit(); 412 rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */ 413 lwkt_migratecpu(oldcpu); 414 415 DPRINTF("[cpu,%d]: rev0=%x rev1=%x res=%x\n", __LINE__, 416 (unsigned)(rev0 >> 32), (unsigned)(rev1 >> 32), (unsigned)res); 417 418 if (res != 0x01) 419 ret = EINVAL; 420 else 421 ret = 0; 422 fail: 423 kfree(ptr, M_CPUCTL); 424 return (ret); 425 } 426 427 int 428 cpuctl_open(struct dev_open_args *ap) 429 { 430 int ret = 0; 431 int cpu; 432 433 cpu = dev2unit(ap->a_head.a_dev); 434 if (cpu >= ncpus) { 435 DPRINTF("[cpuctl,%d]: incorrect cpu number %d\n", __LINE__, 436 cpu); 437 return (ENXIO); 438 } 439 if (ap->a_oflags & FWRITE) 440 ret = securelevel > 0 ? EPERM : 0; 441 return (ret); 442 } 443 444 static int 445 cpuctl_modevent(module_t mod __unused, int type, void *data __unused) 446 { 447 int cpu; 448 449 switch(type) { 450 case MOD_LOAD: 451 if ((cpu_feature & CPUID_MSR) == 0) { 452 if (bootverbose) 453 kprintf("cpuctl: not available.\n"); 454 return (ENODEV); 455 } 456 if (bootverbose) 457 kprintf("cpuctl: access to MSR registers/cpuid info.\n"); 458 cpuctl_devs = kmalloc(sizeof(*cpuctl_devs) * ncpus, M_CPUCTL, 459 M_WAITOK | M_ZERO); 460 for (cpu = 0; cpu < ncpus; cpu++) 461 cpuctl_devs[cpu] = make_dev(&cpuctl_cdevsw, cpu, 462 UID_ROOT, GID_KMEM, 0640, "cpuctl%d", cpu); 463 break; 464 case MOD_UNLOAD: 465 for (cpu = 0; cpu < ncpus; cpu++) { 466 if (cpuctl_devs[cpu] != NULL) 467 destroy_dev(cpuctl_devs[cpu]); 468 } 469 kfree(cpuctl_devs, M_CPUCTL); 470 break; 471 case MOD_SHUTDOWN: 472 break; 473 default: 474 return (EOPNOTSUPP); 475 } 476 return (0); 477 } 478 479 DEV_MODULE(cpuctl, cpuctl_modevent, NULL); 480 MODULE_VERSION(cpuctl, CPUCTL_VERSION); 481