xref: /dragonfly/sys/dev/misc/puc/puc.c (revision 9dbf638f)
1 /*
2  * $NetBSD: puc.c,v 1.7 2000/07/29 17:43:38 jlam Exp $
3  * $FreeBSD: src/sys/dev/puc/puc.c,v 1.3.2.5 2003/04/04 08:42:17 sobomax Exp $
4  * $DragonFly: src/sys/dev/misc/puc/puc.c,v 1.4 2003/08/27 10:35:18 rob Exp $
5  */
6 
7 /*-
8  * Copyright (c) 2002 JF Hay.  All rights reserved.
9  * Copyright (c) 2000 M. Warner Losh.  All rights reserved.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice unmodified, this list of conditions, and the following
16  *    disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 /*
34  * Copyright (c) 1996, 1998, 1999
35  *	Christopher G. Demetriou.  All rights reserved.
36  *
37  * Redistribution and use in source and binary forms, with or without
38  * modification, are permitted provided that the following conditions
39  * are met:
40  * 1. Redistributions of source code must retain the above copyright
41  *    notice, this list of conditions and the following disclaimer.
42  * 2. Redistributions in binary form must reproduce the above copyright
43  *    notice, this list of conditions and the following disclaimer in the
44  *    documentation and/or other materials provided with the distribution.
45  * 3. All advertising materials mentioning features or use of this software
46  *    must display the following acknowledgement:
47  *      This product includes software developed by Christopher G. Demetriou
48  *	for the NetBSD Project.
49  * 4. The name of the author may not be used to endorse or promote products
50  *    derived from this software without specific prior written permission
51  *
52  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
53  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
54  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
55  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
56  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
57  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
61  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62  */
63 
64 /*
65  * PCI "universal" communication card device driver, glues com, lpt,
66  * and similar ports to PCI via bridge chip often much larger than
67  * the devices being glued.
68  *
69  * Author: Christopher G. Demetriou, May 14, 1998 (derived from NetBSD
70  * sys/dev/pci/pciide.c, revision 1.6).
71  *
72  * These devices could be (and some times are) described as
73  * communications/{serial,parallel}, etc. devices with known
74  * programming interfaces, but those programming interfaces (in
75  * particular the BAR assignments for devices, etc.) in fact are not
76  * particularly well defined.
77  *
78  * After I/we have seen more of these devices, it may be possible
79  * to generalize some of these bits.  In particular, devices which
80  * describe themselves as communications/serial/16[45]50, and
81  * communications/parallel/??? might be attached via direct
82  * 'com' and 'lpt' attachments to pci.
83  */
84 
85 #include <sys/param.h>
86 #include <sys/systm.h>
87 #include <sys/kernel.h>
88 #include <sys/bus.h>
89 #include <sys/conf.h>
90 #include <sys/malloc.h>
91 
92 #include <machine/bus.h>
93 #include <machine/resource.h>
94 #include <sys/rman.h>
95 
96 #include <bus/pci/pcireg.h>
97 #include <bus/pci/pcivar.h>
98 #include "pucvar.h"
99 
100 #include <opt_puc.h>
101 
102 struct puc_softc {
103 	const struct puc_device_description *sc_desc;
104 
105 	/* card-global dynamic data */
106 	int			barmuxed;
107 	int			irqrid;
108 	struct resource		*irqres;
109 	void			*intr_cookie;
110 	int			ilr_enabled;
111 	bus_space_tag_t		ilr_st;
112 	bus_space_handle_t	ilr_sh;
113 
114 	struct {
115 		struct resource	*res;
116 	} sc_bar_mappings[PUC_MAX_BAR];
117 
118 	/* per-port dynamic data */
119         struct {
120 		struct device	*dev;
121 		/* filled in by bus_setup_intr() */
122 		void		(*ihand) (void *);
123 		void		*ihandarg;
124         } sc_ports[PUC_MAX_PORTS];
125 };
126 
127 struct puc_device {
128 	struct resource_list resources;
129 	u_int serialfreq;
130 };
131 
132 static int puc_pci_probe(device_t dev);
133 static int puc_pci_attach(device_t dev);
134 static void puc_intr(void *arg);
135 
136 static struct resource *puc_alloc_resource(device_t, device_t, int, int *,
137     u_long, u_long, u_long, u_int);
138 static int puc_release_resource(device_t, device_t, int, int,
139     struct resource *);
140 static int puc_get_resource(device_t, device_t, int, int, u_long *, u_long *);
141 static int puc_setup_intr(device_t, device_t, struct resource *, int,
142     void (*)(void *), void *, void **);
143 static int puc_teardown_intr(device_t, device_t, struct resource *,
144     void *);
145 static int puc_read_ivar(device_t, device_t, int, uintptr_t *);
146 
147 static const struct puc_device_description *puc_find_description(uint32_t,
148     uint32_t, uint32_t, uint32_t);
149 static void puc_config_superio(device_t);
150 static void puc_config_win877(struct resource *);
151 static int puc_find_free_unit(char *);
152 #ifdef PUC_DEBUG
153 static void puc_print_win877(bus_space_tag_t, bus_space_handle_t, u_int,
154     u_int);
155 static void puc_print_resource_list(struct resource_list *);
156 #endif
157 
158 static int
159 puc_pci_probe(device_t dev)
160 {
161 	uint32_t v1, v2, d1, d2;
162 	const struct puc_device_description *desc;
163 
164 	if ((pci_read_config(dev, PCIR_HEADERTYPE, 1) & 0x7f) != 0)
165 		return (ENXIO);
166 
167 	v1 = pci_read_config(dev, PCIR_VENDOR, 2);
168 	d1 = pci_read_config(dev, PCIR_DEVICE, 2);
169 	v2 = pci_read_config(dev, PCIR_SUBVEND_0, 2);
170 	d2 = pci_read_config(dev, PCIR_SUBDEV_0, 2);
171 
172 	desc = puc_find_description(v1, d1, v2, d2);
173 	if (desc == NULL)
174 		return (ENXIO);
175 	device_set_desc(dev, desc->name);
176 	return (0);
177 }
178 
179 static int
180 puc_probe_ilr(struct puc_softc *sc, struct resource *res)
181 {
182 	u_char t1, t2;
183 	int i;
184 
185 	switch (sc->sc_desc->ilr_type) {
186 	case PUC_ILR_TYPE_DIGI:
187 		sc->ilr_st = rman_get_bustag(res);
188 		sc->ilr_sh = rman_get_bushandle(res);
189 		for (i = 0; i < 2; i++) {
190 			t1 = bus_space_read_1(sc->ilr_st, sc->ilr_sh,
191 			    sc->sc_desc->ilr_offset[i]);
192 			t1 = ~t1;
193 			bus_space_write_1(sc->ilr_st, sc->ilr_sh,
194 			    sc->sc_desc->ilr_offset[i], t1);
195 			t2 = bus_space_read_1(sc->ilr_st, sc->ilr_sh,
196 			    sc->sc_desc->ilr_offset[i]);
197 			if (t2 == t1)
198 				return (0);
199 		}
200 		return (1);
201 
202 	default:
203 		break;
204 	}
205 	return (0);
206 }
207 
208 static int
209 puc_pci_attach(device_t dev)
210 {
211 	char *typestr;
212 	int bidx, childunit, i, irq_setup, rid;
213 	uint32_t v1, v2, d1, d2;
214 	struct puc_softc *sc;
215 	struct puc_device *pdev;
216 	struct resource *res;
217 	struct resource_list_entry *rle;
218 
219 	sc = (struct puc_softc *)device_get_softc(dev);
220 	bzero(sc, sizeof(*sc));
221 	v1 = pci_read_config(dev, PCIR_VENDOR, 2);
222 	d1 = pci_read_config(dev, PCIR_DEVICE, 2);
223 	v2 = pci_read_config(dev, PCIR_SUBVEND_0, 2);
224 	d2 = pci_read_config(dev, PCIR_SUBDEV_0, 2);
225 	sc->sc_desc = puc_find_description(v1, d1, v2, d2);
226 	if (sc->sc_desc == NULL)
227 		return (ENXIO);
228 
229 #ifdef PUC_DEBUG
230 	bootverbose = 1;
231 
232 	printf("puc: name: %s\n", sc->sc_desc->name);
233 #endif
234 	rid = 0;
235 	res = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
236 	    RF_ACTIVE | RF_SHAREABLE);
237 	if (!res)
238 		return (ENXIO);
239 
240 	sc->irqres = res;
241 	sc->irqrid = rid;
242 #ifdef PUC_FASTINTR
243 	irq_setup = BUS_SETUP_INTR(device_get_parent(dev), dev, res,
244 	    INTR_TYPE_TTY | INTR_TYPE_FAST, puc_intr, sc, &sc->intr_cookie);
245 #else
246 	irq_setup = ENXIO;
247 #endif
248 	if (irq_setup != 0)
249 		irq_setup = BUS_SETUP_INTR(device_get_parent(dev), dev, res,
250 		    INTR_TYPE_TTY, puc_intr, sc, &sc->intr_cookie);
251 	if (irq_setup != 0)
252 		return (ENXIO);
253 
254 	rid = 0;
255 	for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
256 		if (rid == sc->sc_desc->ports[i].bar)
257 			sc->barmuxed = 1;
258 		rid = sc->sc_desc->ports[i].bar;
259 		bidx = PUC_PORT_BAR_INDEX(rid);
260 
261 		if (sc->sc_bar_mappings[bidx].res != NULL)
262 			continue;
263 		res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
264 		    0ul, ~0ul, 1, RF_ACTIVE);
265 		if (res == NULL) {
266 			printf("could not get resource\n");
267 			continue;
268 		}
269 		sc->sc_bar_mappings[bidx].res = res;
270 
271 		if (sc->sc_desc->ilr_type != PUC_ILR_TYPE_NONE) {
272 			sc->ilr_enabled = puc_probe_ilr(sc, res);
273 			if (sc->ilr_enabled)
274 				device_printf(dev, "ILR enabled\n");
275 			else
276 				device_printf(dev, "ILR disabled\n");
277 		}
278 #ifdef PUC_DEBUG
279 		printf("port bst %x, start %x, end %x\n",
280 		    (u_int)rman_get_bustag(res), (u_int)rman_get_start(res),
281 		    (u_int)rman_get_end(res));
282 #endif
283 	}
284 
285 	puc_config_superio(dev);
286 
287 	for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
288 		rid = sc->sc_desc->ports[i].bar;
289 		bidx = PUC_PORT_BAR_INDEX(rid);
290 		if (sc->sc_bar_mappings[bidx].res == NULL)
291 			continue;
292 
293 		switch (sc->sc_desc->ports[i].type) {
294 		case PUC_PORT_TYPE_COM:
295 			typestr = "sio";
296 			break;
297 		default:
298 			continue;
299 		}
300 		pdev = malloc(sizeof(struct puc_device), M_DEVBUF,
301 		    M_NOWAIT | M_ZERO);
302 		if (!pdev)
303 			continue;
304 		resource_list_init(&pdev->resources);
305 
306 		/* First fake up an IRQ resource. */
307 		resource_list_add(&pdev->resources, SYS_RES_IRQ, 0,
308 		    rman_get_start(sc->irqres), rman_get_end(sc->irqres),
309 		    rman_get_end(sc->irqres) - rman_get_start(sc->irqres) + 1);
310 		rle = resource_list_find(&pdev->resources, SYS_RES_IRQ, 0);
311 		rle->res = sc->irqres;
312 
313 		/* Now fake an IOPORT resource */
314 		res = sc->sc_bar_mappings[bidx].res;
315 		resource_list_add(&pdev->resources, SYS_RES_IOPORT, 0,
316 		    rman_get_start(res) + sc->sc_desc->ports[i].offset,
317 		    rman_get_end(res) + sc->sc_desc->ports[i].offset + 8 - 1,
318 		    8);
319 		rle = resource_list_find(&pdev->resources, SYS_RES_IOPORT, 0);
320 
321 		if (sc->barmuxed == 0) {
322 			rle->res = sc->sc_bar_mappings[bidx].res;
323 		} else {
324 			rle->res = malloc(sizeof(struct resource), M_DEVBUF,
325 			    M_WAITOK | M_ZERO);
326 			if (rle->res == NULL) {
327 				free(pdev, M_DEVBUF);
328 				return (ENOMEM);
329 			}
330 
331 			rle->res->r_start = rman_get_start(res) +
332 			    sc->sc_desc->ports[i].offset;
333 			rle->res->r_end = rle->res->r_start + 8 - 1;
334 			rle->res->r_bustag = rman_get_bustag(res);
335 			bus_space_subregion(rle->res->r_bustag,
336 			    rman_get_bushandle(res),
337 			    sc->sc_desc->ports[i].offset, 8,
338 			    &rle->res->r_bushandle);
339 		}
340 
341 		pdev->serialfreq = sc->sc_desc->ports[i].serialfreq;
342 
343 		childunit = puc_find_free_unit(typestr);
344 		sc->sc_ports[i].dev = device_add_child(dev, typestr, childunit);
345 		if (sc->sc_ports[i].dev == NULL) {
346 			if (sc->barmuxed) {
347 				bus_space_unmap(rman_get_bustag(rle->res),
348 						rman_get_bushandle(rle->res),
349 						8);
350 				free(rle->res, M_DEVBUF);
351 				free(pdev, M_DEVBUF);
352 			}
353 			continue;
354 		}
355 		device_set_ivars(sc->sc_ports[i].dev, pdev);
356 		device_set_desc(sc->sc_ports[i].dev, sc->sc_desc->name);
357 		if (!bootverbose)
358 			device_quiet(sc->sc_ports[i].dev);
359 #ifdef PUC_DEBUG
360 		printf("puc: type %d, bar %x, offset %x\n",
361 		    sc->sc_desc->ports[i].type,
362 		    sc->sc_desc->ports[i].bar,
363 		    sc->sc_desc->ports[i].offset);
364 		print_resource_list(&pdev->resources);
365 #endif
366 		device_set_flags(sc->sc_ports[i].dev,
367 		    sc->sc_desc->ports[i].flags);
368 		if (device_probe_and_attach(sc->sc_ports[i].dev) != 0) {
369 			if (sc->barmuxed) {
370 				bus_space_unmap(rman_get_bustag(rle->res),
371 						rman_get_bushandle(rle->res),
372 						8);
373 				free(rle->res, M_DEVBUF);
374 				free(pdev, M_DEVBUF);
375 			}
376 		}
377 	}
378 
379 #ifdef PUC_DEBUG
380 	bootverbose = 0;
381 #endif
382 	return (0);
383 }
384 
385 static u_int32_t
386 puc_ilr_read(struct puc_softc *sc)
387 {
388 	u_int32_t mask;
389 	int i;
390 
391 	mask = 0;
392 	switch (sc->sc_desc->ilr_type) {
393 	case PUC_ILR_TYPE_DIGI:
394 		for (i = 1; i >= 0; i--) {
395 			mask = (mask << 8) | (bus_space_read_1(sc->ilr_st,
396 			    sc->ilr_sh, sc->sc_desc->ilr_offset[i]) & 0xff);
397 		}
398 		break;
399 
400 	default:
401 		mask = 0xffffffff;
402 		break;
403 	}
404 	return (mask);
405 }
406 
407 /*
408  * This is an interrupt handler. For boards that can't tell us which
409  * device generated the interrupt it just calls all the registered
410  * handlers sequencially, but for boards that can tell us which
411  * device(s) generated the interrupt it calls only handlers for devices
412  * that actually generated the interrupt.
413  */
414 static void
415 puc_intr(void *arg)
416 {
417 	int i;
418 	u_int32_t ilr_mask;
419 	struct puc_softc *sc;
420 
421 	sc = (struct puc_softc *)arg;
422 	ilr_mask = sc->ilr_enabled ? puc_ilr_read(sc) : 0xffffffff;
423 	for (i = 0; i < PUC_MAX_PORTS; i++)
424 		if (sc->sc_ports[i].ihand != NULL &&
425 		    ((ilr_mask >> i) & 0x00000001))
426 			(sc->sc_ports[i].ihand)(sc->sc_ports[i].ihandarg);
427 }
428 
429 static const struct puc_device_description *
430 puc_find_description(uint32_t vend, uint32_t prod, uint32_t svend,
431     uint32_t sprod)
432 {
433 	int i;
434 
435 #define checkreg(val, index) \
436     (((val) & puc_devices[i].rmask[(index)]) == puc_devices[i].rval[(index)])
437 
438 	for (i = 0; puc_devices[i].name != NULL; i++) {
439 		if (checkreg(vend, PUC_REG_VEND) &&
440 		    checkreg(prod, PUC_REG_PROD) &&
441 		    checkreg(svend, PUC_REG_SVEND) &&
442 		    checkreg(sprod, PUC_REG_SPROD))
443 			return (&puc_devices[i]);
444 	}
445 
446 #undef checkreg
447 
448 	return (NULL);
449 }
450 
451 /*
452  * It might be possible to make these more generic if we can detect patterns.
453  * For instance maybe if the size of a bar is 0x400 (the old isa space) it
454  * might contain one or more superio chips.
455  */
456 static void
457 puc_config_superio(device_t dev)
458 {
459 	struct puc_softc *sc = (struct puc_softc *)device_get_softc(dev);
460 
461 	if (sc->sc_desc->rval[PUC_REG_VEND] == 0x1592 &&
462 	    sc->sc_desc->rval[PUC_REG_PROD] == 0x0781)
463 		puc_config_win877(sc->sc_bar_mappings[0].res);
464 }
465 
466 #define rdspio(indx)		(bus_space_write_1(bst, bsh, efir, indx), \
467 				bus_space_read_1(bst, bsh, efdr))
468 #define wrspio(indx,data)	(bus_space_write_1(bst, bsh, efir, indx), \
469 				bus_space_write_1(bst, bsh, efdr, data))
470 
471 #ifdef PUC_DEBUG
472 static void
473 puc_print_win877(bus_space_tag_t bst, bus_space_handle_t bsh, u_int efir,
474 	u_int efdr)
475 {
476 	u_char cr00, cr01, cr04, cr09, cr0d, cr14, cr15, cr16, cr17;
477 	u_char cr18, cr19, cr24, cr25, cr28, cr2c, cr31, cr32;
478 
479 	cr00 = rdspio(0x00);
480 	cr01 = rdspio(0x01);
481 	cr04 = rdspio(0x04);
482 	cr09 = rdspio(0x09);
483 	cr0d = rdspio(0x0d);
484 	cr14 = rdspio(0x14);
485 	cr15 = rdspio(0x15);
486 	cr16 = rdspio(0x16);
487 	cr17 = rdspio(0x17);
488 	cr18 = rdspio(0x18);
489 	cr19 = rdspio(0x19);
490 	cr24 = rdspio(0x24);
491 	cr25 = rdspio(0x25);
492 	cr28 = rdspio(0x28);
493 	cr2c = rdspio(0x2c);
494 	cr31 = rdspio(0x31);
495 	cr32 = rdspio(0x32);
496 	printf("877T: cr00 %x, cr01 %x, cr04 %x, cr09 %x, cr0d %x, cr14 %x, "
497 	    "cr15 %x, cr16 %x, cr17 %x, cr18 %x, cr19 %x, cr24 %x, cr25 %x, "
498 	    "cr28 %x, cr2c %x, cr31 %x, cr32 %x\n", cr00, cr01, cr04, cr09,
499 	    cr0d, cr14, cr15, cr16, cr17,
500 	    cr18, cr19, cr24, cr25, cr28, cr2c, cr31, cr32);
501 }
502 #endif
503 
504 static void
505 puc_config_win877(struct resource *res)
506 {
507 	u_char val;
508 	u_int efir, efdr;
509 	bus_space_tag_t bst;
510 	bus_space_handle_t bsh;
511 
512 	bst = rman_get_bustag(res);
513 	bsh = rman_get_bushandle(res);
514 
515 	/* configure the first W83877TF */
516 	bus_space_write_1(bst, bsh, 0x250, 0x89);
517 	efir = 0x251;
518 	efdr = 0x252;
519 	val = rdspio(0x09) & 0x0f;
520 	if (val != 0x0c) {
521 		printf("conf_win877: Oops not a W83877TF\n");
522 		return;
523 	}
524 
525 #ifdef PUC_DEBUG
526 	printf("before: ");
527 	puc_print_win877(bst, bsh, efir, efdr);
528 #endif
529 
530 	val = rdspio(0x16);
531 	val |= 0x04;
532 	wrspio(0x16, val);
533 	val &= ~0x04;
534 	wrspio(0x16, val);
535 
536 	wrspio(0x24, 0x2e8 >> 2);
537 	wrspio(0x25, 0x2f8 >> 2);
538 	wrspio(0x17, 0x03);
539 	wrspio(0x28, 0x43);
540 
541 #ifdef PUC_DEBUG
542 	printf("after: ");
543 	puc_print_win877(bst, bsh, efir, efdr);
544 #endif
545 
546 	bus_space_write_1(bst, bsh, 0x250, 0xaa);
547 
548 	/* configure the second W83877TF */
549 	bus_space_write_1(bst, bsh, 0x3f0, 0x87);
550 	bus_space_write_1(bst, bsh, 0x3f0, 0x87);
551 	efir = 0x3f0;
552 	efdr = 0x3f1;
553 	val = rdspio(0x09) & 0x0f;
554 	if (val != 0x0c) {
555 		printf("conf_win877: Oops not a W83877TF\n");
556 		return;
557 	}
558 
559 #ifdef PUC_DEBUG
560 	printf("before: ");
561 	puc_print_win877(bst, bsh, efir, efdr);
562 #endif
563 
564 	val = rdspio(0x16);
565 	val |= 0x04;
566 	wrspio(0x16, val);
567 	val &= ~0x04;
568 	wrspio(0x16, val);
569 
570 	wrspio(0x24, 0x3e8 >> 2);
571 	wrspio(0x25, 0x3f8 >> 2);
572 	wrspio(0x17, 0x03);
573 	wrspio(0x28, 0x43);
574 
575 #ifdef PUC_DEBUG
576 	printf("after: ");
577 	puc_print_win877(bst, bsh, efir, efdr);
578 #endif
579 
580 	bus_space_write_1(bst, bsh, 0x3f0, 0xaa);
581 }
582 
583 #undef rdspio
584 #undef wrspio
585 
586 static int puc_find_free_unit(char *name)
587 {
588 	devclass_t dc;
589 	int start;
590 	int unit;
591 
592 	unit = 0;
593 	start = 0;
594 	while (resource_int_value(name, unit, "port", &start) == 0 &&
595 	    start > 0)
596 		unit++;
597 	dc = devclass_find(name);
598 	if (dc == NULL)
599 		return (-1);
600 	while (devclass_get_device(dc, unit))
601 		unit++;
602 #ifdef PUC_DEBUG
603 	printf("puc: Using %s%d\n", name, unit);
604 #endif
605 	return (unit);
606 }
607 
608 #ifdef PUC_DEBUG
609 static void
610 puc_print_resource_list(struct resource_list *rl)
611 {
612 	struct resource_list_entry *rle;
613 
614 	printf("print_resource_list: rl %p\n", rl);
615 	SLIST_FOREACH(rle, rl, link)
616 		printf("type %x, rid %x\n", rle->type, rle->rid);
617 	printf("print_resource_list: end.\n");
618 }
619 #endif
620 
621 static struct resource *
622 puc_alloc_resource(device_t dev, device_t child, int type, int *rid,
623     u_long start, u_long end, u_long count, u_int flags)
624 {
625 	struct puc_device *pdev;
626 	struct resource *retval;
627 	struct resource_list *rl;
628 	struct resource_list_entry *rle;
629 
630 	pdev = device_get_ivars(child);
631 	rl = &pdev->resources;
632 
633 #ifdef PUC_DEBUG
634 	printf("puc_alloc_resource: pdev %p, looking for t %x, r %x\n",
635 	    pdev, type, *rid);
636 	puc_print_resource_list(rl);
637 #endif
638 	retval = NULL;
639 	rle = resource_list_find(rl, type, *rid);
640 	if (rle) {
641 		start = rle->start;
642 		end = rle->end;
643 		count = rle->count;
644 #ifdef PUC_DEBUG
645 		printf("found rle, %lx, %lx, %lx\n", start, end, count);
646 #endif
647 		retval = rle->res;
648 	} else
649 		printf("oops rle is gone\n");
650 
651 	return (retval);
652 }
653 
654 static int
655 puc_release_resource(device_t dev, device_t child, int type, int rid,
656     struct resource *res)
657 {
658 	return (0);
659 }
660 
661 static int
662 puc_get_resource(device_t dev, device_t child, int type, int rid,
663     u_long *startp, u_long *countp)
664 {
665 	struct puc_device *pdev;
666 	struct resource_list *rl;
667 	struct resource_list_entry *rle;
668 
669 	pdev = device_get_ivars(child);
670 	rl = &pdev->resources;
671 
672 #ifdef PUC_DEBUG
673 	printf("puc_get_resource: pdev %p, looking for t %x, r %x\n", pdev,
674 	    type, rid);
675 	puc_print_resource_list(rl);
676 #endif
677 	rle = resource_list_find(rl, type, rid);
678 	if (rle) {
679 #ifdef PUC_DEBUG
680 		printf("found rle %p,", rle);
681 #endif
682 		if (startp != NULL)
683 			*startp = rle->start;
684 		if (countp != NULL)
685 			*countp = rle->count;
686 #ifdef PUC_DEBUG
687 		printf(" %lx, %lx\n", rle->start, rle->count);
688 #endif
689 		return (0);
690 	} else
691 		printf("oops rle is gone\n");
692 	return (ENXIO);
693 }
694 
695 static int
696 puc_setup_intr(device_t dev, device_t child, struct resource *r, int flags,
697 	       void (*ihand)(void *), void *arg, void **cookiep)
698 {
699 	int i;
700 	struct puc_softc *sc;
701 
702 	sc = (struct puc_softc *)device_get_softc(dev);
703 	for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
704 		if (sc->sc_ports[i].dev == child) {
705 			if (sc->sc_ports[i].ihand != 0)
706 				return (ENXIO);
707 			sc->sc_ports[i].ihand = ihand;
708 			sc->sc_ports[i].ihandarg = arg;
709 			*cookiep = arg;
710 			return (0);
711 		}
712 	}
713 	return (ENXIO);
714 }
715 
716 static int
717 puc_teardown_intr(device_t dev, device_t child, struct resource *r,
718 		  void *cookie)
719 {
720 	int i;
721 	struct puc_softc *sc;
722 
723 	sc = (struct puc_softc *)device_get_softc(dev);
724 	for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
725 		if (sc->sc_ports[i].dev == child) {
726 			sc->sc_ports[i].ihand = NULL;
727 			sc->sc_ports[i].ihandarg = NULL;
728 			return (0);
729 		}
730 	}
731 	return (ENXIO);
732 }
733 
734 static int
735 puc_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
736 {
737 	struct puc_device *pdev;
738 
739 	pdev = device_get_ivars(child);
740 	if (pdev == NULL)
741 		return (ENOENT);
742 
743 	switch(index) {
744 	case PUC_IVAR_FREQ:
745 		*result = pdev->serialfreq;
746 		break;
747 	default:
748 		return (ENOENT);
749 	}
750 	return (0);
751 }
752 
753 static device_method_t puc_pci_methods[] = {
754     /* Device interface */
755     DEVMETHOD(device_probe,		puc_pci_probe),
756     DEVMETHOD(device_attach,		puc_pci_attach),
757 
758     DEVMETHOD(bus_alloc_resource,	puc_alloc_resource),
759     DEVMETHOD(bus_release_resource,	puc_release_resource),
760     DEVMETHOD(bus_get_resource,		puc_get_resource),
761     DEVMETHOD(bus_read_ivar,		puc_read_ivar),
762     DEVMETHOD(bus_setup_intr,		puc_setup_intr),
763     DEVMETHOD(bus_teardown_intr,	puc_teardown_intr),
764     DEVMETHOD(bus_print_child,		bus_generic_print_child),
765     DEVMETHOD(bus_driver_added,		bus_generic_driver_added),
766     { 0, 0 }
767 };
768 
769 static driver_t puc_pci_driver = {
770 	"puc",
771 	puc_pci_methods,
772 	sizeof(struct puc_softc),
773 };
774 
775 static devclass_t puc_devclass;
776 
777 DRIVER_MODULE(puc, pci, puc_pci_driver, puc_devclass, 0, 0);
778