1 /* $OpenBSD: if_iwm.c,v 1.39 2015/03/23 00:35:19 jsg Exp $ */ 2 3 /* 4 * Copyright (c) 2014 genua mbh <info@genua.de> 5 * Copyright (c) 2014 Fixup Software Ltd. 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /*- 21 * Based on BSD-licensed source modules in the Linux iwlwifi driver, 22 * which were used as the reference documentation for this implementation. 23 * 24 * Driver version we are currently based off of is 25 * Linux 3.14.3 (tag id a2df521e42b1d9a23f620ac79dbfe8655a8391dd) 26 * 27 *********************************************************************** 28 * 29 * This file is provided under a dual BSD/GPLv2 license. When using or 30 * redistributing this file, you may do so under either license. 31 * 32 * GPL LICENSE SUMMARY 33 * 34 * Copyright(c) 2007 - 2013 Intel Corporation. All rights reserved. 35 * 36 * This program is free software; you can redistribute it and/or modify 37 * it under the terms of version 2 of the GNU General Public License as 38 * published by the Free Software Foundation. 39 * 40 * This program is distributed in the hope that it will be useful, but 41 * WITHOUT ANY WARRANTY; without even the implied warranty of 42 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 43 * General Public License for more details. 44 * 45 * You should have received a copy of the GNU General Public License 46 * along with this program; if not, write to the Free Software 47 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 48 * USA 49 * 50 * The full GNU General Public License is included in this distribution 51 * in the file called COPYING. 52 * 53 * Contact Information: 54 * Intel Linux Wireless <ilw@linux.intel.com> 55 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 56 * 57 * 58 * BSD LICENSE 59 * 60 * Copyright(c) 2005 - 2013 Intel Corporation. All rights reserved. 61 * All rights reserved. 62 * 63 * Redistribution and use in source and binary forms, with or without 64 * modification, are permitted provided that the following conditions 65 * are met: 66 * 67 * * Redistributions of source code must retain the above copyright 68 * notice, this list of conditions and the following disclaimer. 69 * * Redistributions in binary form must reproduce the above copyright 70 * notice, this list of conditions and the following disclaimer in 71 * the documentation and/or other materials provided with the 72 * distribution. 73 * * Neither the name Intel Corporation nor the names of its 74 * contributors may be used to endorse or promote products derived 75 * from this software without specific prior written permission. 76 * 77 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 78 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 79 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 80 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 81 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 82 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 83 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 84 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 85 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 86 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 87 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 88 */ 89 90 /*- 91 * Copyright (c) 2007-2010 Damien Bergamini <damien.bergamini@free.fr> 92 * 93 * Permission to use, copy, modify, and distribute this software for any 94 * purpose with or without fee is hereby granted, provided that the above 95 * copyright notice and this permission notice appear in all copies. 96 * 97 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 98 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 99 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 100 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 101 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 102 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 103 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 104 */ 105 /* 106 * DragonFly work 107 * 108 * NOTE: Relative to roughly August 8th sources, does not include FreeBSD 109 * changes to remove per-device network interface (DragonFly has not 110 * caught up to that yet on the WLAN side). 111 * 112 * Comprehensive list of adjustments for DragonFly not #ifdef'd: 113 * malloc -> kmalloc (in particular, changing improper M_NOWAIT 114 * specifications to M_INTWAIT. We still don't 115 * understand why FreeBSD uses M_NOWAIT for 116 * critical must-not-fail kmalloc()s). 117 * free -> kfree 118 * printf -> kprintf 119 * (bug fix) memset in iwm_reset_rx_ring. 120 * (debug) added several kprintf()s on error 121 * 122 * wlan_serialize_enter()/exit() hacks (will be removable when we 123 * do the device netif removal). 124 * header file paths (DFly allows localized path specifications). 125 * minor header file differences. 126 * 127 * Comprehensive list of adjustments for DragonFly #ifdef'd: 128 * (safety) added register read-back serialization in iwm_reset_rx_ring(). 129 * packet counters 130 * RUNNING and OACTIVE tests 131 * msleep -> iwmsleep (handle deadlocks due to dfly interrupt serializer) 132 * mtx -> lk (mtx functions -> lockmgr functions) 133 * callout differences 134 * taskqueue differences 135 * iwm_start() and ifq differences 136 * iwm_ioctl() differences 137 * MSI differences 138 * bus_setup_intr() differences 139 * minor PCI config register naming differences 140 */ 141 #include <sys/cdefs.h> 142 __FBSDID("$FreeBSD$"); 143 144 #include <sys/param.h> 145 #include <sys/bus.h> 146 #include <sys/endian.h> 147 #include <sys/firmware.h> 148 #include <sys/kernel.h> 149 #include <sys/malloc.h> 150 #include <sys/mbuf.h> 151 #include <sys/mutex.h> 152 #include <sys/module.h> 153 #include <sys/proc.h> 154 #include <sys/rman.h> 155 #include <sys/socket.h> 156 #include <sys/sockio.h> 157 #include <sys/sysctl.h> 158 #include <sys/linker.h> 159 160 #include <machine/endian.h> 161 162 #include <bus/pci/pcivar.h> 163 #include <bus/pci/pcireg.h> 164 165 #include <net/bpf.h> 166 167 #include <net/if.h> 168 #include <net/if_var.h> 169 #include <net/if_arp.h> 170 #include <net/ethernet.h> 171 #include <net/if_dl.h> 172 #include <net/if_media.h> 173 #include <net/if_types.h> 174 #include <net/ifq_var.h> 175 176 #include <netinet/in.h> 177 #include <netinet/in_systm.h> 178 #include <netinet/if_ether.h> 179 #include <netinet/ip.h> 180 181 #include <netproto/802_11/ieee80211_var.h> 182 #include <netproto/802_11/ieee80211_regdomain.h> 183 #include <netproto/802_11/ieee80211_ratectl.h> 184 #include <netproto/802_11/ieee80211_radiotap.h> 185 186 #include "if_iwmreg.h" 187 #include "if_iwmvar.h" 188 #include "if_iwm_debug.h" 189 #include "if_iwm_util.h" 190 #include "if_iwm_binding.h" 191 #include "if_iwm_phy_db.h" 192 #include "if_iwm_mac_ctxt.h" 193 #include "if_iwm_phy_ctxt.h" 194 #include "if_iwm_time_event.h" 195 #include "if_iwm_power.h" 196 #include "if_iwm_scan.h" 197 #include "if_iwm_pcie_trans.h" 198 199 const uint8_t iwm_nvm_channels[] = { 200 /* 2.4 GHz */ 201 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 202 /* 5 GHz */ 203 36, 40, 44 , 48, 52, 56, 60, 64, 204 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 205 149, 153, 157, 161, 165 206 }; 207 #define IWM_NUM_2GHZ_CHANNELS 14 208 209 /* 210 * XXX For now, there's simply a fixed set of rate table entries 211 * that are populated. 212 */ 213 const struct iwm_rate { 214 uint8_t rate; 215 uint8_t plcp; 216 } iwm_rates[] = { 217 { 2, IWM_RATE_1M_PLCP }, 218 { 4, IWM_RATE_2M_PLCP }, 219 { 11, IWM_RATE_5M_PLCP }, 220 { 22, IWM_RATE_11M_PLCP }, 221 { 12, IWM_RATE_6M_PLCP }, 222 { 18, IWM_RATE_9M_PLCP }, 223 { 24, IWM_RATE_12M_PLCP }, 224 { 36, IWM_RATE_18M_PLCP }, 225 { 48, IWM_RATE_24M_PLCP }, 226 { 72, IWM_RATE_36M_PLCP }, 227 { 96, IWM_RATE_48M_PLCP }, 228 { 108, IWM_RATE_54M_PLCP }, 229 }; 230 #define IWM_RIDX_CCK 0 231 #define IWM_RIDX_OFDM 4 232 #define IWM_RIDX_MAX (nitems(iwm_rates)-1) 233 #define IWM_RIDX_IS_CCK(_i_) ((_i_) < IWM_RIDX_OFDM) 234 #define IWM_RIDX_IS_OFDM(_i_) ((_i_) >= IWM_RIDX_OFDM) 235 236 static int iwm_store_cscheme(struct iwm_softc *, const uint8_t *, size_t); 237 static int iwm_firmware_store_section(struct iwm_softc *, 238 enum iwm_ucode_type, 239 const uint8_t *, size_t); 240 static int iwm_set_default_calib(struct iwm_softc *, const void *); 241 static void iwm_fw_info_free(struct iwm_fw_info *); 242 static int iwm_read_firmware(struct iwm_softc *, enum iwm_ucode_type); 243 static void iwm_dma_map_addr(void *, bus_dma_segment_t *, int, int); 244 static int iwm_dma_contig_alloc(bus_dma_tag_t, struct iwm_dma_info *, 245 bus_size_t, bus_size_t); 246 static void iwm_dma_contig_free(struct iwm_dma_info *); 247 static int iwm_alloc_fwmem(struct iwm_softc *); 248 static void iwm_free_fwmem(struct iwm_softc *); 249 static int iwm_alloc_sched(struct iwm_softc *); 250 static void iwm_free_sched(struct iwm_softc *); 251 static int iwm_alloc_kw(struct iwm_softc *); 252 static void iwm_free_kw(struct iwm_softc *); 253 static int iwm_alloc_ict(struct iwm_softc *); 254 static void iwm_free_ict(struct iwm_softc *); 255 static int iwm_alloc_rx_ring(struct iwm_softc *, struct iwm_rx_ring *); 256 static void iwm_reset_rx_ring(struct iwm_softc *, struct iwm_rx_ring *); 257 static void iwm_free_rx_ring(struct iwm_softc *, struct iwm_rx_ring *); 258 static int iwm_alloc_tx_ring(struct iwm_softc *, struct iwm_tx_ring *, 259 int); 260 static void iwm_reset_tx_ring(struct iwm_softc *, struct iwm_tx_ring *); 261 static void iwm_free_tx_ring(struct iwm_softc *, struct iwm_tx_ring *); 262 static void iwm_enable_interrupts(struct iwm_softc *); 263 static void iwm_restore_interrupts(struct iwm_softc *); 264 static void iwm_disable_interrupts(struct iwm_softc *); 265 static void iwm_ict_reset(struct iwm_softc *); 266 static int iwm_allow_mcast(struct ieee80211vap *, struct iwm_softc *); 267 static void iwm_stop_device(struct iwm_softc *); 268 static void iwm_mvm_nic_config(struct iwm_softc *); 269 static int iwm_nic_rx_init(struct iwm_softc *); 270 static int iwm_nic_tx_init(struct iwm_softc *); 271 static int iwm_nic_init(struct iwm_softc *); 272 static void iwm_enable_txq(struct iwm_softc *, int, int); 273 static int iwm_post_alive(struct iwm_softc *); 274 static int iwm_nvm_read_chunk(struct iwm_softc *, uint16_t, uint16_t, 275 uint16_t, uint8_t *, uint16_t *); 276 static int iwm_nvm_read_section(struct iwm_softc *, uint16_t, uint8_t *, 277 uint16_t *); 278 static void iwm_init_channel_map(struct iwm_softc *, 279 const uint16_t * const); 280 static int iwm_parse_nvm_data(struct iwm_softc *, const uint16_t *, 281 const uint16_t *, const uint16_t *, uint8_t, 282 uint8_t); 283 struct iwm_nvm_section; 284 static int iwm_parse_nvm_sections(struct iwm_softc *, 285 struct iwm_nvm_section *); 286 static int iwm_nvm_init(struct iwm_softc *); 287 static int iwm_firmware_load_chunk(struct iwm_softc *, uint32_t, 288 const uint8_t *, uint32_t); 289 static int iwm_load_firmware(struct iwm_softc *, enum iwm_ucode_type); 290 static int iwm_start_fw(struct iwm_softc *, enum iwm_ucode_type); 291 static int iwm_fw_alive(struct iwm_softc *, uint32_t); 292 static int iwm_send_tx_ant_cfg(struct iwm_softc *, uint8_t); 293 static int iwm_send_phy_cfg_cmd(struct iwm_softc *); 294 static int iwm_mvm_load_ucode_wait_alive(struct iwm_softc *, 295 enum iwm_ucode_type); 296 static int iwm_run_init_mvm_ucode(struct iwm_softc *, int); 297 static int iwm_rx_addbuf(struct iwm_softc *, int, int); 298 static int iwm_mvm_calc_rssi(struct iwm_softc *, struct iwm_rx_phy_info *); 299 static int iwm_mvm_get_signal_strength(struct iwm_softc *, 300 struct iwm_rx_phy_info *); 301 static void iwm_mvm_rx_rx_phy_cmd(struct iwm_softc *, 302 struct iwm_rx_packet *, 303 struct iwm_rx_data *); 304 static int iwm_get_noise(const struct iwm_mvm_statistics_rx_non_phy *); 305 static void iwm_mvm_rx_rx_mpdu(struct iwm_softc *, struct iwm_rx_packet *, 306 struct iwm_rx_data *); 307 static void iwm_mvm_rx_tx_cmd_single(struct iwm_softc *, 308 struct iwm_rx_packet *, 309 struct iwm_node *); 310 static void iwm_mvm_rx_tx_cmd(struct iwm_softc *, struct iwm_rx_packet *, 311 struct iwm_rx_data *); 312 static void iwm_cmd_done(struct iwm_softc *, struct iwm_rx_packet *); 313 #if 0 314 static void iwm_update_sched(struct iwm_softc *, int, int, uint8_t, 315 uint16_t); 316 #endif 317 static const struct iwm_rate * 318 iwm_tx_fill_cmd(struct iwm_softc *, struct iwm_node *, 319 struct ieee80211_frame *, struct iwm_tx_cmd *); 320 static int iwm_tx(struct iwm_softc *, struct mbuf *, 321 struct ieee80211_node *, int); 322 static int iwm_raw_xmit(struct ieee80211_node *, struct mbuf *, 323 const struct ieee80211_bpf_params *); 324 static void iwm_mvm_add_sta_cmd_v6_to_v5(struct iwm_mvm_add_sta_cmd_v6 *, 325 struct iwm_mvm_add_sta_cmd_v5 *); 326 static int iwm_mvm_send_add_sta_cmd_status(struct iwm_softc *, 327 struct iwm_mvm_add_sta_cmd_v6 *, 328 int *); 329 static int iwm_mvm_sta_send_to_fw(struct iwm_softc *, struct iwm_node *, 330 int); 331 static int iwm_mvm_add_sta(struct iwm_softc *, struct iwm_node *); 332 static int iwm_mvm_update_sta(struct iwm_softc *, struct iwm_node *); 333 static int iwm_mvm_add_int_sta_common(struct iwm_softc *, 334 struct iwm_int_sta *, 335 const uint8_t *, uint16_t, uint16_t); 336 static int iwm_mvm_add_aux_sta(struct iwm_softc *); 337 static int iwm_mvm_update_quotas(struct iwm_softc *, struct iwm_node *); 338 static int iwm_auth(struct ieee80211vap *, struct iwm_softc *); 339 static int iwm_assoc(struct ieee80211vap *, struct iwm_softc *); 340 static int iwm_release(struct iwm_softc *, struct iwm_node *); 341 static struct ieee80211_node * 342 iwm_node_alloc(struct ieee80211vap *, 343 const uint8_t[IEEE80211_ADDR_LEN]); 344 static void iwm_setrates(struct iwm_softc *, struct iwm_node *); 345 static int iwm_media_change(struct ifnet *); 346 static int iwm_newstate(struct ieee80211vap *, enum ieee80211_state, int); 347 static void iwm_endscan_cb(void *, int); 348 static int iwm_init_hw(struct iwm_softc *); 349 static void iwm_init(void *); 350 static void iwm_init_locked(struct iwm_softc *); 351 #if defined(__DragonFly__) 352 static void iwm_start(struct ifnet *, struct ifaltq_subque *); 353 #else 354 static void iwm_start(struct ifnet *); 355 #endif 356 static void iwm_start_locked(struct ifnet *); 357 static void iwm_stop(struct ifnet *, int); 358 static void iwm_stop_locked(struct ifnet *); 359 static void iwm_watchdog(void *); 360 #if defined(__DragonFly__) 361 static int iwm_ioctl(struct ifnet *, u_long, iwm_caddr_t, struct ucred *cred); 362 #else 363 static int iwm_ioctl(struct ifnet *, u_long, iwm_caddr_t); 364 #endif 365 #ifdef IWM_DEBUG 366 static const char * 367 iwm_desc_lookup(uint32_t); 368 static void iwm_nic_error(struct iwm_softc *); 369 #endif 370 static void iwm_notif_intr(struct iwm_softc *); 371 static void iwm_intr(void *); 372 static int iwm_attach(device_t); 373 static void iwm_preinit(void *); 374 static int iwm_detach_local(struct iwm_softc *sc, int); 375 static void iwm_init_task(void *); 376 static void iwm_radiotap_attach(struct iwm_softc *); 377 static struct ieee80211vap * 378 iwm_vap_create(struct ieee80211com *, 379 const char [IFNAMSIZ], int, 380 enum ieee80211_opmode, int, 381 const uint8_t [IEEE80211_ADDR_LEN], 382 const uint8_t [IEEE80211_ADDR_LEN]); 383 static void iwm_vap_delete(struct ieee80211vap *); 384 static void iwm_scan_start(struct ieee80211com *); 385 static void iwm_scan_end(struct ieee80211com *); 386 static void iwm_update_mcast(struct ifnet *); 387 static void iwm_set_channel(struct ieee80211com *); 388 static void iwm_scan_curchan(struct ieee80211_scan_state *, unsigned long); 389 static void iwm_scan_mindwell(struct ieee80211_scan_state *); 390 static int iwm_detach(device_t); 391 392 #if defined(__DragonFly__) 393 /* 394 * This is a hack due to the wlan_serializer deadlocking sleepers. 395 */ 396 int iwmsleep(void *chan, struct lock *lk, int flags, const char *wmesg, int to); 397 398 int 399 iwmsleep(void *chan, struct lock *lk, int flags, const char *wmesg, int to) 400 { 401 int error; 402 403 if (wlan_is_serialized()) { 404 wlan_serialize_exit(); 405 error = lksleep(chan, lk, flags, wmesg, to); 406 lockmgr(lk, LK_RELEASE); 407 wlan_serialize_enter(); 408 lockmgr(lk, LK_EXCLUSIVE); 409 } else { 410 error = lksleep(chan, lk, flags, wmesg, to); 411 } 412 return error; 413 } 414 415 #endif 416 417 /* 418 * Firmware parser. 419 */ 420 421 static int 422 iwm_store_cscheme(struct iwm_softc *sc, const uint8_t *data, size_t dlen) 423 { 424 const struct iwm_fw_cscheme_list *l = (const void *)data; 425 426 if (dlen < sizeof(*l) || 427 dlen < sizeof(l->size) + l->size * sizeof(*l->cs)) 428 return EINVAL; 429 430 /* we don't actually store anything for now, always use s/w crypto */ 431 432 return 0; 433 } 434 435 static int 436 iwm_firmware_store_section(struct iwm_softc *sc, 437 enum iwm_ucode_type type, const uint8_t *data, size_t dlen) 438 { 439 struct iwm_fw_sects *fws; 440 struct iwm_fw_onesect *fwone; 441 442 if (type >= IWM_UCODE_TYPE_MAX) 443 return EINVAL; 444 if (dlen < sizeof(uint32_t)) 445 return EINVAL; 446 447 fws = &sc->sc_fw.fw_sects[type]; 448 if (fws->fw_count >= IWM_UCODE_SECT_MAX) 449 return EINVAL; 450 451 fwone = &fws->fw_sect[fws->fw_count]; 452 453 /* first 32bit are device load offset */ 454 memcpy(&fwone->fws_devoff, data, sizeof(uint32_t)); 455 456 /* rest is data */ 457 fwone->fws_data = data + sizeof(uint32_t); 458 fwone->fws_len = dlen - sizeof(uint32_t); 459 460 fws->fw_count++; 461 fws->fw_totlen += fwone->fws_len; 462 463 return 0; 464 } 465 466 /* iwlwifi: iwl-drv.c */ 467 struct iwm_tlv_calib_data { 468 uint32_t ucode_type; 469 struct iwm_tlv_calib_ctrl calib; 470 } __packed; 471 472 static int 473 iwm_set_default_calib(struct iwm_softc *sc, const void *data) 474 { 475 const struct iwm_tlv_calib_data *def_calib = data; 476 uint32_t ucode_type = le32toh(def_calib->ucode_type); 477 478 if (ucode_type >= IWM_UCODE_TYPE_MAX) { 479 device_printf(sc->sc_dev, 480 "Wrong ucode_type %u for default " 481 "calibration.\n", ucode_type); 482 return EINVAL; 483 } 484 485 sc->sc_default_calib[ucode_type].flow_trigger = 486 def_calib->calib.flow_trigger; 487 sc->sc_default_calib[ucode_type].event_trigger = 488 def_calib->calib.event_trigger; 489 490 return 0; 491 } 492 493 static void 494 iwm_fw_info_free(struct iwm_fw_info *fw) 495 { 496 firmware_put(fw->fw_rawdata, FIRMWARE_UNLOAD); 497 fw->fw_rawdata = NULL; 498 fw->fw_rawsize = 0; 499 /* don't touch fw->fw_status */ 500 memset(fw->fw_sects, 0, sizeof(fw->fw_sects)); 501 } 502 503 static int 504 iwm_read_firmware(struct iwm_softc *sc, enum iwm_ucode_type ucode_type) 505 { 506 struct iwm_fw_info *fw = &sc->sc_fw; 507 const struct iwm_tlv_ucode_header *uhdr; 508 struct iwm_ucode_tlv tlv; 509 enum iwm_ucode_tlv_type tlv_type; 510 const struct firmware *fwp; 511 const uint8_t *data; 512 int error = 0; 513 size_t len; 514 515 if (fw->fw_status == IWM_FW_STATUS_DONE && 516 ucode_type != IWM_UCODE_TYPE_INIT) 517 return 0; 518 519 while (fw->fw_status == IWM_FW_STATUS_INPROGRESS) { 520 #if defined(__DragonFly__) 521 iwmsleep(&sc->sc_fw, &sc->sc_lk, 0, "iwmfwp", 0); 522 #else 523 msleep(&sc->sc_fw, &sc->sc_mtx, 0, "iwmfwp", 0); 524 #endif 525 } 526 fw->fw_status = IWM_FW_STATUS_INPROGRESS; 527 528 if (fw->fw_rawdata != NULL) 529 iwm_fw_info_free(fw); 530 531 /* 532 * Load firmware into driver memory. 533 * fw_rawdata and fw_rawsize will be set. 534 */ 535 IWM_UNLOCK(sc); 536 fwp = firmware_get(sc->sc_fwname); 537 if (fwp == NULL) { 538 device_printf(sc->sc_dev, 539 "could not read firmware %s (error %d)\n", 540 sc->sc_fwname, error); 541 IWM_LOCK(sc); 542 goto out; 543 } 544 IWM_LOCK(sc); 545 fw->fw_rawdata = fwp->data; 546 fw->fw_rawsize = fwp->datasize; 547 548 /* 549 * Parse firmware contents 550 */ 551 552 uhdr = (const void *)fw->fw_rawdata; 553 if (*(const uint32_t *)fw->fw_rawdata != 0 554 || le32toh(uhdr->magic) != IWM_TLV_UCODE_MAGIC) { 555 device_printf(sc->sc_dev, "invalid firmware %s\n", 556 sc->sc_fwname); 557 error = EINVAL; 558 goto out; 559 } 560 561 sc->sc_fwver = le32toh(uhdr->ver); 562 data = uhdr->data; 563 len = fw->fw_rawsize - sizeof(*uhdr); 564 565 while (len >= sizeof(tlv)) { 566 size_t tlv_len; 567 const void *tlv_data; 568 569 memcpy(&tlv, data, sizeof(tlv)); 570 tlv_len = le32toh(tlv.length); 571 tlv_type = le32toh(tlv.type); 572 573 len -= sizeof(tlv); 574 data += sizeof(tlv); 575 tlv_data = data; 576 577 if (len < tlv_len) { 578 device_printf(sc->sc_dev, 579 "firmware too short: %zu bytes\n", 580 len); 581 error = EINVAL; 582 goto parse_out; 583 } 584 585 switch ((int)tlv_type) { 586 case IWM_UCODE_TLV_PROBE_MAX_LEN: 587 if (tlv_len < sizeof(uint32_t)) { 588 device_printf(sc->sc_dev, 589 "%s: PROBE_MAX_LEN (%d) < sizeof(uint32_t)\n", 590 __func__, 591 (int) tlv_len); 592 error = EINVAL; 593 goto parse_out; 594 } 595 sc->sc_capa_max_probe_len 596 = le32toh(*(const uint32_t *)tlv_data); 597 /* limit it to something sensible */ 598 if (sc->sc_capa_max_probe_len > (1<<16)) { 599 IWM_DPRINTF(sc, IWM_DEBUG_FIRMWARE_TLV, 600 "%s: IWM_UCODE_TLV_PROBE_MAX_LEN " 601 "ridiculous\n", __func__); 602 error = EINVAL; 603 goto parse_out; 604 } 605 break; 606 case IWM_UCODE_TLV_PAN: 607 if (tlv_len) { 608 device_printf(sc->sc_dev, 609 "%s: IWM_UCODE_TLV_PAN: tlv_len (%d) > 0\n", 610 __func__, 611 (int) tlv_len); 612 error = EINVAL; 613 goto parse_out; 614 } 615 sc->sc_capaflags |= IWM_UCODE_TLV_FLAGS_PAN; 616 break; 617 case IWM_UCODE_TLV_FLAGS: 618 if (tlv_len < sizeof(uint32_t)) { 619 device_printf(sc->sc_dev, 620 "%s: IWM_UCODE_TLV_FLAGS: tlv_len (%d) < sizeof(uint32_t)\n", 621 __func__, 622 (int) tlv_len); 623 error = EINVAL; 624 goto parse_out; 625 } 626 /* 627 * Apparently there can be many flags, but Linux driver 628 * parses only the first one, and so do we. 629 * 630 * XXX: why does this override IWM_UCODE_TLV_PAN? 631 * Intentional or a bug? Observations from 632 * current firmware file: 633 * 1) TLV_PAN is parsed first 634 * 2) TLV_FLAGS contains TLV_FLAGS_PAN 635 * ==> this resets TLV_PAN to itself... hnnnk 636 */ 637 sc->sc_capaflags = le32toh(*(const uint32_t *)tlv_data); 638 break; 639 case IWM_UCODE_TLV_CSCHEME: 640 if ((error = iwm_store_cscheme(sc, 641 tlv_data, tlv_len)) != 0) { 642 device_printf(sc->sc_dev, 643 "%s: iwm_store_cscheme(): returned %d\n", 644 __func__, 645 error); 646 goto parse_out; 647 } 648 break; 649 case IWM_UCODE_TLV_NUM_OF_CPU: 650 if (tlv_len != sizeof(uint32_t)) { 651 device_printf(sc->sc_dev, 652 "%s: IWM_UCODE_TLV_NUM_OF_CPU: tlv_len (%d) < sizeof(uint32_t)\n", 653 __func__, 654 (int) tlv_len); 655 error = EINVAL; 656 goto parse_out; 657 } 658 if (le32toh(*(const uint32_t*)tlv_data) != 1) { 659 device_printf(sc->sc_dev, 660 "%s: driver supports " 661 "only TLV_NUM_OF_CPU == 1", 662 __func__); 663 error = EINVAL; 664 goto parse_out; 665 } 666 break; 667 case IWM_UCODE_TLV_SEC_RT: 668 if ((error = iwm_firmware_store_section(sc, 669 IWM_UCODE_TYPE_REGULAR, tlv_data, tlv_len)) != 0) { 670 device_printf(sc->sc_dev, 671 "%s: IWM_UCODE_TYPE_REGULAR: iwm_firmware_store_section() failed; %d\n", 672 __func__, 673 error); 674 goto parse_out; 675 } 676 break; 677 case IWM_UCODE_TLV_SEC_INIT: 678 if ((error = iwm_firmware_store_section(sc, 679 IWM_UCODE_TYPE_INIT, tlv_data, tlv_len)) != 0) { 680 device_printf(sc->sc_dev, 681 "%s: IWM_UCODE_TYPE_INIT: iwm_firmware_store_section() failed; %d\n", 682 __func__, 683 error); 684 goto parse_out; 685 } 686 break; 687 case IWM_UCODE_TLV_SEC_WOWLAN: 688 if ((error = iwm_firmware_store_section(sc, 689 IWM_UCODE_TYPE_WOW, tlv_data, tlv_len)) != 0) { 690 device_printf(sc->sc_dev, 691 "%s: IWM_UCODE_TYPE_WOW: iwm_firmware_store_section() failed; %d\n", 692 __func__, 693 error); 694 goto parse_out; 695 } 696 break; 697 case IWM_UCODE_TLV_DEF_CALIB: 698 if (tlv_len != sizeof(struct iwm_tlv_calib_data)) { 699 device_printf(sc->sc_dev, 700 "%s: IWM_UCODE_TLV_DEV_CALIB: tlv_len (%d) < sizeof(iwm_tlv_calib_data) (%d)\n", 701 __func__, 702 (int) tlv_len, 703 (int) sizeof(struct iwm_tlv_calib_data)); 704 error = EINVAL; 705 goto parse_out; 706 } 707 if ((error = iwm_set_default_calib(sc, tlv_data)) != 0) { 708 device_printf(sc->sc_dev, 709 "%s: iwm_set_default_calib() failed: %d\n", 710 __func__, 711 error); 712 goto parse_out; 713 } 714 break; 715 case IWM_UCODE_TLV_PHY_SKU: 716 if (tlv_len != sizeof(uint32_t)) { 717 error = EINVAL; 718 device_printf(sc->sc_dev, 719 "%s: IWM_UCODE_TLV_PHY_SKU: tlv_len (%d) < sizeof(uint32_t)\n", 720 __func__, 721 (int) tlv_len); 722 goto parse_out; 723 } 724 sc->sc_fw_phy_config = 725 le32toh(*(const uint32_t *)tlv_data); 726 break; 727 728 case IWM_UCODE_TLV_API_CHANGES_SET: 729 case IWM_UCODE_TLV_ENABLED_CAPABILITIES: 730 /* ignore, not used by current driver */ 731 break; 732 733 default: 734 device_printf(sc->sc_dev, 735 "%s: unknown firmware section %d, abort\n", 736 __func__, tlv_type); 737 error = EINVAL; 738 goto parse_out; 739 } 740 741 len -= roundup(tlv_len, 4); 742 data += roundup(tlv_len, 4); 743 } 744 745 KASSERT(error == 0, ("unhandled error")); 746 747 parse_out: 748 if (error) { 749 device_printf(sc->sc_dev, "firmware parse error %d, " 750 "section type %d\n", error, tlv_type); 751 } 752 753 if (!(sc->sc_capaflags & IWM_UCODE_TLV_FLAGS_PM_CMD_SUPPORT)) { 754 device_printf(sc->sc_dev, 755 "device uses unsupported power ops\n"); 756 error = ENOTSUP; 757 } 758 759 out: 760 if (error) { 761 fw->fw_status = IWM_FW_STATUS_NONE; 762 if (fw->fw_rawdata != NULL) 763 iwm_fw_info_free(fw); 764 } else 765 fw->fw_status = IWM_FW_STATUS_DONE; 766 wakeup(&sc->sc_fw); 767 768 return error; 769 } 770 771 /* 772 * DMA resource routines 773 */ 774 775 static void 776 iwm_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 777 { 778 if (error != 0) 779 return; 780 KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs)); 781 *(bus_addr_t *)arg = segs[0].ds_addr; 782 } 783 784 static int 785 iwm_dma_contig_alloc(bus_dma_tag_t tag, struct iwm_dma_info *dma, 786 bus_size_t size, bus_size_t alignment) 787 { 788 int error; 789 790 dma->tag = NULL; 791 dma->size = size; 792 793 #if defined(__DragonFly__) 794 error = bus_dma_tag_create(tag, alignment, 795 0, 796 BUS_SPACE_MAXADDR_32BIT, 797 BUS_SPACE_MAXADDR, 798 NULL, NULL, 799 size, 1, size, 800 BUS_DMA_NOWAIT, &dma->tag); 801 #else 802 error = bus_dma_tag_create(tag, alignment, 803 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, size, 804 1, size, BUS_DMA_NOWAIT, NULL, NULL, &dma->tag); 805 #endif 806 if (error != 0) 807 goto fail; 808 809 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr, 810 BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, &dma->map); 811 if (error != 0) 812 goto fail; 813 814 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, size, 815 iwm_dma_map_addr, &dma->paddr, BUS_DMA_NOWAIT); 816 if (error != 0) 817 goto fail; 818 819 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE); 820 821 return 0; 822 823 fail: 824 iwm_dma_contig_free(dma); 825 826 return error; 827 } 828 829 static void 830 iwm_dma_contig_free(struct iwm_dma_info *dma) 831 { 832 if (dma->map != NULL) { 833 if (dma->vaddr != NULL) { 834 bus_dmamap_sync(dma->tag, dma->map, 835 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 836 bus_dmamap_unload(dma->tag, dma->map); 837 bus_dmamem_free(dma->tag, dma->vaddr, dma->map); 838 dma->vaddr = NULL; 839 } 840 bus_dmamap_destroy(dma->tag, dma->map); 841 dma->map = NULL; 842 } 843 if (dma->tag != NULL) { 844 bus_dma_tag_destroy(dma->tag); 845 dma->tag = NULL; 846 } 847 848 } 849 850 /* fwmem is used to load firmware onto the card */ 851 static int 852 iwm_alloc_fwmem(struct iwm_softc *sc) 853 { 854 /* Must be aligned on a 16-byte boundary. */ 855 return iwm_dma_contig_alloc(sc->sc_dmat, &sc->fw_dma, 856 sc->sc_fwdmasegsz, 16); 857 } 858 859 static void 860 iwm_free_fwmem(struct iwm_softc *sc) 861 { 862 iwm_dma_contig_free(&sc->fw_dma); 863 } 864 865 /* tx scheduler rings. not used? */ 866 static int 867 iwm_alloc_sched(struct iwm_softc *sc) 868 { 869 int rv; 870 871 /* TX scheduler rings must be aligned on a 1KB boundary. */ 872 rv = iwm_dma_contig_alloc(sc->sc_dmat, &sc->sched_dma, 873 nitems(sc->txq) * sizeof(struct iwm_agn_scd_bc_tbl), 1024); 874 return rv; 875 } 876 877 static void 878 iwm_free_sched(struct iwm_softc *sc) 879 { 880 iwm_dma_contig_free(&sc->sched_dma); 881 } 882 883 /* keep-warm page is used internally by the card. see iwl-fh.h for more info */ 884 static int 885 iwm_alloc_kw(struct iwm_softc *sc) 886 { 887 return iwm_dma_contig_alloc(sc->sc_dmat, &sc->kw_dma, 4096, 4096); 888 } 889 890 static void 891 iwm_free_kw(struct iwm_softc *sc) 892 { 893 iwm_dma_contig_free(&sc->kw_dma); 894 } 895 896 /* interrupt cause table */ 897 static int 898 iwm_alloc_ict(struct iwm_softc *sc) 899 { 900 return iwm_dma_contig_alloc(sc->sc_dmat, &sc->ict_dma, 901 IWM_ICT_SIZE, 1<<IWM_ICT_PADDR_SHIFT); 902 } 903 904 static void 905 iwm_free_ict(struct iwm_softc *sc) 906 { 907 iwm_dma_contig_free(&sc->ict_dma); 908 } 909 910 static int 911 iwm_alloc_rx_ring(struct iwm_softc *sc, struct iwm_rx_ring *ring) 912 { 913 bus_size_t size; 914 int i, error; 915 916 ring->cur = 0; 917 918 /* Allocate RX descriptors (256-byte aligned). */ 919 size = IWM_RX_RING_COUNT * sizeof(uint32_t); 920 error = iwm_dma_contig_alloc(sc->sc_dmat, &ring->desc_dma, size, 256); 921 if (error != 0) { 922 device_printf(sc->sc_dev, 923 "could not allocate RX ring DMA memory\n"); 924 goto fail; 925 } 926 ring->desc = ring->desc_dma.vaddr; 927 928 /* Allocate RX status area (16-byte aligned). */ 929 error = iwm_dma_contig_alloc(sc->sc_dmat, &ring->stat_dma, 930 sizeof(*ring->stat), 16); 931 if (error != 0) { 932 device_printf(sc->sc_dev, 933 "could not allocate RX status DMA memory\n"); 934 goto fail; 935 } 936 ring->stat = ring->stat_dma.vaddr; 937 938 /* Create RX buffer DMA tag. */ 939 #if defined(__DragonFly__) 940 error = bus_dma_tag_create(sc->sc_dmat, PAGE_SIZE, 941 0, 942 BUS_SPACE_MAXADDR_32BIT, 943 BUS_SPACE_MAXADDR, 944 NULL, NULL, 945 IWM_RBUF_SIZE, 1, IWM_RBUF_SIZE, 946 BUS_DMA_NOWAIT, &ring->data_dmat); 947 #else 948 error = bus_dma_tag_create(sc->sc_dmat, 1, 0, 949 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 950 IWM_RBUF_SIZE, 1, IWM_RBUF_SIZE, BUS_DMA_NOWAIT, NULL, NULL, 951 &ring->data_dmat); 952 #endif 953 if (error != 0) { 954 device_printf(sc->sc_dev, 955 "%s: could not create RX buf DMA tag, error %d\n", 956 __func__, error); 957 goto fail; 958 } 959 960 /* 961 * Allocate and map RX buffers. 962 */ 963 for (i = 0; i < IWM_RX_RING_COUNT; i++) { 964 if ((error = iwm_rx_addbuf(sc, IWM_RBUF_SIZE, i)) != 0) { 965 goto fail; 966 } 967 } 968 return 0; 969 970 fail: iwm_free_rx_ring(sc, ring); 971 return error; 972 } 973 974 static void 975 iwm_reset_rx_ring(struct iwm_softc *sc, struct iwm_rx_ring *ring) 976 { 977 /* XXX conditional nic locks are stupid */ 978 /* XXX print out if we can't lock the NIC? */ 979 if (iwm_nic_lock(sc)) { 980 /* XXX handle if RX stop doesn't finish? */ 981 (void) iwm_pcie_rx_stop(sc); 982 iwm_nic_unlock(sc); 983 } 984 ring->cur = 0; 985 986 /* 987 * The hw rx ring index in shared memory must also be cleared, 988 * otherwise the discrepancy can cause reprocessing chaos. 989 */ 990 memset(sc->rxq.stat, 0, sizeof(*sc->rxq.stat)); 991 } 992 993 static void 994 iwm_free_rx_ring(struct iwm_softc *sc, struct iwm_rx_ring *ring) 995 { 996 int i; 997 998 iwm_dma_contig_free(&ring->desc_dma); 999 iwm_dma_contig_free(&ring->stat_dma); 1000 1001 for (i = 0; i < IWM_RX_RING_COUNT; i++) { 1002 struct iwm_rx_data *data = &ring->data[i]; 1003 1004 if (data->m != NULL) { 1005 bus_dmamap_sync(ring->data_dmat, data->map, 1006 BUS_DMASYNC_POSTREAD); 1007 bus_dmamap_unload(ring->data_dmat, data->map); 1008 m_freem(data->m); 1009 data->m = NULL; 1010 } 1011 if (data->map != NULL) { 1012 bus_dmamap_destroy(ring->data_dmat, data->map); 1013 data->map = NULL; 1014 } 1015 } 1016 if (ring->data_dmat != NULL) { 1017 bus_dma_tag_destroy(ring->data_dmat); 1018 ring->data_dmat = NULL; 1019 } 1020 } 1021 1022 static int 1023 iwm_alloc_tx_ring(struct iwm_softc *sc, struct iwm_tx_ring *ring, int qid) 1024 { 1025 bus_addr_t paddr; 1026 bus_size_t size; 1027 int i, error; 1028 1029 ring->qid = qid; 1030 ring->queued = 0; 1031 ring->cur = 0; 1032 1033 /* Allocate TX descriptors (256-byte aligned). */ 1034 size = IWM_TX_RING_COUNT * sizeof (struct iwm_tfd); 1035 error = iwm_dma_contig_alloc(sc->sc_dmat, &ring->desc_dma, size, 256); 1036 if (error != 0) { 1037 device_printf(sc->sc_dev, 1038 "could not allocate TX ring DMA memory\n"); 1039 goto fail; 1040 } 1041 ring->desc = ring->desc_dma.vaddr; 1042 1043 /* 1044 * We only use rings 0 through 9 (4 EDCA + cmd) so there is no need 1045 * to allocate commands space for other rings. 1046 */ 1047 if (qid > IWM_MVM_CMD_QUEUE) 1048 return 0; 1049 1050 size = IWM_TX_RING_COUNT * sizeof(struct iwm_device_cmd); 1051 error = iwm_dma_contig_alloc(sc->sc_dmat, &ring->cmd_dma, size, 4); 1052 if (error != 0) { 1053 device_printf(sc->sc_dev, 1054 "could not allocate TX cmd DMA memory\n"); 1055 goto fail; 1056 } 1057 ring->cmd = ring->cmd_dma.vaddr; 1058 1059 #if defined(__DragonFly__) 1060 error = bus_dma_tag_create(sc->sc_dmat, PAGE_SIZE, 1061 0, 1062 BUS_SPACE_MAXADDR_32BIT, 1063 BUS_SPACE_MAXADDR, 1064 NULL, NULL, 1065 MCLBYTES, IWM_MAX_SCATTER - 1, MCLBYTES, 1066 BUS_DMA_NOWAIT, &ring->data_dmat); 1067 #else 1068 error = bus_dma_tag_create(sc->sc_dmat, 1, 0, 1069 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 1070 IWM_MAX_SCATTER - 1, MCLBYTES, BUS_DMA_NOWAIT, NULL, NULL, 1071 &ring->data_dmat); 1072 #endif 1073 if (error != 0) { 1074 device_printf(sc->sc_dev, "could not create TX buf DMA tag\n"); 1075 goto fail; 1076 } 1077 1078 paddr = ring->cmd_dma.paddr; 1079 for (i = 0; i < IWM_TX_RING_COUNT; i++) { 1080 struct iwm_tx_data *data = &ring->data[i]; 1081 1082 data->cmd_paddr = paddr; 1083 data->scratch_paddr = paddr + sizeof(struct iwm_cmd_header) 1084 + offsetof(struct iwm_tx_cmd, scratch); 1085 paddr += sizeof(struct iwm_device_cmd); 1086 1087 error = bus_dmamap_create(ring->data_dmat, 0, &data->map); 1088 if (error != 0) { 1089 device_printf(sc->sc_dev, 1090 "could not create TX buf DMA map\n"); 1091 goto fail; 1092 } 1093 } 1094 KASSERT(paddr == ring->cmd_dma.paddr + size, 1095 ("invalid physical address")); 1096 return 0; 1097 1098 fail: iwm_free_tx_ring(sc, ring); 1099 return error; 1100 } 1101 1102 static void 1103 iwm_reset_tx_ring(struct iwm_softc *sc, struct iwm_tx_ring *ring) 1104 { 1105 int i; 1106 1107 for (i = 0; i < IWM_TX_RING_COUNT; i++) { 1108 struct iwm_tx_data *data = &ring->data[i]; 1109 1110 if (data->m != NULL) { 1111 bus_dmamap_sync(ring->data_dmat, data->map, 1112 BUS_DMASYNC_POSTWRITE); 1113 bus_dmamap_unload(ring->data_dmat, data->map); 1114 m_freem(data->m); 1115 data->m = NULL; 1116 } 1117 } 1118 /* Clear TX descriptors. */ 1119 memset(ring->desc, 0, ring->desc_dma.size); 1120 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, 1121 BUS_DMASYNC_PREWRITE); 1122 sc->qfullmsk &= ~(1 << ring->qid); 1123 ring->queued = 0; 1124 ring->cur = 0; 1125 } 1126 1127 static void 1128 iwm_free_tx_ring(struct iwm_softc *sc, struct iwm_tx_ring *ring) 1129 { 1130 int i; 1131 1132 iwm_dma_contig_free(&ring->desc_dma); 1133 iwm_dma_contig_free(&ring->cmd_dma); 1134 1135 for (i = 0; i < IWM_TX_RING_COUNT; i++) { 1136 struct iwm_tx_data *data = &ring->data[i]; 1137 1138 if (data->m != NULL) { 1139 bus_dmamap_sync(ring->data_dmat, data->map, 1140 BUS_DMASYNC_POSTWRITE); 1141 bus_dmamap_unload(ring->data_dmat, data->map); 1142 m_freem(data->m); 1143 data->m = NULL; 1144 } 1145 if (data->map != NULL) { 1146 bus_dmamap_destroy(ring->data_dmat, data->map); 1147 data->map = NULL; 1148 } 1149 } 1150 if (ring->data_dmat != NULL) { 1151 bus_dma_tag_destroy(ring->data_dmat); 1152 ring->data_dmat = NULL; 1153 } 1154 } 1155 1156 /* 1157 * High-level hardware frobbing routines 1158 */ 1159 1160 static void 1161 iwm_enable_interrupts(struct iwm_softc *sc) 1162 { 1163 sc->sc_intmask = IWM_CSR_INI_SET_MASK; 1164 IWM_WRITE(sc, IWM_CSR_INT_MASK, sc->sc_intmask); 1165 } 1166 1167 static void 1168 iwm_restore_interrupts(struct iwm_softc *sc) 1169 { 1170 IWM_WRITE(sc, IWM_CSR_INT_MASK, sc->sc_intmask); 1171 } 1172 1173 static void 1174 iwm_disable_interrupts(struct iwm_softc *sc) 1175 { 1176 /* disable interrupts */ 1177 IWM_WRITE(sc, IWM_CSR_INT_MASK, 0); 1178 1179 /* acknowledge all interrupts */ 1180 IWM_WRITE(sc, IWM_CSR_INT, ~0); 1181 IWM_WRITE(sc, IWM_CSR_FH_INT_STATUS, ~0); 1182 } 1183 1184 static void 1185 iwm_ict_reset(struct iwm_softc *sc) 1186 { 1187 iwm_disable_interrupts(sc); 1188 1189 /* Reset ICT table. */ 1190 memset(sc->ict_dma.vaddr, 0, IWM_ICT_SIZE); 1191 sc->ict_cur = 0; 1192 1193 /* Set physical address of ICT table (4KB aligned). */ 1194 IWM_WRITE(sc, IWM_CSR_DRAM_INT_TBL_REG, 1195 IWM_CSR_DRAM_INT_TBL_ENABLE 1196 | IWM_CSR_DRAM_INIT_TBL_WRAP_CHECK 1197 | sc->ict_dma.paddr >> IWM_ICT_PADDR_SHIFT); 1198 1199 /* Switch to ICT interrupt mode in driver. */ 1200 sc->sc_flags |= IWM_FLAG_USE_ICT; 1201 1202 /* Re-enable interrupts. */ 1203 IWM_WRITE(sc, IWM_CSR_INT, ~0); 1204 iwm_enable_interrupts(sc); 1205 } 1206 1207 /* iwlwifi pcie/trans.c */ 1208 1209 /* 1210 * Since this .. hard-resets things, it's time to actually 1211 * mark the first vap (if any) as having no mac context. 1212 * It's annoying, but since the driver is potentially being 1213 * stop/start'ed whilst active (thanks openbsd port!) we 1214 * have to correctly track this. 1215 */ 1216 static void 1217 iwm_stop_device(struct iwm_softc *sc) 1218 { 1219 struct ieee80211com *ic = sc->sc_ic; 1220 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1221 int chnl, ntries; 1222 int qid; 1223 1224 /* tell the device to stop sending interrupts */ 1225 iwm_disable_interrupts(sc); 1226 1227 /* 1228 * FreeBSD-local: mark the first vap as not-uploaded, 1229 * so the next transition through auth/assoc 1230 * will correctly populate the MAC context. 1231 */ 1232 if (vap) { 1233 struct iwm_vap *iv = IWM_VAP(vap); 1234 iv->is_uploaded = 0; 1235 } 1236 1237 /* device going down, Stop using ICT table */ 1238 sc->sc_flags &= ~IWM_FLAG_USE_ICT; 1239 1240 /* stop tx and rx. tx and rx bits, as usual, are from if_iwn */ 1241 1242 iwm_write_prph(sc, IWM_SCD_TXFACT, 0); 1243 1244 /* Stop all DMA channels. */ 1245 if (iwm_nic_lock(sc)) { 1246 for (chnl = 0; chnl < IWM_FH_TCSR_CHNL_NUM; chnl++) { 1247 IWM_WRITE(sc, 1248 IWM_FH_TCSR_CHNL_TX_CONFIG_REG(chnl), 0); 1249 for (ntries = 0; ntries < 200; ntries++) { 1250 uint32_t r; 1251 1252 r = IWM_READ(sc, IWM_FH_TSSR_TX_STATUS_REG); 1253 if (r & IWM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE( 1254 chnl)) 1255 break; 1256 DELAY(20); 1257 } 1258 } 1259 iwm_nic_unlock(sc); 1260 } 1261 1262 /* Stop RX ring. */ 1263 iwm_reset_rx_ring(sc, &sc->rxq); 1264 1265 /* Reset all TX rings. */ 1266 for (qid = 0; qid < nitems(sc->txq); qid++) 1267 iwm_reset_tx_ring(sc, &sc->txq[qid]); 1268 1269 /* 1270 * Power-down device's busmaster DMA clocks 1271 */ 1272 iwm_write_prph(sc, IWM_APMG_CLK_DIS_REG, IWM_APMG_CLK_VAL_DMA_CLK_RQT); 1273 DELAY(5); 1274 1275 /* Make sure (redundant) we've released our request to stay awake */ 1276 IWM_CLRBITS(sc, IWM_CSR_GP_CNTRL, 1277 IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); 1278 1279 /* Stop the device, and put it in low power state */ 1280 iwm_apm_stop(sc); 1281 1282 /* Upon stop, the APM issues an interrupt if HW RF kill is set. 1283 * Clean again the interrupt here 1284 */ 1285 iwm_disable_interrupts(sc); 1286 /* stop and reset the on-board processor */ 1287 IWM_WRITE(sc, IWM_CSR_RESET, IWM_CSR_RESET_REG_FLAG_NEVO_RESET); 1288 1289 /* 1290 * Even if we stop the HW, we still want the RF kill 1291 * interrupt 1292 */ 1293 iwm_enable_rfkill_int(sc); 1294 iwm_check_rfkill(sc); 1295 } 1296 1297 /* iwlwifi: mvm/ops.c */ 1298 static void 1299 iwm_mvm_nic_config(struct iwm_softc *sc) 1300 { 1301 uint8_t radio_cfg_type, radio_cfg_step, radio_cfg_dash; 1302 uint32_t reg_val = 0; 1303 1304 radio_cfg_type = (sc->sc_fw_phy_config & IWM_FW_PHY_CFG_RADIO_TYPE) >> 1305 IWM_FW_PHY_CFG_RADIO_TYPE_POS; 1306 radio_cfg_step = (sc->sc_fw_phy_config & IWM_FW_PHY_CFG_RADIO_STEP) >> 1307 IWM_FW_PHY_CFG_RADIO_STEP_POS; 1308 radio_cfg_dash = (sc->sc_fw_phy_config & IWM_FW_PHY_CFG_RADIO_DASH) >> 1309 IWM_FW_PHY_CFG_RADIO_DASH_POS; 1310 1311 /* SKU control */ 1312 reg_val |= IWM_CSR_HW_REV_STEP(sc->sc_hw_rev) << 1313 IWM_CSR_HW_IF_CONFIG_REG_POS_MAC_STEP; 1314 reg_val |= IWM_CSR_HW_REV_DASH(sc->sc_hw_rev) << 1315 IWM_CSR_HW_IF_CONFIG_REG_POS_MAC_DASH; 1316 1317 /* radio configuration */ 1318 reg_val |= radio_cfg_type << IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE; 1319 reg_val |= radio_cfg_step << IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_STEP; 1320 reg_val |= radio_cfg_dash << IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_DASH; 1321 1322 IWM_WRITE(sc, IWM_CSR_HW_IF_CONFIG_REG, reg_val); 1323 1324 IWM_DPRINTF(sc, IWM_DEBUG_RESET, 1325 "Radio type=0x%x-0x%x-0x%x\n", radio_cfg_type, 1326 radio_cfg_step, radio_cfg_dash); 1327 1328 /* 1329 * W/A : NIC is stuck in a reset state after Early PCIe power off 1330 * (PCIe power is lost before PERST# is asserted), causing ME FW 1331 * to lose ownership and not being able to obtain it back. 1332 */ 1333 iwm_set_bits_mask_prph(sc, IWM_APMG_PS_CTRL_REG, 1334 IWM_APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS, 1335 ~IWM_APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS); 1336 } 1337 1338 static int 1339 iwm_nic_rx_init(struct iwm_softc *sc) 1340 { 1341 if (!iwm_nic_lock(sc)) 1342 return EBUSY; 1343 1344 /* 1345 * Initialize RX ring. This is from the iwn driver. 1346 */ 1347 memset(sc->rxq.stat, 0, sizeof(*sc->rxq.stat)); 1348 1349 /* stop DMA */ 1350 IWM_WRITE(sc, IWM_FH_MEM_RCSR_CHNL0_CONFIG_REG, 0); 1351 IWM_WRITE(sc, IWM_FH_MEM_RCSR_CHNL0_RBDCB_WPTR, 0); 1352 IWM_WRITE(sc, IWM_FH_MEM_RCSR_CHNL0_FLUSH_RB_REQ, 0); 1353 IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_RDPTR, 0); 1354 IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0); 1355 1356 /* Set physical address of RX ring (256-byte aligned). */ 1357 IWM_WRITE(sc, 1358 IWM_FH_RSCSR_CHNL0_RBDCB_BASE_REG, sc->rxq.desc_dma.paddr >> 8); 1359 1360 /* Set physical address of RX status (16-byte aligned). */ 1361 IWM_WRITE(sc, 1362 IWM_FH_RSCSR_CHNL0_STTS_WPTR_REG, sc->rxq.stat_dma.paddr >> 4); 1363 1364 #if defined(__DragonFly__) 1365 /* Force serialization (probably not needed but don't trust the HW) */ 1366 IWM_READ(sc, IWM_FH_RSCSR_CHNL0_STTS_WPTR_REG); 1367 #endif 1368 1369 /* Enable RX. */ 1370 /* 1371 * Note: Linux driver also sets this: 1372 * (IWM_RX_RB_TIMEOUT << IWM_FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS) | 1373 * 1374 * It causes weird behavior. YMMV. 1375 */ 1376 IWM_WRITE(sc, IWM_FH_MEM_RCSR_CHNL0_CONFIG_REG, 1377 IWM_FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL | 1378 IWM_FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY | /* HW bug */ 1379 IWM_FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL | 1380 IWM_FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K | 1381 IWM_RX_QUEUE_SIZE_LOG << IWM_FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS); 1382 1383 IWM_WRITE_1(sc, IWM_CSR_INT_COALESCING, IWM_HOST_INT_TIMEOUT_DEF); 1384 1385 /* W/A for interrupt coalescing bug in 7260 and 3160 */ 1386 if (sc->host_interrupt_operation_mode) 1387 IWM_SETBITS(sc, IWM_CSR_INT_COALESCING, IWM_HOST_INT_OPER_MODE); 1388 1389 /* 1390 * Thus sayeth el jefe (iwlwifi) via a comment: 1391 * 1392 * This value should initially be 0 (before preparing any 1393 * RBs), should be 8 after preparing the first 8 RBs (for example) 1394 */ 1395 IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_WPTR, 8); 1396 1397 iwm_nic_unlock(sc); 1398 1399 return 0; 1400 } 1401 1402 static int 1403 iwm_nic_tx_init(struct iwm_softc *sc) 1404 { 1405 int qid; 1406 1407 if (!iwm_nic_lock(sc)) 1408 return EBUSY; 1409 1410 /* Deactivate TX scheduler. */ 1411 iwm_write_prph(sc, IWM_SCD_TXFACT, 0); 1412 1413 /* Set physical address of "keep warm" page (16-byte aligned). */ 1414 IWM_WRITE(sc, IWM_FH_KW_MEM_ADDR_REG, sc->kw_dma.paddr >> 4); 1415 1416 /* Initialize TX rings. */ 1417 for (qid = 0; qid < nitems(sc->txq); qid++) { 1418 struct iwm_tx_ring *txq = &sc->txq[qid]; 1419 1420 /* Set physical address of TX ring (256-byte aligned). */ 1421 IWM_WRITE(sc, IWM_FH_MEM_CBBC_QUEUE(qid), 1422 txq->desc_dma.paddr >> 8); 1423 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, 1424 "%s: loading ring %d descriptors (%p) at %lx\n", 1425 __func__, 1426 qid, txq->desc, 1427 (unsigned long) (txq->desc_dma.paddr >> 8)); 1428 } 1429 iwm_nic_unlock(sc); 1430 1431 return 0; 1432 } 1433 1434 static int 1435 iwm_nic_init(struct iwm_softc *sc) 1436 { 1437 int error; 1438 1439 iwm_apm_init(sc); 1440 iwm_set_pwr(sc); 1441 1442 iwm_mvm_nic_config(sc); 1443 1444 if ((error = iwm_nic_rx_init(sc)) != 0) 1445 return error; 1446 1447 /* 1448 * Ditto for TX, from iwn 1449 */ 1450 if ((error = iwm_nic_tx_init(sc)) != 0) 1451 return error; 1452 1453 IWM_DPRINTF(sc, IWM_DEBUG_RESET, 1454 "%s: shadow registers enabled\n", __func__); 1455 IWM_SETBITS(sc, IWM_CSR_MAC_SHADOW_REG_CTRL, 0x800fffff); 1456 1457 return 0; 1458 } 1459 1460 enum iwm_mvm_tx_fifo { 1461 IWM_MVM_TX_FIFO_BK = 0, 1462 IWM_MVM_TX_FIFO_BE, 1463 IWM_MVM_TX_FIFO_VI, 1464 IWM_MVM_TX_FIFO_VO, 1465 IWM_MVM_TX_FIFO_MCAST = 5, 1466 }; 1467 1468 const uint8_t iwm_mvm_ac_to_tx_fifo[] = { 1469 IWM_MVM_TX_FIFO_VO, 1470 IWM_MVM_TX_FIFO_VI, 1471 IWM_MVM_TX_FIFO_BE, 1472 IWM_MVM_TX_FIFO_BK, 1473 }; 1474 1475 static void 1476 iwm_enable_txq(struct iwm_softc *sc, int qid, int fifo) 1477 { 1478 if (!iwm_nic_lock(sc)) { 1479 device_printf(sc->sc_dev, 1480 "%s: cannot enable txq %d\n", 1481 __func__, 1482 qid); 1483 return; /* XXX return EBUSY */ 1484 } 1485 1486 /* unactivate before configuration */ 1487 iwm_write_prph(sc, IWM_SCD_QUEUE_STATUS_BITS(qid), 1488 (0 << IWM_SCD_QUEUE_STTS_REG_POS_ACTIVE) 1489 | (1 << IWM_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN)); 1490 1491 if (qid != IWM_MVM_CMD_QUEUE) { 1492 iwm_set_bits_prph(sc, IWM_SCD_QUEUECHAIN_SEL, (1 << qid)); 1493 } 1494 1495 iwm_clear_bits_prph(sc, IWM_SCD_AGGR_SEL, (1 << qid)); 1496 1497 IWM_WRITE(sc, IWM_HBUS_TARG_WRPTR, qid << 8 | 0); 1498 iwm_write_prph(sc, IWM_SCD_QUEUE_RDPTR(qid), 0); 1499 1500 iwm_write_mem32(sc, sc->sched_base + IWM_SCD_CONTEXT_QUEUE_OFFSET(qid), 0); 1501 /* Set scheduler window size and frame limit. */ 1502 iwm_write_mem32(sc, 1503 sc->sched_base + IWM_SCD_CONTEXT_QUEUE_OFFSET(qid) + 1504 sizeof(uint32_t), 1505 ((IWM_FRAME_LIMIT << IWM_SCD_QUEUE_CTX_REG2_WIN_SIZE_POS) & 1506 IWM_SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK) | 1507 ((IWM_FRAME_LIMIT << IWM_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) & 1508 IWM_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK)); 1509 1510 iwm_write_prph(sc, IWM_SCD_QUEUE_STATUS_BITS(qid), 1511 (1 << IWM_SCD_QUEUE_STTS_REG_POS_ACTIVE) | 1512 (fifo << IWM_SCD_QUEUE_STTS_REG_POS_TXF) | 1513 (1 << IWM_SCD_QUEUE_STTS_REG_POS_WSL) | 1514 IWM_SCD_QUEUE_STTS_REG_MSK); 1515 1516 iwm_nic_unlock(sc); 1517 1518 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, 1519 "%s: enabled txq %d FIFO %d\n", 1520 __func__, qid, fifo); 1521 } 1522 1523 static int 1524 iwm_post_alive(struct iwm_softc *sc) 1525 { 1526 int nwords; 1527 int error, chnl; 1528 1529 if (!iwm_nic_lock(sc)) 1530 return EBUSY; 1531 1532 if (sc->sched_base != iwm_read_prph(sc, IWM_SCD_SRAM_BASE_ADDR)) { 1533 device_printf(sc->sc_dev, 1534 "%s: sched addr mismatch", 1535 __func__); 1536 error = EINVAL; 1537 goto out; 1538 } 1539 1540 iwm_ict_reset(sc); 1541 1542 /* Clear TX scheduler state in SRAM. */ 1543 nwords = (IWM_SCD_TRANS_TBL_MEM_UPPER_BOUND - 1544 IWM_SCD_CONTEXT_MEM_LOWER_BOUND) 1545 / sizeof(uint32_t); 1546 error = iwm_write_mem(sc, 1547 sc->sched_base + IWM_SCD_CONTEXT_MEM_LOWER_BOUND, 1548 NULL, nwords); 1549 if (error) 1550 goto out; 1551 1552 /* Set physical address of TX scheduler rings (1KB aligned). */ 1553 iwm_write_prph(sc, IWM_SCD_DRAM_BASE_ADDR, sc->sched_dma.paddr >> 10); 1554 1555 iwm_write_prph(sc, IWM_SCD_CHAINEXT_EN, 0); 1556 1557 /* enable command channel */ 1558 iwm_enable_txq(sc, IWM_MVM_CMD_QUEUE, 7); 1559 1560 iwm_write_prph(sc, IWM_SCD_TXFACT, 0xff); 1561 1562 /* Enable DMA channels. */ 1563 for (chnl = 0; chnl < IWM_FH_TCSR_CHNL_NUM; chnl++) { 1564 IWM_WRITE(sc, IWM_FH_TCSR_CHNL_TX_CONFIG_REG(chnl), 1565 IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE | 1566 IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE); 1567 } 1568 1569 IWM_SETBITS(sc, IWM_FH_TX_CHICKEN_BITS_REG, 1570 IWM_FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN); 1571 1572 /* Enable L1-Active */ 1573 iwm_clear_bits_prph(sc, IWM_APMG_PCIDEV_STT_REG, 1574 IWM_APMG_PCIDEV_STT_VAL_L1_ACT_DIS); 1575 1576 out: 1577 iwm_nic_unlock(sc); 1578 return error; 1579 } 1580 1581 /* 1582 * NVM read access and content parsing. We do not support 1583 * external NVM or writing NVM. 1584 * iwlwifi/mvm/nvm.c 1585 */ 1586 1587 /* list of NVM sections we are allowed/need to read */ 1588 const int nvm_to_read[] = { 1589 IWM_NVM_SECTION_TYPE_HW, 1590 IWM_NVM_SECTION_TYPE_SW, 1591 IWM_NVM_SECTION_TYPE_CALIBRATION, 1592 IWM_NVM_SECTION_TYPE_PRODUCTION, 1593 }; 1594 1595 /* Default NVM size to read */ 1596 #define IWM_NVM_DEFAULT_CHUNK_SIZE (2*1024) 1597 #define IWM_MAX_NVM_SECTION_SIZE 7000 1598 1599 #define IWM_NVM_WRITE_OPCODE 1 1600 #define IWM_NVM_READ_OPCODE 0 1601 1602 static int 1603 iwm_nvm_read_chunk(struct iwm_softc *sc, uint16_t section, 1604 uint16_t offset, uint16_t length, uint8_t *data, uint16_t *len) 1605 { 1606 offset = 0; 1607 struct iwm_nvm_access_cmd nvm_access_cmd = { 1608 .offset = htole16(offset), 1609 .length = htole16(length), 1610 .type = htole16(section), 1611 .op_code = IWM_NVM_READ_OPCODE, 1612 }; 1613 struct iwm_nvm_access_resp *nvm_resp; 1614 struct iwm_rx_packet *pkt; 1615 struct iwm_host_cmd cmd = { 1616 .id = IWM_NVM_ACCESS_CMD, 1617 .flags = IWM_CMD_SYNC | IWM_CMD_WANT_SKB | 1618 IWM_CMD_SEND_IN_RFKILL, 1619 .data = { &nvm_access_cmd, }, 1620 }; 1621 int ret, bytes_read, offset_read; 1622 uint8_t *resp_data; 1623 1624 cmd.len[0] = sizeof(struct iwm_nvm_access_cmd); 1625 1626 ret = iwm_send_cmd(sc, &cmd); 1627 if (ret) 1628 return ret; 1629 1630 pkt = cmd.resp_pkt; 1631 if (pkt->hdr.flags & IWM_CMD_FAILED_MSK) { 1632 device_printf(sc->sc_dev, 1633 "%s: Bad return from IWM_NVM_ACCES_COMMAND (0x%08X)\n", 1634 __func__, pkt->hdr.flags); 1635 ret = EIO; 1636 goto exit; 1637 } 1638 1639 /* Extract NVM response */ 1640 nvm_resp = (void *)pkt->data; 1641 1642 ret = le16toh(nvm_resp->status); 1643 bytes_read = le16toh(nvm_resp->length); 1644 offset_read = le16toh(nvm_resp->offset); 1645 resp_data = nvm_resp->data; 1646 if (ret) { 1647 device_printf(sc->sc_dev, 1648 "%s: NVM access command failed with status %d\n", 1649 __func__, ret); 1650 ret = EINVAL; 1651 goto exit; 1652 } 1653 1654 if (offset_read != offset) { 1655 device_printf(sc->sc_dev, 1656 "%s: NVM ACCESS response with invalid offset %d\n", 1657 __func__, offset_read); 1658 ret = EINVAL; 1659 goto exit; 1660 } 1661 1662 memcpy(data + offset, resp_data, bytes_read); 1663 *len = bytes_read; 1664 1665 exit: 1666 iwm_free_resp(sc, &cmd); 1667 return ret; 1668 } 1669 1670 /* 1671 * Reads an NVM section completely. 1672 * NICs prior to 7000 family doesn't have a real NVM, but just read 1673 * section 0 which is the EEPROM. Because the EEPROM reading is unlimited 1674 * by uCode, we need to manually check in this case that we don't 1675 * overflow and try to read more than the EEPROM size. 1676 * For 7000 family NICs, we supply the maximal size we can read, and 1677 * the uCode fills the response with as much data as we can, 1678 * without overflowing, so no check is needed. 1679 */ 1680 static int 1681 iwm_nvm_read_section(struct iwm_softc *sc, 1682 uint16_t section, uint8_t *data, uint16_t *len) 1683 { 1684 uint16_t length, seglen; 1685 int error; 1686 1687 /* Set nvm section read length */ 1688 length = seglen = IWM_NVM_DEFAULT_CHUNK_SIZE; 1689 *len = 0; 1690 1691 /* Read the NVM until exhausted (reading less than requested) */ 1692 while (seglen == length) { 1693 error = iwm_nvm_read_chunk(sc, 1694 section, *len, length, data, &seglen); 1695 if (error) { 1696 device_printf(sc->sc_dev, 1697 "Cannot read NVM from section " 1698 "%d offset %d, length %d\n", 1699 section, *len, length); 1700 return error; 1701 } 1702 *len += seglen; 1703 } 1704 1705 IWM_DPRINTF(sc, IWM_DEBUG_RESET, 1706 "NVM section %d read completed\n", section); 1707 return 0; 1708 } 1709 1710 /* 1711 * BEGIN IWM_NVM_PARSE 1712 */ 1713 1714 /* iwlwifi/iwl-nvm-parse.c */ 1715 1716 /* NVM offsets (in words) definitions */ 1717 enum wkp_nvm_offsets { 1718 /* NVM HW-Section offset (in words) definitions */ 1719 IWM_HW_ADDR = 0x15, 1720 1721 /* NVM SW-Section offset (in words) definitions */ 1722 IWM_NVM_SW_SECTION = 0x1C0, 1723 IWM_NVM_VERSION = 0, 1724 IWM_RADIO_CFG = 1, 1725 IWM_SKU = 2, 1726 IWM_N_HW_ADDRS = 3, 1727 IWM_NVM_CHANNELS = 0x1E0 - IWM_NVM_SW_SECTION, 1728 1729 /* NVM calibration section offset (in words) definitions */ 1730 IWM_NVM_CALIB_SECTION = 0x2B8, 1731 IWM_XTAL_CALIB = 0x316 - IWM_NVM_CALIB_SECTION 1732 }; 1733 1734 /* SKU Capabilities (actual values from NVM definition) */ 1735 enum nvm_sku_bits { 1736 IWM_NVM_SKU_CAP_BAND_24GHZ = (1 << 0), 1737 IWM_NVM_SKU_CAP_BAND_52GHZ = (1 << 1), 1738 IWM_NVM_SKU_CAP_11N_ENABLE = (1 << 2), 1739 IWM_NVM_SKU_CAP_11AC_ENABLE = (1 << 3), 1740 }; 1741 1742 /* radio config bits (actual values from NVM definition) */ 1743 #define IWM_NVM_RF_CFG_DASH_MSK(x) (x & 0x3) /* bits 0-1 */ 1744 #define IWM_NVM_RF_CFG_STEP_MSK(x) ((x >> 2) & 0x3) /* bits 2-3 */ 1745 #define IWM_NVM_RF_CFG_TYPE_MSK(x) ((x >> 4) & 0x3) /* bits 4-5 */ 1746 #define IWM_NVM_RF_CFG_PNUM_MSK(x) ((x >> 6) & 0x3) /* bits 6-7 */ 1747 #define IWM_NVM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */ 1748 #define IWM_NVM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */ 1749 1750 #define DEFAULT_MAX_TX_POWER 16 1751 1752 /** 1753 * enum iwm_nvm_channel_flags - channel flags in NVM 1754 * @IWM_NVM_CHANNEL_VALID: channel is usable for this SKU/geo 1755 * @IWM_NVM_CHANNEL_IBSS: usable as an IBSS channel 1756 * @IWM_NVM_CHANNEL_ACTIVE: active scanning allowed 1757 * @IWM_NVM_CHANNEL_RADAR: radar detection required 1758 * @IWM_NVM_CHANNEL_DFS: dynamic freq selection candidate 1759 * @IWM_NVM_CHANNEL_WIDE: 20 MHz channel okay (?) 1760 * @IWM_NVM_CHANNEL_40MHZ: 40 MHz channel okay (?) 1761 * @IWM_NVM_CHANNEL_80MHZ: 80 MHz channel okay (?) 1762 * @IWM_NVM_CHANNEL_160MHZ: 160 MHz channel okay (?) 1763 */ 1764 enum iwm_nvm_channel_flags { 1765 IWM_NVM_CHANNEL_VALID = (1 << 0), 1766 IWM_NVM_CHANNEL_IBSS = (1 << 1), 1767 IWM_NVM_CHANNEL_ACTIVE = (1 << 3), 1768 IWM_NVM_CHANNEL_RADAR = (1 << 4), 1769 IWM_NVM_CHANNEL_DFS = (1 << 7), 1770 IWM_NVM_CHANNEL_WIDE = (1 << 8), 1771 IWM_NVM_CHANNEL_40MHZ = (1 << 9), 1772 IWM_NVM_CHANNEL_80MHZ = (1 << 10), 1773 IWM_NVM_CHANNEL_160MHZ = (1 << 11), 1774 }; 1775 1776 /* 1777 * Add a channel to the net80211 channel list. 1778 * 1779 * ieee is the ieee channel number 1780 * ch_idx is channel index. 1781 * mode is the channel mode - CHAN_A, CHAN_B, CHAN_G. 1782 * ch_flags is the iwm channel flags. 1783 * 1784 * Return 0 on OK, < 0 on error. 1785 */ 1786 static int 1787 iwm_init_net80211_channel(struct iwm_softc *sc, int ieee, int ch_idx, 1788 int mode, uint16_t ch_flags) 1789 { 1790 /* XXX for now, no overflow checking! */ 1791 struct ieee80211com *ic = sc->sc_ic; 1792 int is_5ghz, flags; 1793 struct ieee80211_channel *channel; 1794 1795 channel = &ic->ic_channels[ic->ic_nchans++]; 1796 channel->ic_ieee = ieee; 1797 1798 is_5ghz = ch_idx >= IWM_NUM_2GHZ_CHANNELS; 1799 if (!is_5ghz) { 1800 flags = IEEE80211_CHAN_2GHZ; 1801 channel->ic_flags = mode; 1802 } else { 1803 flags = IEEE80211_CHAN_5GHZ; 1804 channel->ic_flags = mode; 1805 } 1806 channel->ic_freq = ieee80211_ieee2mhz(ieee, flags); 1807 1808 if (!(ch_flags & IWM_NVM_CHANNEL_ACTIVE)) 1809 channel->ic_flags |= IEEE80211_CHAN_PASSIVE; 1810 return (0); 1811 } 1812 1813 static void 1814 iwm_init_channel_map(struct iwm_softc *sc, const uint16_t * const nvm_ch_flags) 1815 { 1816 struct ieee80211com *ic = sc->sc_ic; 1817 struct iwm_nvm_data *data = &sc->sc_nvm; 1818 int ch_idx; 1819 uint16_t ch_flags; 1820 int hw_value; 1821 1822 for (ch_idx = 0; ch_idx < nitems(iwm_nvm_channels); ch_idx++) { 1823 ch_flags = le16_to_cpup(nvm_ch_flags + ch_idx); 1824 1825 if (ch_idx >= IWM_NUM_2GHZ_CHANNELS && 1826 !data->sku_cap_band_52GHz_enable) 1827 ch_flags &= ~IWM_NVM_CHANNEL_VALID; 1828 1829 if (!(ch_flags & IWM_NVM_CHANNEL_VALID)) { 1830 IWM_DPRINTF(sc, IWM_DEBUG_EEPROM, 1831 "Ch. %d Flags %x [%sGHz] - No traffic\n", 1832 iwm_nvm_channels[ch_idx], 1833 ch_flags, 1834 (ch_idx >= IWM_NUM_2GHZ_CHANNELS) ? 1835 "5.2" : "2.4"); 1836 continue; 1837 } 1838 1839 hw_value = iwm_nvm_channels[ch_idx]; 1840 1841 /* 5GHz? */ 1842 if (ch_idx >= IWM_NUM_2GHZ_CHANNELS) { 1843 (void) iwm_init_net80211_channel(sc, hw_value, 1844 ch_idx, 1845 IEEE80211_CHAN_A, 1846 ch_flags); 1847 } else { 1848 (void) iwm_init_net80211_channel(sc, hw_value, 1849 ch_idx, 1850 IEEE80211_CHAN_B, 1851 ch_flags); 1852 /* If it's not channel 13, also add 11g */ 1853 if (hw_value != 13) 1854 (void) iwm_init_net80211_channel(sc, hw_value, 1855 ch_idx, 1856 IEEE80211_CHAN_G, 1857 ch_flags); 1858 } 1859 1860 IWM_DPRINTF(sc, IWM_DEBUG_EEPROM, 1861 "Ch. %d Flags %x [%sGHz] - Added\n", 1862 iwm_nvm_channels[ch_idx], 1863 ch_flags, 1864 (ch_idx >= IWM_NUM_2GHZ_CHANNELS) ? 1865 "5.2" : "2.4"); 1866 } 1867 ieee80211_sort_channels(ic->ic_channels, ic->ic_nchans); 1868 } 1869 1870 static int 1871 iwm_parse_nvm_data(struct iwm_softc *sc, 1872 const uint16_t *nvm_hw, const uint16_t *nvm_sw, 1873 const uint16_t *nvm_calib, uint8_t tx_chains, uint8_t rx_chains) 1874 { 1875 struct iwm_nvm_data *data = &sc->sc_nvm; 1876 uint8_t hw_addr[IEEE80211_ADDR_LEN]; 1877 uint16_t radio_cfg, sku; 1878 1879 data->nvm_version = le16_to_cpup(nvm_sw + IWM_NVM_VERSION); 1880 1881 radio_cfg = le16_to_cpup(nvm_sw + IWM_RADIO_CFG); 1882 data->radio_cfg_type = IWM_NVM_RF_CFG_TYPE_MSK(radio_cfg); 1883 data->radio_cfg_step = IWM_NVM_RF_CFG_STEP_MSK(radio_cfg); 1884 data->radio_cfg_dash = IWM_NVM_RF_CFG_DASH_MSK(radio_cfg); 1885 data->radio_cfg_pnum = IWM_NVM_RF_CFG_PNUM_MSK(radio_cfg); 1886 data->valid_tx_ant = IWM_NVM_RF_CFG_TX_ANT_MSK(radio_cfg); 1887 data->valid_rx_ant = IWM_NVM_RF_CFG_RX_ANT_MSK(radio_cfg); 1888 1889 sku = le16_to_cpup(nvm_sw + IWM_SKU); 1890 data->sku_cap_band_24GHz_enable = sku & IWM_NVM_SKU_CAP_BAND_24GHZ; 1891 data->sku_cap_band_52GHz_enable = sku & IWM_NVM_SKU_CAP_BAND_52GHZ; 1892 data->sku_cap_11n_enable = 0; 1893 1894 if (!data->valid_tx_ant || !data->valid_rx_ant) { 1895 device_printf(sc->sc_dev, 1896 "%s: invalid antennas (0x%x, 0x%x)\n", 1897 __func__, data->valid_tx_ant, 1898 data->valid_rx_ant); 1899 return EINVAL; 1900 } 1901 1902 data->n_hw_addrs = le16_to_cpup(nvm_sw + IWM_N_HW_ADDRS); 1903 1904 data->xtal_calib[0] = *(nvm_calib + IWM_XTAL_CALIB); 1905 data->xtal_calib[1] = *(nvm_calib + IWM_XTAL_CALIB + 1); 1906 1907 /* The byte order is little endian 16 bit, meaning 214365 */ 1908 IEEE80211_ADDR_COPY(hw_addr, nvm_hw + IWM_HW_ADDR); 1909 data->hw_addr[0] = hw_addr[1]; 1910 data->hw_addr[1] = hw_addr[0]; 1911 data->hw_addr[2] = hw_addr[3]; 1912 data->hw_addr[3] = hw_addr[2]; 1913 data->hw_addr[4] = hw_addr[5]; 1914 data->hw_addr[5] = hw_addr[4]; 1915 1916 iwm_init_channel_map(sc, &nvm_sw[IWM_NVM_CHANNELS]); 1917 data->calib_version = 255; /* TODO: 1918 this value will prevent some checks from 1919 failing, we need to check if this 1920 field is still needed, and if it does, 1921 where is it in the NVM */ 1922 1923 return 0; 1924 } 1925 1926 /* 1927 * END NVM PARSE 1928 */ 1929 1930 struct iwm_nvm_section { 1931 uint16_t length; 1932 const uint8_t *data; 1933 }; 1934 1935 static int 1936 iwm_parse_nvm_sections(struct iwm_softc *sc, struct iwm_nvm_section *sections) 1937 { 1938 const uint16_t *hw, *sw, *calib; 1939 1940 /* Checking for required sections */ 1941 if (!sections[IWM_NVM_SECTION_TYPE_SW].data || 1942 !sections[IWM_NVM_SECTION_TYPE_HW].data) { 1943 device_printf(sc->sc_dev, 1944 "%s: Can't parse empty NVM sections\n", 1945 __func__); 1946 return ENOENT; 1947 } 1948 1949 hw = (const uint16_t *)sections[IWM_NVM_SECTION_TYPE_HW].data; 1950 sw = (const uint16_t *)sections[IWM_NVM_SECTION_TYPE_SW].data; 1951 calib = (const uint16_t *)sections[IWM_NVM_SECTION_TYPE_CALIBRATION].data; 1952 return iwm_parse_nvm_data(sc, hw, sw, calib, 1953 IWM_FW_VALID_TX_ANT(sc), IWM_FW_VALID_RX_ANT(sc)); 1954 } 1955 1956 static int 1957 iwm_nvm_init(struct iwm_softc *sc) 1958 { 1959 struct iwm_nvm_section nvm_sections[IWM_NVM_NUM_OF_SECTIONS]; 1960 int i, section, error; 1961 uint16_t len; 1962 uint8_t *nvm_buffer, *temp; 1963 1964 /* Read From FW NVM */ 1965 IWM_DPRINTF(sc, IWM_DEBUG_EEPROM, 1966 "%s: Read NVM\n", 1967 __func__); 1968 1969 /* TODO: find correct NVM max size for a section */ 1970 nvm_buffer = kmalloc(IWM_OTP_LOW_IMAGE_SIZE, M_DEVBUF, M_INTWAIT); 1971 if (nvm_buffer == NULL) 1972 return (ENOMEM); 1973 for (i = 0; i < nitems(nvm_to_read); i++) { 1974 section = nvm_to_read[i]; 1975 KASSERT(section <= nitems(nvm_sections), 1976 ("too many sections")); 1977 1978 error = iwm_nvm_read_section(sc, section, nvm_buffer, &len); 1979 if (error) 1980 break; 1981 1982 temp = kmalloc(len, M_DEVBUF, M_INTWAIT); 1983 if (temp == NULL) { 1984 error = ENOMEM; 1985 break; 1986 } 1987 memcpy(temp, nvm_buffer, len); 1988 nvm_sections[section].data = temp; 1989 nvm_sections[section].length = len; 1990 } 1991 kfree(nvm_buffer, M_DEVBUF); 1992 if (error) 1993 return error; 1994 1995 return iwm_parse_nvm_sections(sc, nvm_sections); 1996 } 1997 1998 /* 1999 * Firmware loading gunk. This is kind of a weird hybrid between the 2000 * iwn driver and the Linux iwlwifi driver. 2001 */ 2002 2003 static int 2004 iwm_firmware_load_chunk(struct iwm_softc *sc, uint32_t dst_addr, 2005 const uint8_t *section, uint32_t byte_cnt) 2006 { 2007 struct iwm_dma_info *dma = &sc->fw_dma; 2008 int error; 2009 2010 /* Copy firmware section into pre-allocated DMA-safe memory. */ 2011 memcpy(dma->vaddr, section, byte_cnt); 2012 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE); 2013 2014 if (!iwm_nic_lock(sc)) 2015 return EBUSY; 2016 2017 sc->sc_fw_chunk_done = 0; 2018 2019 IWM_WRITE(sc, IWM_FH_TCSR_CHNL_TX_CONFIG_REG(IWM_FH_SRVC_CHNL), 2020 IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE); 2021 IWM_WRITE(sc, IWM_FH_SRVC_CHNL_SRAM_ADDR_REG(IWM_FH_SRVC_CHNL), 2022 dst_addr); 2023 IWM_WRITE(sc, IWM_FH_TFDIB_CTRL0_REG(IWM_FH_SRVC_CHNL), 2024 dma->paddr & IWM_FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK); 2025 IWM_WRITE(sc, IWM_FH_TFDIB_CTRL1_REG(IWM_FH_SRVC_CHNL), 2026 (iwm_get_dma_hi_addr(dma->paddr) 2027 << IWM_FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt); 2028 IWM_WRITE(sc, IWM_FH_TCSR_CHNL_TX_BUF_STS_REG(IWM_FH_SRVC_CHNL), 2029 1 << IWM_FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM | 2030 1 << IWM_FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX | 2031 IWM_FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID); 2032 IWM_WRITE(sc, IWM_FH_TCSR_CHNL_TX_CONFIG_REG(IWM_FH_SRVC_CHNL), 2033 IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE | 2034 IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE | 2035 IWM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD); 2036 2037 iwm_nic_unlock(sc); 2038 2039 /* wait 1s for this segment to load */ 2040 error = 0; 2041 while (!sc->sc_fw_chunk_done) { 2042 #if defined(__DragonFly__) 2043 error = iwmsleep(&sc->sc_fw, &sc->sc_lk, 0, "iwmfw", hz); 2044 #else 2045 error = msleep(&sc->sc_fw, &sc->sc_mtx, 0, "iwmfw", hz); 2046 #endif 2047 if (error) 2048 break; 2049 } 2050 2051 return error; 2052 } 2053 2054 static int 2055 iwm_load_firmware(struct iwm_softc *sc, enum iwm_ucode_type ucode_type) 2056 { 2057 struct iwm_fw_sects *fws; 2058 int error, i, w; 2059 const void *data; 2060 uint32_t dlen; 2061 uint32_t offset; 2062 2063 sc->sc_uc.uc_intr = 0; 2064 2065 fws = &sc->sc_fw.fw_sects[ucode_type]; 2066 for (i = 0; i < fws->fw_count; i++) { 2067 data = fws->fw_sect[i].fws_data; 2068 dlen = fws->fw_sect[i].fws_len; 2069 offset = fws->fw_sect[i].fws_devoff; 2070 IWM_DPRINTF(sc, IWM_DEBUG_FIRMWARE_TLV, 2071 "LOAD FIRMWARE type %d offset %u len %d\n", 2072 ucode_type, offset, dlen); 2073 error = iwm_firmware_load_chunk(sc, offset, data, dlen); 2074 if (error) { 2075 device_printf(sc->sc_dev, 2076 "%s: chunk %u of %u returned error %02d\n", 2077 __func__, i, fws->fw_count, error); 2078 return error; 2079 } 2080 } 2081 2082 /* wait for the firmware to load */ 2083 IWM_WRITE(sc, IWM_CSR_RESET, 0); 2084 2085 for (w = 0; !sc->sc_uc.uc_intr && w < 10; w++) { 2086 #if defined(__DragonFly__) 2087 error = iwmsleep(&sc->sc_uc, &sc->sc_lk, 0, "iwmuc", hz/10); 2088 #else 2089 error = msleep(&sc->sc_uc, &sc->sc_mtx, 0, "iwmuc", hz/10); 2090 #endif 2091 } 2092 2093 return error; 2094 } 2095 2096 /* iwlwifi: pcie/trans.c */ 2097 static int 2098 iwm_start_fw(struct iwm_softc *sc, enum iwm_ucode_type ucode_type) 2099 { 2100 int error; 2101 2102 IWM_WRITE(sc, IWM_CSR_INT, ~0); 2103 2104 if ((error = iwm_nic_init(sc)) != 0) { 2105 device_printf(sc->sc_dev, "unable to init nic\n"); 2106 return error; 2107 } 2108 2109 /* make sure rfkill handshake bits are cleared */ 2110 IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR, IWM_CSR_UCODE_SW_BIT_RFKILL); 2111 IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR, 2112 IWM_CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 2113 2114 /* clear (again), then enable host interrupts */ 2115 IWM_WRITE(sc, IWM_CSR_INT, ~0); 2116 iwm_enable_interrupts(sc); 2117 2118 /* really make sure rfkill handshake bits are cleared */ 2119 /* maybe we should write a few times more? just to make sure */ 2120 IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR, IWM_CSR_UCODE_SW_BIT_RFKILL); 2121 IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR, IWM_CSR_UCODE_SW_BIT_RFKILL); 2122 2123 /* Load the given image to the HW */ 2124 return iwm_load_firmware(sc, ucode_type); 2125 } 2126 2127 static int 2128 iwm_fw_alive(struct iwm_softc *sc, uint32_t sched_base) 2129 { 2130 return iwm_post_alive(sc); 2131 } 2132 2133 static int 2134 iwm_send_tx_ant_cfg(struct iwm_softc *sc, uint8_t valid_tx_ant) 2135 { 2136 struct iwm_tx_ant_cfg_cmd tx_ant_cmd = { 2137 .valid = htole32(valid_tx_ant), 2138 }; 2139 2140 return iwm_mvm_send_cmd_pdu(sc, IWM_TX_ANT_CONFIGURATION_CMD, 2141 IWM_CMD_SYNC, sizeof(tx_ant_cmd), &tx_ant_cmd); 2142 } 2143 2144 /* iwlwifi: mvm/fw.c */ 2145 static int 2146 iwm_send_phy_cfg_cmd(struct iwm_softc *sc) 2147 { 2148 struct iwm_phy_cfg_cmd phy_cfg_cmd; 2149 enum iwm_ucode_type ucode_type = sc->sc_uc_current; 2150 2151 /* Set parameters */ 2152 phy_cfg_cmd.phy_cfg = htole32(sc->sc_fw_phy_config); 2153 phy_cfg_cmd.calib_control.event_trigger = 2154 sc->sc_default_calib[ucode_type].event_trigger; 2155 phy_cfg_cmd.calib_control.flow_trigger = 2156 sc->sc_default_calib[ucode_type].flow_trigger; 2157 2158 IWM_DPRINTF(sc, IWM_DEBUG_CMD | IWM_DEBUG_RESET, 2159 "Sending Phy CFG command: 0x%x\n", phy_cfg_cmd.phy_cfg); 2160 return iwm_mvm_send_cmd_pdu(sc, IWM_PHY_CONFIGURATION_CMD, IWM_CMD_SYNC, 2161 sizeof(phy_cfg_cmd), &phy_cfg_cmd); 2162 } 2163 2164 static int 2165 iwm_mvm_load_ucode_wait_alive(struct iwm_softc *sc, 2166 enum iwm_ucode_type ucode_type) 2167 { 2168 enum iwm_ucode_type old_type = sc->sc_uc_current; 2169 int error; 2170 2171 if ((error = iwm_read_firmware(sc, ucode_type)) != 0) { 2172 kprintf("iwm_read_firmweare: failed %d\n", 2173 error); 2174 return error; 2175 } 2176 2177 sc->sc_uc_current = ucode_type; 2178 error = iwm_start_fw(sc, ucode_type); 2179 if (error) { 2180 kprintf("iwm_start_fw: failed %d\n", error); 2181 sc->sc_uc_current = old_type; 2182 return error; 2183 } 2184 2185 error = iwm_fw_alive(sc, sc->sched_base); 2186 if (error) { 2187 kprintf("iwm_fw_alive: failed %d\n", error); 2188 } 2189 return error; 2190 } 2191 2192 /* 2193 * mvm misc bits 2194 */ 2195 2196 /* 2197 * follows iwlwifi/fw.c 2198 */ 2199 static int 2200 iwm_run_init_mvm_ucode(struct iwm_softc *sc, int justnvm) 2201 { 2202 int error; 2203 2204 /* do not operate with rfkill switch turned on */ 2205 if ((sc->sc_flags & IWM_FLAG_RFKILL) && !justnvm) { 2206 device_printf(sc->sc_dev, 2207 "radio is disabled by hardware switch\n"); 2208 return EPERM; 2209 } 2210 2211 sc->sc_init_complete = 0; 2212 if ((error = iwm_mvm_load_ucode_wait_alive(sc, 2213 IWM_UCODE_TYPE_INIT)) != 0) { 2214 kprintf("iwm_mvm_load_ucode_wait_alive: failed %d\n", 2215 error); 2216 return error; 2217 } 2218 2219 if (justnvm) { 2220 if ((error = iwm_nvm_init(sc)) != 0) { 2221 device_printf(sc->sc_dev, "failed to read nvm\n"); 2222 return error; 2223 } 2224 IEEE80211_ADDR_COPY(sc->sc_bssid, &sc->sc_nvm.hw_addr); 2225 2226 sc->sc_scan_cmd_len = sizeof(struct iwm_scan_cmd) 2227 + sc->sc_capa_max_probe_len 2228 + IWM_MAX_NUM_SCAN_CHANNELS 2229 * sizeof(struct iwm_scan_channel); 2230 sc->sc_scan_cmd = kmalloc(sc->sc_scan_cmd_len, M_DEVBUF, 2231 M_INTWAIT); 2232 if (sc->sc_scan_cmd == NULL) 2233 return (ENOMEM); 2234 2235 return 0; 2236 } 2237 2238 /* Send TX valid antennas before triggering calibrations */ 2239 if ((error = iwm_send_tx_ant_cfg(sc, IWM_FW_VALID_TX_ANT(sc))) != 0) { 2240 kprintf("iwm_send_tx_ant_cfg: failed %d\n", error); 2241 return error; 2242 } 2243 2244 /* 2245 * Send phy configurations command to init uCode 2246 * to start the 16.0 uCode init image internal calibrations. 2247 */ 2248 if ((error = iwm_send_phy_cfg_cmd(sc)) != 0 ) { 2249 device_printf(sc->sc_dev, 2250 "%s: failed to run internal calibration: %d\n", 2251 __func__, error); 2252 return error; 2253 } 2254 2255 /* 2256 * Nothing to do but wait for the init complete notification 2257 * from the firmware 2258 */ 2259 while (!sc->sc_init_complete) { 2260 #if defined(__DragonFly__) 2261 error = iwmsleep(&sc->sc_init_complete, &sc->sc_lk, 2262 0, "iwminit", 2*hz); 2263 #else 2264 error = msleep(&sc->sc_init_complete, &sc->sc_mtx, 2265 0, "iwminit", 2*hz); 2266 #endif 2267 if (error) { 2268 kprintf("init complete failed %d\n", 2269 sc->sc_init_complete); 2270 break; 2271 } 2272 } 2273 2274 return error; 2275 } 2276 2277 /* 2278 * receive side 2279 */ 2280 2281 /* (re)stock rx ring, called at init-time and at runtime */ 2282 static int 2283 iwm_rx_addbuf(struct iwm_softc *sc, int size, int idx) 2284 { 2285 struct iwm_rx_ring *ring = &sc->rxq; 2286 struct iwm_rx_data *data = &ring->data[idx]; 2287 struct mbuf *m; 2288 int error; 2289 bus_addr_t paddr; 2290 2291 m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, IWM_RBUF_SIZE); 2292 if (m == NULL) 2293 return ENOBUFS; 2294 2295 if (data->m != NULL) 2296 bus_dmamap_unload(ring->data_dmat, data->map); 2297 2298 m->m_len = m->m_pkthdr.len = m->m_ext.ext_size; 2299 error = bus_dmamap_create(ring->data_dmat, 0, &data->map); 2300 if (error != 0) { 2301 device_printf(sc->sc_dev, 2302 "%s: could not create RX buf DMA map, error %d\n", 2303 __func__, error); 2304 goto fail; 2305 } 2306 data->m = m; 2307 error = bus_dmamap_load(ring->data_dmat, data->map, 2308 mtod(data->m, void *), IWM_RBUF_SIZE, iwm_dma_map_addr, 2309 &paddr, BUS_DMA_NOWAIT); 2310 if (error != 0 && error != EFBIG) { 2311 device_printf(sc->sc_dev, 2312 "%s: can't not map mbuf, error %d\n", __func__, 2313 error); 2314 goto fail; 2315 } 2316 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREREAD); 2317 2318 /* Update RX descriptor. */ 2319 KKASSERT((paddr & 255) == 0); 2320 ring->desc[idx] = htole32(paddr >> 8); 2321 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, 2322 BUS_DMASYNC_PREWRITE); 2323 2324 return 0; 2325 fail: 2326 return error; 2327 } 2328 2329 /* iwlwifi: mvm/rx.c */ 2330 #define IWM_RSSI_OFFSET 50 2331 static int 2332 iwm_mvm_calc_rssi(struct iwm_softc *sc, struct iwm_rx_phy_info *phy_info) 2333 { 2334 int rssi_a, rssi_b, rssi_a_dbm, rssi_b_dbm, max_rssi_dbm; 2335 uint32_t agc_a, agc_b; 2336 uint32_t val; 2337 2338 val = le32toh(phy_info->non_cfg_phy[IWM_RX_INFO_AGC_IDX]); 2339 agc_a = (val & IWM_OFDM_AGC_A_MSK) >> IWM_OFDM_AGC_A_POS; 2340 agc_b = (val & IWM_OFDM_AGC_B_MSK) >> IWM_OFDM_AGC_B_POS; 2341 2342 val = le32toh(phy_info->non_cfg_phy[IWM_RX_INFO_RSSI_AB_IDX]); 2343 rssi_a = (val & IWM_OFDM_RSSI_INBAND_A_MSK) >> IWM_OFDM_RSSI_A_POS; 2344 rssi_b = (val & IWM_OFDM_RSSI_INBAND_B_MSK) >> IWM_OFDM_RSSI_B_POS; 2345 2346 /* 2347 * dBm = rssi dB - agc dB - constant. 2348 * Higher AGC (higher radio gain) means lower signal. 2349 */ 2350 rssi_a_dbm = rssi_a - IWM_RSSI_OFFSET - agc_a; 2351 rssi_b_dbm = rssi_b - IWM_RSSI_OFFSET - agc_b; 2352 max_rssi_dbm = MAX(rssi_a_dbm, rssi_b_dbm); 2353 2354 IWM_DPRINTF(sc, IWM_DEBUG_RECV, 2355 "Rssi In A %d B %d Max %d AGCA %d AGCB %d\n", 2356 rssi_a_dbm, rssi_b_dbm, max_rssi_dbm, agc_a, agc_b); 2357 2358 return max_rssi_dbm; 2359 } 2360 2361 /* iwlwifi: mvm/rx.c */ 2362 /* 2363 * iwm_mvm_get_signal_strength - use new rx PHY INFO API 2364 * values are reported by the fw as positive values - need to negate 2365 * to obtain their dBM. Account for missing antennas by replacing 0 2366 * values by -256dBm: practically 0 power and a non-feasible 8 bit value. 2367 */ 2368 static int 2369 iwm_mvm_get_signal_strength(struct iwm_softc *sc, struct iwm_rx_phy_info *phy_info) 2370 { 2371 int energy_a, energy_b, energy_c, max_energy; 2372 uint32_t val; 2373 2374 val = le32toh(phy_info->non_cfg_phy[IWM_RX_INFO_ENERGY_ANT_ABC_IDX]); 2375 energy_a = (val & IWM_RX_INFO_ENERGY_ANT_A_MSK) >> 2376 IWM_RX_INFO_ENERGY_ANT_A_POS; 2377 energy_a = energy_a ? -energy_a : -256; 2378 energy_b = (val & IWM_RX_INFO_ENERGY_ANT_B_MSK) >> 2379 IWM_RX_INFO_ENERGY_ANT_B_POS; 2380 energy_b = energy_b ? -energy_b : -256; 2381 energy_c = (val & IWM_RX_INFO_ENERGY_ANT_C_MSK) >> 2382 IWM_RX_INFO_ENERGY_ANT_C_POS; 2383 energy_c = energy_c ? -energy_c : -256; 2384 max_energy = MAX(energy_a, energy_b); 2385 max_energy = MAX(max_energy, energy_c); 2386 2387 IWM_DPRINTF(sc, IWM_DEBUG_RECV, 2388 "energy In A %d B %d C %d , and max %d\n", 2389 energy_a, energy_b, energy_c, max_energy); 2390 2391 return max_energy; 2392 } 2393 2394 static void 2395 iwm_mvm_rx_rx_phy_cmd(struct iwm_softc *sc, 2396 struct iwm_rx_packet *pkt, struct iwm_rx_data *data) 2397 { 2398 struct iwm_rx_phy_info *phy_info = (void *)pkt->data; 2399 2400 IWM_DPRINTF(sc, IWM_DEBUG_RECV, "received PHY stats\n"); 2401 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD); 2402 2403 memcpy(&sc->sc_last_phy_info, phy_info, sizeof(sc->sc_last_phy_info)); 2404 } 2405 2406 /* 2407 * Retrieve the average noise (in dBm) among receivers. 2408 */ 2409 static int 2410 iwm_get_noise(const struct iwm_mvm_statistics_rx_non_phy *stats) 2411 { 2412 int i, total, nbant, noise; 2413 2414 total = nbant = noise = 0; 2415 for (i = 0; i < 3; i++) { 2416 noise = le32toh(stats->beacon_silence_rssi[i]) & 0xff; 2417 if (noise) { 2418 total += noise; 2419 nbant++; 2420 } 2421 } 2422 2423 /* There should be at least one antenna but check anyway. */ 2424 return (nbant == 0) ? -127 : (total / nbant) - 107; 2425 } 2426 2427 /* 2428 * iwm_mvm_rx_rx_mpdu - IWM_REPLY_RX_MPDU_CMD handler 2429 * 2430 * Handles the actual data of the Rx packet from the fw 2431 */ 2432 static void 2433 iwm_mvm_rx_rx_mpdu(struct iwm_softc *sc, 2434 struct iwm_rx_packet *pkt, struct iwm_rx_data *data) 2435 { 2436 struct ieee80211com *ic = sc->sc_ic; 2437 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2438 struct ieee80211_frame *wh; 2439 struct ieee80211_node *ni; 2440 struct ieee80211_rx_stats rxs; 2441 struct mbuf *m; 2442 struct iwm_rx_phy_info *phy_info; 2443 struct iwm_rx_mpdu_res_start *rx_res; 2444 uint32_t len; 2445 uint32_t rx_pkt_status; 2446 int rssi; 2447 2448 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD); 2449 2450 phy_info = &sc->sc_last_phy_info; 2451 rx_res = (struct iwm_rx_mpdu_res_start *)pkt->data; 2452 wh = (struct ieee80211_frame *)(pkt->data + sizeof(*rx_res)); 2453 len = le16toh(rx_res->byte_count); 2454 rx_pkt_status = le32toh(*(uint32_t *)(pkt->data + sizeof(*rx_res) + len)); 2455 2456 m = data->m; 2457 m->m_data = pkt->data + sizeof(*rx_res); 2458 m->m_pkthdr.len = m->m_len = len; 2459 2460 if (__predict_false(phy_info->cfg_phy_cnt > 20)) { 2461 device_printf(sc->sc_dev, 2462 "dsp size out of range [0,20]: %d\n", 2463 phy_info->cfg_phy_cnt); 2464 return; 2465 } 2466 2467 if (!(rx_pkt_status & IWM_RX_MPDU_RES_STATUS_CRC_OK) || 2468 !(rx_pkt_status & IWM_RX_MPDU_RES_STATUS_OVERRUN_OK)) { 2469 IWM_DPRINTF(sc, IWM_DEBUG_RECV, 2470 "Bad CRC or FIFO: 0x%08X.\n", rx_pkt_status); 2471 return; /* drop */ 2472 } 2473 2474 if (sc->sc_capaflags & IWM_UCODE_TLV_FLAGS_RX_ENERGY_API) { 2475 rssi = iwm_mvm_get_signal_strength(sc, phy_info); 2476 } else { 2477 rssi = iwm_mvm_calc_rssi(sc, phy_info); 2478 } 2479 rssi = (0 - IWM_MIN_DBM) + rssi; /* normalize */ 2480 rssi = MIN(rssi, sc->sc_max_rssi); /* clip to max. 100% */ 2481 2482 /* replenish ring for the buffer we're going to feed to the sharks */ 2483 if (iwm_rx_addbuf(sc, IWM_RBUF_SIZE, sc->rxq.cur) != 0) { 2484 device_printf(sc->sc_dev, "%s: unable to add more buffers\n", 2485 __func__); 2486 return; 2487 } 2488 2489 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 2490 2491 IWM_DPRINTF(sc, IWM_DEBUG_RECV, 2492 "%s: phy_info: channel=%d, flags=0x%08x\n", 2493 __func__, 2494 le16toh(phy_info->channel), 2495 le16toh(phy_info->phy_flags)); 2496 2497 /* 2498 * Populate an RX state struct with the provided information. 2499 */ 2500 bzero(&rxs, sizeof(rxs)); 2501 #if !defined(__DragonFly__) 2502 /* requires new fbsd stack */ 2503 rxs.r_flags |= IEEE80211_R_IEEE | IEEE80211_R_FREQ; 2504 #endif 2505 rxs.r_flags |= IEEE80211_R_NF | IEEE80211_R_RSSI; 2506 #if defined(__DragonFly__) 2507 uint16_t c_freq; 2508 uint8_t c_ieee; 2509 c_ieee = le16toh(phy_info->channel); 2510 if (le16toh(phy_info->phy_flags & IWM_RX_RES_PHY_FLAGS_BAND_24)) { 2511 c_freq = ieee80211_ieee2mhz(c_ieee, IEEE80211_CHAN_2GHZ); 2512 } else { 2513 c_freq = ieee80211_ieee2mhz(c_ieee, IEEE80211_CHAN_5GHZ); 2514 } 2515 #else 2516 rxs.c_ieee = le16toh(phy_info->channel); 2517 if (le16toh(phy_info->phy_flags & IWM_RX_RES_PHY_FLAGS_BAND_24)) { 2518 rxs.c_freq = ieee80211_ieee2mhz(rxs.c_ieee, IEEE80211_CHAN_2GHZ); 2519 } else { 2520 rxs.c_freq = ieee80211_ieee2mhz(rxs.c_ieee, IEEE80211_CHAN_5GHZ); 2521 } 2522 #endif 2523 rxs.rssi = rssi - sc->sc_noise; 2524 rxs.nf = sc->sc_noise; 2525 2526 if (ieee80211_radiotap_active_vap(vap)) { 2527 struct iwm_rx_radiotap_header *tap = &sc->sc_rxtap; 2528 2529 tap->wr_flags = 0; 2530 if (phy_info->phy_flags & htole16(IWM_PHY_INFO_FLAG_SHPREAMBLE)) 2531 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 2532 #if defined(__DragonFly__) 2533 tap->wr_chan_freq = htole16(c_freq); 2534 #else 2535 tap->wr_chan_freq = htole16(rxs.c_freq); 2536 #endif 2537 /* XXX only if ic->ic_curchan->ic_ieee == rxs.c_ieee */ 2538 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 2539 tap->wr_dbm_antsignal = (int8_t)rssi; 2540 tap->wr_dbm_antnoise = (int8_t)sc->sc_noise; 2541 tap->wr_tsft = phy_info->system_timestamp; 2542 switch (phy_info->rate) { 2543 /* CCK rates. */ 2544 case 10: tap->wr_rate = 2; break; 2545 case 20: tap->wr_rate = 4; break; 2546 case 55: tap->wr_rate = 11; break; 2547 case 110: tap->wr_rate = 22; break; 2548 /* OFDM rates. */ 2549 case 0xd: tap->wr_rate = 12; break; 2550 case 0xf: tap->wr_rate = 18; break; 2551 case 0x5: tap->wr_rate = 24; break; 2552 case 0x7: tap->wr_rate = 36; break; 2553 case 0x9: tap->wr_rate = 48; break; 2554 case 0xb: tap->wr_rate = 72; break; 2555 case 0x1: tap->wr_rate = 96; break; 2556 case 0x3: tap->wr_rate = 108; break; 2557 /* Unknown rate: should not happen. */ 2558 default: tap->wr_rate = 0; 2559 } 2560 } 2561 2562 IWM_UNLOCK(sc); 2563 if (ni != NULL) { 2564 IWM_DPRINTF(sc, IWM_DEBUG_RECV, "input m %p\n", m); 2565 ieee80211_input_mimo(ni, m, &rxs); 2566 ieee80211_free_node(ni); 2567 } else { 2568 IWM_DPRINTF(sc, IWM_DEBUG_RECV, "inputall m %p\n", m); 2569 ieee80211_input_mimo_all(ic, m, &rxs); 2570 } 2571 IWM_LOCK(sc); 2572 } 2573 2574 static void 2575 iwm_mvm_rx_tx_cmd_single(struct iwm_softc *sc, struct iwm_rx_packet *pkt, 2576 struct iwm_node *in) 2577 { 2578 struct ifnet *ifp = sc->sc_ifp; 2579 struct iwm_mvm_tx_resp *tx_resp = (void *)pkt->data; 2580 int status = le16toh(tx_resp->status.status) & IWM_TX_STATUS_MSK; 2581 int failack = tx_resp->failure_frame; 2582 2583 KASSERT(tx_resp->frame_count == 1, ("too many frames")); 2584 2585 /* Update rate control statistics. */ 2586 if (status != IWM_TX_STATUS_SUCCESS && 2587 status != IWM_TX_STATUS_DIRECT_DONE) { 2588 #if defined(__DragonFly__) 2589 ++ifp->if_oerrors; 2590 #else 2591 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 2592 #endif 2593 ieee80211_ratectl_tx_complete(in->in_ni.ni_vap, &in->in_ni, 2594 IEEE80211_RATECTL_TX_FAILURE, &failack, NULL); 2595 2596 } else { 2597 #if defined(__DragonFly__) 2598 ++ifp->if_opackets; 2599 #else 2600 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 2601 #endif 2602 ieee80211_ratectl_tx_complete(in->in_ni.ni_vap, &in->in_ni, 2603 IEEE80211_RATECTL_TX_SUCCESS, &failack, NULL); 2604 } 2605 } 2606 2607 static void 2608 iwm_mvm_rx_tx_cmd(struct iwm_softc *sc, 2609 struct iwm_rx_packet *pkt, struct iwm_rx_data *data) 2610 { 2611 struct ifnet *ifp = sc->sc_ifp; 2612 struct iwm_cmd_header *cmd_hdr = &pkt->hdr; 2613 int idx = cmd_hdr->idx; 2614 int qid = cmd_hdr->qid; 2615 struct iwm_tx_ring *ring = &sc->txq[qid]; 2616 struct iwm_tx_data *txd = &ring->data[idx]; 2617 struct iwm_node *in = txd->in; 2618 2619 if (txd->done) { 2620 device_printf(sc->sc_dev, 2621 "%s: got tx interrupt that's already been handled!\n", 2622 __func__); 2623 return; 2624 } 2625 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD); 2626 2627 sc->sc_tx_timer = 0; 2628 2629 iwm_mvm_rx_tx_cmd_single(sc, pkt, in); 2630 2631 /* Unmap and free mbuf. */ 2632 bus_dmamap_sync(ring->data_dmat, txd->map, BUS_DMASYNC_POSTWRITE); 2633 bus_dmamap_unload(ring->data_dmat, txd->map); 2634 m_freem(txd->m); 2635 2636 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, 2637 "free txd %p, in %p\n", txd, txd->in); 2638 KASSERT(txd->done == 0, ("txd not done")); 2639 txd->done = 1; 2640 KASSERT(txd->in, ("txd without node")); 2641 2642 txd->m = NULL; 2643 txd->in = NULL; 2644 ieee80211_free_node((struct ieee80211_node *)in); 2645 2646 if (--ring->queued < IWM_TX_RING_LOMARK) { 2647 sc->qfullmsk &= ~(1 << ring->qid); 2648 #if defined(__DragonFly__) 2649 if (sc->qfullmsk == 0 && ifq_is_oactive(&ifp->if_snd)) { 2650 ifq_clr_oactive(&ifp->if_snd); 2651 #else 2652 if (sc->qfullmsk == 0 && (ifp->if_flags & IFF_DRV_OACTIVE)) { 2653 ifp->if_flags &= ~IFF_DRV_OACTIVE; 2654 #endif 2655 /* 2656 * Well, we're in interrupt context, but then again 2657 * I guess net80211 does all sorts of stunts in 2658 * interrupt context, so maybe this is no biggie. 2659 */ 2660 iwm_start_locked(ifp); 2661 } 2662 } 2663 } 2664 2665 /* 2666 * transmit side 2667 */ 2668 2669 /* 2670 * Process a "command done" firmware notification. This is where we wakeup 2671 * processes waiting for a synchronous command completion. 2672 * from if_iwn 2673 */ 2674 static void 2675 iwm_cmd_done(struct iwm_softc *sc, struct iwm_rx_packet *pkt) 2676 { 2677 struct iwm_tx_ring *ring = &sc->txq[IWM_MVM_CMD_QUEUE]; 2678 struct iwm_tx_data *data; 2679 2680 if (pkt->hdr.qid != IWM_MVM_CMD_QUEUE) { 2681 return; /* Not a command ack. */ 2682 } 2683 2684 data = &ring->data[pkt->hdr.idx]; 2685 2686 /* If the command was mapped in an mbuf, free it. */ 2687 if (data->m != NULL) { 2688 bus_dmamap_sync(ring->data_dmat, data->map, 2689 BUS_DMASYNC_POSTWRITE); 2690 bus_dmamap_unload(ring->data_dmat, data->map); 2691 m_freem(data->m); 2692 data->m = NULL; 2693 } 2694 wakeup(&ring->desc[pkt->hdr.idx]); 2695 } 2696 2697 #if 0 2698 /* 2699 * necessary only for block ack mode 2700 */ 2701 void 2702 iwm_update_sched(struct iwm_softc *sc, int qid, int idx, uint8_t sta_id, 2703 uint16_t len) 2704 { 2705 struct iwm_agn_scd_bc_tbl *scd_bc_tbl; 2706 uint16_t w_val; 2707 2708 scd_bc_tbl = sc->sched_dma.vaddr; 2709 2710 len += 8; /* magic numbers came naturally from paris */ 2711 if (sc->sc_capaflags & IWM_UCODE_TLV_FLAGS_DW_BC_TABLE) 2712 len = roundup(len, 4) / 4; 2713 2714 w_val = htole16(sta_id << 12 | len); 2715 2716 /* Update TX scheduler. */ 2717 scd_bc_tbl[qid].tfd_offset[idx] = w_val; 2718 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map, 2719 BUS_DMASYNC_PREWRITE); 2720 2721 /* I really wonder what this is ?!? */ 2722 if (idx < IWM_TFD_QUEUE_SIZE_BC_DUP) { 2723 scd_bc_tbl[qid].tfd_offset[IWM_TFD_QUEUE_SIZE_MAX + idx] = w_val; 2724 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map, 2725 BUS_DMASYNC_PREWRITE); 2726 } 2727 } 2728 #endif 2729 2730 /* 2731 * Take an 802.11 (non-n) rate, find the relevant rate 2732 * table entry. return the index into in_ridx[]. 2733 * 2734 * The caller then uses that index back into in_ridx 2735 * to figure out the rate index programmed /into/ 2736 * the firmware for this given node. 2737 */ 2738 static int 2739 iwm_tx_rateidx_lookup(struct iwm_softc *sc, struct iwm_node *in, 2740 uint8_t rate) 2741 { 2742 int i; 2743 uint8_t r; 2744 2745 for (i = 0; i < nitems(in->in_ridx); i++) { 2746 r = iwm_rates[in->in_ridx[i]].rate; 2747 if (rate == r) 2748 return (i); 2749 } 2750 /* XXX Return the first */ 2751 /* XXX TODO: have it return the /lowest/ */ 2752 return (0); 2753 } 2754 2755 /* 2756 * Fill in various bit for management frames, and leave them 2757 * unfilled for data frames (firmware takes care of that). 2758 * Return the selected TX rate. 2759 */ 2760 static const struct iwm_rate * 2761 iwm_tx_fill_cmd(struct iwm_softc *sc, struct iwm_node *in, 2762 struct ieee80211_frame *wh, struct iwm_tx_cmd *tx) 2763 { 2764 struct ieee80211com *ic = sc->sc_ic; 2765 struct ieee80211_node *ni = &in->in_ni; 2766 const struct iwm_rate *rinfo; 2767 int type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2768 int ridx, rate_flags; 2769 2770 tx->rts_retry_limit = IWM_RTS_DFAULT_RETRY_LIMIT; 2771 tx->data_retry_limit = IWM_DEFAULT_TX_RETRY; 2772 2773 /* 2774 * XXX TODO: everything about the rate selection here is terrible! 2775 */ 2776 2777 if (type == IEEE80211_FC0_TYPE_DATA) { 2778 int i; 2779 /* for data frames, use RS table */ 2780 (void) ieee80211_ratectl_rate(ni, NULL, 0); 2781 i = iwm_tx_rateidx_lookup(sc, in, ni->ni_txrate); 2782 ridx = in->in_ridx[i]; 2783 2784 /* This is the index into the programmed table */ 2785 tx->initial_rate_index = i; 2786 tx->tx_flags |= htole32(IWM_TX_CMD_FLG_STA_RATE); 2787 IWM_DPRINTF(sc, IWM_DEBUG_XMIT | IWM_DEBUG_TXRATE, 2788 "%s: start with i=%d, txrate %d\n", 2789 __func__, i, iwm_rates[ridx].rate); 2790 /* XXX no rate_n_flags? */ 2791 return &iwm_rates[ridx]; 2792 } 2793 2794 /* 2795 * For non-data, use the lowest supported rate for the given 2796 * operational mode. 2797 * 2798 * Note: there may not be any rate control information available. 2799 * This driver currently assumes if we're transmitting data 2800 * frames, use the rate control table. Grr. 2801 * 2802 * XXX TODO: use the configured rate for the traffic type! 2803 */ 2804 if (ic->ic_curmode == IEEE80211_MODE_11A) { 2805 /* 2806 * XXX this assumes the mode is either 11a or not 11a; 2807 * definitely won't work for 11n. 2808 */ 2809 ridx = IWM_RIDX_OFDM; 2810 } else { 2811 ridx = IWM_RIDX_CCK; 2812 } 2813 2814 rinfo = &iwm_rates[ridx]; 2815 2816 IWM_DPRINTF(sc, IWM_DEBUG_TXRATE, "%s: ridx=%d; rate=%d, CCK=%d\n", 2817 __func__, ridx, 2818 rinfo->rate, 2819 !! (IWM_RIDX_IS_CCK(ridx)) 2820 ); 2821 2822 /* XXX TODO: hard-coded TX antenna? */ 2823 rate_flags = 1 << IWM_RATE_MCS_ANT_POS; 2824 if (IWM_RIDX_IS_CCK(ridx)) 2825 rate_flags |= IWM_RATE_MCS_CCK_MSK; 2826 /* XXX hard-coded tx rate */ 2827 tx->rate_n_flags = htole32(rate_flags | rinfo->plcp); 2828 2829 return rinfo; 2830 } 2831 2832 #define TB0_SIZE 16 2833 static int 2834 iwm_tx(struct iwm_softc *sc, struct mbuf *m, struct ieee80211_node *ni, int ac) 2835 { 2836 struct ieee80211com *ic = sc->sc_ic; 2837 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2838 struct iwm_node *in = (struct iwm_node *)ni; 2839 struct iwm_tx_ring *ring; 2840 struct iwm_tx_data *data; 2841 struct iwm_tfd *desc; 2842 struct iwm_device_cmd *cmd; 2843 struct iwm_tx_cmd *tx; 2844 struct ieee80211_frame *wh; 2845 struct ieee80211_key *k = NULL; 2846 struct mbuf *m1; 2847 const struct iwm_rate *rinfo; 2848 uint32_t flags; 2849 u_int hdrlen; 2850 bus_dma_segment_t *seg, segs[IWM_MAX_SCATTER]; 2851 int nsegs; 2852 uint8_t tid, type; 2853 int i, totlen, error, pad; 2854 2855 wh = mtod(m, struct ieee80211_frame *); 2856 hdrlen = ieee80211_anyhdrsize(wh); 2857 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2858 tid = 0; 2859 ring = &sc->txq[ac]; 2860 desc = &ring->desc[ring->cur]; 2861 memset(desc, 0, sizeof(*desc)); 2862 data = &ring->data[ring->cur]; 2863 2864 /* Fill out iwm_tx_cmd to send to the firmware */ 2865 cmd = &ring->cmd[ring->cur]; 2866 cmd->hdr.code = IWM_TX_CMD; 2867 cmd->hdr.flags = 0; 2868 cmd->hdr.qid = ring->qid; 2869 cmd->hdr.idx = ring->cur; 2870 2871 tx = (void *)cmd->data; 2872 memset(tx, 0, sizeof(*tx)); 2873 2874 rinfo = iwm_tx_fill_cmd(sc, in, wh, tx); 2875 2876 /* Encrypt the frame if need be. */ 2877 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 2878 /* Retrieve key for TX && do software encryption. */ 2879 k = ieee80211_crypto_encap(ni, m); 2880 if (k == NULL) { 2881 m_freem(m); 2882 return (ENOBUFS); 2883 } 2884 /* 802.11 header may have moved. */ 2885 wh = mtod(m, struct ieee80211_frame *); 2886 } 2887 2888 if (ieee80211_radiotap_active_vap(vap)) { 2889 struct iwm_tx_radiotap_header *tap = &sc->sc_txtap; 2890 2891 tap->wt_flags = 0; 2892 tap->wt_chan_freq = htole16(ni->ni_chan->ic_freq); 2893 tap->wt_chan_flags = htole16(ni->ni_chan->ic_flags); 2894 tap->wt_rate = rinfo->rate; 2895 tap->wt_hwqueue = ac; 2896 if (k != NULL) 2897 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2898 ieee80211_radiotap_tx(vap, m); 2899 } 2900 2901 2902 totlen = m->m_pkthdr.len; 2903 2904 flags = 0; 2905 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2906 flags |= IWM_TX_CMD_FLG_ACK; 2907 } 2908 2909 if (type != IEEE80211_FC0_TYPE_DATA 2910 && (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) 2911 && !IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2912 flags |= IWM_TX_CMD_FLG_PROT_REQUIRE; 2913 } 2914 2915 if (IEEE80211_IS_MULTICAST(wh->i_addr1) || 2916 type != IEEE80211_FC0_TYPE_DATA) 2917 tx->sta_id = sc->sc_aux_sta.sta_id; 2918 else 2919 tx->sta_id = IWM_STATION_ID; 2920 2921 if (type == IEEE80211_FC0_TYPE_MGT) { 2922 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2923 2924 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ || 2925 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ) 2926 tx->pm_frame_timeout = htole16(3); 2927 else 2928 tx->pm_frame_timeout = htole16(2); 2929 } else { 2930 tx->pm_frame_timeout = htole16(0); 2931 } 2932 2933 if (hdrlen & 3) { 2934 /* First segment length must be a multiple of 4. */ 2935 flags |= IWM_TX_CMD_FLG_MH_PAD; 2936 pad = 4 - (hdrlen & 3); 2937 } else 2938 pad = 0; 2939 2940 tx->driver_txop = 0; 2941 tx->next_frame_len = 0; 2942 2943 tx->len = htole16(totlen); 2944 tx->tid_tspec = tid; 2945 tx->life_time = htole32(IWM_TX_CMD_LIFE_TIME_INFINITE); 2946 2947 /* Set physical address of "scratch area". */ 2948 tx->dram_lsb_ptr = htole32(data->scratch_paddr); 2949 tx->dram_msb_ptr = iwm_get_dma_hi_addr(data->scratch_paddr); 2950 2951 /* Copy 802.11 header in TX command. */ 2952 memcpy(((uint8_t *)tx) + sizeof(*tx), wh, hdrlen); 2953 2954 flags |= IWM_TX_CMD_FLG_BT_DIS | IWM_TX_CMD_FLG_SEQ_CTL; 2955 2956 tx->sec_ctl = 0; 2957 tx->tx_flags |= htole32(flags); 2958 2959 /* Trim 802.11 header. */ 2960 m_adj(m, hdrlen); 2961 #if defined(__DragonFly__) 2962 error = bus_dmamap_load_mbuf_segment(ring->data_dmat, data->map, m, 2963 segs, IWM_MAX_SCATTER - 1, 2964 &nsegs, BUS_DMA_NOWAIT); 2965 #else 2966 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, 2967 segs, &nsegs, BUS_DMA_NOWAIT); 2968 #endif 2969 if (error != 0) { 2970 if (error != EFBIG) { 2971 device_printf(sc->sc_dev, "can't map mbuf (error %d)\n", 2972 error); 2973 m_freem(m); 2974 return error; 2975 } 2976 /* Too many DMA segments, linearize mbuf. */ 2977 MGETHDR(m1, M_NOWAIT, MT_DATA); 2978 if (m1 == NULL) { 2979 m_freem(m); 2980 return ENOBUFS; 2981 } 2982 if (m->m_pkthdr.len > MHLEN) { 2983 MCLGET(m1, M_NOWAIT); 2984 if (!(m1->m_flags & M_EXT)) { 2985 m_freem(m); 2986 m_freem(m1); 2987 return ENOBUFS; 2988 } 2989 } 2990 m_copydata(m, 0, m->m_pkthdr.len, mtod(m1, void *)); 2991 m1->m_pkthdr.len = m1->m_len = m->m_pkthdr.len; 2992 m_freem(m); 2993 m = m1; 2994 #if defined(__DragonFly__) 2995 error = bus_dmamap_load_mbuf_segment(ring->data_dmat, data->map, m, 2996 segs, IWM_MAX_SCATTER - 1, 2997 &nsegs, BUS_DMA_NOWAIT); 2998 #else 2999 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, 3000 segs, &nsegs, BUS_DMA_NOWAIT); 3001 #endif 3002 if (error != 0) { 3003 device_printf(sc->sc_dev, "can't map mbuf (error %d)\n", 3004 error); 3005 m_freem(m); 3006 return error; 3007 } 3008 } 3009 data->m = m; 3010 data->in = in; 3011 data->done = 0; 3012 3013 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, 3014 "sending txd %p, in %p\n", data, data->in); 3015 KASSERT(data->in != NULL, ("node is NULL")); 3016 3017 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, 3018 "sending data: qid=%d idx=%d len=%d nsegs=%d\n", 3019 ring->qid, ring->cur, totlen, nsegs); 3020 3021 /* Fill TX descriptor. */ 3022 desc->num_tbs = 2 + nsegs; 3023 3024 desc->tbs[0].lo = htole32(data->cmd_paddr); 3025 desc->tbs[0].hi_n_len = htole16(iwm_get_dma_hi_addr(data->cmd_paddr)) | 3026 (TB0_SIZE << 4); 3027 desc->tbs[1].lo = htole32(data->cmd_paddr + TB0_SIZE); 3028 desc->tbs[1].hi_n_len = htole16(iwm_get_dma_hi_addr(data->cmd_paddr)) | 3029 ((sizeof(struct iwm_cmd_header) + sizeof(*tx) 3030 + hdrlen + pad - TB0_SIZE) << 4); 3031 3032 /* Other DMA segments are for data payload. */ 3033 for (i = 0; i < nsegs; i++) { 3034 seg = &segs[i]; 3035 desc->tbs[i+2].lo = htole32(seg->ds_addr); 3036 desc->tbs[i+2].hi_n_len = \ 3037 htole16(iwm_get_dma_hi_addr(seg->ds_addr)) 3038 | ((seg->ds_len) << 4); 3039 } 3040 3041 bus_dmamap_sync(ring->data_dmat, data->map, 3042 BUS_DMASYNC_PREWRITE); 3043 bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map, 3044 BUS_DMASYNC_PREWRITE); 3045 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, 3046 BUS_DMASYNC_PREWRITE); 3047 3048 #if 0 3049 iwm_update_sched(sc, ring->qid, ring->cur, tx->sta_id, le16toh(tx->len)); 3050 #endif 3051 3052 /* Kick TX ring. */ 3053 ring->cur = (ring->cur + 1) % IWM_TX_RING_COUNT; 3054 IWM_WRITE(sc, IWM_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur); 3055 3056 /* Mark TX ring as full if we reach a certain threshold. */ 3057 if (++ring->queued > IWM_TX_RING_HIMARK) { 3058 sc->qfullmsk |= 1 << ring->qid; 3059 } 3060 3061 return 0; 3062 } 3063 3064 static int 3065 iwm_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 3066 const struct ieee80211_bpf_params *params) 3067 { 3068 struct ieee80211com *ic = ni->ni_ic; 3069 struct ifnet *ifp = ic->ic_ifp; 3070 struct iwm_softc *sc = ifp->if_softc; 3071 int error = 0; 3072 3073 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, 3074 "->%s begin\n", __func__); 3075 3076 #if defined(__DragonFly__) 3077 if ((ifp->if_flags & IFF_RUNNING) == 0) { 3078 #else 3079 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { 3080 #endif 3081 ieee80211_free_node(ni); 3082 m_freem(m); 3083 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, 3084 "<-%s not RUNNING\n", __func__); 3085 return (ENETDOWN); 3086 } 3087 3088 IWM_LOCK(sc); 3089 /* XXX fix this */ 3090 if (params == NULL) { 3091 error = iwm_tx(sc, m, ni, 0); 3092 } else { 3093 error = iwm_tx(sc, m, ni, 0); 3094 } 3095 if (error != 0) { 3096 /* NB: m is reclaimed on tx failure */ 3097 ieee80211_free_node(ni); 3098 #if defined(__DragonFly__) 3099 ++ifp->if_oerrors; 3100 #else 3101 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 3102 #endif 3103 } 3104 sc->sc_tx_timer = 5; 3105 IWM_UNLOCK(sc); 3106 3107 return (error); 3108 } 3109 3110 /* 3111 * mvm/tx.c 3112 */ 3113 3114 #if 0 3115 /* 3116 * Note that there are transports that buffer frames before they reach 3117 * the firmware. This means that after flush_tx_path is called, the 3118 * queue might not be empty. The race-free way to handle this is to: 3119 * 1) set the station as draining 3120 * 2) flush the Tx path 3121 * 3) wait for the transport queues to be empty 3122 */ 3123 int 3124 iwm_mvm_flush_tx_path(struct iwm_softc *sc, int tfd_msk, int sync) 3125 { 3126 struct iwm_tx_path_flush_cmd flush_cmd = { 3127 .queues_ctl = htole32(tfd_msk), 3128 .flush_ctl = htole16(IWM_DUMP_TX_FIFO_FLUSH), 3129 }; 3130 int ret; 3131 3132 ret = iwm_mvm_send_cmd_pdu(sc, IWM_TXPATH_FLUSH, 3133 sync ? IWM_CMD_SYNC : IWM_CMD_ASYNC, 3134 sizeof(flush_cmd), &flush_cmd); 3135 if (ret) 3136 device_printf(sc->sc_dev, 3137 "Flushing tx queue failed: %d\n", ret); 3138 return ret; 3139 } 3140 #endif 3141 3142 /* 3143 * BEGIN mvm/sta.c 3144 */ 3145 3146 static void 3147 iwm_mvm_add_sta_cmd_v6_to_v5(struct iwm_mvm_add_sta_cmd_v6 *cmd_v6, 3148 struct iwm_mvm_add_sta_cmd_v5 *cmd_v5) 3149 { 3150 memset(cmd_v5, 0, sizeof(*cmd_v5)); 3151 3152 cmd_v5->add_modify = cmd_v6->add_modify; 3153 cmd_v5->tid_disable_tx = cmd_v6->tid_disable_tx; 3154 cmd_v5->mac_id_n_color = cmd_v6->mac_id_n_color; 3155 IEEE80211_ADDR_COPY(cmd_v5->addr, cmd_v6->addr); 3156 cmd_v5->sta_id = cmd_v6->sta_id; 3157 cmd_v5->modify_mask = cmd_v6->modify_mask; 3158 cmd_v5->station_flags = cmd_v6->station_flags; 3159 cmd_v5->station_flags_msk = cmd_v6->station_flags_msk; 3160 cmd_v5->add_immediate_ba_tid = cmd_v6->add_immediate_ba_tid; 3161 cmd_v5->remove_immediate_ba_tid = cmd_v6->remove_immediate_ba_tid; 3162 cmd_v5->add_immediate_ba_ssn = cmd_v6->add_immediate_ba_ssn; 3163 cmd_v5->sleep_tx_count = cmd_v6->sleep_tx_count; 3164 cmd_v5->sleep_state_flags = cmd_v6->sleep_state_flags; 3165 cmd_v5->assoc_id = cmd_v6->assoc_id; 3166 cmd_v5->beamform_flags = cmd_v6->beamform_flags; 3167 cmd_v5->tfd_queue_msk = cmd_v6->tfd_queue_msk; 3168 } 3169 3170 static int 3171 iwm_mvm_send_add_sta_cmd_status(struct iwm_softc *sc, 3172 struct iwm_mvm_add_sta_cmd_v6 *cmd, int *status) 3173 { 3174 struct iwm_mvm_add_sta_cmd_v5 cmd_v5; 3175 3176 if (sc->sc_capaflags & IWM_UCODE_TLV_FLAGS_STA_KEY_CMD) { 3177 return iwm_mvm_send_cmd_pdu_status(sc, IWM_ADD_STA, 3178 sizeof(*cmd), cmd, status); 3179 } 3180 3181 iwm_mvm_add_sta_cmd_v6_to_v5(cmd, &cmd_v5); 3182 3183 return iwm_mvm_send_cmd_pdu_status(sc, IWM_ADD_STA, sizeof(cmd_v5), 3184 &cmd_v5, status); 3185 } 3186 3187 /* send station add/update command to firmware */ 3188 static int 3189 iwm_mvm_sta_send_to_fw(struct iwm_softc *sc, struct iwm_node *in, int update) 3190 { 3191 struct iwm_mvm_add_sta_cmd_v6 add_sta_cmd; 3192 int ret; 3193 uint32_t status; 3194 3195 memset(&add_sta_cmd, 0, sizeof(add_sta_cmd)); 3196 3197 add_sta_cmd.sta_id = IWM_STATION_ID; 3198 add_sta_cmd.mac_id_n_color 3199 = htole32(IWM_FW_CMD_ID_AND_COLOR(IWM_DEFAULT_MACID, 3200 IWM_DEFAULT_COLOR)); 3201 if (!update) { 3202 add_sta_cmd.tfd_queue_msk = htole32(0xf); 3203 IEEE80211_ADDR_COPY(&add_sta_cmd.addr, in->in_ni.ni_bssid); 3204 } 3205 add_sta_cmd.add_modify = update ? 1 : 0; 3206 add_sta_cmd.station_flags_msk 3207 |= htole32(IWM_STA_FLG_FAT_EN_MSK | IWM_STA_FLG_MIMO_EN_MSK); 3208 3209 status = IWM_ADD_STA_SUCCESS; 3210 ret = iwm_mvm_send_add_sta_cmd_status(sc, &add_sta_cmd, &status); 3211 if (ret) 3212 return ret; 3213 3214 switch (status) { 3215 case IWM_ADD_STA_SUCCESS: 3216 break; 3217 default: 3218 ret = EIO; 3219 device_printf(sc->sc_dev, "IWM_ADD_STA failed\n"); 3220 break; 3221 } 3222 3223 return ret; 3224 } 3225 3226 static int 3227 iwm_mvm_add_sta(struct iwm_softc *sc, struct iwm_node *in) 3228 { 3229 int ret; 3230 3231 ret = iwm_mvm_sta_send_to_fw(sc, in, 0); 3232 if (ret) 3233 return ret; 3234 3235 return 0; 3236 } 3237 3238 static int 3239 iwm_mvm_update_sta(struct iwm_softc *sc, struct iwm_node *in) 3240 { 3241 return iwm_mvm_sta_send_to_fw(sc, in, 1); 3242 } 3243 3244 static int 3245 iwm_mvm_add_int_sta_common(struct iwm_softc *sc, struct iwm_int_sta *sta, 3246 const uint8_t *addr, uint16_t mac_id, uint16_t color) 3247 { 3248 struct iwm_mvm_add_sta_cmd_v6 cmd; 3249 int ret; 3250 uint32_t status; 3251 3252 memset(&cmd, 0, sizeof(cmd)); 3253 cmd.sta_id = sta->sta_id; 3254 cmd.mac_id_n_color = htole32(IWM_FW_CMD_ID_AND_COLOR(mac_id, color)); 3255 3256 cmd.tfd_queue_msk = htole32(sta->tfd_queue_msk); 3257 3258 if (addr) 3259 IEEE80211_ADDR_COPY(cmd.addr, addr); 3260 3261 ret = iwm_mvm_send_add_sta_cmd_status(sc, &cmd, &status); 3262 if (ret) 3263 return ret; 3264 3265 switch (status) { 3266 case IWM_ADD_STA_SUCCESS: 3267 IWM_DPRINTF(sc, IWM_DEBUG_RESET, 3268 "%s: Internal station added.\n", __func__); 3269 return 0; 3270 default: 3271 device_printf(sc->sc_dev, 3272 "%s: Add internal station failed, status=0x%x\n", 3273 __func__, status); 3274 ret = EIO; 3275 break; 3276 } 3277 return ret; 3278 } 3279 3280 static int 3281 iwm_mvm_add_aux_sta(struct iwm_softc *sc) 3282 { 3283 int ret; 3284 3285 sc->sc_aux_sta.sta_id = 3; 3286 sc->sc_aux_sta.tfd_queue_msk = 0; 3287 3288 ret = iwm_mvm_add_int_sta_common(sc, 3289 &sc->sc_aux_sta, NULL, IWM_MAC_INDEX_AUX, 0); 3290 3291 if (ret) 3292 memset(&sc->sc_aux_sta, 0, sizeof(sc->sc_aux_sta)); 3293 return ret; 3294 } 3295 3296 /* 3297 * END mvm/sta.c 3298 */ 3299 3300 /* 3301 * BEGIN mvm/quota.c 3302 */ 3303 3304 static int 3305 iwm_mvm_update_quotas(struct iwm_softc *sc, struct iwm_node *in) 3306 { 3307 struct iwm_time_quota_cmd cmd; 3308 int i, idx, ret, num_active_macs, quota, quota_rem; 3309 int colors[IWM_MAX_BINDINGS] = { -1, -1, -1, -1, }; 3310 int n_ifs[IWM_MAX_BINDINGS] = {0, }; 3311 uint16_t id; 3312 3313 memset(&cmd, 0, sizeof(cmd)); 3314 3315 /* currently, PHY ID == binding ID */ 3316 if (in) { 3317 id = in->in_phyctxt->id; 3318 KASSERT(id < IWM_MAX_BINDINGS, ("invalid id")); 3319 colors[id] = in->in_phyctxt->color; 3320 3321 if (1) 3322 n_ifs[id] = 1; 3323 } 3324 3325 /* 3326 * The FW's scheduling session consists of 3327 * IWM_MVM_MAX_QUOTA fragments. Divide these fragments 3328 * equally between all the bindings that require quota 3329 */ 3330 num_active_macs = 0; 3331 for (i = 0; i < IWM_MAX_BINDINGS; i++) { 3332 cmd.quotas[i].id_and_color = htole32(IWM_FW_CTXT_INVALID); 3333 num_active_macs += n_ifs[i]; 3334 } 3335 3336 quota = 0; 3337 quota_rem = 0; 3338 if (num_active_macs) { 3339 quota = IWM_MVM_MAX_QUOTA / num_active_macs; 3340 quota_rem = IWM_MVM_MAX_QUOTA % num_active_macs; 3341 } 3342 3343 for (idx = 0, i = 0; i < IWM_MAX_BINDINGS; i++) { 3344 if (colors[i] < 0) 3345 continue; 3346 3347 cmd.quotas[idx].id_and_color = 3348 htole32(IWM_FW_CMD_ID_AND_COLOR(i, colors[i])); 3349 3350 if (n_ifs[i] <= 0) { 3351 cmd.quotas[idx].quota = htole32(0); 3352 cmd.quotas[idx].max_duration = htole32(0); 3353 } else { 3354 cmd.quotas[idx].quota = htole32(quota * n_ifs[i]); 3355 cmd.quotas[idx].max_duration = htole32(0); 3356 } 3357 idx++; 3358 } 3359 3360 /* Give the remainder of the session to the first binding */ 3361 cmd.quotas[0].quota = htole32(le32toh(cmd.quotas[0].quota) + quota_rem); 3362 3363 ret = iwm_mvm_send_cmd_pdu(sc, IWM_TIME_QUOTA_CMD, IWM_CMD_SYNC, 3364 sizeof(cmd), &cmd); 3365 if (ret) 3366 device_printf(sc->sc_dev, 3367 "%s: Failed to send quota: %d\n", __func__, ret); 3368 return ret; 3369 } 3370 3371 /* 3372 * END mvm/quota.c 3373 */ 3374 3375 /* 3376 * ieee80211 routines 3377 */ 3378 3379 /* 3380 * Change to AUTH state in 80211 state machine. Roughly matches what 3381 * Linux does in bss_info_changed(). 3382 */ 3383 static int 3384 iwm_auth(struct ieee80211vap *vap, struct iwm_softc *sc) 3385 { 3386 struct ieee80211_node *ni; 3387 struct iwm_node *in; 3388 struct iwm_vap *iv = IWM_VAP(vap); 3389 uint32_t duration; 3390 uint32_t min_duration; 3391 int error; 3392 3393 /* 3394 * XXX i have a feeling that the vap node is being 3395 * freed from underneath us. Grr. 3396 */ 3397 ni = ieee80211_ref_node(vap->iv_bss); 3398 in = (struct iwm_node *) ni; 3399 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_STATE, 3400 "%s: called; vap=%p, bss ni=%p\n", 3401 __func__, 3402 vap, 3403 ni); 3404 3405 in->in_assoc = 0; 3406 3407 error = iwm_allow_mcast(vap, sc); 3408 if (error) { 3409 device_printf(sc->sc_dev, 3410 "%s: failed to set multicast\n", __func__); 3411 goto out; 3412 } 3413 3414 /* 3415 * This is where it deviates from what Linux does. 3416 * 3417 * Linux iwlwifi doesn't reset the nic each time, nor does it 3418 * call ctxt_add() here. Instead, it adds it during vap creation, 3419 * and always does does a mac_ctx_changed(). 3420 * 3421 * The openbsd port doesn't attempt to do that - it reset things 3422 * at odd states and does the add here. 3423 * 3424 * So, until the state handling is fixed (ie, we never reset 3425 * the NIC except for a firmware failure, which should drag 3426 * the NIC back to IDLE, re-setup and re-add all the mac/phy 3427 * contexts that are required), let's do a dirty hack here. 3428 */ 3429 if (iv->is_uploaded) { 3430 if ((error = iwm_mvm_mac_ctxt_changed(sc, vap)) != 0) { 3431 device_printf(sc->sc_dev, 3432 "%s: failed to add MAC\n", __func__); 3433 goto out; 3434 } 3435 } else { 3436 if ((error = iwm_mvm_mac_ctxt_add(sc, vap)) != 0) { 3437 device_printf(sc->sc_dev, 3438 "%s: failed to add MAC\n", __func__); 3439 goto out; 3440 } 3441 } 3442 3443 if ((error = iwm_mvm_phy_ctxt_changed(sc, &sc->sc_phyctxt[0], 3444 in->in_ni.ni_chan, 1, 1)) != 0) { 3445 device_printf(sc->sc_dev, 3446 "%s: failed add phy ctxt\n", __func__); 3447 goto out; 3448 } 3449 in->in_phyctxt = &sc->sc_phyctxt[0]; 3450 3451 if ((error = iwm_mvm_binding_add_vif(sc, in)) != 0) { 3452 device_printf(sc->sc_dev, 3453 "%s: binding cmd\n", __func__); 3454 goto out; 3455 } 3456 3457 if ((error = iwm_mvm_add_sta(sc, in)) != 0) { 3458 device_printf(sc->sc_dev, 3459 "%s: failed to add MAC\n", __func__); 3460 goto out; 3461 } 3462 3463 /* a bit superfluous? */ 3464 while (sc->sc_auth_prot) { 3465 #if defined(__DragonFly__) 3466 iwmsleep(&sc->sc_auth_prot, &sc->sc_lk, 0, "iwmauth", 0); 3467 #else 3468 msleep(&sc->sc_auth_prot, &sc->sc_mtx, 0, "iwmauth", 0); 3469 #endif 3470 } 3471 sc->sc_auth_prot = 1; 3472 3473 duration = min(IWM_MVM_TE_SESSION_PROTECTION_MAX_TIME_MS, 3474 200 + in->in_ni.ni_intval); 3475 min_duration = min(IWM_MVM_TE_SESSION_PROTECTION_MIN_TIME_MS, 3476 100 + in->in_ni.ni_intval); 3477 iwm_mvm_protect_session(sc, in, duration, min_duration, 500); 3478 3479 IWM_DPRINTF(sc, IWM_DEBUG_RESET, 3480 "%s: waiting for auth_prot\n", __func__); 3481 while (sc->sc_auth_prot != 2) { 3482 /* 3483 * well, meh, but if the kernel is sleeping for half a 3484 * second, we have bigger problems 3485 */ 3486 if (sc->sc_auth_prot == 0) { 3487 device_printf(sc->sc_dev, 3488 "%s: missed auth window!\n", __func__); 3489 error = ETIMEDOUT; 3490 goto out; 3491 } else if (sc->sc_auth_prot == -1) { 3492 device_printf(sc->sc_dev, 3493 "%s: no time event, denied!\n", __func__); 3494 sc->sc_auth_prot = 0; 3495 error = EAUTH; 3496 goto out; 3497 } 3498 #if defined(__DragonFly__) 3499 iwmsleep(&sc->sc_auth_prot, &sc->sc_lk, 0, "iwmau2", 0); 3500 #else 3501 msleep(&sc->sc_auth_prot, &sc->sc_mtx, 0, "iwmau2", 0); 3502 #endif 3503 } 3504 IWM_DPRINTF(sc, IWM_DEBUG_RESET, "<-%s\n", __func__); 3505 error = 0; 3506 out: 3507 ieee80211_free_node(ni); 3508 return (error); 3509 } 3510 3511 static int 3512 iwm_assoc(struct ieee80211vap *vap, struct iwm_softc *sc) 3513 { 3514 struct iwm_node *in = (struct iwm_node *)vap->iv_bss; 3515 int error; 3516 3517 if ((error = iwm_mvm_update_sta(sc, in)) != 0) { 3518 device_printf(sc->sc_dev, 3519 "%s: failed to update STA\n", __func__); 3520 return error; 3521 } 3522 3523 in->in_assoc = 1; 3524 if ((error = iwm_mvm_mac_ctxt_changed(sc, vap)) != 0) { 3525 device_printf(sc->sc_dev, 3526 "%s: failed to update MAC\n", __func__); 3527 return error; 3528 } 3529 3530 return 0; 3531 } 3532 3533 static int 3534 iwm_release(struct iwm_softc *sc, struct iwm_node *in) 3535 { 3536 /* 3537 * Ok, so *technically* the proper set of calls for going 3538 * from RUN back to SCAN is: 3539 * 3540 * iwm_mvm_power_mac_disable(sc, in); 3541 * iwm_mvm_mac_ctxt_changed(sc, in); 3542 * iwm_mvm_rm_sta(sc, in); 3543 * iwm_mvm_update_quotas(sc, NULL); 3544 * iwm_mvm_mac_ctxt_changed(sc, in); 3545 * iwm_mvm_binding_remove_vif(sc, in); 3546 * iwm_mvm_mac_ctxt_remove(sc, in); 3547 * 3548 * However, that freezes the device not matter which permutations 3549 * and modifications are attempted. Obviously, this driver is missing 3550 * something since it works in the Linux driver, but figuring out what 3551 * is missing is a little more complicated. Now, since we're going 3552 * back to nothing anyway, we'll just do a complete device reset. 3553 * Up your's, device! 3554 */ 3555 //iwm_mvm_flush_tx_path(sc, 0xf, 1); 3556 iwm_stop_device(sc); 3557 iwm_init_hw(sc); 3558 if (in) 3559 in->in_assoc = 0; 3560 return 0; 3561 3562 #if 0 3563 int error; 3564 3565 iwm_mvm_power_mac_disable(sc, in); 3566 3567 if ((error = iwm_mvm_mac_ctxt_changed(sc, in)) != 0) { 3568 device_printf(sc->sc_dev, "mac ctxt change fail 1 %d\n", error); 3569 return error; 3570 } 3571 3572 if ((error = iwm_mvm_rm_sta(sc, in)) != 0) { 3573 device_printf(sc->sc_dev, "sta remove fail %d\n", error); 3574 return error; 3575 } 3576 error = iwm_mvm_rm_sta(sc, in); 3577 in->in_assoc = 0; 3578 iwm_mvm_update_quotas(sc, NULL); 3579 if ((error = iwm_mvm_mac_ctxt_changed(sc, in)) != 0) { 3580 device_printf(sc->sc_dev, "mac ctxt change fail 2 %d\n", error); 3581 return error; 3582 } 3583 iwm_mvm_binding_remove_vif(sc, in); 3584 3585 iwm_mvm_mac_ctxt_remove(sc, in); 3586 3587 return error; 3588 #endif 3589 } 3590 3591 static struct ieee80211_node * 3592 iwm_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN]) 3593 { 3594 return kmalloc(sizeof (struct iwm_node), M_80211_NODE, 3595 M_INTWAIT | M_ZERO); 3596 } 3597 3598 static void 3599 iwm_setrates(struct iwm_softc *sc, struct iwm_node *in) 3600 { 3601 struct ieee80211_node *ni = &in->in_ni; 3602 struct iwm_lq_cmd *lq = &in->in_lq; 3603 int nrates = ni->ni_rates.rs_nrates; 3604 int i, ridx, tab = 0; 3605 int txant = 0; 3606 3607 if (nrates > nitems(lq->rs_table)) { 3608 device_printf(sc->sc_dev, 3609 "%s: node supports %d rates, driver handles " 3610 "only %zu\n", __func__, nrates, nitems(lq->rs_table)); 3611 return; 3612 } 3613 3614 /* 3615 * XXX .. and most of iwm_node is not initialised explicitly; 3616 * it's all just 0x0 passed to the firmware. 3617 */ 3618 3619 /* first figure out which rates we should support */ 3620 /* XXX TODO: this isn't 11n aware /at all/ */ 3621 memset(&in->in_ridx, -1, sizeof(in->in_ridx)); 3622 IWM_DPRINTF(sc, IWM_DEBUG_TXRATE, 3623 "%s: nrates=%d\n", __func__, nrates); 3624 for (i = 0; i < nrates; i++) { 3625 int rate = ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL; 3626 3627 /* Map 802.11 rate to HW rate index. */ 3628 for (ridx = 0; ridx <= IWM_RIDX_MAX; ridx++) 3629 if (iwm_rates[ridx].rate == rate) 3630 break; 3631 if (ridx > IWM_RIDX_MAX) { 3632 device_printf(sc->sc_dev, 3633 "%s: WARNING: device rate for %d not found!\n", 3634 __func__, rate); 3635 } else { 3636 IWM_DPRINTF(sc, IWM_DEBUG_TXRATE, 3637 "%s: rate: i: %d, rate=%d, ridx=%d\n", 3638 __func__, 3639 i, 3640 rate, 3641 ridx); 3642 in->in_ridx[i] = ridx; 3643 } 3644 } 3645 3646 /* then construct a lq_cmd based on those */ 3647 memset(lq, 0, sizeof(*lq)); 3648 lq->sta_id = IWM_STATION_ID; 3649 3650 /* 3651 * are these used? (we don't do SISO or MIMO) 3652 * need to set them to non-zero, though, or we get an error. 3653 */ 3654 lq->single_stream_ant_msk = 1; 3655 lq->dual_stream_ant_msk = 1; 3656 3657 /* 3658 * Build the actual rate selection table. 3659 * The lowest bits are the rates. Additionally, 3660 * CCK needs bit 9 to be set. The rest of the bits 3661 * we add to the table select the tx antenna 3662 * Note that we add the rates in the highest rate first 3663 * (opposite of ni_rates). 3664 */ 3665 /* 3666 * XXX TODO: this should be looping over the min of nrates 3667 * and LQ_MAX_RETRY_NUM. Sigh. 3668 */ 3669 for (i = 0; i < nrates; i++) { 3670 int nextant; 3671 3672 if (txant == 0) 3673 txant = IWM_FW_VALID_TX_ANT(sc); 3674 nextant = 1<<(ffs(txant)-1); 3675 txant &= ~nextant; 3676 3677 /* 3678 * Map the rate id into a rate index into 3679 * our hardware table containing the 3680 * configuration to use for this rate. 3681 */ 3682 ridx = in->in_ridx[(nrates-1)-i]; 3683 tab = iwm_rates[ridx].plcp; 3684 tab |= nextant << IWM_RATE_MCS_ANT_POS; 3685 if (IWM_RIDX_IS_CCK(ridx)) 3686 tab |= IWM_RATE_MCS_CCK_MSK; 3687 IWM_DPRINTF(sc, IWM_DEBUG_TXRATE, 3688 "station rate i=%d, rate=%d, hw=%x\n", 3689 i, iwm_rates[ridx].rate, tab); 3690 lq->rs_table[i] = htole32(tab); 3691 } 3692 /* then fill the rest with the lowest possible rate */ 3693 for (i = nrates; i < nitems(lq->rs_table); i++) { 3694 KASSERT(tab != 0, ("invalid tab")); 3695 lq->rs_table[i] = htole32(tab); 3696 } 3697 } 3698 3699 static int 3700 iwm_media_change(struct ifnet *ifp) 3701 { 3702 struct iwm_softc *sc = ifp->if_softc; 3703 int error; 3704 3705 error = ieee80211_media_change(ifp); 3706 if (error != ENETRESET) 3707 return error; 3708 3709 #if defined(__DragonFly__) 3710 if ((ifp->if_flags & IFF_UP) && 3711 (ifp->if_flags & IFF_RUNNING)) { 3712 #else 3713 if ((ifp->if_flags & IFF_UP) && 3714 (ifp->if_drv_flags & IFF_DRV_RUNNING)) { 3715 #endif 3716 iwm_stop(ifp, 0); 3717 iwm_init(sc); 3718 } 3719 return error; 3720 } 3721 3722 3723 static int 3724 iwm_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 3725 { 3726 struct iwm_vap *ivp = IWM_VAP(vap); 3727 struct ieee80211com *ic = vap->iv_ic; 3728 struct iwm_softc *sc = ic->ic_ifp->if_softc; 3729 struct iwm_node *in; 3730 int error; 3731 3732 IWM_DPRINTF(sc, IWM_DEBUG_STATE, 3733 "switching state %s -> %s\n", 3734 ieee80211_state_name[vap->iv_state], 3735 ieee80211_state_name[nstate]); 3736 IEEE80211_UNLOCK(ic); 3737 IWM_LOCK(sc); 3738 /* disable beacon filtering if we're hopping out of RUN */ 3739 if (vap->iv_state == IEEE80211_S_RUN && nstate != vap->iv_state) { 3740 iwm_mvm_disable_beacon_filter(sc); 3741 3742 if (((in = (void *)vap->iv_bss) != NULL)) 3743 in->in_assoc = 0; 3744 3745 iwm_release(sc, NULL); 3746 3747 /* 3748 * It's impossible to directly go RUN->SCAN. If we iwm_release() 3749 * above then the card will be completely reinitialized, 3750 * so the driver must do everything necessary to bring the card 3751 * from INIT to SCAN. 3752 * 3753 * Additionally, upon receiving deauth frame from AP, 3754 * OpenBSD 802.11 stack puts the driver in IEEE80211_S_AUTH 3755 * state. This will also fail with this driver, so bring the FSM 3756 * from IEEE80211_S_RUN to IEEE80211_S_SCAN in this case as well. 3757 * 3758 * XXX TODO: fix this for FreeBSD! 3759 */ 3760 if (nstate == IEEE80211_S_SCAN || 3761 nstate == IEEE80211_S_AUTH || 3762 nstate == IEEE80211_S_ASSOC) { 3763 IWM_DPRINTF(sc, IWM_DEBUG_STATE, 3764 "Force transition to INIT; MGT=%d\n", arg); 3765 IWM_UNLOCK(sc); 3766 IEEE80211_LOCK(ic); 3767 vap->iv_newstate(vap, IEEE80211_S_INIT, arg); 3768 IWM_DPRINTF(sc, IWM_DEBUG_STATE, 3769 "Going INIT->SCAN\n"); 3770 nstate = IEEE80211_S_SCAN; 3771 IEEE80211_UNLOCK(ic); 3772 IWM_LOCK(sc); 3773 } 3774 } 3775 3776 switch (nstate) { 3777 case IEEE80211_S_INIT: 3778 sc->sc_scanband = 0; 3779 break; 3780 3781 case IEEE80211_S_AUTH: 3782 if ((error = iwm_auth(vap, sc)) != 0) { 3783 device_printf(sc->sc_dev, 3784 "%s: could not move to auth state: %d\n", 3785 __func__, error); 3786 break; 3787 } 3788 break; 3789 3790 case IEEE80211_S_ASSOC: 3791 if ((error = iwm_assoc(vap, sc)) != 0) { 3792 device_printf(sc->sc_dev, 3793 "%s: failed to associate: %d\n", __func__, 3794 error); 3795 break; 3796 } 3797 break; 3798 3799 case IEEE80211_S_RUN: 3800 { 3801 struct iwm_host_cmd cmd = { 3802 .id = IWM_LQ_CMD, 3803 .len = { sizeof(in->in_lq), }, 3804 .flags = IWM_CMD_SYNC, 3805 }; 3806 3807 /* Update the association state, now we have it all */ 3808 /* (eg associd comes in at this point */ 3809 error = iwm_assoc(vap, sc); 3810 if (error != 0) { 3811 device_printf(sc->sc_dev, 3812 "%s: failed to update association state: %d\n", 3813 __func__, 3814 error); 3815 break; 3816 } 3817 3818 in = (struct iwm_node *)vap->iv_bss; 3819 iwm_mvm_power_mac_update_mode(sc, in); 3820 iwm_mvm_enable_beacon_filter(sc, in); 3821 iwm_mvm_update_quotas(sc, in); 3822 iwm_setrates(sc, in); 3823 3824 cmd.data[0] = &in->in_lq; 3825 if ((error = iwm_send_cmd(sc, &cmd)) != 0) { 3826 device_printf(sc->sc_dev, 3827 "%s: IWM_LQ_CMD failed\n", __func__); 3828 } 3829 3830 break; 3831 } 3832 3833 default: 3834 break; 3835 } 3836 IWM_UNLOCK(sc); 3837 IEEE80211_LOCK(ic); 3838 3839 return (ivp->iv_newstate(vap, nstate, arg)); 3840 } 3841 3842 void 3843 iwm_endscan_cb(void *arg, int pending) 3844 { 3845 struct iwm_softc *sc = arg; 3846 struct ieee80211com *ic = sc->sc_ic; 3847 int done; 3848 int error; 3849 3850 IWM_DPRINTF(sc, IWM_DEBUG_SCAN | IWM_DEBUG_TRACE, 3851 "%s: scan ended\n", 3852 __func__); 3853 3854 IWM_LOCK(sc); 3855 if (sc->sc_scanband == IEEE80211_CHAN_2GHZ && 3856 sc->sc_nvm.sku_cap_band_52GHz_enable) { 3857 done = 0; 3858 if ((error = iwm_mvm_scan_request(sc, 3859 IEEE80211_CHAN_5GHZ, 0, NULL, 0)) != 0) { 3860 device_printf(sc->sc_dev, "could not initiate scan\n"); 3861 done = 1; 3862 } 3863 } else { 3864 done = 1; 3865 } 3866 3867 if (done) { 3868 IWM_UNLOCK(sc); 3869 ieee80211_scan_done(TAILQ_FIRST(&ic->ic_vaps)); 3870 IWM_LOCK(sc); 3871 sc->sc_scanband = 0; 3872 } 3873 IWM_UNLOCK(sc); 3874 } 3875 3876 static int 3877 iwm_init_hw(struct iwm_softc *sc) 3878 { 3879 struct ieee80211com *ic = sc->sc_ic; 3880 int error, i, qid; 3881 3882 if ((error = iwm_start_hw(sc)) != 0) { 3883 kprintf("iwm_start_hw: failed %d\n", error); 3884 return error; 3885 } 3886 3887 if ((error = iwm_run_init_mvm_ucode(sc, 0)) != 0) { 3888 kprintf("iwm_run_init_mvm_ucode: failed %d\n", error); 3889 return error; 3890 } 3891 3892 /* 3893 * should stop and start HW since that INIT 3894 * image just loaded 3895 */ 3896 iwm_stop_device(sc); 3897 if ((error = iwm_start_hw(sc)) != 0) { 3898 device_printf(sc->sc_dev, "could not initialize hardware\n"); 3899 return error; 3900 } 3901 3902 /* omstart, this time with the regular firmware */ 3903 error = iwm_mvm_load_ucode_wait_alive(sc, IWM_UCODE_TYPE_REGULAR); 3904 if (error) { 3905 device_printf(sc->sc_dev, "could not load firmware\n"); 3906 goto error; 3907 } 3908 3909 if ((error = iwm_send_tx_ant_cfg(sc, IWM_FW_VALID_TX_ANT(sc))) != 0) { 3910 device_printf(sc->sc_dev, "antenna config failed\n"); 3911 goto error; 3912 } 3913 3914 /* Send phy db control command and then phy db calibration*/ 3915 if ((error = iwm_send_phy_db_data(sc)) != 0) { 3916 device_printf(sc->sc_dev, "phy_db_data failed\n"); 3917 goto error; 3918 } 3919 3920 if ((error = iwm_send_phy_cfg_cmd(sc)) != 0) { 3921 device_printf(sc->sc_dev, "phy_cfg_cmd failed\n"); 3922 goto error; 3923 } 3924 3925 /* Add auxiliary station for scanning */ 3926 if ((error = iwm_mvm_add_aux_sta(sc)) != 0) { 3927 device_printf(sc->sc_dev, "add_aux_sta failed\n"); 3928 goto error; 3929 } 3930 3931 for (i = 0; i < IWM_NUM_PHY_CTX; i++) { 3932 /* 3933 * The channel used here isn't relevant as it's 3934 * going to be overwritten in the other flows. 3935 * For now use the first channel we have. 3936 */ 3937 if ((error = iwm_mvm_phy_ctxt_add(sc, 3938 &sc->sc_phyctxt[i], &ic->ic_channels[1], 1, 1)) != 0) 3939 goto error; 3940 } 3941 3942 error = iwm_mvm_power_update_device(sc); 3943 if (error) 3944 goto error; 3945 3946 /* Mark TX rings as active. */ 3947 for (qid = 0; qid < 4; qid++) { 3948 iwm_enable_txq(sc, qid, qid); 3949 } 3950 3951 return 0; 3952 3953 error: 3954 iwm_stop_device(sc); 3955 return error; 3956 } 3957 3958 /* Allow multicast from our BSSID. */ 3959 static int 3960 iwm_allow_mcast(struct ieee80211vap *vap, struct iwm_softc *sc) 3961 { 3962 struct ieee80211_node *ni = vap->iv_bss; 3963 struct iwm_mcast_filter_cmd *cmd; 3964 size_t size; 3965 int error; 3966 3967 size = roundup(sizeof(*cmd), 4); 3968 cmd = kmalloc(size, M_DEVBUF, M_INTWAIT | M_ZERO); 3969 if (cmd == NULL) 3970 return ENOMEM; 3971 cmd->filter_own = 1; 3972 cmd->port_id = 0; 3973 cmd->count = 0; 3974 cmd->pass_all = 1; 3975 IEEE80211_ADDR_COPY(cmd->bssid, ni->ni_bssid); 3976 3977 error = iwm_mvm_send_cmd_pdu(sc, IWM_MCAST_FILTER_CMD, 3978 IWM_CMD_SYNC, size, cmd); 3979 kfree(cmd, M_DEVBUF); 3980 3981 return (error); 3982 } 3983 3984 /* 3985 * ifnet interfaces 3986 */ 3987 3988 static void 3989 iwm_init(void *arg) 3990 { 3991 struct iwm_softc *sc = arg; 3992 3993 IWM_LOCK(sc); 3994 iwm_init_locked(sc); 3995 IWM_UNLOCK(sc); 3996 } 3997 3998 static void 3999 iwm_init_locked(struct iwm_softc *sc) 4000 { 4001 struct ifnet *ifp = sc->sc_ifp; 4002 int error; 4003 4004 if (sc->sc_flags & IWM_FLAG_HW_INITED) { 4005 return; 4006 } 4007 sc->sc_generation++; 4008 sc->sc_flags &= ~IWM_FLAG_STOPPED; 4009 4010 if ((error = iwm_init_hw(sc)) != 0) { 4011 kprintf("iwm_init_hw failed %d\n", error); 4012 iwm_stop_locked(ifp); 4013 return; 4014 } 4015 4016 /* 4017 * Ok, firmware loaded and we are jogging 4018 */ 4019 #if defined(__DragonFly__) 4020 ifq_clr_oactive(&ifp->if_snd); 4021 ifp->if_flags |= IFF_RUNNING; 4022 #else 4023 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 4024 ifp->if_drv_flags |= IFF_DRV_RUNNING; 4025 #endif 4026 sc->sc_flags |= IWM_FLAG_HW_INITED; 4027 callout_reset(&sc->sc_watchdog_to, hz, iwm_watchdog, sc); 4028 } 4029 4030 /* 4031 * Dequeue packets from sendq and call send. 4032 * mostly from iwn 4033 */ 4034 #if defined(__DragonFly__) 4035 static void 4036 iwm_start(struct ifnet *ifp, struct ifaltq_subque *ifsq) 4037 #else 4038 static void 4039 iwm_start(struct ifnet *ifp) 4040 #endif 4041 { 4042 struct iwm_softc *sc = ifp->if_softc; 4043 4044 IWM_LOCK(sc); 4045 iwm_start_locked(ifp); 4046 IWM_UNLOCK(sc); 4047 } 4048 4049 static void 4050 iwm_start_locked(struct ifnet *ifp) 4051 { 4052 struct iwm_softc *sc = ifp->if_softc; 4053 struct ieee80211_node *ni; 4054 struct mbuf *m; 4055 int ac = 0; 4056 4057 #if defined(__DragonFly__) 4058 if ((ifp->if_flags & IFF_RUNNING) == 0) 4059 ifq_purge(&ifp->if_snd); 4060 if (ifq_is_oactive(&ifp->if_snd) || (ifp->if_flags & IFF_RUNNING) == 0) 4061 return; 4062 #else 4063 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != IFF_DRV_RUNNING) 4064 return; 4065 #endif 4066 4067 IWM_DPRINTF(sc, IWM_DEBUG_XMIT | IWM_DEBUG_TRACE, "->%s\n", __func__); 4068 for (;;) { 4069 /* why isn't this done per-queue? */ 4070 if (sc->qfullmsk != 0) { 4071 #if defined(__DragonFly__) 4072 ifq_set_oactive(&ifp->if_snd); 4073 #else 4074 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 4075 #endif 4076 break; 4077 } 4078 m = ifq_dequeue(&ifp->if_snd); 4079 if (!m) 4080 break; 4081 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 4082 if (iwm_tx(sc, m, ni, ac) != 0) { 4083 ieee80211_free_node(ni); 4084 #if defined(__DragonFly__) 4085 ++ifp->if_oerrors; 4086 #else 4087 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 4088 #endif 4089 continue; 4090 } 4091 4092 if (ifp->if_flags & IFF_UP) { 4093 sc->sc_tx_timer = 15; 4094 } 4095 } 4096 IWM_DPRINTF(sc, IWM_DEBUG_XMIT | IWM_DEBUG_TRACE, "<-%s\n", __func__); 4097 } 4098 4099 static void 4100 iwm_stop(struct ifnet *ifp, int disable) 4101 { 4102 struct iwm_softc *sc = ifp->if_softc; 4103 4104 IWM_LOCK(sc); 4105 iwm_stop_locked(ifp); 4106 IWM_UNLOCK(sc); 4107 } 4108 4109 static void 4110 iwm_stop_locked(struct ifnet *ifp) 4111 { 4112 struct iwm_softc *sc = ifp->if_softc; 4113 4114 sc->sc_flags &= ~IWM_FLAG_HW_INITED; 4115 sc->sc_flags |= IWM_FLAG_STOPPED; 4116 sc->sc_generation++; 4117 sc->sc_scanband = 0; 4118 sc->sc_auth_prot = 0; 4119 #if defined(__DragonFly__) 4120 ifq_clr_oactive(&ifp->if_snd); 4121 ifp->if_flags &= ~IFF_RUNNING; 4122 #else 4123 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 4124 #endif 4125 sc->sc_tx_timer = 0; 4126 iwm_stop_device(sc); 4127 } 4128 4129 static void 4130 iwm_watchdog(void *arg) 4131 { 4132 struct iwm_softc *sc = arg; 4133 struct ifnet *ifp = sc->sc_ifp; 4134 4135 #if defined(__DragonFly__) 4136 #else 4137 KASSERT(ifp->if_drv_flags & IFF_DRV_RUNNING, ("not running")); 4138 #endif 4139 if (sc->sc_tx_timer > 0) { 4140 if (--sc->sc_tx_timer == 0) { 4141 device_printf(sc->sc_dev, "device timeout\n"); 4142 #ifdef IWM_DEBUG 4143 iwm_nic_error(sc); 4144 #endif 4145 ifp->if_flags &= ~IFF_UP; 4146 iwm_stop_locked(ifp); 4147 #if defined(__DragonFly__) 4148 ++ifp->if_oerrors; 4149 #else 4150 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 4151 #endif 4152 return; 4153 } 4154 } 4155 callout_reset(&sc->sc_watchdog_to, hz, iwm_watchdog, sc); 4156 } 4157 4158 #if defined(__DragonFly__) 4159 static int 4160 iwm_ioctl(struct ifnet *ifp, u_long cmd, iwm_caddr_t data, struct ucred *cred) 4161 #else 4162 static int 4163 iwm_ioctl(struct ifnet *ifp, u_long cmd, iwm_caddr_t data) 4164 #endif 4165 { 4166 struct iwm_softc *sc = ifp->if_softc; 4167 struct ieee80211com *ic = sc->sc_ic; 4168 struct ifreq *ifr = (struct ifreq *) data; 4169 int error = 0, startall = 0; 4170 4171 switch (cmd) { 4172 case SIOCGIFADDR: 4173 error = ether_ioctl(ifp, cmd, data); 4174 break; 4175 case SIOCGIFMEDIA: 4176 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 4177 break; 4178 case SIOCSIFFLAGS: 4179 IWM_LOCK(sc); 4180 #if defined(__DragonFly__) 4181 if (ifp->if_flags & IFF_UP) { 4182 if (!(ifp->if_flags & IFF_RUNNING)) { 4183 iwm_init_locked(sc); 4184 startall = 1; 4185 } 4186 } else { 4187 if (ifp->if_flags & IFF_RUNNING) 4188 iwm_stop_locked(ifp); 4189 } 4190 #else 4191 if (ifp->if_flags & IFF_UP) { 4192 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 4193 iwm_init_locked(sc); 4194 startall = 1; 4195 } 4196 } else { 4197 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 4198 iwm_stop_locked(ifp); 4199 } 4200 #endif 4201 IWM_UNLOCK(sc); 4202 if (startall) 4203 ieee80211_start_all(ic); 4204 4205 break; 4206 default: 4207 error = EINVAL; 4208 break; 4209 } 4210 4211 return error; 4212 } 4213 4214 /* 4215 * The interrupt side of things 4216 */ 4217 4218 /* 4219 * error dumping routines are from iwlwifi/mvm/utils.c 4220 */ 4221 4222 /* 4223 * Note: This structure is read from the device with IO accesses, 4224 * and the reading already does the endian conversion. As it is 4225 * read with uint32_t-sized accesses, any members with a different size 4226 * need to be ordered correctly though! 4227 */ 4228 struct iwm_error_event_table { 4229 uint32_t valid; /* (nonzero) valid, (0) log is empty */ 4230 uint32_t error_id; /* type of error */ 4231 uint32_t pc; /* program counter */ 4232 uint32_t blink1; /* branch link */ 4233 uint32_t blink2; /* branch link */ 4234 uint32_t ilink1; /* interrupt link */ 4235 uint32_t ilink2; /* interrupt link */ 4236 uint32_t data1; /* error-specific data */ 4237 uint32_t data2; /* error-specific data */ 4238 uint32_t data3; /* error-specific data */ 4239 uint32_t bcon_time; /* beacon timer */ 4240 uint32_t tsf_low; /* network timestamp function timer */ 4241 uint32_t tsf_hi; /* network timestamp function timer */ 4242 uint32_t gp1; /* GP1 timer register */ 4243 uint32_t gp2; /* GP2 timer register */ 4244 uint32_t gp3; /* GP3 timer register */ 4245 uint32_t ucode_ver; /* uCode version */ 4246 uint32_t hw_ver; /* HW Silicon version */ 4247 uint32_t brd_ver; /* HW board version */ 4248 uint32_t log_pc; /* log program counter */ 4249 uint32_t frame_ptr; /* frame pointer */ 4250 uint32_t stack_ptr; /* stack pointer */ 4251 uint32_t hcmd; /* last host command header */ 4252 uint32_t isr0; /* isr status register LMPM_NIC_ISR0: 4253 * rxtx_flag */ 4254 uint32_t isr1; /* isr status register LMPM_NIC_ISR1: 4255 * host_flag */ 4256 uint32_t isr2; /* isr status register LMPM_NIC_ISR2: 4257 * enc_flag */ 4258 uint32_t isr3; /* isr status register LMPM_NIC_ISR3: 4259 * time_flag */ 4260 uint32_t isr4; /* isr status register LMPM_NIC_ISR4: 4261 * wico interrupt */ 4262 uint32_t isr_pref; /* isr status register LMPM_NIC_PREF_STAT */ 4263 uint32_t wait_event; /* wait event() caller address */ 4264 uint32_t l2p_control; /* L2pControlField */ 4265 uint32_t l2p_duration; /* L2pDurationField */ 4266 uint32_t l2p_mhvalid; /* L2pMhValidBits */ 4267 uint32_t l2p_addr_match; /* L2pAddrMatchStat */ 4268 uint32_t lmpm_pmg_sel; /* indicate which clocks are turned on 4269 * (LMPM_PMG_SEL) */ 4270 uint32_t u_timestamp; /* indicate when the date and time of the 4271 * compilation */ 4272 uint32_t flow_handler; /* FH read/write pointers, RX credit */ 4273 } __packed; 4274 4275 #define ERROR_START_OFFSET (1 * sizeof(uint32_t)) 4276 #define ERROR_ELEM_SIZE (7 * sizeof(uint32_t)) 4277 4278 #ifdef IWM_DEBUG 4279 struct { 4280 const char *name; 4281 uint8_t num; 4282 } advanced_lookup[] = { 4283 { "NMI_INTERRUPT_WDG", 0x34 }, 4284 { "SYSASSERT", 0x35 }, 4285 { "UCODE_VERSION_MISMATCH", 0x37 }, 4286 { "BAD_COMMAND", 0x38 }, 4287 { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C }, 4288 { "FATAL_ERROR", 0x3D }, 4289 { "NMI_TRM_HW_ERR", 0x46 }, 4290 { "NMI_INTERRUPT_TRM", 0x4C }, 4291 { "NMI_INTERRUPT_BREAK_POINT", 0x54 }, 4292 { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C }, 4293 { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 }, 4294 { "NMI_INTERRUPT_HOST", 0x66 }, 4295 { "NMI_INTERRUPT_ACTION_PT", 0x7C }, 4296 { "NMI_INTERRUPT_UNKNOWN", 0x84 }, 4297 { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 }, 4298 { "ADVANCED_SYSASSERT", 0 }, 4299 }; 4300 4301 static const char * 4302 iwm_desc_lookup(uint32_t num) 4303 { 4304 int i; 4305 4306 for (i = 0; i < nitems(advanced_lookup) - 1; i++) 4307 if (advanced_lookup[i].num == num) 4308 return advanced_lookup[i].name; 4309 4310 /* No entry matches 'num', so it is the last: ADVANCED_SYSASSERT */ 4311 return advanced_lookup[i].name; 4312 } 4313 4314 /* 4315 * Support for dumping the error log seemed like a good idea ... 4316 * but it's mostly hex junk and the only sensible thing is the 4317 * hw/ucode revision (which we know anyway). Since it's here, 4318 * I'll just leave it in, just in case e.g. the Intel guys want to 4319 * help us decipher some "ADVANCED_SYSASSERT" later. 4320 */ 4321 static void 4322 iwm_nic_error(struct iwm_softc *sc) 4323 { 4324 struct iwm_error_event_table table; 4325 uint32_t base; 4326 4327 device_printf(sc->sc_dev, "dumping device error log\n"); 4328 base = sc->sc_uc.uc_error_event_table; 4329 if (base < 0x800000 || base >= 0x80C000) { 4330 device_printf(sc->sc_dev, 4331 "Not valid error log pointer 0x%08x\n", base); 4332 return; 4333 } 4334 4335 if (iwm_read_mem(sc, base, &table, sizeof(table)/sizeof(uint32_t)) != 0) { 4336 device_printf(sc->sc_dev, "reading errlog failed\n"); 4337 return; 4338 } 4339 4340 if (!table.valid) { 4341 device_printf(sc->sc_dev, "errlog not found, skipping\n"); 4342 return; 4343 } 4344 4345 if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) { 4346 device_printf(sc->sc_dev, "Start IWL Error Log Dump:\n"); 4347 device_printf(sc->sc_dev, "Status: 0x%x, count: %d\n", 4348 sc->sc_flags, table.valid); 4349 } 4350 4351 device_printf(sc->sc_dev, "0x%08X | %-28s\n", table.error_id, 4352 iwm_desc_lookup(table.error_id)); 4353 device_printf(sc->sc_dev, "%08X | uPc\n", table.pc); 4354 device_printf(sc->sc_dev, "%08X | branchlink1\n", table.blink1); 4355 device_printf(sc->sc_dev, "%08X | branchlink2\n", table.blink2); 4356 device_printf(sc->sc_dev, "%08X | interruptlink1\n", table.ilink1); 4357 device_printf(sc->sc_dev, "%08X | interruptlink2\n", table.ilink2); 4358 device_printf(sc->sc_dev, "%08X | data1\n", table.data1); 4359 device_printf(sc->sc_dev, "%08X | data2\n", table.data2); 4360 device_printf(sc->sc_dev, "%08X | data3\n", table.data3); 4361 device_printf(sc->sc_dev, "%08X | beacon time\n", table.bcon_time); 4362 device_printf(sc->sc_dev, "%08X | tsf low\n", table.tsf_low); 4363 device_printf(sc->sc_dev, "%08X | tsf hi\n", table.tsf_hi); 4364 device_printf(sc->sc_dev, "%08X | time gp1\n", table.gp1); 4365 device_printf(sc->sc_dev, "%08X | time gp2\n", table.gp2); 4366 device_printf(sc->sc_dev, "%08X | time gp3\n", table.gp3); 4367 device_printf(sc->sc_dev, "%08X | uCode version\n", table.ucode_ver); 4368 device_printf(sc->sc_dev, "%08X | hw version\n", table.hw_ver); 4369 device_printf(sc->sc_dev, "%08X | board version\n", table.brd_ver); 4370 device_printf(sc->sc_dev, "%08X | hcmd\n", table.hcmd); 4371 device_printf(sc->sc_dev, "%08X | isr0\n", table.isr0); 4372 device_printf(sc->sc_dev, "%08X | isr1\n", table.isr1); 4373 device_printf(sc->sc_dev, "%08X | isr2\n", table.isr2); 4374 device_printf(sc->sc_dev, "%08X | isr3\n", table.isr3); 4375 device_printf(sc->sc_dev, "%08X | isr4\n", table.isr4); 4376 device_printf(sc->sc_dev, "%08X | isr_pref\n", table.isr_pref); 4377 device_printf(sc->sc_dev, "%08X | wait_event\n", table.wait_event); 4378 device_printf(sc->sc_dev, "%08X | l2p_control\n", table.l2p_control); 4379 device_printf(sc->sc_dev, "%08X | l2p_duration\n", table.l2p_duration); 4380 device_printf(sc->sc_dev, "%08X | l2p_mhvalid\n", table.l2p_mhvalid); 4381 device_printf(sc->sc_dev, "%08X | l2p_addr_match\n", table.l2p_addr_match); 4382 device_printf(sc->sc_dev, "%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel); 4383 device_printf(sc->sc_dev, "%08X | timestamp\n", table.u_timestamp); 4384 device_printf(sc->sc_dev, "%08X | flow_handler\n", table.flow_handler); 4385 } 4386 #endif 4387 4388 #define SYNC_RESP_STRUCT(_var_, _pkt_) \ 4389 do { \ 4390 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);\ 4391 _var_ = (void *)((_pkt_)+1); \ 4392 } while (/*CONSTCOND*/0) 4393 4394 #define SYNC_RESP_PTR(_ptr_, _len_, _pkt_) \ 4395 do { \ 4396 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);\ 4397 _ptr_ = (void *)((_pkt_)+1); \ 4398 } while (/*CONSTCOND*/0) 4399 4400 #define ADVANCE_RXQ(sc) (sc->rxq.cur = (sc->rxq.cur + 1) % IWM_RX_RING_COUNT); 4401 4402 /* 4403 * Process an IWM_CSR_INT_BIT_FH_RX or IWM_CSR_INT_BIT_SW_RX interrupt. 4404 * Basic structure from if_iwn 4405 */ 4406 static void 4407 iwm_notif_intr(struct iwm_softc *sc) 4408 { 4409 uint16_t hw; 4410 4411 bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map, 4412 BUS_DMASYNC_POSTREAD); 4413 4414 hw = le16toh(sc->rxq.stat->closed_rb_num) & 0xfff; 4415 4416 /* 4417 * Process responses 4418 */ 4419 while (sc->rxq.cur != hw) { 4420 struct iwm_rx_ring *ring = &sc->rxq; 4421 struct iwm_rx_data *data = &sc->rxq.data[sc->rxq.cur]; 4422 struct iwm_rx_packet *pkt; 4423 struct iwm_cmd_response *cresp; 4424 int qid, idx; 4425 4426 bus_dmamap_sync(sc->rxq.data_dmat, data->map, 4427 BUS_DMASYNC_POSTREAD); 4428 pkt = mtod(data->m, struct iwm_rx_packet *); 4429 4430 qid = pkt->hdr.qid & ~0x80; 4431 idx = pkt->hdr.idx; 4432 4433 IWM_DPRINTF(sc, IWM_DEBUG_INTR, 4434 "rx packet qid=%d idx=%d flags=%x type=%x %d %d\n", 4435 pkt->hdr.qid & ~0x80, pkt->hdr.idx, pkt->hdr.flags, 4436 pkt->hdr.code, sc->rxq.cur, hw); 4437 4438 /* 4439 * randomly get these from the firmware, no idea why. 4440 * they at least seem harmless, so just ignore them for now 4441 */ 4442 if (__predict_false((pkt->hdr.code == 0 && qid == 0 && idx == 0) 4443 || pkt->len_n_flags == htole32(0x55550000))) { 4444 ADVANCE_RXQ(sc); 4445 continue; 4446 } 4447 4448 switch (pkt->hdr.code) { 4449 case IWM_REPLY_RX_PHY_CMD: 4450 iwm_mvm_rx_rx_phy_cmd(sc, pkt, data); 4451 break; 4452 4453 case IWM_REPLY_RX_MPDU_CMD: 4454 iwm_mvm_rx_rx_mpdu(sc, pkt, data); 4455 break; 4456 4457 case IWM_TX_CMD: 4458 iwm_mvm_rx_tx_cmd(sc, pkt, data); 4459 break; 4460 4461 case IWM_MISSED_BEACONS_NOTIFICATION: { 4462 struct iwm_missed_beacons_notif *resp; 4463 int missed; 4464 4465 /* XXX look at mac_id to determine interface ID */ 4466 struct ieee80211com *ic = sc->sc_ic; 4467 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4468 4469 SYNC_RESP_STRUCT(resp, pkt); 4470 missed = le32toh(resp->consec_missed_beacons); 4471 4472 IWM_DPRINTF(sc, IWM_DEBUG_BEACON | IWM_DEBUG_STATE, 4473 "%s: MISSED_BEACON: mac_id=%d, " 4474 "consec_since_last_rx=%d, consec=%d, num_expect=%d " 4475 "num_rx=%d\n", 4476 __func__, 4477 le32toh(resp->mac_id), 4478 le32toh(resp->consec_missed_beacons_since_last_rx), 4479 le32toh(resp->consec_missed_beacons), 4480 le32toh(resp->num_expected_beacons), 4481 le32toh(resp->num_recvd_beacons)); 4482 4483 /* Be paranoid */ 4484 if (vap == NULL) 4485 break; 4486 4487 /* XXX no net80211 locking? */ 4488 if (vap->iv_state == IEEE80211_S_RUN && 4489 (ic->ic_flags & IEEE80211_F_SCAN) == 0) { 4490 if (missed > vap->iv_bmissthreshold) { 4491 /* XXX bad locking; turn into task */ 4492 IWM_UNLOCK(sc); 4493 ieee80211_beacon_miss(ic); 4494 IWM_LOCK(sc); 4495 } 4496 } 4497 4498 break; } 4499 4500 case IWM_MVM_ALIVE: { 4501 struct iwm_mvm_alive_resp *resp; 4502 SYNC_RESP_STRUCT(resp, pkt); 4503 4504 sc->sc_uc.uc_error_event_table 4505 = le32toh(resp->error_event_table_ptr); 4506 sc->sc_uc.uc_log_event_table 4507 = le32toh(resp->log_event_table_ptr); 4508 sc->sched_base = le32toh(resp->scd_base_ptr); 4509 sc->sc_uc.uc_ok = resp->status == IWM_ALIVE_STATUS_OK; 4510 4511 sc->sc_uc.uc_intr = 1; 4512 wakeup(&sc->sc_uc); 4513 break; } 4514 4515 case IWM_CALIB_RES_NOTIF_PHY_DB: { 4516 struct iwm_calib_res_notif_phy_db *phy_db_notif; 4517 SYNC_RESP_STRUCT(phy_db_notif, pkt); 4518 4519 iwm_phy_db_set_section(sc, phy_db_notif); 4520 4521 break; } 4522 4523 case IWM_STATISTICS_NOTIFICATION: { 4524 struct iwm_notif_statistics *stats; 4525 SYNC_RESP_STRUCT(stats, pkt); 4526 memcpy(&sc->sc_stats, stats, sizeof(sc->sc_stats)); 4527 sc->sc_noise = iwm_get_noise(&stats->rx.general); 4528 break; } 4529 4530 case IWM_NVM_ACCESS_CMD: 4531 if (sc->sc_wantresp == ((qid << 16) | idx)) { 4532 bus_dmamap_sync(sc->rxq.data_dmat, data->map, 4533 BUS_DMASYNC_POSTREAD); 4534 memcpy(sc->sc_cmd_resp, 4535 pkt, sizeof(sc->sc_cmd_resp)); 4536 } 4537 break; 4538 4539 case IWM_PHY_CONFIGURATION_CMD: 4540 case IWM_TX_ANT_CONFIGURATION_CMD: 4541 case IWM_ADD_STA: 4542 case IWM_MAC_CONTEXT_CMD: 4543 case IWM_REPLY_SF_CFG_CMD: 4544 case IWM_POWER_TABLE_CMD: 4545 case IWM_PHY_CONTEXT_CMD: 4546 case IWM_BINDING_CONTEXT_CMD: 4547 case IWM_TIME_EVENT_CMD: 4548 case IWM_SCAN_REQUEST_CMD: 4549 case IWM_REPLY_BEACON_FILTERING_CMD: 4550 case IWM_MAC_PM_POWER_TABLE: 4551 case IWM_TIME_QUOTA_CMD: 4552 case IWM_REMOVE_STA: 4553 case IWM_TXPATH_FLUSH: 4554 case IWM_LQ_CMD: 4555 SYNC_RESP_STRUCT(cresp, pkt); 4556 if (sc->sc_wantresp == ((qid << 16) | idx)) { 4557 memcpy(sc->sc_cmd_resp, 4558 pkt, sizeof(*pkt)+sizeof(*cresp)); 4559 } 4560 break; 4561 4562 /* ignore */ 4563 case 0x6c: /* IWM_PHY_DB_CMD, no idea why it's not in fw-api.h */ 4564 break; 4565 4566 case IWM_INIT_COMPLETE_NOTIF: 4567 sc->sc_init_complete = 1; 4568 wakeup(&sc->sc_init_complete); 4569 break; 4570 4571 case IWM_SCAN_COMPLETE_NOTIFICATION: { 4572 struct iwm_scan_complete_notif *notif; 4573 SYNC_RESP_STRUCT(notif, pkt); 4574 taskqueue_enqueue(sc->sc_tq, &sc->sc_es_task); 4575 break; } 4576 4577 case IWM_REPLY_ERROR: { 4578 struct iwm_error_resp *resp; 4579 SYNC_RESP_STRUCT(resp, pkt); 4580 4581 device_printf(sc->sc_dev, 4582 "firmware error 0x%x, cmd 0x%x\n", 4583 le32toh(resp->error_type), 4584 resp->cmd_id); 4585 break; } 4586 4587 case IWM_TIME_EVENT_NOTIFICATION: { 4588 struct iwm_time_event_notif *notif; 4589 SYNC_RESP_STRUCT(notif, pkt); 4590 4591 if (notif->status) { 4592 if (le32toh(notif->action) & 4593 IWM_TE_V2_NOTIF_HOST_EVENT_START) 4594 sc->sc_auth_prot = 2; 4595 else 4596 sc->sc_auth_prot = 0; 4597 } else { 4598 sc->sc_auth_prot = -1; 4599 } 4600 IWM_DPRINTF(sc, IWM_DEBUG_INTR, 4601 "%s: time event notification auth_prot=%d\n", 4602 __func__, sc->sc_auth_prot); 4603 4604 wakeup(&sc->sc_auth_prot); 4605 break; } 4606 4607 case IWM_MCAST_FILTER_CMD: 4608 break; 4609 4610 default: 4611 device_printf(sc->sc_dev, 4612 "cmd %04x frame %d/%d %x UNHANDLED (this should " 4613 "not happen)\n", 4614 pkt->hdr.code, qid, idx, 4615 pkt->len_n_flags); 4616 panic("unhandled command"); 4617 break; 4618 } 4619 4620 /* 4621 * Why test bit 0x80? The Linux driver: 4622 * 4623 * There is one exception: uCode sets bit 15 when it 4624 * originates the response/notification, i.e. when the 4625 * response/notification is not a direct response to a 4626 * command sent by the driver. For example, uCode issues 4627 * IWM_REPLY_RX when it sends a received frame to the driver; 4628 * it is not a direct response to any driver command. 4629 * 4630 * Ok, so since when is 7 == 15? Well, the Linux driver 4631 * uses a slightly different format for pkt->hdr, and "qid" 4632 * is actually the upper byte of a two-byte field. 4633 */ 4634 if (!(pkt->hdr.qid & (1 << 7))) { 4635 iwm_cmd_done(sc, pkt); 4636 } 4637 4638 ADVANCE_RXQ(sc); 4639 } 4640 4641 IWM_CLRBITS(sc, IWM_CSR_GP_CNTRL, 4642 IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); 4643 4644 /* 4645 * Tell the firmware what we have processed. 4646 * Seems like the hardware gets upset unless we align 4647 * the write by 8?? 4648 */ 4649 hw = (hw == 0) ? IWM_RX_RING_COUNT - 1 : hw - 1; 4650 IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_WPTR, hw & ~7); 4651 } 4652 4653 static void 4654 iwm_intr(void *arg) 4655 { 4656 struct iwm_softc *sc = arg; 4657 struct ifnet *ifp = sc->sc_ifp; 4658 int handled = 0; 4659 int r1, r2, rv = 0; 4660 int isperiodic = 0; 4661 4662 #if defined(__DragonFly__) 4663 if (sc->sc_mem == NULL) { 4664 kprintf("iwm_intr: detached\n"); 4665 return; 4666 } 4667 #endif 4668 IWM_LOCK(sc); 4669 IWM_WRITE(sc, IWM_CSR_INT_MASK, 0); 4670 4671 if (sc->sc_flags & IWM_FLAG_USE_ICT) { 4672 uint32_t *ict = sc->ict_dma.vaddr; 4673 int tmp; 4674 4675 tmp = htole32(ict[sc->ict_cur]); 4676 if (!tmp) 4677 goto out_ena; 4678 4679 /* 4680 * ok, there was something. keep plowing until we have all. 4681 */ 4682 r1 = r2 = 0; 4683 while (tmp) { 4684 r1 |= tmp; 4685 ict[sc->ict_cur] = 0; 4686 sc->ict_cur = (sc->ict_cur+1) % IWM_ICT_COUNT; 4687 tmp = htole32(ict[sc->ict_cur]); 4688 } 4689 4690 /* this is where the fun begins. don't ask */ 4691 if (r1 == 0xffffffff) 4692 r1 = 0; 4693 4694 /* i am not expected to understand this */ 4695 if (r1 & 0xc0000) 4696 r1 |= 0x8000; 4697 r1 = (0xff & r1) | ((0xff00 & r1) << 16); 4698 } else { 4699 r1 = IWM_READ(sc, IWM_CSR_INT); 4700 /* "hardware gone" (where, fishing?) */ 4701 if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0) 4702 goto out; 4703 r2 = IWM_READ(sc, IWM_CSR_FH_INT_STATUS); 4704 } 4705 if (r1 == 0 && r2 == 0) { 4706 goto out_ena; 4707 } 4708 4709 IWM_WRITE(sc, IWM_CSR_INT, r1 | ~sc->sc_intmask); 4710 4711 /* ignored */ 4712 handled |= (r1 & (IWM_CSR_INT_BIT_ALIVE /*| IWM_CSR_INT_BIT_SCD*/)); 4713 4714 if (r1 & IWM_CSR_INT_BIT_SW_ERR) { 4715 #ifdef IWM_DEBUG 4716 int i; 4717 struct ieee80211com *ic = sc->sc_ic; 4718 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4719 4720 iwm_nic_error(sc); 4721 4722 /* Dump driver status (TX and RX rings) while we're here. */ 4723 device_printf(sc->sc_dev, "driver status:\n"); 4724 for (i = 0; i < IWM_MVM_MAX_QUEUES; i++) { 4725 struct iwm_tx_ring *ring = &sc->txq[i]; 4726 device_printf(sc->sc_dev, 4727 " tx ring %2d: qid=%-2d cur=%-3d " 4728 "queued=%-3d\n", 4729 i, ring->qid, ring->cur, ring->queued); 4730 } 4731 device_printf(sc->sc_dev, 4732 " rx ring: cur=%d\n", sc->rxq.cur); 4733 device_printf(sc->sc_dev, 4734 " 802.11 state %d\n", vap->iv_state); 4735 #endif 4736 4737 device_printf(sc->sc_dev, "fatal firmware error\n"); 4738 ifp->if_flags &= ~IFF_UP; 4739 iwm_stop_locked(ifp); 4740 rv = 1; 4741 goto out; 4742 4743 } 4744 4745 if (r1 & IWM_CSR_INT_BIT_HW_ERR) { 4746 handled |= IWM_CSR_INT_BIT_HW_ERR; 4747 device_printf(sc->sc_dev, "hardware error, stopping device\n"); 4748 ifp->if_flags &= ~IFF_UP; 4749 iwm_stop_locked(ifp); 4750 rv = 1; 4751 goto out; 4752 } 4753 4754 /* firmware chunk loaded */ 4755 if (r1 & IWM_CSR_INT_BIT_FH_TX) { 4756 IWM_WRITE(sc, IWM_CSR_FH_INT_STATUS, IWM_CSR_FH_INT_TX_MASK); 4757 handled |= IWM_CSR_INT_BIT_FH_TX; 4758 sc->sc_fw_chunk_done = 1; 4759 wakeup(&sc->sc_fw); 4760 } 4761 4762 if (r1 & IWM_CSR_INT_BIT_RF_KILL) { 4763 handled |= IWM_CSR_INT_BIT_RF_KILL; 4764 if (iwm_check_rfkill(sc) && (ifp->if_flags & IFF_UP)) { 4765 device_printf(sc->sc_dev, 4766 "%s: rfkill switch, disabling interface\n", 4767 __func__); 4768 ifp->if_flags &= ~IFF_UP; 4769 iwm_stop_locked(ifp); 4770 } 4771 } 4772 4773 /* 4774 * The Linux driver uses periodic interrupts to avoid races. 4775 * We cargo-cult like it's going out of fashion. 4776 */ 4777 if (r1 & IWM_CSR_INT_BIT_RX_PERIODIC) { 4778 handled |= IWM_CSR_INT_BIT_RX_PERIODIC; 4779 IWM_WRITE(sc, IWM_CSR_INT, IWM_CSR_INT_BIT_RX_PERIODIC); 4780 if ((r1 & (IWM_CSR_INT_BIT_FH_RX | IWM_CSR_INT_BIT_SW_RX)) == 0) 4781 IWM_WRITE_1(sc, 4782 IWM_CSR_INT_PERIODIC_REG, IWM_CSR_INT_PERIODIC_DIS); 4783 isperiodic = 1; 4784 } 4785 4786 if ((r1 & (IWM_CSR_INT_BIT_FH_RX | IWM_CSR_INT_BIT_SW_RX)) || isperiodic) { 4787 handled |= (IWM_CSR_INT_BIT_FH_RX | IWM_CSR_INT_BIT_SW_RX); 4788 IWM_WRITE(sc, IWM_CSR_FH_INT_STATUS, IWM_CSR_FH_INT_RX_MASK); 4789 4790 iwm_notif_intr(sc); 4791 4792 /* enable periodic interrupt, see above */ 4793 if (r1 & (IWM_CSR_INT_BIT_FH_RX | IWM_CSR_INT_BIT_SW_RX) && !isperiodic) 4794 IWM_WRITE_1(sc, IWM_CSR_INT_PERIODIC_REG, 4795 IWM_CSR_INT_PERIODIC_ENA); 4796 } 4797 4798 if (__predict_false(r1 & ~handled)) 4799 IWM_DPRINTF(sc, IWM_DEBUG_INTR, 4800 "%s: unhandled interrupts: %x\n", __func__, r1); 4801 rv = 1; 4802 4803 out_ena: 4804 iwm_restore_interrupts(sc); 4805 out: 4806 IWM_UNLOCK(sc); 4807 return; 4808 } 4809 4810 /* 4811 * Autoconf glue-sniffing 4812 */ 4813 #define PCI_VENDOR_INTEL 0x8086 4814 #define PCI_PRODUCT_INTEL_WL_3160_1 0x08b3 4815 #define PCI_PRODUCT_INTEL_WL_3160_2 0x08b4 4816 #define PCI_PRODUCT_INTEL_WL_7260_1 0x08b1 4817 #define PCI_PRODUCT_INTEL_WL_7260_2 0x08b2 4818 #define PCI_PRODUCT_INTEL_WL_7265_1 0x095a 4819 #define PCI_PRODUCT_INTEL_WL_7265_2 0x095b 4820 4821 static const struct iwm_devices { 4822 uint16_t device; 4823 const char *name; 4824 } iwm_devices[] = { 4825 { PCI_PRODUCT_INTEL_WL_3160_1, "Intel Dual Band Wireless AC 3160" }, 4826 { PCI_PRODUCT_INTEL_WL_3160_2, "Intel Dual Band Wireless AC 3160" }, 4827 { PCI_PRODUCT_INTEL_WL_7260_1, "Intel Dual Band Wireless AC 7260" }, 4828 { PCI_PRODUCT_INTEL_WL_7260_2, "Intel Dual Band Wireless AC 7260" }, 4829 { PCI_PRODUCT_INTEL_WL_7265_1, "Intel Dual Band Wireless AC 7265" }, 4830 { PCI_PRODUCT_INTEL_WL_7265_2, "Intel Dual Band Wireless AC 7265" }, 4831 }; 4832 4833 static int 4834 iwm_probe(device_t dev) 4835 { 4836 int i; 4837 4838 for (i = 0; i < nitems(iwm_devices); i++) { 4839 if (pci_get_vendor(dev) == PCI_VENDOR_INTEL && 4840 pci_get_device(dev) == iwm_devices[i].device) { 4841 device_set_desc(dev, iwm_devices[i].name); 4842 return (BUS_PROBE_DEFAULT); 4843 } 4844 } 4845 4846 return (ENXIO); 4847 } 4848 4849 static int 4850 iwm_dev_check(device_t dev) 4851 { 4852 struct iwm_softc *sc; 4853 4854 sc = device_get_softc(dev); 4855 4856 switch (pci_get_device(dev)) { 4857 case PCI_PRODUCT_INTEL_WL_3160_1: 4858 case PCI_PRODUCT_INTEL_WL_3160_2: 4859 sc->sc_fwname = "iwm3160fw"; 4860 sc->host_interrupt_operation_mode = 1; 4861 return (0); 4862 case PCI_PRODUCT_INTEL_WL_7260_1: 4863 case PCI_PRODUCT_INTEL_WL_7260_2: 4864 sc->sc_fwname = "iwm7260fw"; 4865 sc->host_interrupt_operation_mode = 1; 4866 return (0); 4867 case PCI_PRODUCT_INTEL_WL_7265_1: 4868 case PCI_PRODUCT_INTEL_WL_7265_2: 4869 sc->sc_fwname = "iwm7265fw"; 4870 sc->host_interrupt_operation_mode = 0; 4871 return (0); 4872 default: 4873 device_printf(dev, "unknown adapter type\n"); 4874 return ENXIO; 4875 } 4876 } 4877 4878 static int 4879 iwm_pci_attach(device_t dev) 4880 { 4881 struct iwm_softc *sc; 4882 int count, error, rid; 4883 uint16_t reg; 4884 4885 sc = device_get_softc(dev); 4886 4887 /* Clear device-specific "PCI retry timeout" register (41h). */ 4888 reg = pci_read_config(dev, 0x40, sizeof(reg)); 4889 pci_write_config(dev, 0x40, reg & ~0xff00, sizeof(reg)); 4890 4891 /* Enable bus-mastering and hardware bug workaround. */ 4892 pci_enable_busmaster(dev); 4893 reg = pci_read_config(dev, PCIR_STATUS, sizeof(reg)); 4894 /* if !MSI */ 4895 if (reg & PCIM_STATUS_INTxSTATE) { 4896 reg &= ~PCIM_STATUS_INTxSTATE; 4897 } 4898 pci_write_config(dev, PCIR_STATUS, reg, sizeof(reg)); 4899 4900 rid = PCIR_BAR(0); 4901 sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 4902 RF_ACTIVE); 4903 if (sc->sc_mem == NULL) { 4904 device_printf(sc->sc_dev, "can't map mem space\n"); 4905 return (ENXIO); 4906 } 4907 sc->sc_st = rman_get_bustag(sc->sc_mem); 4908 sc->sc_sh = rman_get_bushandle(sc->sc_mem); 4909 4910 /* Install interrupt handler. */ 4911 count = 1; 4912 rid = 0; 4913 #if !defined(__DragonFly__) 4914 if (pci_alloc_msi(dev, &count) == 0) 4915 rid = 1; 4916 #endif 4917 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE | 4918 (rid != 0 ? 0 : RF_SHAREABLE)); 4919 if (sc->sc_irq == NULL) { 4920 device_printf(dev, "can't map interrupt\n"); 4921 return (ENXIO); 4922 } 4923 #if defined(__DragonFly__) 4924 error = bus_setup_intr(dev, sc->sc_irq, INTR_MPSAFE, 4925 iwm_intr, sc, &sc->sc_ih, 4926 &wlan_global_serializer); 4927 #else 4928 error = bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_NET | INTR_MPSAFE, 4929 NULL, iwm_intr, sc, &sc->sc_ih); 4930 #endif 4931 if (sc->sc_ih == NULL) { 4932 device_printf(dev, "can't establish interrupt"); 4933 return (ENXIO); 4934 } 4935 sc->sc_dmat = bus_get_dma_tag(sc->sc_dev); 4936 4937 return (0); 4938 } 4939 4940 static void 4941 iwm_pci_detach(device_t dev) 4942 { 4943 struct iwm_softc *sc = device_get_softc(dev); 4944 4945 if (sc->sc_irq != NULL) { 4946 bus_teardown_intr(dev, sc->sc_irq, sc->sc_ih); 4947 bus_release_resource(dev, SYS_RES_IRQ, 4948 rman_get_rid(sc->sc_irq), sc->sc_irq); 4949 pci_release_msi(dev); 4950 #if defined(__DragonFly__) 4951 sc->sc_irq = NULL; 4952 #endif 4953 } 4954 if (sc->sc_mem != NULL) { 4955 bus_release_resource(dev, SYS_RES_MEMORY, 4956 rman_get_rid(sc->sc_mem), sc->sc_mem); 4957 #if defined(__DragonFly__) 4958 sc->sc_mem = NULL; 4959 #endif 4960 } 4961 } 4962 4963 4964 4965 static int 4966 iwm_attach(device_t dev) 4967 { 4968 struct iwm_softc *sc; 4969 struct ieee80211com *ic; 4970 struct ifnet *ifp; 4971 int error; 4972 int txq_i, i; 4973 4974 sc = device_get_softc(dev); 4975 sc->sc_dev = dev; 4976 #if defined(__DragonFly__) 4977 lockinit(&sc->sc_lk, "iwm_lk", 0, 0); 4978 callout_init_lk(&sc->sc_watchdog_to, &sc->sc_lk); 4979 #else 4980 mtx_init(&sc->sc_mtx, "iwm_mtx", MTX_DEF, 0); 4981 callout_init_mtx(&sc->sc_watchdog_to, &sc->sc_mtx, 0); 4982 #endif 4983 TASK_INIT(&sc->sc_es_task, 0, iwm_endscan_cb, sc); 4984 sc->sc_tq = taskqueue_create("iwm_taskq", M_WAITOK, 4985 taskqueue_thread_enqueue, &sc->sc_tq); 4986 #if defined(__DragonFly__) 4987 error = taskqueue_start_threads(&sc->sc_tq, 1, TDPRI_KERN_DAEMON, 4988 -1, "iwm_taskq"); 4989 #else 4990 error = taskqueue_start_threads(&sc->sc_tq, 1, 0, "iwm_taskq"); 4991 #endif 4992 if (error != 0) { 4993 device_printf(dev, "can't start threads, error %d\n", 4994 error); 4995 goto fail; 4996 } 4997 4998 /* PCI attach */ 4999 error = iwm_pci_attach(dev); 5000 if (error != 0) 5001 goto fail; 5002 5003 sc->sc_wantresp = -1; 5004 5005 /* Check device type */ 5006 error = iwm_dev_check(dev); 5007 if (error != 0) 5008 goto fail; 5009 5010 sc->sc_fwdmasegsz = IWM_FWDMASEGSZ; 5011 5012 /* 5013 * We now start fiddling with the hardware 5014 */ 5015 sc->sc_hw_rev = IWM_READ(sc, IWM_CSR_HW_REV); 5016 if (iwm_prepare_card_hw(sc) != 0) { 5017 device_printf(dev, "could not initialize hardware\n"); 5018 goto fail; 5019 } 5020 5021 /* Allocate DMA memory for firmware transfers. */ 5022 if ((error = iwm_alloc_fwmem(sc)) != 0) { 5023 device_printf(dev, "could not allocate memory for firmware\n"); 5024 goto fail; 5025 } 5026 5027 /* Allocate "Keep Warm" page. */ 5028 if ((error = iwm_alloc_kw(sc)) != 0) { 5029 device_printf(dev, "could not allocate keep warm page\n"); 5030 goto fail; 5031 } 5032 5033 /* We use ICT interrupts */ 5034 if ((error = iwm_alloc_ict(sc)) != 0) { 5035 device_printf(dev, "could not allocate ICT table\n"); 5036 goto fail; 5037 } 5038 5039 /* Allocate TX scheduler "rings". */ 5040 if ((error = iwm_alloc_sched(sc)) != 0) { 5041 device_printf(dev, "could not allocate TX scheduler rings\n"); 5042 goto fail; 5043 } 5044 5045 /* Allocate TX rings */ 5046 for (txq_i = 0; txq_i < nitems(sc->txq); txq_i++) { 5047 if ((error = iwm_alloc_tx_ring(sc, 5048 &sc->txq[txq_i], txq_i)) != 0) { 5049 device_printf(dev, 5050 "could not allocate TX ring %d\n", 5051 txq_i); 5052 goto fail; 5053 } 5054 } 5055 5056 /* Allocate RX ring. */ 5057 if ((error = iwm_alloc_rx_ring(sc, &sc->rxq)) != 0) { 5058 device_printf(dev, "could not allocate RX ring\n"); 5059 goto fail; 5060 } 5061 5062 /* Clear pending interrupts. */ 5063 IWM_WRITE(sc, IWM_CSR_INT, 0xffffffff); 5064 5065 sc->sc_ifp = ifp = if_alloc(IFT_IEEE80211); 5066 if (ifp == NULL) { 5067 goto fail; 5068 } 5069 ifp->if_softc = sc; 5070 if_initname(ifp, "iwm", device_get_unit(dev)); 5071 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 5072 ifp->if_init = iwm_init; 5073 ifp->if_ioctl = iwm_ioctl; 5074 ifp->if_start = iwm_start; 5075 #if defined(__DragonFly__) 5076 ifp->if_nmbjclusters = IWM_RX_RING_COUNT; 5077 ifq_set_maxlen(&ifp->if_snd, ifqmaxlen); 5078 #else 5079 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 5080 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 5081 IFQ_SET_READY(&ifp->if_snd); 5082 #endif 5083 5084 /* 5085 * Set it here so we can initialise net80211. 5086 * But, if we fail before we call net80211_ifattach(), 5087 * we can't just call iwm_detach() or it'll free 5088 * net80211 without it having been setup. 5089 */ 5090 sc->sc_ic = ic = ifp->if_l2com; 5091 ic->ic_ifp = ifp; 5092 #if defined(__DragonFly__) 5093 #else 5094 ic->ic_softc = sc; 5095 ic->ic_name = device_get_nameunit(sc->sc_dev); 5096 #endif 5097 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 5098 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 5099 5100 /* Set device capabilities. */ 5101 ic->ic_caps = 5102 IEEE80211_C_STA | 5103 IEEE80211_C_WPA | /* WPA/RSN */ 5104 IEEE80211_C_WME | 5105 IEEE80211_C_SHSLOT | /* short slot time supported */ 5106 IEEE80211_C_SHPREAMBLE /* short preamble supported */ 5107 // IEEE80211_C_BGSCAN /* capable of bg scanning */ 5108 ; 5109 for (i = 0; i < nitems(sc->sc_phyctxt); i++) { 5110 sc->sc_phyctxt[i].id = i; 5111 sc->sc_phyctxt[i].color = 0; 5112 sc->sc_phyctxt[i].ref = 0; 5113 sc->sc_phyctxt[i].channel = NULL; 5114 } 5115 5116 /* Max RSSI */ 5117 sc->sc_max_rssi = IWM_MAX_DBM - IWM_MIN_DBM; 5118 sc->sc_preinit_hook.ich_func = iwm_preinit; 5119 sc->sc_preinit_hook.ich_arg = sc; 5120 if (config_intrhook_establish(&sc->sc_preinit_hook) != 0) { 5121 device_printf(dev, "config_intrhook_establish failed\n"); 5122 goto fail; 5123 } 5124 5125 #ifdef IWM_DEBUG 5126 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 5127 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "debug", 5128 CTLFLAG_RW, &sc->sc_debug, 0, "control debugging"); 5129 #endif 5130 5131 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE, 5132 "<-%s\n", __func__); 5133 5134 return 0; 5135 5136 /* Free allocated memory if something failed during attachment. */ 5137 fail: 5138 iwm_detach_local(sc, 0); 5139 5140 return ENXIO; 5141 } 5142 5143 static int 5144 iwm_update_edca(struct ieee80211com *ic) 5145 { 5146 struct iwm_softc *sc = ic->ic_ifp->if_softc; 5147 5148 device_printf(sc->sc_dev, "%s: called\n", __func__); 5149 return (0); 5150 } 5151 5152 static void 5153 iwm_preinit(void *arg) 5154 { 5155 struct iwm_softc *sc = arg; 5156 device_t dev = sc->sc_dev; 5157 struct ieee80211com *ic = sc->sc_ic; 5158 int error; 5159 5160 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE, 5161 "->%s\n", __func__); 5162 5163 IWM_LOCK(sc); 5164 if ((error = iwm_start_hw(sc)) != 0) { 5165 device_printf(dev, "could not initialize hardware\n"); 5166 IWM_UNLOCK(sc); 5167 goto fail; 5168 } 5169 5170 error = iwm_run_init_mvm_ucode(sc, 1); 5171 iwm_stop_device(sc); 5172 if (error) { 5173 IWM_UNLOCK(sc); 5174 goto fail; 5175 } 5176 device_printf(dev, 5177 "revision: 0x%x, firmware %d.%d (API ver. %d)\n", 5178 sc->sc_hw_rev & IWM_CSR_HW_REV_TYPE_MSK, 5179 IWM_UCODE_MAJOR(sc->sc_fwver), 5180 IWM_UCODE_MINOR(sc->sc_fwver), 5181 IWM_UCODE_API(sc->sc_fwver)); 5182 5183 /* not all hardware can do 5GHz band */ 5184 if (!sc->sc_nvm.sku_cap_band_52GHz_enable) 5185 memset(&ic->ic_sup_rates[IEEE80211_MODE_11A], 0, 5186 sizeof(ic->ic_sup_rates[IEEE80211_MODE_11A])); 5187 IWM_UNLOCK(sc); 5188 5189 /* 5190 * At this point we've committed - if we fail to do setup, 5191 * we now also have to tear down the net80211 state. 5192 */ 5193 wlan_serialize_enter(); 5194 ieee80211_ifattach(ic, sc->sc_bssid); 5195 wlan_serialize_exit(); 5196 ic->ic_vap_create = iwm_vap_create; 5197 ic->ic_vap_delete = iwm_vap_delete; 5198 ic->ic_raw_xmit = iwm_raw_xmit; 5199 ic->ic_node_alloc = iwm_node_alloc; 5200 ic->ic_scan_start = iwm_scan_start; 5201 ic->ic_scan_end = iwm_scan_end; 5202 ic->ic_update_mcast = iwm_update_mcast; 5203 ic->ic_set_channel = iwm_set_channel; 5204 ic->ic_scan_curchan = iwm_scan_curchan; 5205 ic->ic_scan_mindwell = iwm_scan_mindwell; 5206 ic->ic_wme.wme_update = iwm_update_edca; 5207 iwm_radiotap_attach(sc); 5208 if (bootverbose) 5209 ieee80211_announce(ic); 5210 5211 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE, 5212 "<-%s\n", __func__); 5213 config_intrhook_disestablish(&sc->sc_preinit_hook); 5214 5215 return; 5216 fail: 5217 config_intrhook_disestablish(&sc->sc_preinit_hook); 5218 iwm_detach_local(sc, 0); 5219 } 5220 5221 /* 5222 * Attach the interface to 802.11 radiotap. 5223 */ 5224 static void 5225 iwm_radiotap_attach(struct iwm_softc *sc) 5226 { 5227 struct ifnet *ifp = sc->sc_ifp; 5228 struct ieee80211com *ic = ifp->if_l2com; 5229 5230 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE, 5231 "->%s begin\n", __func__); 5232 ieee80211_radiotap_attach(ic, 5233 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 5234 IWM_TX_RADIOTAP_PRESENT, 5235 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 5236 IWM_RX_RADIOTAP_PRESENT); 5237 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE, 5238 "->%s end\n", __func__); 5239 } 5240 5241 static struct ieee80211vap * 5242 iwm_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 5243 enum ieee80211_opmode opmode, int flags, 5244 const uint8_t bssid[IEEE80211_ADDR_LEN], 5245 const uint8_t mac[IEEE80211_ADDR_LEN]) 5246 { 5247 struct iwm_vap *ivp; 5248 struct ieee80211vap *vap; 5249 uint8_t mac1[IEEE80211_ADDR_LEN]; 5250 5251 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 5252 return NULL; 5253 IEEE80211_ADDR_COPY(mac1, mac); 5254 ivp = (struct iwm_vap *) kmalloc(sizeof(struct iwm_vap), 5255 M_80211_VAP, M_INTWAIT | M_ZERO); 5256 vap = &ivp->iv_vap; 5257 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac1); 5258 IEEE80211_ADDR_COPY(ivp->macaddr, mac1); 5259 vap->iv_bmissthreshold = 10; /* override default */ 5260 /* Override with driver methods. */ 5261 ivp->iv_newstate = vap->iv_newstate; 5262 vap->iv_newstate = iwm_newstate; 5263 5264 ieee80211_ratectl_init(vap); 5265 /* Complete setup. */ 5266 ieee80211_vap_attach(vap, iwm_media_change, ieee80211_media_status); 5267 ic->ic_opmode = opmode; 5268 5269 return vap; 5270 } 5271 5272 static void 5273 iwm_vap_delete(struct ieee80211vap *vap) 5274 { 5275 struct iwm_vap *ivp = IWM_VAP(vap); 5276 5277 ieee80211_ratectl_deinit(vap); 5278 ieee80211_vap_detach(vap); 5279 kfree(ivp, M_80211_VAP); 5280 } 5281 5282 static void 5283 iwm_scan_start(struct ieee80211com *ic) 5284 { 5285 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 5286 struct iwm_softc *sc = ic->ic_ifp->if_softc; 5287 int error; 5288 5289 if (sc->sc_scanband) 5290 return; 5291 IWM_LOCK(sc); 5292 error = iwm_mvm_scan_request(sc, IEEE80211_CHAN_2GHZ, 0, NULL, 0); 5293 if (error) { 5294 device_printf(sc->sc_dev, "could not initiate scan\n"); 5295 IWM_UNLOCK(sc); 5296 wlan_serialize_enter(); 5297 ieee80211_cancel_scan(vap); 5298 wlan_serialize_exit(); 5299 } else 5300 IWM_UNLOCK(sc); 5301 } 5302 5303 static void 5304 iwm_scan_end(struct ieee80211com *ic) 5305 { 5306 } 5307 5308 static void 5309 iwm_update_mcast(struct ifnet *ifp) 5310 { 5311 } 5312 5313 static void 5314 iwm_set_channel(struct ieee80211com *ic) 5315 { 5316 } 5317 5318 static void 5319 iwm_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell) 5320 { 5321 } 5322 5323 static void 5324 iwm_scan_mindwell(struct ieee80211_scan_state *ss) 5325 { 5326 return; 5327 } 5328 5329 void 5330 iwm_init_task(void *arg1) 5331 { 5332 struct iwm_softc *sc = arg1; 5333 struct ifnet *ifp = sc->sc_ifp; 5334 5335 IWM_LOCK(sc); 5336 while (sc->sc_flags & IWM_FLAG_BUSY) { 5337 #if defined(__DragonFly__) 5338 iwmsleep(&sc->sc_flags, &sc->sc_lk, 0, "iwmpwr", 0); 5339 #else 5340 msleep(&sc->sc_flags, &sc->sc_mtx, 0, "iwmpwr", 0); 5341 #endif 5342 } 5343 sc->sc_flags |= IWM_FLAG_BUSY; 5344 iwm_stop_locked(ifp); 5345 #if defined(__DragonFly__) 5346 if ((ifp->if_flags & IFF_UP) && 5347 (ifp->if_flags & IFF_RUNNING)) 5348 #else 5349 if ((ifp->if_flags & IFF_UP) && 5350 (ifp->if_drv_flags & IFF_DRV_RUNNING)) 5351 #endif 5352 iwm_init(sc); 5353 sc->sc_flags &= ~IWM_FLAG_BUSY; 5354 wakeup(&sc->sc_flags); 5355 IWM_UNLOCK(sc); 5356 } 5357 5358 static int 5359 iwm_resume(device_t dev) 5360 { 5361 uint16_t reg; 5362 5363 /* Clear device-specific "PCI retry timeout" register (41h). */ 5364 reg = pci_read_config(dev, 0x40, sizeof(reg)); 5365 pci_write_config(dev, 0x40, reg & ~0xff00, sizeof(reg)); 5366 iwm_init_task(device_get_softc(dev)); 5367 5368 return 0; 5369 } 5370 5371 static int 5372 iwm_suspend(device_t dev) 5373 { 5374 struct iwm_softc *sc = device_get_softc(dev); 5375 struct ifnet *ifp = sc->sc_ifp; 5376 5377 #if defined(__DragonFly__) 5378 if (ifp->if_flags & IFF_RUNNING) 5379 #else 5380 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 5381 #endif 5382 iwm_stop(ifp, 0); 5383 5384 return (0); 5385 } 5386 5387 static int 5388 iwm_detach_local(struct iwm_softc *sc, int do_net80211) 5389 { 5390 struct ifnet *ifp = sc->sc_ifp; 5391 struct ieee80211com *ic; 5392 struct iwm_fw_info *fw = &sc->sc_fw; 5393 device_t dev = sc->sc_dev; 5394 int i; 5395 5396 if (sc->sc_tq) { 5397 #if defined(__DragonFly__) 5398 /* doesn't exist for DFly, DFly drains tasks on free */ 5399 #else 5400 taskqueue_drain_all(sc->sc_tq); 5401 #endif 5402 taskqueue_free(sc->sc_tq); 5403 #if defined(__DragonFly__) 5404 sc->sc_tq = NULL; 5405 #endif 5406 } 5407 if (ifp) { 5408 callout_drain(&sc->sc_watchdog_to); 5409 ic = sc->sc_ic; 5410 iwm_stop_device(sc); 5411 if (ic && do_net80211) { 5412 wlan_serialize_enter(); 5413 ieee80211_ifdetach(ic); 5414 wlan_serialize_exit(); 5415 } 5416 if_free(ifp); 5417 #if defined(__DragonFly__) 5418 sc->sc_ifp = NULL; 5419 #endif 5420 } 5421 5422 /* Free descriptor rings */ 5423 for (i = 0; i < nitems(sc->txq); i++) 5424 iwm_free_tx_ring(sc, &sc->txq[i]); 5425 5426 /* Free firmware */ 5427 if (fw->fw_rawdata != NULL) 5428 iwm_fw_info_free(fw); 5429 5430 /* free scheduler */ 5431 iwm_free_sched(sc); 5432 if (sc->ict_dma.vaddr != NULL) 5433 iwm_free_ict(sc); 5434 if (sc->kw_dma.vaddr != NULL) 5435 iwm_free_kw(sc); 5436 if (sc->fw_dma.vaddr != NULL) 5437 iwm_free_fwmem(sc); 5438 5439 /* Finished with the hardware - detach things */ 5440 iwm_pci_detach(dev); 5441 5442 lockuninit(&sc->sc_lk); 5443 5444 return (0); 5445 } 5446 5447 static int 5448 iwm_detach(device_t dev) 5449 { 5450 struct iwm_softc *sc = device_get_softc(dev); 5451 int error; 5452 5453 error = iwm_detach_local(sc, 1); 5454 5455 return error; 5456 } 5457 5458 static device_method_t iwm_pci_methods[] = { 5459 /* Device interface */ 5460 DEVMETHOD(device_probe, iwm_probe), 5461 DEVMETHOD(device_attach, iwm_attach), 5462 DEVMETHOD(device_detach, iwm_detach), 5463 DEVMETHOD(device_suspend, iwm_suspend), 5464 DEVMETHOD(device_resume, iwm_resume), 5465 5466 DEVMETHOD_END 5467 }; 5468 5469 static driver_t iwm_pci_driver = { 5470 "iwm", 5471 iwm_pci_methods, 5472 sizeof (struct iwm_softc) 5473 }; 5474 5475 static devclass_t iwm_devclass; 5476 5477 DRIVER_MODULE(iwm, pci, iwm_pci_driver, iwm_devclass, NULL, NULL); 5478 MODULE_DEPEND(iwm, firmware, 1, 1, 1); 5479 MODULE_DEPEND(iwm, pci, 1, 1, 1); 5480 MODULE_DEPEND(iwm, wlan, 1, 1, 1); 5481