1 /****************************************************************************** 2 3 Copyright (c) 2001-2014, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD$*/ 34 35 36 #ifndef _IXGBE_OS_H_ 37 #define _IXGBE_OS_H_ 38 39 #include <sys/types.h> 40 #include <sys/param.h> 41 #include <sys/endian.h> 42 #include <sys/systm.h> 43 #include <sys/mbuf.h> 44 #include <sys/protosw.h> 45 #include <sys/socket.h> 46 #include <sys/malloc.h> 47 #include <sys/kernel.h> 48 #include <sys/bus.h> 49 #include <sys/rman.h> 50 #include <vm/vm.h> 51 #include <vm/pmap.h> 52 #include <machine/clock.h> 53 #include <bus/pci/pcivar.h> 54 #include <bus/pci/pcireg.h> 55 56 #define ASSERT(x) if(!(x)) panic("IXGBE: x") 57 #define EWARN(H, W, S) kprintf(W) 58 59 /* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */ 60 #define usec_delay(x) DELAY(x) 61 #define msec_delay(x) DELAY(1000*(x)) 62 63 #define DBG 0 64 #define MSGOUT(S, A, B) kprintf(S "\n", A, B) 65 #define DEBUGFUNC(F) DEBUGOUT(F); 66 #if DBG 67 #define DEBUGOUT(S) kprintf(S "\n") 68 #define DEBUGOUT1(S,A) kprintf(S "\n",A) 69 #define DEBUGOUT2(S,A,B) kprintf(S "\n",A,B) 70 #define DEBUGOUT3(S,A,B,C) kprintf(S "\n",A,B,C) 71 #define DEBUGOUT4(S,A,B,C,D) kprintf(S "\n",A,B,C,D) 72 #define DEBUGOUT5(S,A,B,C,D,E) kprintf(S "\n",A,B,C,D,E) 73 #define DEBUGOUT6(S,A,B,C,D,E,F) kprintf(S "\n",A,B,C,D,E,F) 74 #define DEBUGOUT7(S,A,B,C,D,E,F,G) kprintf(S "\n",A,B,C,D,E,F,G) 75 #define ERROR_REPORT1(S,A) kprintf(S "\n",A) 76 #define ERROR_REPORT2(S,A,B) kprintf(S "\n",A,B) 77 #define ERROR_REPORT3(S,A,B,C) kprintf(S "\n",A,B,C) 78 #else 79 #define DEBUGOUT(S) 80 #define DEBUGOUT1(S,A) 81 #define DEBUGOUT2(S,A,B) 82 #define DEBUGOUT3(S,A,B,C) 83 #define DEBUGOUT4(S,A,B,C,D) 84 #define DEBUGOUT5(S,A,B,C,D,E) 85 #define DEBUGOUT6(S,A,B,C,D,E,F) 86 #define DEBUGOUT7(S,A,B,C,D,E,F,G) 87 88 #define ERROR_REPORT1(S,A) 89 #define ERROR_REPORT2(S,A,B) 90 #define ERROR_REPORT3(S,A,B,C) 91 #endif 92 93 #define FALSE 0 94 #define false 0 /* shared code requires this */ 95 #define TRUE 1 96 #define true 1 97 #define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */ 98 #define PCI_COMMAND_REGISTER PCIR_COMMAND 99 100 /* Shared code dropped this define.. */ 101 #define IXGBE_INTEL_VENDOR_ID 0x8086 102 103 /* Bunch of defines for shared code bogosity */ 104 #define UNREFERENCED_PARAMETER(_p) 105 #define UNREFERENCED_1PARAMETER(_p) 106 #define UNREFERENCED_2PARAMETER(_p, _q) 107 #define UNREFERENCED_3PARAMETER(_p, _q, _r) 108 #define UNREFERENCED_4PARAMETER(_p, _q, _r, _s) 109 110 #define IXGBE_NTOHL(_i) ntohl(_i) 111 #define IXGBE_NTOHS(_i) ntohs(_i) 112 113 /* XXX these need to be revisited */ 114 #define IXGBE_CPU_TO_LE32 htole32 115 #define IXGBE_LE32_TO_CPUS(x) 116 #define IXGBE_CPU_TO_BE16 htobe16 117 #define IXGBE_CPU_TO_BE32 htobe32 118 119 typedef uint8_t u8; 120 typedef int8_t s8; 121 typedef uint16_t u16; 122 typedef int16_t s16; 123 typedef uint32_t u32; 124 typedef int32_t s32; 125 typedef uint64_t u64; 126 #ifndef __bool_true_false_are_defined 127 typedef boolean_t bool; 128 #endif 129 130 /* shared code requires this */ 131 #define __le16 u16 132 #define __le32 u32 133 #define __le64 u64 134 #define __be16 u16 135 #define __be32 u32 136 #define __be64 u64 137 138 #define le16_to_cpu 139 140 #if defined(__i386__) || defined(__x86_64__) 141 #define mb() __asm volatile("mfence" ::: "memory") 142 #define wmb() __asm volatile("sfence" ::: "memory") 143 #define rmb() __asm volatile("lfence" ::: "memory") 144 #else 145 #define mb() 146 #define rmb() 147 #define wmb() 148 #endif 149 150 #if defined(__i386__) || defined(__x86_64__) 151 static __inline 152 void prefetch(void *x) 153 { 154 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x)); 155 } 156 #else 157 #define prefetch(x) 158 #endif 159 160 /* 161 * Optimized bcopy thanks to Luigi Rizzo's investigative work. Assumes 162 * non-overlapping regions and 32-byte padding on both src and dst. 163 */ 164 static __inline int 165 ixgbe_bcopy(void *_src, void *_dst, int l) 166 { 167 uint64_t *src = _src; 168 uint64_t *dst = _dst; 169 170 for (; l > 0; l -= 32) { 171 *dst++ = *src++; 172 *dst++ = *src++; 173 *dst++ = *src++; 174 *dst++ = *src++; 175 } 176 return (0); 177 } 178 179 struct ixgbe_osdep 180 { 181 bus_space_tag_t mem_bus_space_tag; 182 bus_space_handle_t mem_bus_space_handle; 183 struct device *dev; 184 }; 185 186 /* These routines are needed by the shared code */ 187 struct ixgbe_hw; 188 extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32); 189 #define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg 190 191 extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16); 192 #define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg 193 194 static __inline uint32_t 195 ixgbe_read_reg_osdep(struct ixgbe_osdep *osdep, uint32_t reg) 196 { 197 uint32_t value; 198 int count = 0; 199 200 do { 201 value = bus_space_read_4(osdep->mem_bus_space_tag, 202 osdep->mem_bus_space_handle, reg); 203 } while (value == 0xdeadbeef && ++count < 10); 204 205 if (count > 1) 206 device_printf(osdep->dev, "%d register reads @ 0x%8x\n", 207 count, reg); 208 209 return value; 210 } 211 212 #define IXGBE_READ_REG(a, reg) ixgbe_read_reg_osdep((a)->back, reg) 213 214 #define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS) 215 216 #define IXGBE_WRITE_REG(a, reg, value) (\ 217 bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \ 218 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \ 219 reg, value)) 220 221 222 #define IXGBE_READ_REG_ARRAY(a, reg, offset) (\ 223 bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \ 224 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \ 225 (reg + ((offset) << 2)))) 226 227 #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\ 228 bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \ 229 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \ 230 (reg + ((offset) << 2)), value)) 231 232 233 #endif /* _IXGBE_OS_H_ */ 234