1 /* 2 * Copyright (c) 2000 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Bill Paul. 16 * 4. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 * $FreeBSD: src/sys/dev/mii/brgphy.c,v 1.1.2.7 2003/05/11 18:00:55 ps Exp $ 33 * $DragonFly: src/sys/dev/netif/mii_layer/brgphy.c,v 1.12 2005/12/11 01:54:08 swildner Exp $ 34 */ 35 36 /* 37 * Driver for the Broadcom BCR5400 1000baseTX PHY. Speed is always 38 * 1000mbps; all we need to negotiate here is full or half duplex. 39 */ 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/kernel.h> 44 #include <sys/socket.h> 45 #include <sys/bus.h> 46 47 #include <machine/bus.h> 48 #include <machine/clock.h> 49 50 #include <net/if.h> 51 #include <net/if_media.h> 52 #include <net/if_arp.h> 53 54 #include "mii.h" 55 #include "miivar.h" 56 #include "miidevs.h" 57 58 #include "brgphyreg.h" 59 #include <dev/netif/bge/if_bgereg.h> 60 61 #include "miibus_if.h" 62 63 static int brgphy_probe(device_t); 64 static int brgphy_attach(device_t); 65 static int brgphy_detach(device_t); 66 67 static device_method_t brgphy_methods[] = { 68 /* device interface */ 69 DEVMETHOD(device_probe, brgphy_probe), 70 DEVMETHOD(device_attach, brgphy_attach), 71 DEVMETHOD(device_detach, brgphy_detach), 72 DEVMETHOD(device_shutdown, bus_generic_shutdown), 73 { 0, 0 } 74 }; 75 76 static devclass_t brgphy_devclass; 77 78 static driver_t brgphy_driver = { 79 "brgphy", 80 brgphy_methods, 81 sizeof(struct mii_softc) 82 }; 83 84 DRIVER_MODULE(brgphy, miibus, brgphy_driver, brgphy_devclass, 0, 0); 85 86 static int brgphy_service(struct mii_softc *, struct mii_data *, int); 87 static void brgphy_status(struct mii_softc *); 88 static int brgphy_mii_phy_auto(struct mii_softc *); 89 static void brgphy_reset(struct mii_softc *); 90 static void brgphy_loop(struct mii_softc *); 91 static void bcm5401_load_dspcode(struct mii_softc *); 92 static void bcm5411_load_dspcode(struct mii_softc *); 93 static void bcm5703_load_dspcode(struct mii_softc *); 94 static int brgphy_mii_model; 95 96 static int 97 brgphy_probe(device_t dev) 98 { 99 struct mii_attach_args *ma; 100 101 ma = device_get_ivars(dev); 102 103 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM && 104 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5400) { 105 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5400); 106 return(0); 107 } 108 109 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM && 110 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5401) { 111 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5401); 112 return(0); 113 } 114 115 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM && 116 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5411) { 117 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5411); 118 return(0); 119 } 120 121 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM && 122 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5701) { 123 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5701); 124 return(0); 125 } 126 127 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM && 128 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5703) { 129 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5703); 130 return(0); 131 } 132 133 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM && 134 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5704) { 135 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5704); 136 return(0); 137 } 138 139 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM && 140 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5705) { 141 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5705); 142 return(0); 143 } 144 145 return(ENXIO); 146 } 147 148 static int 149 brgphy_attach(device_t dev) 150 { 151 struct mii_softc *sc; 152 struct mii_attach_args *ma; 153 struct mii_data *mii; 154 const char *sep = ""; 155 156 sc = device_get_softc(dev); 157 ma = device_get_ivars(dev); 158 mii_softc_init(sc, ma); 159 sc->mii_dev = device_get_parent(dev); 160 mii = device_get_softc(sc->mii_dev); 161 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 162 163 sc->mii_inst = mii->mii_instance; 164 sc->mii_service = brgphy_service; 165 sc->mii_pdata = mii; 166 167 sc->mii_flags |= MIIF_NOISOLATE; 168 mii->mii_instance++; 169 170 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 171 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 172 173 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 174 BMCR_ISO); 175 #if 0 176 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst), 177 BMCR_LOOP|BMCR_S100); 178 #endif 179 180 brgphy_mii_model = MII_MODEL(ma->mii_id2); 181 brgphy_reset(sc); 182 183 sc->mii_capabilities = 184 PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 185 device_printf(dev, " "); 186 if (sc->mii_capabilities & BMSR_MEDIAMASK) 187 mii_add_media(sc, (sc->mii_capabilities & ~BMSR_ANEG)); 188 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0, sc->mii_inst), 189 BRGPHY_BMCR_FDX); 190 PRINT(", 1000baseTX"); 191 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX, sc->mii_inst), 0); 192 PRINT("1000baseTX-FDX"); 193 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0); 194 PRINT("auto"); 195 196 printf("\n"); 197 #undef ADD 198 #undef PRINT 199 200 MIIBUS_MEDIAINIT(sc->mii_dev); 201 return(0); 202 } 203 204 static int 205 brgphy_detach(device_t dev) 206 { 207 struct mii_softc *sc; 208 struct mii_data *mii; 209 210 sc = device_get_softc(dev); 211 mii = device_get_softc(device_get_parent(dev)); 212 sc->mii_dev = NULL; 213 LIST_REMOVE(sc, mii_list); 214 215 return(0); 216 } 217 218 static int 219 brgphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 220 { 221 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 222 int reg, speed, gig; 223 224 switch (cmd) { 225 case MII_POLLSTAT: 226 /* 227 * If we're not polling our PHY instance, just return. 228 */ 229 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 230 return (0); 231 break; 232 233 case MII_MEDIACHG: 234 /* 235 * If the media indicates a different PHY instance, 236 * isolate ourselves. 237 */ 238 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 239 reg = PHY_READ(sc, MII_BMCR); 240 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 241 return (0); 242 } 243 244 /* 245 * If the interface is not up, don't do anything. 246 */ 247 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 248 break; 249 250 brgphy_reset(sc); /* XXX hardware bug work-around */ 251 252 switch (IFM_SUBTYPE(ife->ifm_media)) { 253 case IFM_AUTO: 254 #ifdef foo 255 /* 256 * If we're already in auto mode, just return. 257 */ 258 if (PHY_READ(sc, BRGPHY_MII_BMCR) & BRGPHY_BMCR_AUTOEN) 259 return (0); 260 #endif 261 (void) brgphy_mii_phy_auto(sc); 262 break; 263 case IFM_1000_T: 264 speed = BRGPHY_S1000; 265 goto setit; 266 case IFM_100_TX: 267 speed = BRGPHY_S100; 268 goto setit; 269 case IFM_10_T: 270 speed = BRGPHY_S10; 271 setit: 272 brgphy_loop(sc); 273 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) { 274 speed |= BRGPHY_BMCR_FDX; 275 gig = BRGPHY_1000CTL_AFD; 276 } else { 277 gig = BRGPHY_1000CTL_AHD; 278 } 279 280 PHY_WRITE(sc, BRGPHY_MII_1000CTL, 0); 281 PHY_WRITE(sc, BRGPHY_MII_BMCR, speed); 282 PHY_WRITE(sc, BRGPHY_MII_ANAR, BRGPHY_SEL_TYPE); 283 284 if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T) 285 break; 286 287 PHY_WRITE(sc, BRGPHY_MII_1000CTL, gig); 288 PHY_WRITE(sc, BRGPHY_MII_BMCR, 289 speed|BRGPHY_BMCR_AUTOEN|BRGPHY_BMCR_STARTNEG); 290 291 if (brgphy_mii_model != MII_MODEL_xxBROADCOM_BCM5701) 292 break; 293 294 /* 295 * When settning the link manually, one side must 296 * be the master and the other the slave. However 297 * ifmedia doesn't give us a good way to specify 298 * this, so we fake it by using one of the LINK 299 * flags. If LINK0 is set, we program the PHY to 300 * be a master, otherwise it's a slave. 301 */ 302 if ((mii->mii_ifp->if_flags & IFF_LINK0)) { 303 PHY_WRITE(sc, BRGPHY_MII_1000CTL, 304 gig|BRGPHY_1000CTL_MSE|BRGPHY_1000CTL_MSC); 305 } else { 306 PHY_WRITE(sc, BRGPHY_MII_1000CTL, 307 gig|BRGPHY_1000CTL_MSE); 308 } 309 break; 310 #ifdef foo 311 case IFM_NONE: 312 PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN); 313 break; 314 #endif 315 case IFM_100_T4: 316 default: 317 return (EINVAL); 318 } 319 break; 320 321 case MII_TICK: 322 /* 323 * If we're not currently selected, just return. 324 */ 325 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 326 return (0); 327 328 /* 329 * Only used for autonegotiation. 330 */ 331 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 332 return (0); 333 334 /* 335 * Is the interface even up? 336 */ 337 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 338 return (0); 339 340 /* 341 * Check to see if we have link. If we do, we don't 342 * need to restart the autonegotiation process. Read 343 * the BMSR twice in case it's latched. 344 */ 345 reg = PHY_READ(sc, BRGPHY_MII_AUXSTS); 346 if (reg & BRGPHY_AUXSTS_LINK) 347 break; 348 349 /* 350 * Only retry autonegotiation every 5 seconds. 351 */ 352 if (++sc->mii_ticks != 5) 353 return (0); 354 355 sc->mii_ticks = 0; 356 brgphy_mii_phy_auto(sc); 357 return (0); 358 } 359 360 /* Update the media status. */ 361 brgphy_status(sc); 362 363 /* 364 * Callback if something changed. Note that we need to poke 365 * the DSP on the Broadcom PHYs if the media changes. 366 */ 367 if (sc->mii_active != mii->mii_media_active || cmd == MII_MEDIACHG) { 368 MIIBUS_STATCHG(sc->mii_dev); 369 sc->mii_active = mii->mii_media_active; 370 switch (brgphy_mii_model) { 371 case MII_MODEL_xxBROADCOM_BCM5401: 372 bcm5401_load_dspcode(sc); 373 break; 374 case MII_MODEL_xxBROADCOM_BCM5411: 375 bcm5411_load_dspcode(sc); 376 break; 377 } 378 } 379 return (0); 380 } 381 382 void 383 brgphy_status(struct mii_softc *sc) 384 { 385 struct mii_data *mii = sc->mii_pdata; 386 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 387 int bmsr, bmcr; 388 389 mii->mii_media_status = IFM_AVALID; 390 mii->mii_media_active = IFM_ETHER; 391 392 bmsr = PHY_READ(sc, BRGPHY_MII_BMSR); 393 if (PHY_READ(sc, BRGPHY_MII_AUXSTS) & BRGPHY_AUXSTS_LINK) 394 mii->mii_media_status |= IFM_ACTIVE; 395 396 bmcr = PHY_READ(sc, BRGPHY_MII_BMCR); 397 398 if (bmcr & BRGPHY_BMCR_LOOP) 399 mii->mii_media_active |= IFM_LOOP; 400 401 if (bmcr & BRGPHY_BMCR_AUTOEN) { 402 if ((bmsr & BRGPHY_BMSR_ACOMP) == 0) { 403 /* Erg, still trying, I guess... */ 404 mii->mii_media_active |= IFM_NONE; 405 return; 406 } 407 408 switch (PHY_READ(sc, BRGPHY_MII_AUXSTS) & 409 BRGPHY_AUXSTS_AN_RES) { 410 case BRGPHY_RES_1000FD: 411 mii->mii_media_active |= IFM_1000_T | IFM_FDX; 412 break; 413 case BRGPHY_RES_1000HD: 414 mii->mii_media_active |= IFM_1000_T | IFM_HDX; 415 break; 416 case BRGPHY_RES_100FD: 417 mii->mii_media_active |= IFM_100_TX | IFM_FDX; 418 break; 419 case BRGPHY_RES_100T4: 420 mii->mii_media_active |= IFM_100_T4; 421 break; 422 case BRGPHY_RES_100HD: 423 mii->mii_media_active |= IFM_100_TX | IFM_HDX; 424 break; 425 case BRGPHY_RES_10FD: 426 mii->mii_media_active |= IFM_10_T | IFM_FDX; 427 break; 428 case BRGPHY_RES_10HD: 429 mii->mii_media_active |= IFM_10_T | IFM_HDX; 430 break; 431 default: 432 mii->mii_media_active |= IFM_NONE; 433 break; 434 } 435 return; 436 } 437 438 mii->mii_media_active = ife->ifm_media; 439 440 return; 441 } 442 443 444 static int 445 brgphy_mii_phy_auto(struct mii_softc *mii) 446 { 447 int ktcr = 0; 448 449 brgphy_loop(mii); 450 brgphy_reset(mii); 451 ktcr = BRGPHY_1000CTL_AFD|BRGPHY_1000CTL_AHD; 452 if (brgphy_mii_model == MII_MODEL_xxBROADCOM_BCM5701) 453 ktcr |= BRGPHY_1000CTL_MSE|BRGPHY_1000CTL_MSC; 454 PHY_WRITE(mii, BRGPHY_MII_1000CTL, ktcr); 455 ktcr = PHY_READ(mii, BRGPHY_MII_1000CTL); 456 DELAY(1000); 457 PHY_WRITE(mii, BRGPHY_MII_ANAR, mii_bmsr_media_to_anar(mii)); 458 DELAY(1000); 459 PHY_WRITE(mii, BRGPHY_MII_BMCR, 460 BRGPHY_BMCR_AUTOEN | BRGPHY_BMCR_STARTNEG); 461 PHY_WRITE(mii, BRGPHY_MII_IMR, 0xFF00); 462 return (EJUSTRETURN); 463 } 464 465 static void 466 brgphy_loop(struct mii_softc *sc) 467 { 468 u_int32_t bmsr; 469 int i; 470 471 PHY_WRITE(sc, BRGPHY_MII_BMCR, BRGPHY_BMCR_LOOP); 472 for (i = 0; i < 15000; i++) { 473 bmsr = PHY_READ(sc, BRGPHY_MII_BMSR); 474 if (!(bmsr & BRGPHY_BMSR_LINK)) { 475 #if 0 476 device_printf(sc->mii_dev, "looped %d\n", i); 477 #endif 478 break; 479 } 480 DELAY(10); 481 } 482 } 483 484 /* Turn off tap power management on 5401. */ 485 static void 486 bcm5401_load_dspcode(struct mii_softc *sc) 487 { 488 static const struct { 489 int reg; 490 uint16_t val; 491 } dspcode[] = { 492 { BRGPHY_MII_AUXCTL, 0x0c20 }, 493 { BRGPHY_MII_DSP_ADDR_REG, 0x0012 }, 494 { BRGPHY_MII_DSP_RW_PORT, 0x1804 }, 495 { BRGPHY_MII_DSP_ADDR_REG, 0x0013 }, 496 { BRGPHY_MII_DSP_RW_PORT, 0x1204 }, 497 { BRGPHY_MII_DSP_ADDR_REG, 0x8006 }, 498 { BRGPHY_MII_DSP_RW_PORT, 0x0132 }, 499 { BRGPHY_MII_DSP_ADDR_REG, 0x8006 }, 500 { BRGPHY_MII_DSP_RW_PORT, 0x0232 }, 501 { BRGPHY_MII_DSP_ADDR_REG, 0x201f }, 502 { BRGPHY_MII_DSP_RW_PORT, 0x0a20 }, 503 { 0, 0 }, 504 }; 505 int i; 506 507 for (i = 0; dspcode[i].reg != 0; i++) 508 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); 509 DELAY(40); 510 } 511 512 static void 513 bcm5411_load_dspcode(struct mii_softc *sc) 514 { 515 static const struct { 516 int reg; 517 uint16_t val; 518 } dspcode[] = { 519 { 0x1c, 0x8c23 }, 520 { 0x1c, 0x8ca3 }, 521 { 0x1c, 0x8c23 }, 522 { 0, 0 }, 523 }; 524 int i; 525 526 for (i = 0; dspcode[i].reg != 0; i++) 527 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); 528 } 529 530 static void 531 bcm5703_load_dspcode(struct mii_softc *sc) 532 { 533 static const struct { 534 int reg; 535 uint16_t val; 536 } dspcode[] = { 537 { BRGPHY_MII_AUXCTL, 0x0c00 }, 538 { BRGPHY_MII_DSP_ADDR_REG, 0x201f }, 539 { BRGPHY_MII_DSP_RW_PORT, 0x2aaa }, 540 { 0, 0 }, 541 }; 542 int i; 543 544 for (i = 0; dspcode[i].reg != 0; i++) 545 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); 546 } 547 548 static void 549 bcm5704_load_dspcode(struct mii_softc *sc) 550 { 551 static const struct { 552 int reg; 553 u_int16_t val; 554 } dspcode[] = { 555 { 0x1c, 0x8d68 }, 556 { 0x1c, 0x8d68 }, 557 { 0, 0 }, 558 }; 559 int i; 560 561 for (i = 0; dspcode[i].reg != 0; i++) 562 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); 563 } 564 565 static void 566 brgphy_reset(struct mii_softc *sc) 567 { 568 u_int32_t val; 569 struct ifnet *ifp; 570 struct bge_softc *bge_sc; 571 572 mii_phy_reset(sc); 573 574 switch (brgphy_mii_model) { 575 case MII_MODEL_xxBROADCOM_BCM5401: 576 bcm5401_load_dspcode(sc); 577 break; 578 case MII_MODEL_xxBROADCOM_BCM5411: 579 bcm5411_load_dspcode(sc); 580 break; 581 case MII_MODEL_xxBROADCOM_BCM5703: 582 bcm5703_load_dspcode(sc); 583 break; 584 case MII_MODEL_xxBROADCOM_BCM5704: 585 bcm5704_load_dspcode(sc); 586 break; 587 } 588 589 ifp = sc->mii_pdata->mii_ifp; 590 bge_sc = ifp->if_softc; 591 592 /* 593 * Don't enable Ethernet@WireSpeed for the 5700 or the 594 * 5705 A1 and A2 chips. Make sure we only do this test 595 * on "bge" NICs, since other drivers may use this same 596 * PHY subdriver. 597 */ 598 if (strcmp(ifp->if_dname, "bge") == 0 && 599 (bge_sc->bge_asicrev == BGE_ASICREV_BCM5700 || 600 bge_sc->bge_chipid == BGE_CHIPID_BCM5705_A1 || 601 bge_sc->bge_chipid == BGE_CHIPID_BCM5705_A2)) 602 return; 603 604 /* Enable Ethernet@WireSpeed. */ 605 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7007); 606 val = PHY_READ(sc, BRGPHY_MII_AUXCTL); 607 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, val | (1 << 15) | (1 << 4)); 608 609 /* Enable Link LED on Dell boxes */ 610 if (bge_sc->bge_no_3_led) { 611 PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL, 612 PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL) 613 & ~BRGPHY_PHY_EXTCTL_3_LED); 614 } 615 } 616