1 /* 2 * Copyright (c) 2000 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Bill Paul. 16 * 4. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 * $FreeBSD: src/sys/dev/mii/brgphy.c,v 1.1.2.7 2003/05/11 18:00:55 ps Exp $ 33 * $DragonFly: src/sys/dev/netif/mii_layer/brgphy.c,v 1.4 2004/02/10 21:14:14 hmp Exp $ 34 * 35 * $FreeBSD: src/sys/dev/mii/brgphy.c,v 1.1.2.7 2003/05/11 18:00:55 ps Exp $ 36 */ 37 38 /* 39 * Driver for the Broadcom BCR5400 1000baseTX PHY. Speed is always 40 * 1000mbps; all we need to negotiate here is full or half duplex. 41 */ 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/kernel.h> 46 #include <sys/socket.h> 47 #include <sys/bus.h> 48 49 #include <machine/bus.h> 50 #include <machine/clock.h> 51 52 #include <net/if.h> 53 #include <net/if_media.h> 54 #include <net/if_arp.h> 55 56 #include "mii.h" 57 #include "miivar.h" 58 #include "miidevs.h" 59 60 #include "brgphyreg.h" 61 #include <dev/netif/bge/if_bgereg.h> 62 63 #include "miibus_if.h" 64 65 static int brgphy_probe(device_t); 66 static int brgphy_attach(device_t); 67 static int brgphy_detach(device_t); 68 69 static device_method_t brgphy_methods[] = { 70 /* device interface */ 71 DEVMETHOD(device_probe, brgphy_probe), 72 DEVMETHOD(device_attach, brgphy_attach), 73 DEVMETHOD(device_detach, brgphy_detach), 74 DEVMETHOD(device_shutdown, bus_generic_shutdown), 75 { 0, 0 } 76 }; 77 78 static devclass_t brgphy_devclass; 79 80 static driver_t brgphy_driver = { 81 "brgphy", 82 brgphy_methods, 83 sizeof(struct mii_softc) 84 }; 85 86 DRIVER_MODULE(brgphy, miibus, brgphy_driver, brgphy_devclass, 0, 0); 87 88 static int brgphy_service(struct mii_softc *, struct mii_data *, int); 89 static void brgphy_status(struct mii_softc *); 90 static int brgphy_mii_phy_auto(struct mii_softc *); 91 static void brgphy_reset(struct mii_softc *); 92 static void brgphy_loop(struct mii_softc *); 93 static void bcm5401_load_dspcode(struct mii_softc *); 94 static void bcm5411_load_dspcode(struct mii_softc *); 95 static void bcm5703_load_dspcode(struct mii_softc *); 96 static int brgphy_mii_model; 97 98 static int brgphy_probe(dev) 99 device_t dev; 100 { 101 struct mii_attach_args *ma; 102 103 ma = device_get_ivars(dev); 104 105 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM && 106 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5400) { 107 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5400); 108 return(0); 109 } 110 111 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM && 112 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5401) { 113 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5401); 114 return(0); 115 } 116 117 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM && 118 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5411) { 119 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5411); 120 return(0); 121 } 122 123 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM && 124 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5701) { 125 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5701); 126 return(0); 127 } 128 129 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM && 130 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5703) { 131 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5703); 132 return(0); 133 } 134 135 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM && 136 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5704) { 137 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5704); 138 return(0); 139 } 140 141 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM && 142 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5705) { 143 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5705); 144 return(0); 145 } 146 147 return(ENXIO); 148 } 149 150 static int 151 brgphy_attach(dev) 152 device_t dev; 153 { 154 struct mii_softc *sc; 155 struct mii_attach_args *ma; 156 struct mii_data *mii; 157 const char *sep = ""; 158 159 sc = device_get_softc(dev); 160 ma = device_get_ivars(dev); 161 sc->mii_dev = device_get_parent(dev); 162 mii = device_get_softc(sc->mii_dev); 163 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 164 165 sc->mii_inst = mii->mii_instance; 166 sc->mii_phy = ma->mii_phyno; 167 sc->mii_service = brgphy_service; 168 sc->mii_pdata = mii; 169 170 sc->mii_flags |= MIIF_NOISOLATE; 171 mii->mii_instance++; 172 173 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 174 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 175 176 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 177 BMCR_ISO); 178 #if 0 179 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst), 180 BMCR_LOOP|BMCR_S100); 181 #endif 182 183 brgphy_mii_model = MII_MODEL(ma->mii_id2); 184 brgphy_reset(sc); 185 186 sc->mii_capabilities = 187 PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 188 device_printf(dev, " "); 189 if (sc->mii_capabilities & BMSR_MEDIAMASK) 190 mii_add_media(mii, (sc->mii_capabilities & ~BMSR_ANEG), 191 sc->mii_inst); 192 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_TX, 0, sc->mii_inst), 193 BRGPHY_BMCR_FDX); 194 PRINT(", 1000baseTX"); 195 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_TX, IFM_FDX, sc->mii_inst), 0); 196 PRINT("1000baseTX-FDX"); 197 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0); 198 PRINT("auto"); 199 200 printf("\n"); 201 #undef ADD 202 #undef PRINT 203 204 MIIBUS_MEDIAINIT(sc->mii_dev); 205 return(0); 206 } 207 208 static int 209 brgphy_detach(dev) 210 device_t dev; 211 { 212 struct mii_softc *sc; 213 struct mii_data *mii; 214 215 sc = device_get_softc(dev); 216 mii = device_get_softc(device_get_parent(dev)); 217 sc->mii_dev = NULL; 218 LIST_REMOVE(sc, mii_list); 219 220 return(0); 221 } 222 223 static int 224 brgphy_service(sc, mii, cmd) 225 struct mii_softc *sc; 226 struct mii_data *mii; 227 int cmd; 228 { 229 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 230 int reg, speed, gig; 231 232 switch (cmd) { 233 case MII_POLLSTAT: 234 /* 235 * If we're not polling our PHY instance, just return. 236 */ 237 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 238 return (0); 239 break; 240 241 case MII_MEDIACHG: 242 /* 243 * If the media indicates a different PHY instance, 244 * isolate ourselves. 245 */ 246 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 247 reg = PHY_READ(sc, MII_BMCR); 248 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 249 return (0); 250 } 251 252 /* 253 * If the interface is not up, don't do anything. 254 */ 255 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 256 break; 257 258 brgphy_reset(sc); /* XXX hardware bug work-around */ 259 260 switch (IFM_SUBTYPE(ife->ifm_media)) { 261 case IFM_AUTO: 262 #ifdef foo 263 /* 264 * If we're already in auto mode, just return. 265 */ 266 if (PHY_READ(sc, BRGPHY_MII_BMCR) & BRGPHY_BMCR_AUTOEN) 267 return (0); 268 #endif 269 (void) brgphy_mii_phy_auto(sc); 270 break; 271 case IFM_1000_TX: 272 speed = BRGPHY_S1000; 273 goto setit; 274 case IFM_100_TX: 275 speed = BRGPHY_S100; 276 goto setit; 277 case IFM_10_T: 278 speed = BRGPHY_S10; 279 setit: 280 brgphy_loop(sc); 281 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) { 282 speed |= BRGPHY_BMCR_FDX; 283 gig = BRGPHY_1000CTL_AFD; 284 } else { 285 gig = BRGPHY_1000CTL_AHD; 286 } 287 288 PHY_WRITE(sc, BRGPHY_MII_1000CTL, 0); 289 PHY_WRITE(sc, BRGPHY_MII_BMCR, speed); 290 PHY_WRITE(sc, BRGPHY_MII_ANAR, BRGPHY_SEL_TYPE); 291 292 if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_TX) 293 break; 294 295 PHY_WRITE(sc, BRGPHY_MII_1000CTL, gig); 296 PHY_WRITE(sc, BRGPHY_MII_BMCR, 297 speed|BRGPHY_BMCR_AUTOEN|BRGPHY_BMCR_STARTNEG); 298 299 if (brgphy_mii_model != MII_MODEL_xxBROADCOM_BCM5701) 300 break; 301 302 /* 303 * When settning the link manually, one side must 304 * be the master and the other the slave. However 305 * ifmedia doesn't give us a good way to specify 306 * this, so we fake it by using one of the LINK 307 * flags. If LINK0 is set, we program the PHY to 308 * be a master, otherwise it's a slave. 309 */ 310 if ((mii->mii_ifp->if_flags & IFF_LINK0)) { 311 PHY_WRITE(sc, BRGPHY_MII_1000CTL, 312 gig|BRGPHY_1000CTL_MSE|BRGPHY_1000CTL_MSC); 313 } else { 314 PHY_WRITE(sc, BRGPHY_MII_1000CTL, 315 gig|BRGPHY_1000CTL_MSE); 316 } 317 break; 318 #ifdef foo 319 case IFM_NONE: 320 PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN); 321 break; 322 #endif 323 case IFM_100_T4: 324 default: 325 return (EINVAL); 326 } 327 break; 328 329 case MII_TICK: 330 /* 331 * If we're not currently selected, just return. 332 */ 333 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 334 return (0); 335 336 /* 337 * Only used for autonegotiation. 338 */ 339 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 340 return (0); 341 342 /* 343 * Is the interface even up? 344 */ 345 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 346 return (0); 347 348 /* 349 * Check to see if we have link. If we do, we don't 350 * need to restart the autonegotiation process. Read 351 * the BMSR twice in case it's latched. 352 */ 353 reg = PHY_READ(sc, BRGPHY_MII_AUXSTS); 354 if (reg & BRGPHY_AUXSTS_LINK) 355 break; 356 357 /* 358 * Only retry autonegotiation every 5 seconds. 359 */ 360 if (++sc->mii_ticks != 5) 361 return (0); 362 363 sc->mii_ticks = 0; 364 brgphy_mii_phy_auto(sc); 365 return (0); 366 } 367 368 /* Update the media status. */ 369 brgphy_status(sc); 370 371 /* 372 * Callback if something changed. Note that we need to poke 373 * the DSP on the Broadcom PHYs if the media changes. 374 */ 375 if (sc->mii_active != mii->mii_media_active || cmd == MII_MEDIACHG) { 376 MIIBUS_STATCHG(sc->mii_dev); 377 sc->mii_active = mii->mii_media_active; 378 switch (brgphy_mii_model) { 379 case MII_MODEL_xxBROADCOM_BCM5401: 380 bcm5401_load_dspcode(sc); 381 break; 382 case MII_MODEL_xxBROADCOM_BCM5411: 383 bcm5411_load_dspcode(sc); 384 break; 385 } 386 } 387 return (0); 388 } 389 390 void 391 brgphy_status(sc) 392 struct mii_softc *sc; 393 { 394 struct mii_data *mii = sc->mii_pdata; 395 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 396 int bmsr, bmcr; 397 398 mii->mii_media_status = IFM_AVALID; 399 mii->mii_media_active = IFM_ETHER; 400 401 bmsr = PHY_READ(sc, BRGPHY_MII_BMSR); 402 if (PHY_READ(sc, BRGPHY_MII_AUXSTS) & BRGPHY_AUXSTS_LINK) 403 mii->mii_media_status |= IFM_ACTIVE; 404 405 bmcr = PHY_READ(sc, BRGPHY_MII_BMCR); 406 407 if (bmcr & BRGPHY_BMCR_LOOP) 408 mii->mii_media_active |= IFM_LOOP; 409 410 if (bmcr & BRGPHY_BMCR_AUTOEN) { 411 if ((bmsr & BRGPHY_BMSR_ACOMP) == 0) { 412 /* Erg, still trying, I guess... */ 413 mii->mii_media_active |= IFM_NONE; 414 return; 415 } 416 417 switch (PHY_READ(sc, BRGPHY_MII_AUXSTS) & 418 BRGPHY_AUXSTS_AN_RES) { 419 case BRGPHY_RES_1000FD: 420 mii->mii_media_active |= IFM_1000_TX | IFM_FDX; 421 break; 422 case BRGPHY_RES_1000HD: 423 mii->mii_media_active |= IFM_1000_TX | IFM_HDX; 424 break; 425 case BRGPHY_RES_100FD: 426 mii->mii_media_active |= IFM_100_TX | IFM_FDX; 427 break; 428 case BRGPHY_RES_100T4: 429 mii->mii_media_active |= IFM_100_T4; 430 break; 431 case BRGPHY_RES_100HD: 432 mii->mii_media_active |= IFM_100_TX | IFM_HDX; 433 break; 434 case BRGPHY_RES_10FD: 435 mii->mii_media_active |= IFM_10_T | IFM_FDX; 436 break; 437 case BRGPHY_RES_10HD: 438 mii->mii_media_active |= IFM_10_T | IFM_HDX; 439 break; 440 default: 441 mii->mii_media_active |= IFM_NONE; 442 break; 443 } 444 return; 445 } 446 447 mii->mii_media_active = ife->ifm_media; 448 449 return; 450 } 451 452 453 static int 454 brgphy_mii_phy_auto(mii) 455 struct mii_softc *mii; 456 { 457 int ktcr = 0; 458 459 brgphy_loop(mii); 460 brgphy_reset(mii); 461 ktcr = BRGPHY_1000CTL_AFD|BRGPHY_1000CTL_AHD; 462 if (brgphy_mii_model == MII_MODEL_xxBROADCOM_BCM5701) 463 ktcr |= BRGPHY_1000CTL_MSE|BRGPHY_1000CTL_MSC; 464 PHY_WRITE(mii, BRGPHY_MII_1000CTL, ktcr); 465 ktcr = PHY_READ(mii, BRGPHY_MII_1000CTL); 466 DELAY(1000); 467 PHY_WRITE(mii, BRGPHY_MII_ANAR, 468 BMSR_MEDIA_TO_ANAR(mii->mii_capabilities) | ANAR_CSMA); 469 DELAY(1000); 470 PHY_WRITE(mii, BRGPHY_MII_BMCR, 471 BRGPHY_BMCR_AUTOEN | BRGPHY_BMCR_STARTNEG); 472 PHY_WRITE(mii, BRGPHY_MII_IMR, 0xFF00); 473 return (EJUSTRETURN); 474 } 475 476 static void 477 brgphy_loop(struct mii_softc *sc) 478 { 479 u_int32_t bmsr; 480 int i; 481 482 PHY_WRITE(sc, BRGPHY_MII_BMCR, BRGPHY_BMCR_LOOP); 483 for (i = 0; i < 15000; i++) { 484 bmsr = PHY_READ(sc, BRGPHY_MII_BMSR); 485 if (!(bmsr & BRGPHY_BMSR_LINK)) { 486 #if 0 487 device_printf(sc->mii_dev, "looped %d\n", i); 488 #endif 489 break; 490 } 491 DELAY(10); 492 } 493 } 494 495 /* Turn off tap power management on 5401. */ 496 static void 497 bcm5401_load_dspcode(struct mii_softc *sc) 498 { 499 static const struct { 500 int reg; 501 uint16_t val; 502 } dspcode[] = { 503 { BRGPHY_MII_AUXCTL, 0x0c20 }, 504 { BRGPHY_MII_DSP_ADDR_REG, 0x0012 }, 505 { BRGPHY_MII_DSP_RW_PORT, 0x1804 }, 506 { BRGPHY_MII_DSP_ADDR_REG, 0x0013 }, 507 { BRGPHY_MII_DSP_RW_PORT, 0x1204 }, 508 { BRGPHY_MII_DSP_ADDR_REG, 0x8006 }, 509 { BRGPHY_MII_DSP_RW_PORT, 0x0132 }, 510 { BRGPHY_MII_DSP_ADDR_REG, 0x8006 }, 511 { BRGPHY_MII_DSP_RW_PORT, 0x0232 }, 512 { BRGPHY_MII_DSP_ADDR_REG, 0x201f }, 513 { BRGPHY_MII_DSP_RW_PORT, 0x0a20 }, 514 { 0, 0 }, 515 }; 516 int i; 517 518 for (i = 0; dspcode[i].reg != 0; i++) 519 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); 520 DELAY(40); 521 } 522 523 static void 524 bcm5411_load_dspcode(struct mii_softc *sc) 525 { 526 static const struct { 527 int reg; 528 uint16_t val; 529 } dspcode[] = { 530 { 0x1c, 0x8c23 }, 531 { 0x1c, 0x8ca3 }, 532 { 0x1c, 0x8c23 }, 533 { 0, 0 }, 534 }; 535 int i; 536 537 for (i = 0; dspcode[i].reg != 0; i++) 538 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); 539 } 540 541 static void 542 bcm5703_load_dspcode(struct mii_softc *sc) 543 { 544 static const struct { 545 int reg; 546 uint16_t val; 547 } dspcode[] = { 548 { BRGPHY_MII_AUXCTL, 0x0c00 }, 549 { BRGPHY_MII_DSP_ADDR_REG, 0x201f }, 550 { BRGPHY_MII_DSP_RW_PORT, 0x2aaa }, 551 { 0, 0 }, 552 }; 553 int i; 554 555 for (i = 0; dspcode[i].reg != 0; i++) 556 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); 557 } 558 559 static void 560 bcm5704_load_dspcode(struct mii_softc *sc) 561 { 562 static const struct { 563 int reg; 564 u_int16_t val; 565 } dspcode[] = { 566 { 0x1c, 0x8d68 }, 567 { 0x1c, 0x8d68 }, 568 { 0, 0 }, 569 }; 570 int i; 571 572 for (i = 0; dspcode[i].reg != 0; i++) 573 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); 574 } 575 576 static void 577 brgphy_reset(struct mii_softc *sc) 578 { 579 u_int32_t val; 580 struct ifnet *ifp; 581 struct bge_softc *bge_sc; 582 583 mii_phy_reset(sc); 584 585 switch (brgphy_mii_model) { 586 case MII_MODEL_xxBROADCOM_BCM5401: 587 bcm5401_load_dspcode(sc); 588 break; 589 case MII_MODEL_xxBROADCOM_BCM5411: 590 bcm5411_load_dspcode(sc); 591 break; 592 case MII_MODEL_xxBROADCOM_BCM5703: 593 bcm5703_load_dspcode(sc); 594 break; 595 case MII_MODEL_xxBROADCOM_BCM5704: 596 bcm5704_load_dspcode(sc); 597 break; 598 } 599 600 ifp = sc->mii_pdata->mii_ifp; 601 bge_sc = ifp->if_softc; 602 603 /* 604 * Don't enable Ethernet@WireSpeed for the 5700 or the 605 * 5705 A1 and A2 chips. Make sure we only do this test 606 * on "bge" NICs, since other drivers may use this same 607 * PHY subdriver. 608 */ 609 if (strcmp(ifp->if_dname, "bge") == 0 && 610 (bge_sc->bge_asicrev == BGE_ASICREV_BCM5700 || 611 bge_sc->bge_chipid == BGE_CHIPID_BCM5705_A1 || 612 bge_sc->bge_chipid == BGE_CHIPID_BCM5705_A2)) 613 return; 614 615 /* Enable Ethernet@WireSpeed. */ 616 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7007); 617 val = PHY_READ(sc, BRGPHY_MII_AUXCTL); 618 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, val | (1 << 15) | (1 << 4)); 619 620 /* Enable Link LED on Dell boxes */ 621 if (bge_sc->bge_no_3_led) { 622 PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL, 623 PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL) 624 & ~BRGPHY_PHY_EXTCTL_3_LED); 625 } 626 } 627