1 /* 2 * Copyright (c) 1997, 1998, 1999 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Bill Paul. 16 * 4. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 * $FreeBSD: src/sys/dev/mii/dcphy.c,v 1.2.2.2 2000/10/14 00:44:40 wpaul Exp $ 33 * $DragonFly: src/sys/dev/netif/mii_layer/dcphy.c,v 1.8 2005/12/11 01:54:08 swildner Exp $ 34 * 35 * $FreeBSD: src/sys/dev/mii/dcphy.c,v 1.2.2.2 2000/10/14 00:44:40 wpaul Exp $ 36 */ 37 38 /* 39 * Pseudo-driver for internal NWAY support on DEC 21143 and workalike 40 * controllers. Technically we're abusing the miibus code to handle 41 * media selection and NWAY support here since there is no MII 42 * interface. However the logical operations are roughly the same, 43 * and the alternative is to create a fake MII interface in the driver, 44 * which is harder to do. 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/socket.h> 51 #include <sys/errno.h> 52 #include <sys/module.h> 53 #include <sys/bus.h> 54 55 #include <net/if.h> 56 #include <net/if_arp.h> 57 #include <net/if_media.h> 58 59 #include "mii.h" 60 #include "miivar.h" 61 #include "miidevs.h" 62 63 #include <machine/clock.h> 64 #include <machine/bus_pio.h> 65 #include <machine/bus_memio.h> 66 #include <machine/bus.h> 67 #include <machine/resource.h> 68 #include <sys/bus.h> 69 70 #include <bus/pci/pcivar.h> 71 #include "../dc/if_dcreg.h" 72 73 #include "miibus_if.h" 74 75 #define DC_SETBIT(sc, reg, x) \ 76 CSR_WRITE_4(sc, reg, \ 77 CSR_READ_4(sc, reg) | x) 78 79 #define DC_CLRBIT(sc, reg, x) \ 80 CSR_WRITE_4(sc, reg, \ 81 CSR_READ_4(sc, reg) & ~x) 82 83 #define MIIF_AUTOTIMEOUT 0x0004 84 85 /* 86 * This is the subsystem ID for the built-in 21143 ethernet 87 * in several Compaq Presario systems. Apparently these are 88 * 10Mbps only, so we need to treat them specially. 89 */ 90 #define COMPAQ_PRESARIO_ID 0xb0bb0e11 91 92 static int dcphy_probe (device_t); 93 static int dcphy_attach (device_t); 94 static int dcphy_detach (device_t); 95 96 static device_method_t dcphy_methods[] = { 97 /* device interface */ 98 DEVMETHOD(device_probe, dcphy_probe), 99 DEVMETHOD(device_attach, dcphy_attach), 100 DEVMETHOD(device_detach, dcphy_detach), 101 DEVMETHOD(device_shutdown, bus_generic_shutdown), 102 { 0, 0 } 103 }; 104 105 static devclass_t dcphy_devclass; 106 107 static driver_t dcphy_driver = { 108 "dcphy", 109 dcphy_methods, 110 sizeof(struct mii_softc) 111 }; 112 113 DRIVER_MODULE(dcphy, miibus, dcphy_driver, dcphy_devclass, 0, 0); 114 115 int dcphy_service (struct mii_softc *, struct mii_data *, int); 116 void dcphy_status (struct mii_softc *); 117 static int dcphy_auto (struct mii_softc *, int); 118 static void dcphy_reset (struct mii_softc *); 119 120 static int 121 dcphy_probe(device_t dev) 122 { 123 struct mii_attach_args *ma; 124 125 ma = device_get_ivars(dev); 126 127 /* 128 * The dc driver will report the 21143 vendor and device 129 * ID to let us know that it wants us to attach. 130 */ 131 if (ma->mii_id1 != DC_VENDORID_DEC || 132 ma->mii_id2 != DC_DEVICEID_21143) 133 return(ENXIO); 134 135 device_set_desc(dev, "Intel 21143 NWAY media interface"); 136 137 return (0); 138 } 139 140 static int 141 dcphy_attach(device_t dev) 142 { 143 struct mii_softc *sc; 144 struct mii_attach_args *ma; 145 struct mii_data *mii; 146 struct dc_softc *dc_sc; 147 148 sc = device_get_softc(dev); 149 ma = device_get_ivars(dev); 150 mii_softc_init(sc, ma); 151 sc->mii_dev = device_get_parent(dev); 152 mii = device_get_softc(sc->mii_dev); 153 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 154 155 sc->mii_inst = mii->mii_instance; 156 sc->mii_service = dcphy_service; 157 sc->mii_pdata = mii; 158 159 sc->mii_flags |= MIIF_NOISOLATE; 160 mii->mii_instance++; 161 162 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 163 164 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 165 BMCR_ISO); 166 167 /*dcphy_reset(sc);*/ 168 dc_sc = mii->mii_ifp->if_softc; 169 CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0); 170 CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0); 171 172 switch(pci_read_config(device_get_parent(sc->mii_dev), 173 DC_PCI_CSID, 4)) { 174 case COMPAQ_PRESARIO_ID: 175 /* Example of how to only allow 10Mbps modes. */ 176 sc->mii_capabilities = BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX; 177 break; 178 default: 179 if (dc_sc->dc_pmode == DC_PMODE_SIA) { 180 sc->mii_capabilities = 181 BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX; 182 } else { 183 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, 184 sc->mii_inst), BMCR_LOOP|BMCR_S100); 185 186 sc->mii_capabilities = 187 BMSR_ANEG|BMSR_100TXFDX|BMSR_100TXHDX| 188 BMSR_10TFDX|BMSR_10THDX; 189 } 190 break; 191 } 192 193 sc->mii_capabilities &= ma->mii_capmask; 194 device_printf(dev, " "); 195 if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0) 196 printf("no media present"); 197 else 198 mii_add_media(sc, sc->mii_capabilities); 199 printf("\n"); 200 #undef ADD 201 202 MIIBUS_MEDIAINIT(sc->mii_dev); 203 return(0); 204 } 205 206 static int 207 dcphy_detach(device_t dev) 208 { 209 struct mii_softc *sc; 210 struct mii_data *mii; 211 212 sc = device_get_softc(dev); 213 mii = device_get_softc(device_get_parent(dev)); 214 sc->mii_dev = NULL; 215 LIST_REMOVE(sc, mii_list); 216 217 return(0); 218 } 219 220 int 221 dcphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 222 { 223 struct dc_softc *dc_sc; 224 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 225 int reg; 226 u_int32_t mode; 227 228 dc_sc = mii->mii_ifp->if_softc; 229 230 switch (cmd) { 231 case MII_POLLSTAT: 232 /* 233 * If we're not polling our PHY instance, just return. 234 */ 235 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 236 return (0); 237 } 238 break; 239 240 case MII_MEDIACHG: 241 /* 242 * If the media indicates a different PHY instance, 243 * isolate ourselves. 244 */ 245 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 246 return (0); 247 } 248 249 /* 250 * If the interface is not up, don't do anything. 251 */ 252 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 253 break; 254 255 sc->mii_flags = 0; 256 mii->mii_media_active = IFM_NONE; 257 mode = CSR_READ_4(dc_sc, DC_NETCFG); 258 mode &= ~(DC_NETCFG_FULLDUPLEX|DC_NETCFG_PORTSEL| 259 DC_NETCFG_PCS|DC_NETCFG_SCRAMBLER|DC_NETCFG_SPEEDSEL); 260 261 switch (IFM_SUBTYPE(ife->ifm_media)) { 262 case IFM_AUTO: 263 /*dcphy_reset(sc);*/ 264 sc->mii_flags &= ~MIIF_DOINGAUTO; 265 (void) dcphy_auto(sc, 0); 266 break; 267 case IFM_100_T4: 268 /* 269 * XXX Not supported as a manual setting right now. 270 */ 271 return (EINVAL); 272 case IFM_100_TX: 273 dcphy_reset(sc); 274 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 275 mode |= DC_NETCFG_PORTSEL|DC_NETCFG_PCS| 276 DC_NETCFG_SCRAMBLER; 277 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 278 mode |= DC_NETCFG_FULLDUPLEX; 279 else 280 mode &= ~DC_NETCFG_FULLDUPLEX; 281 CSR_WRITE_4(dc_sc, DC_NETCFG, mode); 282 break; 283 case IFM_10_T: 284 DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET); 285 DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF); 286 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 287 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D); 288 else 289 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F); 290 DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET); 291 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 292 mode &= ~DC_NETCFG_PORTSEL; 293 mode |= DC_NETCFG_SPEEDSEL; 294 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) 295 mode |= DC_NETCFG_FULLDUPLEX; 296 else 297 mode &= ~DC_NETCFG_FULLDUPLEX; 298 CSR_WRITE_4(dc_sc, DC_NETCFG, mode); 299 break; 300 default: 301 return(EINVAL); 302 break; 303 } 304 break; 305 306 case MII_TICK: 307 /* 308 * If we're not currently selected, just return. 309 */ 310 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 311 return (0); 312 313 /* 314 * Only used for autonegotiation. 315 */ 316 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 317 return (0); 318 319 /* 320 * Is the interface even up? 321 */ 322 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 323 return (0); 324 325 reg = CSR_READ_4(dc_sc, DC_10BTSTAT) & 326 (DC_TSTAT_LS10|DC_TSTAT_LS100); 327 328 if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100)) 329 return(0); 330 331 /* 332 * Only retry autonegotiation every 5 seconds. 333 */ 334 if (++sc->mii_ticks != 50) 335 return (0); 336 337 sc->mii_ticks = 0; 338 /*if (DC_IS_INTEL(dc_sc))*/ 339 sc->mii_flags &= ~MIIF_DOINGAUTO; 340 dcphy_auto(sc, 0); 341 342 break; 343 } 344 345 /* Update the media status. */ 346 dcphy_status(sc); 347 348 /* Callback if something changed. */ 349 if (sc->mii_active != mii->mii_media_active || cmd == MII_MEDIACHG) { 350 MIIBUS_STATCHG(sc->mii_dev); 351 sc->mii_active = mii->mii_media_active; 352 } 353 return (0); 354 } 355 356 void 357 dcphy_status(struct mii_softc *sc) 358 { 359 struct mii_data *mii = sc->mii_pdata; 360 int reg, anlpar, tstat = 0; 361 struct dc_softc *dc_sc; 362 363 dc_sc = mii->mii_ifp->if_softc; 364 365 mii->mii_media_status = IFM_AVALID; 366 mii->mii_media_active = IFM_ETHER; 367 368 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 369 return; 370 371 reg = CSR_READ_4(dc_sc, DC_10BTSTAT) & 372 (DC_TSTAT_LS10|DC_TSTAT_LS100); 373 374 if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100)) 375 mii->mii_media_status |= IFM_ACTIVE; 376 377 if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) { 378 /* Erg, still trying, I guess... */ 379 tstat = CSR_READ_4(dc_sc, DC_10BTSTAT); 380 if ((tstat & DC_TSTAT_ANEGSTAT) != DC_ASTAT_AUTONEGCMP) { 381 if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) && 382 (tstat & DC_TSTAT_ANEGSTAT) == DC_ASTAT_DISABLE) 383 goto skip; 384 mii->mii_media_active |= IFM_NONE; 385 return; 386 } 387 388 if (tstat & DC_TSTAT_LP_CAN_NWAY) { 389 anlpar = tstat >> 16; 390 if (anlpar & ANLPAR_T4 && 391 sc->mii_capabilities & BMSR_100TXHDX) 392 mii->mii_media_active |= IFM_100_T4; 393 else if (anlpar & ANLPAR_TX_FD && 394 sc->mii_capabilities & BMSR_100TXFDX) 395 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 396 else if (anlpar & ANLPAR_TX && 397 sc->mii_capabilities & BMSR_100TXHDX) 398 mii->mii_media_active |= IFM_100_TX; 399 else if (anlpar & ANLPAR_10_FD) 400 mii->mii_media_active |= IFM_10_T|IFM_FDX; 401 else if (anlpar & ANLPAR_10) 402 mii->mii_media_active |= IFM_10_T; 403 else 404 mii->mii_media_active |= IFM_NONE; 405 if (DC_IS_INTEL(dc_sc)) 406 DC_CLRBIT(dc_sc, DC_10BTCTRL, 407 DC_TCTL_AUTONEGENBL); 408 return; 409 } 410 /* 411 * If the other side doesn't support NWAY, then the 412 * best we can do is determine if we have a 10Mbps or 413 * 100Mbps link. There's no way to know if the link 414 * is full or half duplex, so we default to half duplex 415 * and hope that the user is clever enough to manually 416 * change the media settings if we're wrong. 417 */ 418 if (!(reg & DC_TSTAT_LS100)) 419 mii->mii_media_active |= IFM_100_TX; 420 else if (!(reg & DC_TSTAT_LS10)) 421 mii->mii_media_active |= IFM_10_T; 422 else 423 mii->mii_media_active |= IFM_NONE; 424 if (DC_IS_INTEL(dc_sc)) 425 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 426 return; 427 } 428 429 skip: 430 431 if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL) 432 mii->mii_media_active |= IFM_10_T; 433 else 434 mii->mii_media_active |= IFM_100_TX; 435 if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX) 436 mii->mii_media_active |= IFM_FDX; 437 438 return; 439 } 440 441 static int 442 dcphy_auto(struct mii_softc *mii, int waitfor) 443 { 444 int i; 445 struct dc_softc *sc; 446 447 sc = mii->mii_pdata->mii_ifp->if_softc; 448 449 if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) { 450 DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL); 451 DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX); 452 DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET); 453 if (mii->mii_capabilities & BMSR_100TXHDX) 454 CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF); 455 else 456 CSR_WRITE_4(sc, DC_10BTCTRL, 0xFFFF); 457 DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET); 458 DC_SETBIT(sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); 459 DC_SETBIT(sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE); 460 } 461 462 if (waitfor) { 463 /* Wait 500ms for it to complete. */ 464 for (i = 0; i < 500; i++) { 465 if ((CSR_READ_4(sc, DC_10BTSTAT) & DC_TSTAT_ANEGSTAT) 466 == DC_ASTAT_AUTONEGCMP) 467 return(0); 468 DELAY(1000); 469 } 470 /* 471 * Don't need to worry about clearing MIIF_DOINGAUTO. 472 * If that's set, a timeout is pending, and it will 473 * clear the flag. 474 */ 475 return(EIO); 476 } 477 478 /* 479 * Just let it finish asynchronously. This is for the benefit of 480 * the tick handler driving autonegotiation. Don't want 500ms 481 * delays all the time while the system is running! 482 */ 483 if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) 484 mii->mii_flags |= MIIF_DOINGAUTO; 485 486 return(EJUSTRETURN); 487 } 488 489 static void 490 dcphy_reset(struct mii_softc *mii) 491 { 492 struct dc_softc *sc; 493 494 sc = mii->mii_pdata->mii_ifp->if_softc; 495 496 DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET); 497 DELAY(1000); 498 DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET); 499 500 return; 501 } 502