1 /* $NetBSD: mii_physubr.c,v 1.49 2006/03/29 07:05:24 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 * 39 * $FreeBSD: src/sys/dev/mii/mii_physubr.c,v 1.2.2.1 2000/12/12 19:29:14 wpaul Exp $ 40 */ 41 42 /* 43 * Subroutines common to all PHYs. 44 */ 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/kernel.h> 49 #include <sys/socket.h> 50 #include <sys/errno.h> 51 #include <sys/module.h> 52 #include <sys/bus.h> 53 #include <sys/thread2.h> 54 55 #include <net/if.h> 56 #include <net/if_media.h> 57 58 #include "mii.h" 59 #include "miivar.h" 60 61 #include "miibus_if.h" 62 63 const struct mii_media mii_media_table[MII_NMEDIA] = { 64 [MII_MEDIA_NONE] = { .mm_bmcr = BMCR_ISO, 65 .mm_anar = ANAR_CSMA, 66 .mm_gtcr = 0 }, 67 68 [MII_MEDIA_10_T] = { .mm_bmcr = BMCR_S10, 69 .mm_anar = ANAR_CSMA | ANAR_10, 70 .mm_gtcr = 0 }, 71 72 [MII_MEDIA_10_T_FDX] = { .mm_bmcr = BMCR_S10 | BMCR_FDX, 73 .mm_anar = ANAR_CSMA | ANAR_10_FD, 74 .mm_gtcr = 0 }, 75 76 [MII_MEDIA_100_T4] = { .mm_bmcr = BMCR_S100, 77 .mm_anar = ANAR_CSMA | ANAR_T4, 78 .mm_gtcr = 0 }, 79 80 [MII_MEDIA_100_TX] = { .mm_bmcr = BMCR_S100, 81 .mm_anar = ANAR_CSMA | ANAR_TX, 82 .mm_gtcr = 0 }, 83 84 [MII_MEDIA_100_TX_FDX] = { .mm_bmcr = BMCR_S100 | BMCR_FDX, 85 .mm_anar = ANAR_CSMA | ANAR_TX_FD, 86 .mm_gtcr = 0 }, 87 88 [MII_MEDIA_1000_X] = { .mm_bmcr = BMCR_S1000, 89 .mm_anar = ANAR_CSMA, 90 .mm_gtcr = 0 }, 91 92 [MII_MEDIA_1000_X_FDX] = { .mm_bmcr = BMCR_S1000 | BMCR_FDX, 93 .mm_anar = ANAR_CSMA, 94 .mm_gtcr = 0 }, 95 96 [MII_MEDIA_1000_T] = { .mm_bmcr = BMCR_S1000, 97 .mm_anar = ANAR_CSMA, 98 .mm_gtcr = GTCR_ADV_1000THDX }, 99 100 [MII_MEDIA_1000_T_FDX] = { .mm_bmcr = BMCR_S1000, 101 .mm_anar = ANAR_CSMA, 102 .mm_gtcr = GTCR_ADV_1000TFDX } 103 }; 104 105 void 106 mii_softc_init(struct mii_softc *mii, struct mii_attach_args *ma) 107 { 108 mii->mii_phy = ma->mii_phyno; 109 mii->mii_flags |= ma->mii_flags; 110 mii->mii_model = MII_MODEL(ma->mii_id2); 111 mii->mii_rev = MII_REV(ma->mii_id2); 112 113 if (mii->mii_reset == NULL) 114 mii->mii_reset = mii_phy_reset; 115 if (mii->mii_anegticks == 0) 116 mii->mii_anegticks = MII_ANEGTICKS; 117 } 118 119 int 120 mii_phy_auto(struct mii_softc *sc, int waitfor) 121 { 122 uint16_t anar; 123 124 /* 125 * Check for 1000BASE-X. Autonegotiation is a bit 126 * different on such devices. 127 */ 128 if (sc->mii_flags & MIIF_IS_1000X) { 129 anar = 0; 130 if (sc->mii_extcapabilities & EXTSR_1000XFDX) 131 anar |= ANAR_X_FD; 132 if (sc->mii_extcapabilities & EXTSR_1000XHDX) 133 anar |= ANAR_X_HD; 134 135 if (sc->mii_flags & MIIF_DOPAUSE) { 136 /* XXX Asymmetric vs. symmetric? */ 137 anar |= ANLPAR_X_PAUSE_TOWARDS; 138 } 139 PHY_WRITE(sc, MII_ANAR, anar); 140 } else { 141 anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | 142 ANAR_CSMA; 143 if (sc->mii_flags & MIIF_DOPAUSE) { 144 anar |= ANAR_FC; 145 /* XXX Only 1000BASE-T has PAUSE_ASYM? */ 146 if ((sc->mii_flags & MIIF_HAVE_GTCR) && 147 (sc->mii_extcapabilities & 148 (EXTSR_1000THDX|EXTSR_1000TFDX))) 149 anar |= ANAR_X_PAUSE_ASYM; 150 } 151 PHY_WRITE(sc, MII_ANAR, anar); 152 if (sc->mii_flags & MIIF_HAVE_GTCR) { 153 uint16_t gtcr = 0; 154 155 if (sc->mii_extcapabilities & EXTSR_1000TFDX) 156 gtcr |= GTCR_ADV_1000TFDX; 157 if (sc->mii_extcapabilities & EXTSR_1000THDX) 158 gtcr |= GTCR_ADV_1000THDX; 159 160 PHY_WRITE(sc, MII_100T2CR, gtcr); 161 } 162 } 163 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG); 164 165 if (waitfor) { 166 int i; 167 168 /* Wait 500ms for it to complete. */ 169 for (i = 0; i < 500; i++) { 170 if (PHY_READ(sc, MII_BMSR) & BMSR_ACOMP) 171 return (0); 172 DELAY(1000); 173 } 174 return (EIO); 175 } 176 return (EJUSTRETURN); 177 } 178 179 void 180 mii_phy_reset(struct mii_softc *sc) 181 { 182 int reg, i; 183 184 if (sc->mii_flags & MIIF_NOISOLATE) 185 reg = BMCR_RESET; 186 else 187 reg = BMCR_RESET | BMCR_ISO; 188 PHY_WRITE(sc, MII_BMCR, reg); 189 190 /* 191 * It is best to allow a little time for the reset to settle 192 * in before we start polling the BMCR again. Notably, the 193 * DP83840A manual states that there should be a 500us delay 194 * between asserting software reset and attempting MII serial 195 * operations. Also, a DP83815 can get into a bad state on 196 * cable removal and reinsertion if we do not delay here. 197 */ 198 DELAY(500); 199 200 /* Wait 100ms for it to complete. */ 201 for (i = 0; i < 100; i++) { 202 reg = PHY_READ(sc, MII_BMCR); 203 if ((reg & BMCR_RESET) == 0) 204 break; 205 DELAY(1000); 206 } 207 208 if (sc->mii_inst != 0 && ((sc->mii_flags & MIIF_NOISOLATE) == 0)) 209 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 210 } 211 212 /* 213 * Initialize generic PHY media based on BMSR, called when a PHY is 214 * attached. We expect to be set up to print a comma-separated list 215 * of media names. Does not print a newline. 216 */ 217 void 218 mii_phy_add_media(struct mii_softc *sc) 219 { 220 struct mii_data *mii = sc->mii_pdata; 221 const char *sep = ""; 222 int fdx = 0; 223 224 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 225 #define PRINT(s) kprintf("%s%s", sep, s); sep = ", " 226 227 if ((sc->mii_flags & MIIF_NOISOLATE) == 0) 228 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 229 MII_MEDIA_NONE); 230 231 /* 232 * There are different interpretations for the bits in 233 * HomePNA PHYs. And there is really only one media type 234 * that is supported. 235 */ 236 if (sc->mii_flags & MIIF_IS_HPNA) { 237 if (sc->mii_capabilities & BMSR_10THDX) { 238 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_HPNA_1, 0, 239 sc->mii_inst), 240 MII_MEDIA_10_T); 241 PRINT("HomePNA1"); 242 } 243 return; 244 } 245 246 if (sc->mii_capabilities & BMSR_10THDX) { 247 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst), 248 MII_MEDIA_10_T); 249 PRINT("10baseT"); 250 } 251 if (sc->mii_capabilities & BMSR_10TFDX) { 252 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst), 253 MII_MEDIA_10_T_FDX); 254 PRINT("10baseT-FDX"); 255 fdx = 1; 256 } 257 if (sc->mii_capabilities & BMSR_100TXHDX) { 258 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst), 259 MII_MEDIA_100_TX); 260 PRINT("100baseTX"); 261 } 262 if (sc->mii_capabilities & BMSR_100TXFDX) { 263 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst), 264 MII_MEDIA_100_TX_FDX); 265 PRINT("100baseTX-FDX"); 266 fdx = 1; 267 } 268 if (sc->mii_capabilities & BMSR_100T4) { 269 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_T4, 0, sc->mii_inst), 270 MII_MEDIA_100_T4); 271 PRINT("100baseT4"); 272 } 273 274 if (sc->mii_extcapabilities & EXTSR_MEDIAMASK) { 275 /* 276 * XXX Right now only handle 1000SX and 1000TX. Need 277 * XXX to handle 1000LX and 1000CX some how. 278 * 279 * Note since it can take 5 seconds to auto-negotiate 280 * a gigabit link, we make anegticks 10 seconds for 281 * all the gigabit media types. 282 */ 283 if (sc->mii_extcapabilities & EXTSR_1000XHDX) { 284 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 285 sc->mii_flags |= MIIF_IS_1000X; 286 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0, 287 sc->mii_inst), MII_MEDIA_1000_X); 288 PRINT("1000baseSX"); 289 } 290 if (sc->mii_extcapabilities & EXTSR_1000XFDX) { 291 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 292 sc->mii_flags |= MIIF_IS_1000X; 293 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX, 294 sc->mii_inst), MII_MEDIA_1000_X_FDX); 295 PRINT("1000baseSX-FDX"); 296 fdx = 1; 297 } 298 299 /* 300 * 1000baseT media needs to be able to manipulate 301 * master/slave mode. We set IFM_ETH_MASTER in 302 * the "don't care mask" and filter it out when 303 * the media is set. 304 * 305 * All 1000baseT PHYs have a 1000baseT control register. 306 */ 307 if (sc->mii_extcapabilities & EXTSR_1000THDX) { 308 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 309 sc->mii_flags |= MIIF_HAVE_GTCR; 310 mii->mii_media.ifm_mask |= IFM_ETH_MASTER; 311 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0, 312 sc->mii_inst), MII_MEDIA_1000_T); 313 PRINT("1000baseT"); 314 } 315 if (sc->mii_extcapabilities & EXTSR_1000TFDX) { 316 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 317 sc->mii_flags |= MIIF_HAVE_GTCR; 318 mii->mii_media.ifm_mask |= IFM_ETH_MASTER; 319 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX, 320 sc->mii_inst), MII_MEDIA_1000_T_FDX); 321 PRINT("1000baseT-FDX"); 322 fdx = 1; 323 } 324 } 325 326 if (sc->mii_capabilities & BMSR_ANEG) { 327 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 328 MII_NMEDIA); /* intentionally invalid index */ 329 PRINT("auto"); 330 } 331 #undef ADD 332 #undef PRINT 333 if (fdx != 0 && (sc->mii_flags & MIIF_DOPAUSE)) 334 mii->mii_media.ifm_mask |= IFM_ETH_FMASK; 335 } 336 337 void 338 mii_phy_set_media(struct mii_softc *sc) 339 { 340 struct mii_data *mii = sc->mii_pdata; 341 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 342 int bmcr, anar, gtcr; 343 344 if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) { 345 /* 346 * Force renegotiation if MIIF_DOPAUSE. 347 * 348 * XXX This is only necessary because many NICs don't 349 * XXX advertise PAUSE capabilities at boot time. Maybe 350 * XXX we should force this only once? 351 */ 352 if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0 || 353 (sc->mii_flags & (MIIF_FORCEANEG | MIIF_DOPAUSE))) 354 mii_phy_auto(sc, 1); 355 return; 356 } 357 358 /* 359 * Table index is stored in the media entry. 360 */ 361 362 KASSERT(ife->ifm_data >= 0 && ife->ifm_data < MII_NMEDIA, 363 ("bogus ife->ifm_data (%d)", ife->ifm_data)); 364 365 anar = mii_media_table[ife->ifm_data].mm_anar; 366 bmcr = mii_media_table[ife->ifm_data].mm_bmcr; 367 gtcr = mii_media_table[ife->ifm_data].mm_gtcr; 368 369 if (mii->mii_media.ifm_media & IFM_ETH_MASTER) { 370 switch (IFM_SUBTYPE(ife->ifm_media)) { 371 case IFM_1000_T: 372 gtcr |= GTCR_MAN_MS|GTCR_ADV_MS; 373 break; 374 375 default: 376 panic("mii_phy_setmedia: MASTER on wrong media"); 377 } 378 } 379 380 if (mii->mii_media.ifm_media & IFM_FLOW) { 381 if (sc->mii_flags & MIIF_IS_1000X) { 382 anar |= ANAR_X_PAUSE_SYM | ANAR_X_PAUSE_ASYM; 383 } else { 384 anar |= ANAR_FC; 385 /* XXX Only 1000BASE-T has PAUSE_ASYM? */ 386 if ((sc->mii_flags & MIIF_HAVE_GTCR) && 387 (sc->mii_extcapabilities & 388 (EXTSR_1000THDX | EXTSR_1000TFDX))) 389 anar |= ANAR_X_PAUSE_ASYM; 390 } 391 } 392 393 if (ife->ifm_media & IFM_LOOP) 394 bmcr |= BMCR_LOOP; 395 396 PHY_WRITE(sc, MII_ANAR, anar); 397 PHY_WRITE(sc, MII_BMCR, bmcr); 398 if (sc->mii_flags & MIIF_HAVE_GTCR) 399 PHY_WRITE(sc, MII_100T2CR, gtcr); 400 } 401 402 int 403 mii_phy_tick(struct mii_softc *sc) 404 { 405 struct mii_data *mii = sc->mii_pdata; 406 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 407 int reg; 408 409 /* Just bail now if the interface is down. */ 410 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 411 return (EJUSTRETURN); 412 413 /* 414 * If we're not doing autonegotiation, we don't need to do 415 * any extra work here. However, we need to check the link 416 * status so we can generate an announcement if the status 417 * changes. 418 */ 419 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 420 return (0); 421 422 /* Read the status register twice; BMSR_LINK is latch-low. */ 423 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 424 if (reg & BMSR_LINK) { 425 /* 426 * See above. 427 */ 428 429 /* Reset autonegotiation timer. */ 430 sc->mii_ticks = 0; 431 return (0); 432 } 433 434 /* 435 * Only retry autonegotiation every N seconds. 436 */ 437 KKASSERT(sc->mii_anegticks > 0); 438 if (++sc->mii_ticks <= sc->mii_anegticks) 439 return (EJUSTRETURN); 440 441 sc->mii_ticks = 0; 442 sc->mii_reset(sc); /* Reset PHY */ 443 mii_phy_auto(sc, 0); /* Ignore EJUSTRETURN */ 444 return (0); 445 } 446 447 static int 448 mii_phy_statusmsg(struct mii_softc *sc) 449 { 450 struct mii_data *mii = sc->mii_pdata; 451 struct ifnet *ifp = mii->mii_ifp; 452 int baudrate, link_state, announce = 0; 453 454 if (mii->mii_media_status & IFM_AVALID) { 455 if (mii->mii_media_status & IFM_ACTIVE) 456 link_state = LINK_STATE_UP; 457 else 458 link_state = LINK_STATE_DOWN; 459 } else 460 link_state = LINK_STATE_UNKNOWN; 461 462 baudrate = ifmedia_baudrate(mii->mii_media_active); 463 464 if (link_state != ifp->if_link_state) { 465 ifp->if_link_state = link_state; 466 /* 467 * XXX Right here we'd like to notify protocols 468 * XXX that the link status has changed, so that 469 * XXX e.g. Duplicate Address Detection can restart. 470 */ 471 announce = 1; 472 } 473 474 if (baudrate != ifp->if_baudrate) { 475 ifp->if_baudrate = baudrate; 476 announce = 1; 477 } 478 479 return (announce); 480 } 481 482 void 483 mii_phy_update(struct mii_softc *sc, int cmd) 484 { 485 struct mii_data *mii = sc->mii_pdata; 486 struct ifnet *ifp = mii->mii_ifp; 487 int announce; 488 489 if (sc->mii_media_active != mii->mii_media_active || 490 sc->mii_media_status != mii->mii_media_status || 491 cmd == MII_MEDIACHG) { 492 announce = mii_phy_statusmsg(sc); 493 MIIBUS_STATCHG(sc->mii_dev); 494 sc->mii_media_active = mii->mii_media_active; 495 sc->mii_media_status = mii->mii_media_status; 496 497 if (announce) { 498 crit_enter(); 499 if_link_state_change(ifp); 500 crit_exit(); 501 } 502 } 503 } 504 505 /* 506 * Return the flow control status flag from MII_ANAR & MII_ANLPAR. 507 */ 508 int 509 mii_phy_flowstatus(struct mii_softc *sc) 510 { 511 int anar, anlpar; 512 513 if ((sc->mii_flags & MIIF_DOPAUSE) == 0) 514 return (0); 515 516 anar = PHY_READ(sc, MII_ANAR); 517 anlpar = PHY_READ(sc, MII_ANLPAR); 518 519 if ((anar & ANAR_X_PAUSE_SYM) & (anlpar & ANLPAR_X_PAUSE_SYM)) 520 return (IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE); 521 522 if ((anar & ANAR_X_PAUSE_SYM) == 0) { 523 if ((anar & ANAR_X_PAUSE_ASYM) && 524 ((anlpar & ANLPAR_X_PAUSE_TOWARDS) == 525 ANLPAR_X_PAUSE_TOWARDS)) 526 return (IFM_FLOW | IFM_ETH_TXPAUSE); 527 else 528 return (0); 529 } 530 531 if ((anar & ANAR_X_PAUSE_ASYM) == 0) { 532 if (anlpar & ANLPAR_X_PAUSE_SYM) 533 return (IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE); 534 else 535 return (0); 536 } 537 538 switch (anlpar & ANLPAR_X_PAUSE_TOWARDS) { 539 case ANLPAR_X_PAUSE_NONE: 540 return (0); 541 542 case ANLPAR_X_PAUSE_ASYM: 543 return (IFM_FLOW | IFM_ETH_RXPAUSE); 544 545 default: 546 return (IFM_FLOW | IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE); 547 } 548 /* NOTREACHED */ 549 } 550 551 const struct mii_phydesc * 552 mii_phy_match(const struct mii_attach_args *ma, const struct mii_phydesc *mpd) 553 { 554 for (; mpd->mpd_name != NULL; mpd++) { 555 if (MII_OUI(ma->mii_id1, ma->mii_id2) == mpd->mpd_oui && 556 MII_MODEL(ma->mii_id2) == mpd->mpd_model) 557 return (mpd); 558 } 559 return (NULL); 560 } 561