1 /* $FreeBSD: head/sys/dev/ral/rt2661.c 195618 2009-07-11 15:02:45Z rpaulo $ */ 2 3 /*- 4 * Copyright (c) 2006 5 * Damien Bergamini <damien.bergamini@free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 * 19 * $FreeBSD: head/sys/dev/ral/rt2661.c 195618 2009-07-11 15:02:45Z rpaulo $ 20 */ 21 22 /*- 23 * Ralink Technology RT2561, RT2561S and RT2661 chipset driver 24 * http://www.ralinktech.com/ 25 */ 26 27 #include <sys/param.h> 28 #include <sys/sysctl.h> 29 #include <sys/sockio.h> 30 #include <sys/mbuf.h> 31 #include <sys/kernel.h> 32 #include <sys/socket.h> 33 #include <sys/systm.h> 34 #include <sys/malloc.h> 35 #include <sys/lock.h> 36 #include <sys/mutex.h> 37 #include <sys/module.h> 38 #include <sys/bus.h> 39 #include <sys/endian.h> 40 #include <sys/firmware.h> 41 #include <sys/rman.h> 42 43 #include <net/bpf.h> 44 #include <net/if.h> 45 #include <net/if_arp.h> 46 #include <net/ethernet.h> 47 #include <net/if_dl.h> 48 #include <net/if_media.h> 49 #include <net/if_types.h> 50 #include <net/ifq_var.h> 51 52 #include <netproto/802_11/ieee80211_var.h> 53 #include <netproto/802_11/ieee80211_radiotap.h> 54 #include <netproto/802_11/ieee80211_regdomain.h> 55 #include <netproto/802_11/ieee80211_ratectl.h> 56 57 #include <netinet/in.h> 58 #include <netinet/in_systm.h> 59 #include <netinet/in_var.h> 60 #include <netinet/ip.h> 61 #include <netinet/if_ether.h> 62 63 #include <dev/netif/ral/rt2661reg.h> 64 #include <dev/netif/ral/rt2661var.h> 65 66 #define RAL_DEBUG 67 #ifdef RAL_DEBUG 68 #define DPRINTF(sc, fmt, ...) do { \ 69 if (sc->sc_debug > 0) \ 70 kprintf(fmt, __VA_ARGS__); \ 71 } while (0) 72 #define DPRINTFN(sc, n, fmt, ...) do { \ 73 if (sc->sc_debug >= (n)) \ 74 kprintf(fmt, __VA_ARGS__); \ 75 } while (0) 76 #else 77 #define DPRINTF(sc, fmt, ...) 78 #define DPRINTFN(sc, n, fmt, ...) 79 #endif 80 81 static struct ieee80211vap *rt2661_vap_create(struct ieee80211com *, 82 const char name[IFNAMSIZ], int unit, 83 enum ieee80211_opmode opmode, 84 int flags, const uint8_t bssid[IEEE80211_ADDR_LEN], 85 const uint8_t mac[IEEE80211_ADDR_LEN]); 86 static void rt2661_vap_delete(struct ieee80211vap *); 87 static void rt2661_dma_map_addr(void *, bus_dma_segment_t *, int, 88 int); 89 static int rt2661_alloc_tx_ring(struct rt2661_softc *, 90 struct rt2661_tx_ring *, int); 91 static void rt2661_reset_tx_ring(struct rt2661_softc *, 92 struct rt2661_tx_ring *); 93 static void rt2661_free_tx_ring(struct rt2661_softc *, 94 struct rt2661_tx_ring *); 95 static int rt2661_alloc_rx_ring(struct rt2661_softc *, 96 struct rt2661_rx_ring *, int); 97 static void rt2661_reset_rx_ring(struct rt2661_softc *, 98 struct rt2661_rx_ring *); 99 static void rt2661_free_rx_ring(struct rt2661_softc *, 100 struct rt2661_rx_ring *); 101 static int rt2661_newstate(struct ieee80211vap *, 102 enum ieee80211_state, int); 103 static uint16_t rt2661_eeprom_read(struct rt2661_softc *, uint8_t); 104 static void rt2661_rx_intr(struct rt2661_softc *); 105 static void rt2661_tx_intr(struct rt2661_softc *); 106 static void rt2661_tx_dma_intr(struct rt2661_softc *, 107 struct rt2661_tx_ring *); 108 static void rt2661_mcu_beacon_expire(struct rt2661_softc *); 109 static void rt2661_mcu_wakeup(struct rt2661_softc *); 110 static void rt2661_mcu_cmd_intr(struct rt2661_softc *); 111 static void rt2661_scan_start(struct ieee80211com *); 112 static void rt2661_scan_end(struct ieee80211com *); 113 static void rt2661_set_channel(struct ieee80211com *); 114 static void rt2661_setup_tx_desc(struct rt2661_softc *, 115 struct rt2661_tx_desc *, uint32_t, uint16_t, int, 116 int, const bus_dma_segment_t *, int, int); 117 static int rt2661_tx_data(struct rt2661_softc *, struct mbuf *, 118 struct ieee80211_node *, int); 119 static int rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *, 120 struct ieee80211_node *); 121 static void rt2661_start_locked(struct ifnet *); 122 static void rt2661_start(struct ifnet *, struct ifaltq_subque *); 123 static int rt2661_raw_xmit(struct ieee80211_node *, struct mbuf *, 124 const struct ieee80211_bpf_params *); 125 static void rt2661_watchdog_callout(void *); 126 static int rt2661_ioctl(struct ifnet *, u_long, caddr_t, 127 struct ucred *); 128 static void rt2661_bbp_write(struct rt2661_softc *, uint8_t, 129 uint8_t); 130 static uint8_t rt2661_bbp_read(struct rt2661_softc *, uint8_t); 131 static void rt2661_rf_write(struct rt2661_softc *, uint8_t, 132 uint32_t); 133 static int rt2661_tx_cmd(struct rt2661_softc *, uint8_t, 134 uint16_t); 135 static void rt2661_select_antenna(struct rt2661_softc *); 136 static void rt2661_enable_mrr(struct rt2661_softc *); 137 static void rt2661_set_txpreamble(struct rt2661_softc *); 138 static void rt2661_set_basicrates(struct rt2661_softc *, 139 const struct ieee80211_rateset *); 140 static void rt2661_select_band(struct rt2661_softc *, 141 struct ieee80211_channel *); 142 static void rt2661_set_chan(struct rt2661_softc *, 143 struct ieee80211_channel *); 144 static void rt2661_set_bssid(struct rt2661_softc *, 145 const uint8_t *); 146 static void rt2661_set_macaddr(struct rt2661_softc *, 147 const uint8_t *); 148 static void rt2661_update_promisc(struct ieee80211com *); 149 static int rt2661_wme_update(struct ieee80211com *) __unused; 150 static void rt2661_update_slot(struct ieee80211com *); 151 static const char *rt2661_get_rf(int); 152 static void rt2661_read_eeprom(struct rt2661_softc *, 153 uint8_t macaddr[IEEE80211_ADDR_LEN]); 154 static int rt2661_bbp_init(struct rt2661_softc *); 155 static void rt2661_init_locked(struct rt2661_softc *); 156 static void rt2661_init(void *); 157 static void rt2661_stop_locked(struct rt2661_softc *); 158 static void rt2661_stop(void *); 159 static int rt2661_load_microcode(struct rt2661_softc *); 160 #ifdef notyet 161 static void rt2661_rx_tune(struct rt2661_softc *); 162 static void rt2661_radar_start(struct rt2661_softc *); 163 static int rt2661_radar_stop(struct rt2661_softc *); 164 #endif 165 static int rt2661_prepare_beacon(struct rt2661_softc *, 166 struct ieee80211vap *); 167 static void rt2661_enable_tsf_sync(struct rt2661_softc *); 168 static void rt2661_enable_tsf(struct rt2661_softc *); 169 static int rt2661_get_rssi(struct rt2661_softc *, uint8_t); 170 171 static const struct { 172 uint32_t reg; 173 uint32_t val; 174 } rt2661_def_mac[] = { 175 RT2661_DEF_MAC 176 }; 177 178 static const struct { 179 uint8_t reg; 180 uint8_t val; 181 } rt2661_def_bbp[] = { 182 RT2661_DEF_BBP 183 }; 184 185 static const struct rfprog { 186 uint8_t chan; 187 uint32_t r1, r2, r3, r4; 188 } rt2661_rf5225_1[] = { 189 RT2661_RF5225_1 190 }, rt2661_rf5225_2[] = { 191 RT2661_RF5225_2 192 }; 193 194 int 195 rt2661_attach(device_t dev, int id) 196 { 197 struct rt2661_softc *sc = device_get_softc(dev); 198 struct ieee80211com *ic; 199 struct ifnet *ifp; 200 uint32_t val; 201 int error, ac, ntries; 202 uint8_t bands; 203 uint8_t macaddr[IEEE80211_ADDR_LEN]; 204 struct sysctl_ctx_list *ctx; 205 struct sysctl_oid *tree; 206 207 sc->sc_id = id; 208 sc->sc_dev = dev; 209 210 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 211 if (ifp == NULL) { 212 device_printf(sc->sc_dev, "can not if_alloc()\n"); 213 return ENOMEM; 214 } 215 ic = ifp->if_l2com; 216 217 callout_init(&sc->watchdog_ch); 218 219 /* wait for NIC to initialize */ 220 for (ntries = 0; ntries < 1000; ntries++) { 221 if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0) 222 break; 223 DELAY(1000); 224 } 225 if (ntries == 1000) { 226 device_printf(sc->sc_dev, 227 "timeout waiting for NIC to initialize\n"); 228 error = EIO; 229 goto fail1; 230 } 231 232 /* retrieve RF rev. no and various other things from EEPROM */ 233 rt2661_read_eeprom(sc, macaddr); 234 235 device_printf(dev, "MAC/BBP RT%X, RF %s\n", val, 236 rt2661_get_rf(sc->rf_rev)); 237 238 /* 239 * Allocate Tx and Rx rings. 240 */ 241 for (ac = 0; ac < 4; ac++) { 242 error = rt2661_alloc_tx_ring(sc, &sc->txq[ac], 243 RT2661_TX_RING_COUNT); 244 if (error != 0) { 245 device_printf(sc->sc_dev, 246 "could not allocate Tx ring %d\n", ac); 247 goto fail2; 248 } 249 } 250 251 error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT); 252 if (error != 0) { 253 device_printf(sc->sc_dev, "could not allocate Mgt ring\n"); 254 goto fail2; 255 } 256 257 error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT); 258 if (error != 0) { 259 device_printf(sc->sc_dev, "could not allocate Rx ring\n"); 260 goto fail3; 261 } 262 263 ifp->if_softc = sc; 264 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 265 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 266 ifp->if_init = rt2661_init; 267 ifp->if_ioctl = rt2661_ioctl; 268 ifp->if_start = rt2661_start; 269 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN); 270 #ifdef notyet 271 ifq_set_ready(&ifp->if_snd); 272 #endif 273 274 ic->ic_ifp = ifp; 275 ic->ic_softc = sc; 276 ic->ic_name = device_get_nameunit(dev); 277 ic->ic_opmode = IEEE80211_M_STA; 278 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 279 280 /* set device capabilities */ 281 ic->ic_caps = 282 IEEE80211_C_STA /* station mode */ 283 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */ 284 | IEEE80211_C_HOSTAP /* hostap mode */ 285 | IEEE80211_C_MONITOR /* monitor mode */ 286 | IEEE80211_C_AHDEMO /* adhoc demo mode */ 287 | IEEE80211_C_WDS /* 4-address traffic works */ 288 | IEEE80211_C_MBSS /* mesh point link mode */ 289 | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 290 | IEEE80211_C_SHSLOT /* short slot time supported */ 291 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 292 | IEEE80211_C_BGSCAN /* capable of bg scanning */ 293 #ifdef notyet 294 | IEEE80211_C_TXFRAG /* handle tx frags */ 295 | IEEE80211_C_WME /* 802.11e */ 296 #endif 297 ; 298 299 bands = 0; 300 setbit(&bands, IEEE80211_MODE_11B); 301 setbit(&bands, IEEE80211_MODE_11G); 302 if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325) 303 setbit(&bands, IEEE80211_MODE_11A); 304 ieee80211_init_channels(ic, NULL, &bands); 305 306 ieee80211_ifattach(ic, macaddr); 307 #if 0 308 ic->ic_wme.wme_update = rt2661_wme_update; 309 #endif 310 ic->ic_scan_start = rt2661_scan_start; 311 ic->ic_scan_end = rt2661_scan_end; 312 ic->ic_set_channel = rt2661_set_channel; 313 ic->ic_updateslot = rt2661_update_slot; 314 ic->ic_update_promisc = rt2661_update_promisc; 315 ic->ic_raw_xmit = rt2661_raw_xmit; 316 317 ic->ic_vap_create = rt2661_vap_create; 318 ic->ic_vap_delete = rt2661_vap_delete; 319 320 ieee80211_radiotap_attach(ic, 321 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 322 RT2661_TX_RADIOTAP_PRESENT, 323 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 324 RT2661_RX_RADIOTAP_PRESENT); 325 326 ctx = device_get_sysctl_ctx(sc->sc_dev); 327 tree = device_get_sysctl_tree(sc->sc_dev); 328 #ifdef RAL_DEBUG 329 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 330 "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs"); 331 #endif 332 if (bootverbose) 333 ieee80211_announce(ic); 334 335 return 0; 336 337 fail3: rt2661_free_tx_ring(sc, &sc->mgtq); 338 fail2: while (--ac >= 0) 339 rt2661_free_tx_ring(sc, &sc->txq[ac]); 340 fail1: 341 if_free(ifp); 342 return error; 343 } 344 345 int 346 rt2661_detach(void *xsc) 347 { 348 struct rt2661_softc *sc = xsc; 349 struct ifnet *ifp = sc->sc_ifp; 350 struct ieee80211com *ic = ifp->if_l2com; 351 352 rt2661_stop_locked(sc); 353 354 ieee80211_ifdetach(ic); 355 356 rt2661_free_tx_ring(sc, &sc->txq[0]); 357 rt2661_free_tx_ring(sc, &sc->txq[1]); 358 rt2661_free_tx_ring(sc, &sc->txq[2]); 359 rt2661_free_tx_ring(sc, &sc->txq[3]); 360 rt2661_free_tx_ring(sc, &sc->mgtq); 361 rt2661_free_rx_ring(sc, &sc->rxq); 362 363 if_free(ifp); 364 365 return 0; 366 } 367 368 static struct ieee80211vap * 369 rt2661_vap_create(struct ieee80211com *ic, 370 const char name[IFNAMSIZ], int unit, 371 enum ieee80211_opmode opmode, int flags, 372 const uint8_t bssid[IEEE80211_ADDR_LEN], 373 const uint8_t mac[IEEE80211_ADDR_LEN]) 374 { 375 struct ifnet *ifp = ic->ic_ifp; 376 struct rt2661_vap *rvp; 377 struct ieee80211vap *vap; 378 379 switch (opmode) { 380 case IEEE80211_M_STA: 381 case IEEE80211_M_IBSS: 382 case IEEE80211_M_AHDEMO: 383 case IEEE80211_M_MONITOR: 384 case IEEE80211_M_HOSTAP: 385 case IEEE80211_M_MBSS: 386 /* XXXRP: TBD */ 387 if (!TAILQ_EMPTY(&ic->ic_vaps)) { 388 if_printf(ifp, "only 1 vap supported\n"); 389 return NULL; 390 } 391 if (opmode == IEEE80211_M_STA) 392 flags |= IEEE80211_CLONE_NOBEACONS; 393 break; 394 case IEEE80211_M_WDS: 395 if (TAILQ_EMPTY(&ic->ic_vaps) || 396 ic->ic_opmode != IEEE80211_M_HOSTAP) { 397 if_printf(ifp, "wds only supported in ap mode\n"); 398 return NULL; 399 } 400 /* 401 * Silently remove any request for a unique 402 * bssid; WDS vap's always share the local 403 * mac address. 404 */ 405 flags &= ~IEEE80211_CLONE_BSSID; 406 break; 407 default: 408 if_printf(ifp, "unknown opmode %d\n", opmode); 409 return NULL; 410 } 411 rvp = (struct rt2661_vap *) kmalloc(sizeof(struct rt2661_vap), 412 M_80211_VAP, M_INTWAIT | M_ZERO); 413 if (rvp == NULL) 414 return NULL; 415 vap = &rvp->ral_vap; 416 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac); 417 418 /* override state transition machine */ 419 rvp->ral_newstate = vap->iv_newstate; 420 vap->iv_newstate = rt2661_newstate; 421 #if 0 422 vap->iv_update_beacon = rt2661_beacon_update; 423 #endif 424 425 ieee80211_ratectl_init(vap); 426 /* complete setup */ 427 ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status); 428 if (TAILQ_FIRST(&ic->ic_vaps) == vap) 429 ic->ic_opmode = opmode; 430 return vap; 431 } 432 433 static void 434 rt2661_vap_delete(struct ieee80211vap *vap) 435 { 436 struct rt2661_vap *rvp = RT2661_VAP(vap); 437 438 ieee80211_ratectl_deinit(vap); 439 ieee80211_vap_detach(vap); 440 kfree(rvp, M_80211_VAP); 441 } 442 443 void 444 rt2661_shutdown(void *xsc) 445 { 446 struct rt2661_softc *sc = xsc; 447 448 rt2661_stop(sc); 449 } 450 451 void 452 rt2661_suspend(void *xsc) 453 { 454 struct rt2661_softc *sc = xsc; 455 456 rt2661_stop(sc); 457 } 458 459 void 460 rt2661_resume(void *xsc) 461 { 462 struct rt2661_softc *sc = xsc; 463 struct ifnet *ifp = sc->sc_ifp; 464 465 if (ifp->if_flags & IFF_UP) 466 rt2661_init(sc); 467 } 468 469 static void 470 rt2661_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) 471 { 472 if (error != 0) 473 return; 474 475 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg)); 476 477 *(bus_addr_t *)arg = segs[0].ds_addr; 478 } 479 480 static int 481 rt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring, 482 int count) 483 { 484 int i, error; 485 486 ring->count = count; 487 ring->queued = 0; 488 ring->cur = ring->next = ring->stat = 0; 489 490 error = bus_dma_tag_create(ring->desc_dmat, 4, 0, 491 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 492 count * RT2661_TX_DESC_SIZE, 1, count * RT2661_TX_DESC_SIZE, 493 0, &ring->desc_dmat); 494 if (error != 0) { 495 device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 496 goto fail; 497 } 498 499 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 500 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 501 if (error != 0) { 502 device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 503 goto fail; 504 } 505 506 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 507 count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr, 508 0); 509 if (error != 0) { 510 device_printf(sc->sc_dev, "could not load desc DMA map\n"); 511 goto fail; 512 } 513 514 ring->data = kmalloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF, 515 M_INTWAIT | M_ZERO); 516 if (ring->data == NULL) { 517 device_printf(sc->sc_dev, "could not allocate soft data\n"); 518 error = ENOMEM; 519 goto fail; 520 } 521 522 error = bus_dma_tag_create(ring->data_dmat, 1, 0, 523 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 524 RT2661_MAX_SCATTER, MCLBYTES, 0, &ring->data_dmat); 525 if (error != 0) { 526 device_printf(sc->sc_dev, "could not create data DMA tag\n"); 527 goto fail; 528 } 529 530 for (i = 0; i < count; i++) { 531 error = bus_dmamap_create(ring->data_dmat, 0, 532 &ring->data[i].map); 533 if (error != 0) { 534 device_printf(sc->sc_dev, "could not create DMA map\n"); 535 goto fail; 536 } 537 } 538 539 return 0; 540 541 fail: rt2661_free_tx_ring(sc, ring); 542 return error; 543 } 544 545 static void 546 rt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring) 547 { 548 struct rt2661_tx_desc *desc; 549 struct rt2661_tx_data *data; 550 int i; 551 552 for (i = 0; i < ring->count; i++) { 553 desc = &ring->desc[i]; 554 data = &ring->data[i]; 555 556 if (data->m != NULL) { 557 bus_dmamap_sync(ring->data_dmat, data->map, 558 BUS_DMASYNC_POSTWRITE); 559 bus_dmamap_unload(ring->data_dmat, data->map); 560 m_freem(data->m); 561 data->m = NULL; 562 } 563 564 if (data->ni != NULL) { 565 ieee80211_free_node(data->ni); 566 data->ni = NULL; 567 } 568 569 desc->flags = 0; 570 } 571 572 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 573 574 ring->queued = 0; 575 ring->cur = ring->next = ring->stat = 0; 576 } 577 578 static void 579 rt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring) 580 { 581 struct rt2661_tx_data *data; 582 int i; 583 584 if (ring->desc != NULL) { 585 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 586 BUS_DMASYNC_POSTWRITE); 587 bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 588 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 589 } 590 591 if (ring->desc_dmat != NULL) 592 bus_dma_tag_destroy(ring->desc_dmat); 593 594 if (ring->data != NULL) { 595 for (i = 0; i < ring->count; i++) { 596 data = &ring->data[i]; 597 598 if (data->m != NULL) { 599 bus_dmamap_sync(ring->data_dmat, data->map, 600 BUS_DMASYNC_POSTWRITE); 601 bus_dmamap_unload(ring->data_dmat, data->map); 602 m_freem(data->m); 603 } 604 605 if (data->ni != NULL) 606 ieee80211_free_node(data->ni); 607 608 if (data->map != NULL) 609 bus_dmamap_destroy(ring->data_dmat, data->map); 610 } 611 612 kfree(ring->data, M_DEVBUF); 613 } 614 615 if (ring->data_dmat != NULL) 616 bus_dma_tag_destroy(ring->data_dmat); 617 } 618 619 static int 620 rt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring, 621 int count) 622 { 623 struct rt2661_rx_desc *desc; 624 struct rt2661_rx_data *data; 625 bus_addr_t physaddr; 626 int i, error; 627 628 ring->count = count; 629 ring->cur = ring->next = 0; 630 631 error = bus_dma_tag_create(ring->desc_dmat, 4, 0, 632 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 633 count * RT2661_RX_DESC_SIZE, 1, count * RT2661_RX_DESC_SIZE, 634 0, &ring->desc_dmat); 635 if (error != 0) { 636 device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 637 goto fail; 638 } 639 640 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 641 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 642 if (error != 0) { 643 device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 644 goto fail; 645 } 646 647 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 648 count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr, 649 0); 650 if (error != 0) { 651 device_printf(sc->sc_dev, "could not load desc DMA map\n"); 652 goto fail; 653 } 654 655 ring->data = kmalloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF, 656 M_INTWAIT | M_ZERO); 657 if (ring->data == NULL) { 658 device_printf(sc->sc_dev, "could not allocate soft data\n"); 659 error = ENOMEM; 660 goto fail; 661 } 662 663 /* 664 * Pre-allocate Rx buffers and populate Rx ring. 665 */ 666 error = bus_dma_tag_create(ring->data_dmat, 1, 0, 667 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 668 1, MCLBYTES, 0, &ring->data_dmat); 669 if (error != 0) { 670 device_printf(sc->sc_dev, "could not create data DMA tag\n"); 671 goto fail; 672 } 673 674 for (i = 0; i < count; i++) { 675 desc = &sc->rxq.desc[i]; 676 data = &sc->rxq.data[i]; 677 678 error = bus_dmamap_create(ring->data_dmat, 0, &data->map); 679 if (error != 0) { 680 device_printf(sc->sc_dev, "could not create DMA map\n"); 681 goto fail; 682 } 683 684 data->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 685 if (data->m == NULL) { 686 device_printf(sc->sc_dev, 687 "could not allocate rx mbuf\n"); 688 error = ENOMEM; 689 goto fail; 690 } 691 692 error = bus_dmamap_load(ring->data_dmat, data->map, 693 mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr, 694 &physaddr, 0); 695 if (error != 0) { 696 device_printf(sc->sc_dev, 697 "could not load rx buf DMA map"); 698 goto fail; 699 } 700 701 desc->flags = htole32(RT2661_RX_BUSY); 702 desc->physaddr = htole32(physaddr); 703 } 704 705 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 706 707 return 0; 708 709 fail: rt2661_free_rx_ring(sc, ring); 710 return error; 711 } 712 713 static void 714 rt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring) 715 { 716 int i; 717 718 for (i = 0; i < ring->count; i++) 719 ring->desc[i].flags = htole32(RT2661_RX_BUSY); 720 721 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 722 723 ring->cur = ring->next = 0; 724 } 725 726 static void 727 rt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring) 728 { 729 struct rt2661_rx_data *data; 730 int i; 731 732 if (ring->desc != NULL) { 733 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 734 BUS_DMASYNC_POSTWRITE); 735 bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 736 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 737 } 738 739 if (ring->desc_dmat != NULL) 740 bus_dma_tag_destroy(ring->desc_dmat); 741 742 if (ring->data != NULL) { 743 for (i = 0; i < ring->count; i++) { 744 data = &ring->data[i]; 745 746 if (data->m != NULL) { 747 bus_dmamap_sync(ring->data_dmat, data->map, 748 BUS_DMASYNC_POSTREAD); 749 bus_dmamap_unload(ring->data_dmat, data->map); 750 m_freem(data->m); 751 } 752 753 if (data->map != NULL) 754 bus_dmamap_destroy(ring->data_dmat, data->map); 755 } 756 757 kfree(ring->data, M_DEVBUF); 758 } 759 760 if (ring->data_dmat != NULL) 761 bus_dma_tag_destroy(ring->data_dmat); 762 } 763 764 static int 765 rt2661_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 766 { 767 struct rt2661_vap *rvp = RT2661_VAP(vap); 768 struct ieee80211com *ic = vap->iv_ic; 769 struct rt2661_softc *sc = ic->ic_softc; 770 int error; 771 772 if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) { 773 uint32_t tmp; 774 775 /* abort TSF synchronization */ 776 tmp = RAL_READ(sc, RT2661_TXRX_CSR9); 777 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff); 778 } 779 780 error = rvp->ral_newstate(vap, nstate, arg); 781 782 if (error == 0 && nstate == IEEE80211_S_RUN) { 783 struct ieee80211_node *ni = vap->iv_bss; 784 785 if (vap->iv_opmode != IEEE80211_M_MONITOR) { 786 rt2661_enable_mrr(sc); 787 rt2661_set_txpreamble(sc); 788 rt2661_set_basicrates(sc, &ni->ni_rates); 789 rt2661_set_bssid(sc, ni->ni_bssid); 790 } 791 792 if (vap->iv_opmode == IEEE80211_M_HOSTAP || 793 vap->iv_opmode == IEEE80211_M_IBSS || 794 vap->iv_opmode == IEEE80211_M_MBSS) { 795 error = rt2661_prepare_beacon(sc, vap); 796 if (error != 0) 797 return error; 798 } 799 if (vap->iv_opmode != IEEE80211_M_MONITOR) 800 rt2661_enable_tsf_sync(sc); 801 else 802 rt2661_enable_tsf(sc); 803 } 804 return error; 805 } 806 807 /* 808 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 809 * 93C66). 810 */ 811 static uint16_t 812 rt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr) 813 { 814 uint32_t tmp; 815 uint16_t val; 816 int n; 817 818 /* clock C once before the first command */ 819 RT2661_EEPROM_CTL(sc, 0); 820 821 RT2661_EEPROM_CTL(sc, RT2661_S); 822 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 823 RT2661_EEPROM_CTL(sc, RT2661_S); 824 825 /* write start bit (1) */ 826 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D); 827 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C); 828 829 /* write READ opcode (10) */ 830 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D); 831 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C); 832 RT2661_EEPROM_CTL(sc, RT2661_S); 833 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 834 835 /* write address (A5-A0 or A7-A0) */ 836 n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7; 837 for (; n >= 0; n--) { 838 RT2661_EEPROM_CTL(sc, RT2661_S | 839 (((addr >> n) & 1) << RT2661_SHIFT_D)); 840 RT2661_EEPROM_CTL(sc, RT2661_S | 841 (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C); 842 } 843 844 RT2661_EEPROM_CTL(sc, RT2661_S); 845 846 /* read data Q15-Q0 */ 847 val = 0; 848 for (n = 15; n >= 0; n--) { 849 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 850 tmp = RAL_READ(sc, RT2661_E2PROM_CSR); 851 val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n; 852 RT2661_EEPROM_CTL(sc, RT2661_S); 853 } 854 855 RT2661_EEPROM_CTL(sc, 0); 856 857 /* clear Chip Select and clock C */ 858 RT2661_EEPROM_CTL(sc, RT2661_S); 859 RT2661_EEPROM_CTL(sc, 0); 860 RT2661_EEPROM_CTL(sc, RT2661_C); 861 862 return val; 863 } 864 865 static void 866 rt2661_tx_intr(struct rt2661_softc *sc) 867 { 868 struct ifnet *ifp = sc->sc_ifp; 869 struct rt2661_tx_ring *txq; 870 struct rt2661_tx_data *data; 871 uint32_t val; 872 int qid, retrycnt; 873 struct ieee80211vap *vap; 874 875 for (;;) { 876 struct ieee80211_node *ni; 877 struct mbuf *m; 878 879 val = RAL_READ(sc, RT2661_STA_CSR4); 880 if (!(val & RT2661_TX_STAT_VALID)) 881 break; 882 883 /* retrieve the queue in which this frame was sent */ 884 qid = RT2661_TX_QID(val); 885 txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq; 886 887 /* retrieve rate control algorithm context */ 888 data = &txq->data[txq->stat]; 889 m = data->m; 890 data->m = NULL; 891 892 ni = data->ni; 893 data->ni = NULL; 894 895 /* if no frame has been sent, ignore */ 896 if (ni == NULL) 897 continue; 898 899 vap = ni->ni_vap; 900 901 switch (RT2661_TX_RESULT(val)) { 902 case RT2661_TX_SUCCESS: 903 retrycnt = RT2661_TX_RETRYCNT(val); 904 905 DPRINTFN(sc, 10, "data frame sent successfully after " 906 "%d retries\n", retrycnt); 907 if (data->rix != IEEE80211_FIXED_RATE_NONE) 908 ieee80211_ratectl_tx_complete(vap, ni, 909 IEEE80211_RATECTL_TX_SUCCESS, 910 &retrycnt, NULL); 911 IFNET_STAT_INC(ifp, opackets, 1); 912 break; 913 914 case RT2661_TX_RETRY_FAIL: 915 retrycnt = RT2661_TX_RETRYCNT(val); 916 917 DPRINTFN(sc, 9, "%s\n", 918 "sending data frame failed (too much retries)"); 919 if (data->rix != IEEE80211_FIXED_RATE_NONE) 920 ieee80211_ratectl_tx_complete(vap, ni, 921 IEEE80211_RATECTL_TX_FAILURE, 922 &retrycnt, NULL); 923 IFNET_STAT_INC(ifp, oerrors, 1); 924 break; 925 926 default: 927 /* other failure */ 928 device_printf(sc->sc_dev, 929 "sending data frame failed 0x%08x\n", val); 930 IFNET_STAT_INC(ifp, oerrors, 1); 931 } 932 933 DPRINTFN(sc, 15, "tx done q=%d idx=%u\n", qid, txq->stat); 934 935 txq->queued--; 936 if (++txq->stat >= txq->count) /* faster than % count */ 937 txq->stat = 0; 938 939 if (m->m_flags & M_TXCB) 940 ieee80211_process_callback(ni, m, 941 RT2661_TX_RESULT(val) != RT2661_TX_SUCCESS); 942 m_freem(m); 943 ieee80211_free_node(ni); 944 } 945 946 sc->sc_tx_timer = 0; 947 ifq_clr_oactive(&ifp->if_snd); 948 949 rt2661_start_locked(ifp); 950 } 951 952 static void 953 rt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq) 954 { 955 struct rt2661_tx_desc *desc; 956 struct rt2661_tx_data *data; 957 958 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD); 959 960 for (;;) { 961 desc = &txq->desc[txq->next]; 962 data = &txq->data[txq->next]; 963 964 if ((le32toh(desc->flags) & RT2661_TX_BUSY) || 965 !(le32toh(desc->flags) & RT2661_TX_VALID)) 966 break; 967 968 bus_dmamap_sync(txq->data_dmat, data->map, 969 BUS_DMASYNC_POSTWRITE); 970 bus_dmamap_unload(txq->data_dmat, data->map); 971 972 /* descriptor is no longer valid */ 973 desc->flags &= ~htole32(RT2661_TX_VALID); 974 975 DPRINTFN(sc, 15, "tx dma done q=%p idx=%u\n", txq, txq->next); 976 977 if (++txq->next >= txq->count) /* faster than % count */ 978 txq->next = 0; 979 } 980 981 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 982 } 983 984 static void 985 rt2661_rx_intr(struct rt2661_softc *sc) 986 { 987 struct ifnet *ifp = sc->sc_ifp; 988 struct ieee80211com *ic = ifp->if_l2com; 989 struct rt2661_rx_desc *desc; 990 struct rt2661_rx_data *data; 991 bus_addr_t physaddr; 992 struct ieee80211_frame *wh; 993 struct ieee80211_node *ni; 994 struct mbuf *mnew, *m; 995 int error; 996 997 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 998 BUS_DMASYNC_POSTREAD); 999 1000 for (;;) { 1001 int8_t rssi, nf; 1002 1003 desc = &sc->rxq.desc[sc->rxq.cur]; 1004 data = &sc->rxq.data[sc->rxq.cur]; 1005 1006 if (le32toh(desc->flags) & RT2661_RX_BUSY) 1007 break; 1008 1009 if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) || 1010 (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) { 1011 /* 1012 * This should not happen since we did not request 1013 * to receive those frames when we filled TXRX_CSR0. 1014 */ 1015 DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n", 1016 le32toh(desc->flags)); 1017 IFNET_STAT_INC(ifp, ierrors, 1); 1018 goto skip; 1019 } 1020 1021 if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) { 1022 IFNET_STAT_INC(ifp, ierrors, 1); 1023 goto skip; 1024 } 1025 1026 /* 1027 * Try to allocate a new mbuf for this ring element and load it 1028 * before processing the current mbuf. If the ring element 1029 * cannot be loaded, drop the received packet and reuse the old 1030 * mbuf. In the unlikely case that the old mbuf can't be 1031 * reloaded either, explicitly panic. 1032 */ 1033 mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1034 if (mnew == NULL) { 1035 IFNET_STAT_INC(ifp, ierrors, 1); 1036 goto skip; 1037 } 1038 1039 bus_dmamap_sync(sc->rxq.data_dmat, data->map, 1040 BUS_DMASYNC_POSTREAD); 1041 bus_dmamap_unload(sc->rxq.data_dmat, data->map); 1042 1043 error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1044 mtod(mnew, void *), MCLBYTES, rt2661_dma_map_addr, 1045 &physaddr, 0); 1046 if (error != 0) { 1047 m_freem(mnew); 1048 1049 /* try to reload the old mbuf */ 1050 error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1051 mtod(data->m, void *), MCLBYTES, 1052 rt2661_dma_map_addr, &physaddr, 0); 1053 if (error != 0) { 1054 /* very unlikely that it will fail... */ 1055 panic("%s: could not load old rx mbuf", 1056 device_get_name(sc->sc_dev)); 1057 } 1058 IFNET_STAT_INC(ifp, ierrors, 1); 1059 goto skip; 1060 } 1061 1062 /* 1063 * New mbuf successfully loaded, update Rx ring and continue 1064 * processing. 1065 */ 1066 m = data->m; 1067 data->m = mnew; 1068 desc->physaddr = htole32(physaddr); 1069 1070 /* finalize mbuf */ 1071 m->m_pkthdr.rcvif = ifp; 1072 m->m_pkthdr.len = m->m_len = 1073 (le32toh(desc->flags) >> 16) & 0xfff; 1074 1075 rssi = rt2661_get_rssi(sc, desc->rssi); 1076 /* Error happened during RSSI conversion. */ 1077 if (rssi < 0) 1078 rssi = -30; /* XXX ignored by net80211 */ 1079 nf = RT2661_NOISE_FLOOR; 1080 1081 if (ieee80211_radiotap_active(ic)) { 1082 struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap; 1083 uint32_t tsf_lo, tsf_hi; 1084 1085 /* get timestamp (low and high 32 bits) */ 1086 tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13); 1087 tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12); 1088 1089 tap->wr_tsf = 1090 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1091 tap->wr_flags = 0; 1092 tap->wr_rate = ieee80211_plcp2rate(desc->rate, 1093 (desc->flags & htole32(RT2661_RX_OFDM)) ? 1094 IEEE80211_T_OFDM : IEEE80211_T_CCK); 1095 tap->wr_antsignal = nf + rssi; 1096 tap->wr_antnoise = nf; 1097 } 1098 sc->sc_flags |= RAL_INPUT_RUNNING; 1099 wh = mtod(m, struct ieee80211_frame *); 1100 1101 /* send the frame to the 802.11 layer */ 1102 ni = ieee80211_find_rxnode(ic, 1103 (struct ieee80211_frame_min *)wh); 1104 if (ni != NULL) { 1105 (void) ieee80211_input(ni, m, rssi, nf); 1106 ieee80211_free_node(ni); 1107 } else 1108 (void) ieee80211_input_all(ic, m, rssi, nf); 1109 1110 sc->sc_flags &= ~RAL_INPUT_RUNNING; 1111 1112 skip: desc->flags |= htole32(RT2661_RX_BUSY); 1113 1114 DPRINTFN(sc, 15, "rx intr idx=%u\n", sc->rxq.cur); 1115 1116 sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT; 1117 } 1118 1119 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1120 BUS_DMASYNC_PREWRITE); 1121 } 1122 1123 /* ARGSUSED */ 1124 static void 1125 rt2661_mcu_beacon_expire(struct rt2661_softc *sc) 1126 { 1127 /* do nothing */ 1128 } 1129 1130 static void 1131 rt2661_mcu_wakeup(struct rt2661_softc *sc) 1132 { 1133 RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16); 1134 1135 RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7); 1136 RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18); 1137 RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20); 1138 1139 /* send wakeup command to MCU */ 1140 rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0); 1141 } 1142 1143 static void 1144 rt2661_mcu_cmd_intr(struct rt2661_softc *sc) 1145 { 1146 RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR); 1147 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); 1148 } 1149 1150 void 1151 rt2661_intr(void *arg) 1152 { 1153 struct rt2661_softc *sc = arg; 1154 struct ifnet *ifp = sc->sc_ifp; 1155 uint32_t r1, r2; 1156 1157 /* disable MAC and MCU interrupts */ 1158 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f); 1159 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); 1160 1161 /* don't re-enable interrupts if we're shutting down */ 1162 if (!(ifp->if_flags & IFF_RUNNING)) { 1163 return; 1164 } 1165 1166 r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR); 1167 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1); 1168 1169 r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR); 1170 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2); 1171 1172 if (r1 & RT2661_MGT_DONE) 1173 rt2661_tx_dma_intr(sc, &sc->mgtq); 1174 1175 if (r1 & RT2661_RX_DONE) 1176 rt2661_rx_intr(sc); 1177 1178 if (r1 & RT2661_TX0_DMA_DONE) 1179 rt2661_tx_dma_intr(sc, &sc->txq[0]); 1180 1181 if (r1 & RT2661_TX1_DMA_DONE) 1182 rt2661_tx_dma_intr(sc, &sc->txq[1]); 1183 1184 if (r1 & RT2661_TX2_DMA_DONE) 1185 rt2661_tx_dma_intr(sc, &sc->txq[2]); 1186 1187 if (r1 & RT2661_TX3_DMA_DONE) 1188 rt2661_tx_dma_intr(sc, &sc->txq[3]); 1189 1190 if (r1 & RT2661_TX_DONE) 1191 rt2661_tx_intr(sc); 1192 1193 if (r2 & RT2661_MCU_CMD_DONE) 1194 rt2661_mcu_cmd_intr(sc); 1195 1196 if (r2 & RT2661_MCU_BEACON_EXPIRE) 1197 rt2661_mcu_beacon_expire(sc); 1198 1199 if (r2 & RT2661_MCU_WAKEUP) 1200 rt2661_mcu_wakeup(sc); 1201 1202 /* re-enable MAC and MCU interrupts */ 1203 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); 1204 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); 1205 1206 } 1207 1208 static uint8_t 1209 rt2661_plcp_signal(int rate) 1210 { 1211 switch (rate) { 1212 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1213 case 12: return 0xb; 1214 case 18: return 0xf; 1215 case 24: return 0xa; 1216 case 36: return 0xe; 1217 case 48: return 0x9; 1218 case 72: return 0xd; 1219 case 96: return 0x8; 1220 case 108: return 0xc; 1221 1222 /* CCK rates (NB: not IEEE std, device-specific) */ 1223 case 2: return 0x0; 1224 case 4: return 0x1; 1225 case 11: return 0x2; 1226 case 22: return 0x3; 1227 } 1228 return 0xff; /* XXX unsupported/unknown rate */ 1229 } 1230 1231 static void 1232 rt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc, 1233 uint32_t flags, uint16_t xflags, int len, int rate, 1234 const bus_dma_segment_t *segs, int nsegs, int ac) 1235 { 1236 struct ifnet *ifp = sc->sc_ifp; 1237 struct ieee80211com *ic = ifp->if_l2com; 1238 uint16_t plcp_length; 1239 int i, remainder; 1240 1241 desc->flags = htole32(flags); 1242 desc->flags |= htole32(len << 16); 1243 desc->flags |= htole32(RT2661_TX_BUSY | RT2661_TX_VALID); 1244 1245 desc->xflags = htole16(xflags); 1246 desc->xflags |= htole16(nsegs << 13); 1247 1248 desc->wme = htole16( 1249 RT2661_QID(ac) | 1250 RT2661_AIFSN(2) | 1251 RT2661_LOGCWMIN(4) | 1252 RT2661_LOGCWMAX(10)); 1253 1254 /* 1255 * Remember in which queue this frame was sent. This field is driver 1256 * private data only. It will be made available by the NIC in STA_CSR4 1257 * on Tx interrupts. 1258 */ 1259 desc->qid = ac; 1260 1261 /* setup PLCP fields */ 1262 desc->plcp_signal = rt2661_plcp_signal(rate); 1263 desc->plcp_service = 4; 1264 1265 len += IEEE80211_CRC_LEN; 1266 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) { 1267 desc->flags |= htole32(RT2661_TX_OFDM); 1268 1269 plcp_length = len & 0xfff; 1270 desc->plcp_length_hi = plcp_length >> 6; 1271 desc->plcp_length_lo = plcp_length & 0x3f; 1272 } else { 1273 plcp_length = (16 * len + rate - 1) / rate; 1274 if (rate == 22) { 1275 remainder = (16 * len) % 22; 1276 if (remainder != 0 && remainder < 7) 1277 desc->plcp_service |= RT2661_PLCP_LENGEXT; 1278 } 1279 desc->plcp_length_hi = plcp_length >> 8; 1280 desc->plcp_length_lo = plcp_length & 0xff; 1281 1282 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1283 desc->plcp_signal |= 0x08; 1284 } 1285 1286 /* RT2x61 supports scatter with up to 5 segments */ 1287 for (i = 0; i < nsegs; i++) { 1288 desc->addr[i] = htole32(segs[i].ds_addr); 1289 desc->len [i] = htole16(segs[i].ds_len); 1290 } 1291 } 1292 1293 static int 1294 rt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0, 1295 struct ieee80211_node *ni) 1296 { 1297 struct ieee80211vap *vap = ni->ni_vap; 1298 struct ieee80211com *ic = ni->ni_ic; 1299 struct rt2661_tx_desc *desc; 1300 struct rt2661_tx_data *data; 1301 struct ieee80211_frame *wh; 1302 struct ieee80211_key *k; 1303 bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1304 uint16_t dur; 1305 uint32_t flags = 0; /* XXX HWSEQ */ 1306 int nsegs, rate, error; 1307 1308 desc = &sc->mgtq.desc[sc->mgtq.cur]; 1309 data = &sc->mgtq.data[sc->mgtq.cur]; 1310 1311 rate = vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)].mgmtrate; 1312 1313 wh = mtod(m0, struct ieee80211_frame *); 1314 1315 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1316 k = ieee80211_crypto_encap(ni, m0); 1317 if (k == NULL) { 1318 m_freem(m0); 1319 return ENOBUFS; 1320 } 1321 } 1322 1323 error = bus_dmamap_load_mbuf_segment(sc->mgtq.data_dmat, data->map, m0, 1324 segs, 1, &nsegs, BUS_DMA_NOWAIT); 1325 if (error != 0) { 1326 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1327 error); 1328 m_freem(m0); 1329 return error; 1330 } 1331 1332 if (ieee80211_radiotap_active_vap(vap)) { 1333 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap; 1334 1335 tap->wt_flags = 0; 1336 tap->wt_rate = rate; 1337 1338 ieee80211_radiotap_tx(vap, m0); 1339 } 1340 1341 data->m = m0; 1342 data->ni = ni; 1343 /* management frames are not taken into account for amrr */ 1344 data->rix = IEEE80211_FIXED_RATE_NONE; 1345 1346 wh = mtod(m0, struct ieee80211_frame *); 1347 1348 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1349 flags |= RT2661_TX_NEED_ACK; 1350 1351 dur = ieee80211_ack_duration(ic->ic_rt, 1352 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1353 *(uint16_t *)wh->i_dur = htole16(dur); 1354 1355 /* tell hardware to add timestamp in probe responses */ 1356 if ((wh->i_fc[0] & 1357 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1358 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1359 flags |= RT2661_TX_TIMESTAMP; 1360 } 1361 1362 rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */, 1363 m0->m_pkthdr.len, rate, segs, nsegs, RT2661_QID_MGT); 1364 1365 bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1366 bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map, 1367 BUS_DMASYNC_PREWRITE); 1368 1369 DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n", 1370 m0->m_pkthdr.len, sc->mgtq.cur, rate); 1371 1372 /* kick mgt */ 1373 sc->mgtq.queued++; 1374 sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT; 1375 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT); 1376 1377 return 0; 1378 } 1379 1380 static int 1381 rt2661_sendprot(struct rt2661_softc *sc, int ac, 1382 const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate) 1383 { 1384 struct ieee80211com *ic = ni->ni_ic; 1385 struct rt2661_tx_ring *txq = &sc->txq[ac]; 1386 const struct ieee80211_frame *wh; 1387 struct rt2661_tx_desc *desc; 1388 struct rt2661_tx_data *data; 1389 struct mbuf *mprot; 1390 int protrate, pktlen, flags, isshort, error; 1391 uint16_t dur; 1392 bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1393 int nsegs; 1394 1395 KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY, 1396 ("protection %d", prot)); 1397 1398 wh = mtod(m, const struct ieee80211_frame *); 1399 pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN; 1400 1401 protrate = ieee80211_ctl_rate(ic->ic_rt, rate); 1402 ieee80211_ack_rate(ic->ic_rt, rate); 1403 1404 isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0; 1405 dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort) 1406 + ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1407 flags = RT2661_TX_MORE_FRAG; 1408 if (prot == IEEE80211_PROT_RTSCTS) { 1409 /* NB: CTS is the same size as an ACK */ 1410 dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1411 flags |= RT2661_TX_NEED_ACK; 1412 mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur); 1413 } else { 1414 mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur); 1415 } 1416 if (mprot == NULL) { 1417 /* XXX stat + msg */ 1418 return ENOBUFS; 1419 } 1420 1421 data = &txq->data[txq->cur]; 1422 desc = &txq->desc[txq->cur]; 1423 1424 error = bus_dmamap_load_mbuf_segment(txq->data_dmat, data->map, mprot, segs, 1425 1, &nsegs, BUS_DMA_NOWAIT); 1426 if (error != 0) { 1427 device_printf(sc->sc_dev, 1428 "could not map mbuf (error %d)\n", error); 1429 m_freem(mprot); 1430 return error; 1431 } 1432 1433 data->m = mprot; 1434 data->ni = ieee80211_ref_node(ni); 1435 /* ctl frames are not taken into account for amrr */ 1436 data->rix = IEEE80211_FIXED_RATE_NONE; 1437 1438 rt2661_setup_tx_desc(sc, desc, flags, 0, mprot->m_pkthdr.len, 1439 protrate, segs, 1, ac); 1440 1441 bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1442 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 1443 1444 txq->queued++; 1445 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT; 1446 1447 return 0; 1448 } 1449 1450 static int 1451 rt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0, 1452 struct ieee80211_node *ni, int ac) 1453 { 1454 struct ieee80211vap *vap = ni->ni_vap; 1455 struct ifnet *ifp = sc->sc_ifp; 1456 struct ieee80211com *ic = ifp->if_l2com; 1457 struct rt2661_tx_ring *txq = &sc->txq[ac]; 1458 struct rt2661_tx_desc *desc; 1459 struct rt2661_tx_data *data; 1460 struct ieee80211_frame *wh; 1461 const struct ieee80211_txparam *tp; 1462 struct ieee80211_key *k; 1463 const struct chanAccParams *cap; 1464 struct mbuf *mnew; 1465 bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1466 uint16_t dur; 1467 uint32_t flags; 1468 int error, nsegs, rate, noack = 0; 1469 1470 wh = mtod(m0, struct ieee80211_frame *); 1471 1472 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1473 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1474 rate = tp->mcastrate; 1475 } else if (m0->m_flags & M_EAPOL) { 1476 rate = tp->mgmtrate; 1477 } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) { 1478 rate = tp->ucastrate; 1479 } else { 1480 ieee80211_ratectl_rate(ni, NULL, 0); 1481 rate = ni->ni_txrate; 1482 } 1483 rate &= IEEE80211_RATE_VAL; 1484 1485 if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) { 1486 cap = &ic->ic_wme.wme_chanParams; 1487 noack = cap->cap_wmeParams[ac].wmep_noackPolicy; 1488 } 1489 1490 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1491 k = ieee80211_crypto_encap(ni, m0); 1492 if (k == NULL) { 1493 m_freem(m0); 1494 return ENOBUFS; 1495 } 1496 1497 /* packet header may have moved, reset our local pointer */ 1498 wh = mtod(m0, struct ieee80211_frame *); 1499 } 1500 1501 flags = 0; 1502 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1503 int prot = IEEE80211_PROT_NONE; 1504 if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) 1505 prot = IEEE80211_PROT_RTSCTS; 1506 else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1507 ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) 1508 prot = ic->ic_protmode; 1509 if (prot != IEEE80211_PROT_NONE) { 1510 error = rt2661_sendprot(sc, ac, m0, ni, prot, rate); 1511 if (error) { 1512 m_freem(m0); 1513 return error; 1514 } 1515 flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS; 1516 } 1517 } 1518 1519 data = &txq->data[txq->cur]; 1520 desc = &txq->desc[txq->cur]; 1521 1522 error = bus_dmamap_load_mbuf_segment(txq->data_dmat, data->map, m0, segs, 1523 1, &nsegs, BUS_DMA_NOWAIT); 1524 if (error != 0 && error != EFBIG) { 1525 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1526 error); 1527 m_freem(m0); 1528 return error; 1529 } 1530 if (error != 0) { 1531 mnew = m_defrag(m0, M_NOWAIT); 1532 if (mnew == NULL) { 1533 device_printf(sc->sc_dev, 1534 "could not defragment mbuf\n"); 1535 m_freem(m0); 1536 return ENOBUFS; 1537 } 1538 m0 = mnew; 1539 1540 error = bus_dmamap_load_mbuf_segment(txq->data_dmat, data->map, m0, 1541 segs, 1, &nsegs, BUS_DMA_NOWAIT); 1542 if (error != 0) { 1543 device_printf(sc->sc_dev, 1544 "could not map mbuf (error %d)\n", error); 1545 m_freem(m0); 1546 return error; 1547 } 1548 1549 /* packet header have moved, reset our local pointer */ 1550 wh = mtod(m0, struct ieee80211_frame *); 1551 } 1552 1553 if (ieee80211_radiotap_active_vap(vap)) { 1554 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap; 1555 1556 tap->wt_flags = 0; 1557 tap->wt_rate = rate; 1558 1559 ieee80211_radiotap_tx(vap, m0); 1560 } 1561 1562 data->m = m0; 1563 data->ni = ni; 1564 1565 /* remember link conditions for rate adaptation algorithm */ 1566 if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) { 1567 data->rix = ni->ni_txrate; 1568 /* XXX probably need last rssi value and not avg */ 1569 data->rssi = ic->ic_node_getrssi(ni); 1570 } else 1571 data->rix = IEEE80211_FIXED_RATE_NONE; 1572 1573 if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1574 flags |= RT2661_TX_NEED_ACK; 1575 1576 dur = ieee80211_ack_duration(ic->ic_rt, 1577 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1578 *(uint16_t *)wh->i_dur = htole16(dur); 1579 } 1580 1581 rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate, segs, 1582 nsegs, ac); 1583 1584 bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1585 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 1586 1587 DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n", 1588 m0->m_pkthdr.len, txq->cur, rate); 1589 1590 /* kick Tx */ 1591 txq->queued++; 1592 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT; 1593 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac); 1594 1595 return 0; 1596 } 1597 1598 static void 1599 rt2661_start_locked(struct ifnet *ifp) 1600 { 1601 struct rt2661_softc *sc = ifp->if_softc; 1602 struct mbuf *m; 1603 struct ieee80211_node *ni; 1604 int ac; 1605 1606 /* prevent management frames from being sent if we're not ready */ 1607 if (!(ifp->if_flags & IFF_RUNNING) || sc->sc_invalid) 1608 return; 1609 1610 for (;;) { 1611 m = ifq_dequeue(&ifp->if_snd); 1612 if (m == NULL) 1613 break; 1614 1615 ac = M_WME_GETAC(m); 1616 if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) { 1617 /* there is no place left in this ring */ 1618 ifq_prepend(&ifp->if_snd, m); 1619 ifq_set_oactive(&ifp->if_snd); 1620 break; 1621 } 1622 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1623 if (rt2661_tx_data(sc, m, ni, ac) != 0) { 1624 ieee80211_free_node(ni); 1625 IFNET_STAT_INC(ifp, oerrors, 1); 1626 break; 1627 } 1628 1629 sc->sc_tx_timer = 5; 1630 } 1631 } 1632 1633 static void 1634 rt2661_start(struct ifnet *ifp, struct ifaltq_subque *ifsq) 1635 { 1636 ASSERT_ALTQ_SQ_DEFAULT(ifp, ifsq); 1637 rt2661_start_locked(ifp); 1638 } 1639 1640 static int 1641 rt2661_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1642 const struct ieee80211_bpf_params *params) 1643 { 1644 struct ieee80211com *ic = ni->ni_ic; 1645 struct ifnet *ifp = ic->ic_ifp; 1646 struct rt2661_softc *sc = ic->ic_softc; 1647 1648 /* prevent management frames from being sent if we're not ready */ 1649 if (!(ifp->if_flags & IFF_RUNNING)) { 1650 m_freem(m); 1651 ieee80211_free_node(ni); 1652 return ENETDOWN; 1653 } 1654 if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) { 1655 ifq_set_oactive(&ifp->if_snd); 1656 m_freem(m); 1657 ieee80211_free_node(ni); 1658 return ENOBUFS; /* XXX */ 1659 } 1660 1661 IFNET_STAT_INC(ifp, opackets, 1); 1662 1663 /* 1664 * Legacy path; interpret frame contents to decide 1665 * precisely how to send the frame. 1666 * XXX raw path 1667 */ 1668 if (rt2661_tx_mgt(sc, m, ni) != 0) 1669 goto bad; 1670 sc->sc_tx_timer = 5; 1671 1672 return 0; 1673 bad: 1674 IFNET_STAT_INC(ifp, oerrors, 1); 1675 ieee80211_free_node(ni); 1676 return EIO; /* XXX */ 1677 } 1678 1679 static void 1680 rt2661_watchdog_callout(void *arg) 1681 { 1682 struct rt2661_softc *sc = (struct rt2661_softc *)arg; 1683 struct ifnet *ifp = sc->sc_ifp; 1684 1685 KASSERT(ifp->if_flags & IFF_RUNNING, ("not running")); 1686 1687 if (sc->sc_invalid) /* card ejected */ 1688 return; 1689 1690 if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) { 1691 if_printf(ifp, "device timeout\n"); 1692 rt2661_init_locked(sc); 1693 IFNET_STAT_INC(ifp, oerrors, 1); 1694 /* NB: callout is reset in rt2661_init() */ 1695 return; 1696 } 1697 callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog_callout, sc); 1698 1699 } 1700 1701 static int 1702 rt2661_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *ucred) 1703 { 1704 struct ieee80211com *ic = ifp->if_l2com; 1705 struct rt2661_softc *sc = ic->ic_softc; 1706 struct ifreq *ifr = (struct ifreq *) data; 1707 int error = 0, startall = 0; 1708 1709 switch (cmd) { 1710 case SIOCSIFFLAGS: 1711 if (ifp->if_flags & IFF_UP) { 1712 if ((ifp->if_flags & IFF_RUNNING) == 0) { 1713 rt2661_init_locked(sc); 1714 startall = 1; 1715 } else 1716 rt2661_update_promisc(ic); 1717 } else { 1718 if (ifp->if_flags & IFF_RUNNING) 1719 rt2661_stop_locked(sc); 1720 } 1721 if (startall) 1722 ieee80211_start_all(ic); 1723 break; 1724 case SIOCGIFMEDIA: 1725 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1726 break; 1727 case SIOCGIFADDR: 1728 error = ether_ioctl(ifp, cmd, data); 1729 break; 1730 default: 1731 error = EINVAL; 1732 break; 1733 } 1734 return error; 1735 } 1736 1737 static void 1738 rt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val) 1739 { 1740 uint32_t tmp; 1741 int ntries; 1742 1743 for (ntries = 0; ntries < 100; ntries++) { 1744 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY)) 1745 break; 1746 DELAY(1); 1747 } 1748 if (ntries == 100) { 1749 device_printf(sc->sc_dev, "could not write to BBP\n"); 1750 return; 1751 } 1752 1753 tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val; 1754 RAL_WRITE(sc, RT2661_PHY_CSR3, tmp); 1755 1756 DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val); 1757 } 1758 1759 static uint8_t 1760 rt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg) 1761 { 1762 uint32_t val; 1763 int ntries; 1764 1765 for (ntries = 0; ntries < 100; ntries++) { 1766 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY)) 1767 break; 1768 DELAY(1); 1769 } 1770 if (ntries == 100) { 1771 device_printf(sc->sc_dev, "could not read from BBP\n"); 1772 return 0; 1773 } 1774 1775 val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8; 1776 RAL_WRITE(sc, RT2661_PHY_CSR3, val); 1777 1778 for (ntries = 0; ntries < 100; ntries++) { 1779 val = RAL_READ(sc, RT2661_PHY_CSR3); 1780 if (!(val & RT2661_BBP_BUSY)) 1781 return val & 0xff; 1782 DELAY(1); 1783 } 1784 1785 device_printf(sc->sc_dev, "could not read from BBP\n"); 1786 return 0; 1787 } 1788 1789 static void 1790 rt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val) 1791 { 1792 uint32_t tmp; 1793 int ntries; 1794 1795 for (ntries = 0; ntries < 100; ntries++) { 1796 if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY)) 1797 break; 1798 DELAY(1); 1799 } 1800 if (ntries == 100) { 1801 device_printf(sc->sc_dev, "could not write to RF\n"); 1802 return; 1803 } 1804 1805 tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 | 1806 (reg & 3); 1807 RAL_WRITE(sc, RT2661_PHY_CSR4, tmp); 1808 1809 /* remember last written value in sc */ 1810 sc->rf_regs[reg] = val; 1811 1812 DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff); 1813 } 1814 1815 static int 1816 rt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg) 1817 { 1818 if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY) 1819 return EIO; /* there is already a command pending */ 1820 1821 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 1822 RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg); 1823 1824 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd); 1825 1826 return 0; 1827 } 1828 1829 static void 1830 rt2661_select_antenna(struct rt2661_softc *sc) 1831 { 1832 uint8_t bbp4, bbp77; 1833 uint32_t tmp; 1834 1835 bbp4 = rt2661_bbp_read(sc, 4); 1836 bbp77 = rt2661_bbp_read(sc, 77); 1837 1838 /* TBD */ 1839 1840 /* make sure Rx is disabled before switching antenna */ 1841 tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 1842 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 1843 1844 rt2661_bbp_write(sc, 4, bbp4); 1845 rt2661_bbp_write(sc, 77, bbp77); 1846 1847 /* restore Rx filter */ 1848 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 1849 } 1850 1851 /* 1852 * Enable multi-rate retries for frames sent at OFDM rates. 1853 * In 802.11b/g mode, allow fallback to CCK rates. 1854 */ 1855 static void 1856 rt2661_enable_mrr(struct rt2661_softc *sc) 1857 { 1858 struct ifnet *ifp = sc->sc_ifp; 1859 struct ieee80211com *ic = ifp->if_l2com; 1860 uint32_t tmp; 1861 1862 tmp = RAL_READ(sc, RT2661_TXRX_CSR4); 1863 1864 tmp &= ~RT2661_MRR_CCK_FALLBACK; 1865 if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan)) 1866 tmp |= RT2661_MRR_CCK_FALLBACK; 1867 tmp |= RT2661_MRR_ENABLED; 1868 1869 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); 1870 } 1871 1872 static void 1873 rt2661_set_txpreamble(struct rt2661_softc *sc) 1874 { 1875 struct ifnet *ifp = sc->sc_ifp; 1876 struct ieee80211com *ic = ifp->if_l2com; 1877 uint32_t tmp; 1878 1879 tmp = RAL_READ(sc, RT2661_TXRX_CSR4); 1880 1881 tmp &= ~RT2661_SHORT_PREAMBLE; 1882 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1883 tmp |= RT2661_SHORT_PREAMBLE; 1884 1885 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); 1886 } 1887 1888 static void 1889 rt2661_set_basicrates(struct rt2661_softc *sc, 1890 const struct ieee80211_rateset *rs) 1891 { 1892 #define RV(r) ((r) & IEEE80211_RATE_VAL) 1893 struct ifnet *ifp = sc->sc_ifp; 1894 struct ieee80211com *ic = ifp->if_l2com; 1895 uint32_t mask = 0; 1896 uint8_t rate; 1897 int i, j; 1898 1899 for (i = 0; i < rs->rs_nrates; i++) { 1900 rate = rs->rs_rates[i]; 1901 1902 if (!(rate & IEEE80211_RATE_BASIC)) 1903 continue; 1904 1905 /* 1906 * Find h/w rate index. We know it exists because the rate 1907 * set has already been negotiated. 1908 */ 1909 for (j = 0; ic->ic_sup_rates[IEEE80211_MODE_11G].rs_rates[j] != RV(rate); j++); 1910 1911 mask |= 1 << j; 1912 } 1913 1914 RAL_WRITE(sc, RT2661_TXRX_CSR5, mask); 1915 1916 DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask); 1917 #undef RV 1918 } 1919 1920 /* 1921 * Reprogram MAC/BBP to switch to a new band. Values taken from the reference 1922 * driver. 1923 */ 1924 static void 1925 rt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c) 1926 { 1927 uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104; 1928 uint32_t tmp; 1929 1930 /* update all BBP registers that depend on the band */ 1931 bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c; 1932 bbp35 = 0x50; bbp97 = 0x48; bbp98 = 0x48; 1933 if (IEEE80211_IS_CHAN_5GHZ(c)) { 1934 bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c; 1935 bbp35 += 0x10; bbp97 += 0x10; bbp98 += 0x10; 1936 } 1937 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) || 1938 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) { 1939 bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10; 1940 } 1941 1942 rt2661_bbp_write(sc, 17, bbp17); 1943 rt2661_bbp_write(sc, 96, bbp96); 1944 rt2661_bbp_write(sc, 104, bbp104); 1945 1946 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) || 1947 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) { 1948 rt2661_bbp_write(sc, 75, 0x80); 1949 rt2661_bbp_write(sc, 86, 0x80); 1950 rt2661_bbp_write(sc, 88, 0x80); 1951 } 1952 1953 rt2661_bbp_write(sc, 35, bbp35); 1954 rt2661_bbp_write(sc, 97, bbp97); 1955 rt2661_bbp_write(sc, 98, bbp98); 1956 1957 tmp = RAL_READ(sc, RT2661_PHY_CSR0); 1958 tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ); 1959 if (IEEE80211_IS_CHAN_2GHZ(c)) 1960 tmp |= RT2661_PA_PE_2GHZ; 1961 else 1962 tmp |= RT2661_PA_PE_5GHZ; 1963 RAL_WRITE(sc, RT2661_PHY_CSR0, tmp); 1964 } 1965 1966 static void 1967 rt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c) 1968 { 1969 struct ifnet *ifp = sc->sc_ifp; 1970 struct ieee80211com *ic = ifp->if_l2com; 1971 const struct rfprog *rfprog; 1972 uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT; 1973 int8_t power; 1974 u_int i, chan; 1975 1976 chan = ieee80211_chan2ieee(ic, c); 1977 KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan)); 1978 1979 /* select the appropriate RF settings based on what EEPROM says */ 1980 rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2; 1981 1982 /* find the settings for this channel (we know it exists) */ 1983 for (i = 0; rfprog[i].chan != chan; i++); 1984 1985 power = sc->txpow[i]; 1986 if (power < 0) { 1987 bbp94 += power; 1988 power = 0; 1989 } else if (power > 31) { 1990 bbp94 += power - 31; 1991 power = 31; 1992 } 1993 1994 /* 1995 * If we are switching from the 2GHz band to the 5GHz band or 1996 * vice-versa, BBP registers need to be reprogrammed. 1997 */ 1998 if (c->ic_flags != sc->sc_curchan->ic_flags) { 1999 rt2661_select_band(sc, c); 2000 rt2661_select_antenna(sc); 2001 } 2002 sc->sc_curchan = c; 2003 2004 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 2005 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 2006 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7); 2007 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 2008 2009 DELAY(200); 2010 2011 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 2012 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 2013 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1); 2014 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 2015 2016 DELAY(200); 2017 2018 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 2019 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 2020 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7); 2021 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 2022 2023 /* enable smart mode for MIMO-capable RFs */ 2024 bbp3 = rt2661_bbp_read(sc, 3); 2025 2026 bbp3 &= ~RT2661_SMART_MODE; 2027 if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529) 2028 bbp3 |= RT2661_SMART_MODE; 2029 2030 rt2661_bbp_write(sc, 3, bbp3); 2031 2032 if (bbp94 != RT2661_BBPR94_DEFAULT) 2033 rt2661_bbp_write(sc, 94, bbp94); 2034 2035 /* 5GHz radio needs a 1ms delay here */ 2036 if (IEEE80211_IS_CHAN_5GHZ(c)) 2037 DELAY(1000); 2038 } 2039 2040 static void 2041 rt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid) 2042 { 2043 uint32_t tmp; 2044 2045 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2046 RAL_WRITE(sc, RT2661_MAC_CSR4, tmp); 2047 2048 tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16; 2049 RAL_WRITE(sc, RT2661_MAC_CSR5, tmp); 2050 } 2051 2052 static void 2053 rt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr) 2054 { 2055 uint32_t tmp; 2056 2057 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2058 RAL_WRITE(sc, RT2661_MAC_CSR2, tmp); 2059 2060 tmp = addr[4] | addr[5] << 8; 2061 RAL_WRITE(sc, RT2661_MAC_CSR3, tmp); 2062 } 2063 2064 static void 2065 rt2661_update_promisc(struct ieee80211com *ic) 2066 { 2067 struct rt2661_softc *sc = ic->ic_softc; 2068 uint32_t tmp; 2069 2070 tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2071 2072 tmp &= ~RT2661_DROP_NOT_TO_ME; 2073 if (!(ic->ic_ifp->if_flags & IFF_PROMISC)) 2074 tmp |= RT2661_DROP_NOT_TO_ME; 2075 2076 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2077 2078 DPRINTF(sc, "%s promiscuous mode\n", 2079 (ic->ic_ifp->if_flags & IFF_PROMISC) ? "entering" : "leaving"); 2080 } 2081 2082 /* 2083 * Update QoS (802.11e) settings for each h/w Tx ring. 2084 */ 2085 static int 2086 rt2661_wme_update(struct ieee80211com *ic) 2087 { 2088 struct rt2661_softc *sc = ic->ic_softc; 2089 const struct wmeParams *wmep; 2090 2091 wmep = ic->ic_wme.wme_chanParams.cap_wmeParams; 2092 2093 /* XXX: not sure about shifts. */ 2094 /* XXX: the reference driver plays with AC_VI settings too. */ 2095 2096 /* update TxOp */ 2097 RAL_WRITE(sc, RT2661_AC_TXOP_CSR0, 2098 wmep[WME_AC_BE].wmep_txopLimit << 16 | 2099 wmep[WME_AC_BK].wmep_txopLimit); 2100 RAL_WRITE(sc, RT2661_AC_TXOP_CSR1, 2101 wmep[WME_AC_VI].wmep_txopLimit << 16 | 2102 wmep[WME_AC_VO].wmep_txopLimit); 2103 2104 /* update CWmin */ 2105 RAL_WRITE(sc, RT2661_CWMIN_CSR, 2106 wmep[WME_AC_BE].wmep_logcwmin << 12 | 2107 wmep[WME_AC_BK].wmep_logcwmin << 8 | 2108 wmep[WME_AC_VI].wmep_logcwmin << 4 | 2109 wmep[WME_AC_VO].wmep_logcwmin); 2110 2111 /* update CWmax */ 2112 RAL_WRITE(sc, RT2661_CWMAX_CSR, 2113 wmep[WME_AC_BE].wmep_logcwmax << 12 | 2114 wmep[WME_AC_BK].wmep_logcwmax << 8 | 2115 wmep[WME_AC_VI].wmep_logcwmax << 4 | 2116 wmep[WME_AC_VO].wmep_logcwmax); 2117 2118 /* update Aifsn */ 2119 RAL_WRITE(sc, RT2661_AIFSN_CSR, 2120 wmep[WME_AC_BE].wmep_aifsn << 12 | 2121 wmep[WME_AC_BK].wmep_aifsn << 8 | 2122 wmep[WME_AC_VI].wmep_aifsn << 4 | 2123 wmep[WME_AC_VO].wmep_aifsn); 2124 2125 return 0; 2126 } 2127 2128 static void 2129 rt2661_update_slot(struct ieee80211com *ic) 2130 { 2131 struct rt2661_softc *sc = ic->ic_softc; 2132 uint8_t slottime; 2133 uint32_t tmp; 2134 2135 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2136 2137 tmp = RAL_READ(sc, RT2661_MAC_CSR9); 2138 tmp = (tmp & ~0xff) | slottime; 2139 RAL_WRITE(sc, RT2661_MAC_CSR9, tmp); 2140 } 2141 2142 static const char * 2143 rt2661_get_rf(int rev) 2144 { 2145 switch (rev) { 2146 case RT2661_RF_5225: return "RT5225"; 2147 case RT2661_RF_5325: return "RT5325 (MIMO XR)"; 2148 case RT2661_RF_2527: return "RT2527"; 2149 case RT2661_RF_2529: return "RT2529 (MIMO XR)"; 2150 default: return "unknown"; 2151 } 2152 } 2153 2154 static void 2155 rt2661_read_eeprom(struct rt2661_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN]) 2156 { 2157 uint16_t val; 2158 int i; 2159 2160 /* read MAC address */ 2161 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01); 2162 macaddr[0] = val & 0xff; 2163 macaddr[1] = val >> 8; 2164 2165 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23); 2166 macaddr[2] = val & 0xff; 2167 macaddr[3] = val >> 8; 2168 2169 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45); 2170 macaddr[4] = val & 0xff; 2171 macaddr[5] = val >> 8; 2172 2173 val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA); 2174 /* XXX: test if different from 0xffff? */ 2175 sc->rf_rev = (val >> 11) & 0x1f; 2176 sc->hw_radio = (val >> 10) & 0x1; 2177 sc->rx_ant = (val >> 4) & 0x3; 2178 sc->tx_ant = (val >> 2) & 0x3; 2179 sc->nb_ant = val & 0x3; 2180 2181 DPRINTF(sc, "RF revision=%d\n", sc->rf_rev); 2182 2183 val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2); 2184 sc->ext_5ghz_lna = (val >> 6) & 0x1; 2185 sc->ext_2ghz_lna = (val >> 4) & 0x1; 2186 2187 DPRINTF(sc, "External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n", 2188 sc->ext_2ghz_lna, sc->ext_5ghz_lna); 2189 2190 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET); 2191 if ((val & 0xff) != 0xff) 2192 sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */ 2193 2194 /* Only [-10, 10] is valid */ 2195 if (sc->rssi_2ghz_corr < -10 || sc->rssi_2ghz_corr > 10) 2196 sc->rssi_2ghz_corr = 0; 2197 2198 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET); 2199 if ((val & 0xff) != 0xff) 2200 sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */ 2201 2202 /* Only [-10, 10] is valid */ 2203 if (sc->rssi_5ghz_corr < -10 || sc->rssi_5ghz_corr > 10) 2204 sc->rssi_5ghz_corr = 0; 2205 2206 /* adjust RSSI correction for external low-noise amplifier */ 2207 if (sc->ext_2ghz_lna) 2208 sc->rssi_2ghz_corr -= 14; 2209 if (sc->ext_5ghz_lna) 2210 sc->rssi_5ghz_corr -= 14; 2211 2212 DPRINTF(sc, "RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n", 2213 sc->rssi_2ghz_corr, sc->rssi_5ghz_corr); 2214 2215 val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET); 2216 if ((val >> 8) != 0xff) 2217 sc->rfprog = (val >> 8) & 0x3; 2218 if ((val & 0xff) != 0xff) 2219 sc->rffreq = val & 0xff; 2220 2221 DPRINTF(sc, "RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq); 2222 2223 /* read Tx power for all a/b/g channels */ 2224 for (i = 0; i < 19; i++) { 2225 val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i); 2226 sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */ 2227 DPRINTF(sc, "Channel=%d Tx power=%d\n", 2228 rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]); 2229 sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */ 2230 DPRINTF(sc, "Channel=%d Tx power=%d\n", 2231 rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]); 2232 } 2233 2234 /* read vendor-specific BBP values */ 2235 for (i = 0; i < 16; i++) { 2236 val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i); 2237 if (val == 0 || val == 0xffff) 2238 continue; /* skip invalid entries */ 2239 sc->bbp_prom[i].reg = val >> 8; 2240 sc->bbp_prom[i].val = val & 0xff; 2241 DPRINTF(sc, "BBP R%d=%02x\n", sc->bbp_prom[i].reg, 2242 sc->bbp_prom[i].val); 2243 } 2244 } 2245 2246 static int 2247 rt2661_bbp_init(struct rt2661_softc *sc) 2248 { 2249 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2250 int i, ntries; 2251 uint8_t val; 2252 2253 /* wait for BBP to be ready */ 2254 for (ntries = 0; ntries < 100; ntries++) { 2255 val = rt2661_bbp_read(sc, 0); 2256 if (val != 0 && val != 0xff) 2257 break; 2258 DELAY(100); 2259 } 2260 if (ntries == 100) { 2261 device_printf(sc->sc_dev, "timeout waiting for BBP\n"); 2262 return EIO; 2263 } 2264 2265 /* initialize BBP registers to default values */ 2266 for (i = 0; i < N(rt2661_def_bbp); i++) { 2267 rt2661_bbp_write(sc, rt2661_def_bbp[i].reg, 2268 rt2661_def_bbp[i].val); 2269 } 2270 2271 /* write vendor-specific BBP values (from EEPROM) */ 2272 for (i = 0; i < 16; i++) { 2273 if (sc->bbp_prom[i].reg == 0) 2274 continue; 2275 rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2276 } 2277 2278 return 0; 2279 #undef N 2280 } 2281 2282 static void 2283 rt2661_init_locked(struct rt2661_softc *sc) 2284 { 2285 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2286 struct ifnet *ifp = sc->sc_ifp; 2287 struct ieee80211com *ic = ifp->if_l2com; 2288 uint32_t tmp, sta[3]; 2289 int i, error, ntries; 2290 2291 if ((sc->sc_flags & RAL_FW_LOADED) == 0) { 2292 error = rt2661_load_microcode(sc); 2293 if (error != 0) { 2294 if_printf(ifp, 2295 "%s: could not load 8051 microcode, error %d\n", 2296 __func__, error); 2297 return; 2298 } 2299 sc->sc_flags |= RAL_FW_LOADED; 2300 } 2301 2302 rt2661_stop_locked(sc); 2303 2304 /* initialize Tx rings */ 2305 RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr); 2306 RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr); 2307 RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr); 2308 RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr); 2309 2310 /* initialize Mgt ring */ 2311 RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr); 2312 2313 /* initialize Rx ring */ 2314 RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr); 2315 2316 /* initialize Tx rings sizes */ 2317 RAL_WRITE(sc, RT2661_TX_RING_CSR0, 2318 RT2661_TX_RING_COUNT << 24 | 2319 RT2661_TX_RING_COUNT << 16 | 2320 RT2661_TX_RING_COUNT << 8 | 2321 RT2661_TX_RING_COUNT); 2322 2323 RAL_WRITE(sc, RT2661_TX_RING_CSR1, 2324 RT2661_TX_DESC_WSIZE << 16 | 2325 RT2661_TX_RING_COUNT << 8 | /* XXX: HCCA ring unused */ 2326 RT2661_MGT_RING_COUNT); 2327 2328 /* initialize Rx rings */ 2329 RAL_WRITE(sc, RT2661_RX_RING_CSR, 2330 RT2661_RX_DESC_BACK << 16 | 2331 RT2661_RX_DESC_WSIZE << 8 | 2332 RT2661_RX_RING_COUNT); 2333 2334 /* XXX: some magic here */ 2335 RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa); 2336 2337 /* load base addresses of all 5 Tx rings (4 data + 1 mgt) */ 2338 RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f); 2339 2340 /* load base address of Rx ring */ 2341 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2); 2342 2343 /* initialize MAC registers to default values */ 2344 for (i = 0; i < N(rt2661_def_mac); i++) 2345 RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val); 2346 2347 rt2661_set_macaddr(sc, IF_LLADDR(ifp)); 2348 2349 /* set host ready */ 2350 RAL_WRITE(sc, RT2661_MAC_CSR1, 3); 2351 RAL_WRITE(sc, RT2661_MAC_CSR1, 0); 2352 2353 /* wait for BBP/RF to wakeup */ 2354 for (ntries = 0; ntries < 1000; ntries++) { 2355 if (RAL_READ(sc, RT2661_MAC_CSR12) & 8) 2356 break; 2357 DELAY(1000); 2358 } 2359 if (ntries == 1000) { 2360 kprintf("timeout waiting for BBP/RF to wakeup\n"); 2361 rt2661_stop_locked(sc); 2362 return; 2363 } 2364 2365 if (rt2661_bbp_init(sc) != 0) { 2366 rt2661_stop_locked(sc); 2367 return; 2368 } 2369 2370 /* select default channel */ 2371 sc->sc_curchan = ic->ic_curchan; 2372 rt2661_select_band(sc, sc->sc_curchan); 2373 rt2661_select_antenna(sc); 2374 rt2661_set_chan(sc, sc->sc_curchan); 2375 2376 /* update Rx filter */ 2377 tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff; 2378 2379 tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR; 2380 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2381 tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR | 2382 RT2661_DROP_ACKCTS; 2383 if (ic->ic_opmode != IEEE80211_M_HOSTAP && 2384 ic->ic_opmode != IEEE80211_M_MBSS) 2385 tmp |= RT2661_DROP_TODS; 2386 if (!(ifp->if_flags & IFF_PROMISC)) 2387 tmp |= RT2661_DROP_NOT_TO_ME; 2388 } 2389 2390 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2391 2392 /* clear STA registers */ 2393 RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, N(sta)); 2394 2395 /* initialize ASIC */ 2396 RAL_WRITE(sc, RT2661_MAC_CSR1, 4); 2397 2398 /* clear any pending interrupt */ 2399 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); 2400 2401 /* enable interrupts */ 2402 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); 2403 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); 2404 2405 /* kick Rx */ 2406 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1); 2407 2408 ifq_clr_oactive(&ifp->if_snd); 2409 ifp->if_flags |= IFF_RUNNING; 2410 2411 callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog_callout, sc); 2412 #undef N 2413 } 2414 2415 static void 2416 rt2661_init(void *priv) 2417 { 2418 struct rt2661_softc *sc = priv; 2419 struct ifnet *ifp = sc->sc_ifp; 2420 struct ieee80211com *ic = ifp->if_l2com; 2421 2422 rt2661_init_locked(sc); 2423 2424 if (ifp->if_flags & IFF_RUNNING) 2425 ieee80211_start_all(ic); /* start all vap's */ 2426 } 2427 2428 void 2429 rt2661_stop_locked(struct rt2661_softc *sc) 2430 { 2431 struct ifnet *ifp = sc->sc_ifp; 2432 uint32_t tmp; 2433 volatile int *flags = &sc->sc_flags; 2434 2435 while (*flags & RAL_INPUT_RUNNING) 2436 zsleep(sc, &wlan_global_serializer, 0, "ralrunning", hz/10); 2437 2438 callout_stop(&sc->watchdog_ch); 2439 sc->sc_tx_timer = 0; 2440 2441 if (ifp->if_flags & IFF_RUNNING) { 2442 ifp->if_flags &= ~IFF_RUNNING; 2443 ifq_clr_oactive(&ifp->if_snd); 2444 2445 /* abort Tx (for all 5 Tx rings) */ 2446 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16); 2447 2448 /* disable Rx (value remains after reset!) */ 2449 tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2450 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 2451 2452 /* reset ASIC */ 2453 RAL_WRITE(sc, RT2661_MAC_CSR1, 3); 2454 RAL_WRITE(sc, RT2661_MAC_CSR1, 0); 2455 2456 /* disable interrupts */ 2457 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff); 2458 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); 2459 2460 /* clear any pending interrupt */ 2461 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); 2462 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff); 2463 2464 /* reset Tx and Rx rings */ 2465 rt2661_reset_tx_ring(sc, &sc->txq[0]); 2466 rt2661_reset_tx_ring(sc, &sc->txq[1]); 2467 rt2661_reset_tx_ring(sc, &sc->txq[2]); 2468 rt2661_reset_tx_ring(sc, &sc->txq[3]); 2469 rt2661_reset_tx_ring(sc, &sc->mgtq); 2470 rt2661_reset_rx_ring(sc, &sc->rxq); 2471 } 2472 } 2473 2474 void 2475 rt2661_stop(void *priv) 2476 { 2477 struct rt2661_softc *sc = priv; 2478 2479 rt2661_stop_locked(sc); 2480 } 2481 2482 static int 2483 rt2661_load_microcode(struct rt2661_softc *sc) 2484 { 2485 struct ifnet *ifp = sc->sc_ifp; 2486 const struct firmware *fp; 2487 const char *imagename; 2488 int ntries, error; 2489 2490 switch (sc->sc_id) { 2491 case 0x0301: imagename = "rt2561sfw"; break; 2492 case 0x0302: imagename = "rt2561fw"; break; 2493 case 0x0401: imagename = "rt2661fw"; break; 2494 default: 2495 if_printf(ifp, "%s: unexpected pci device id 0x%x, " 2496 "don't know how to retrieve firmware\n", 2497 __func__, sc->sc_id); 2498 return EINVAL; 2499 } 2500 2501 wlan_assert_serialized(); 2502 wlan_serialize_exit(); 2503 fp = firmware_get(imagename); 2504 wlan_serialize_enter(); 2505 2506 if (fp == NULL) { 2507 if_printf(ifp, "%s: unable to retrieve firmware image %s\n", 2508 __func__, imagename); 2509 return EINVAL; 2510 } 2511 2512 /* 2513 * Load 8051 microcode into NIC. 2514 */ 2515 /* reset 8051 */ 2516 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); 2517 2518 /* cancel any pending Host to MCU command */ 2519 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0); 2520 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); 2521 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0); 2522 2523 /* write 8051's microcode */ 2524 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL); 2525 RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, fp->data, fp->datasize); 2526 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); 2527 2528 /* kick 8051's ass */ 2529 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0); 2530 2531 /* wait for 8051 to initialize */ 2532 for (ntries = 0; ntries < 500; ntries++) { 2533 if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY) 2534 break; 2535 DELAY(100); 2536 } 2537 if (ntries == 500) { 2538 if_printf(ifp, "%s: timeout waiting for MCU to initialize\n", 2539 __func__); 2540 error = EIO; 2541 } else 2542 error = 0; 2543 2544 firmware_put(fp, FIRMWARE_UNLOAD); 2545 return error; 2546 } 2547 2548 #ifdef notyet 2549 /* 2550 * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and 2551 * false CCA count. This function is called periodically (every seconds) when 2552 * in the RUN state. Values taken from the reference driver. 2553 */ 2554 static void 2555 rt2661_rx_tune(struct rt2661_softc *sc) 2556 { 2557 uint8_t bbp17; 2558 uint16_t cca; 2559 int lo, hi, dbm; 2560 2561 /* 2562 * Tuning range depends on operating band and on the presence of an 2563 * external low-noise amplifier. 2564 */ 2565 lo = 0x20; 2566 if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan)) 2567 lo += 0x08; 2568 if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) || 2569 (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna)) 2570 lo += 0x10; 2571 hi = lo + 0x20; 2572 2573 /* retrieve false CCA count since last call (clear on read) */ 2574 cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff; 2575 2576 if (dbm >= -35) { 2577 bbp17 = 0x60; 2578 } else if (dbm >= -58) { 2579 bbp17 = hi; 2580 } else if (dbm >= -66) { 2581 bbp17 = lo + 0x10; 2582 } else if (dbm >= -74) { 2583 bbp17 = lo + 0x08; 2584 } else { 2585 /* RSSI < -74dBm, tune using false CCA count */ 2586 2587 bbp17 = sc->bbp17; /* current value */ 2588 2589 hi -= 2 * (-74 - dbm); 2590 if (hi < lo) 2591 hi = lo; 2592 2593 if (bbp17 > hi) { 2594 bbp17 = hi; 2595 2596 } else if (cca > 512) { 2597 if (++bbp17 > hi) 2598 bbp17 = hi; 2599 } else if (cca < 100) { 2600 if (--bbp17 < lo) 2601 bbp17 = lo; 2602 } 2603 } 2604 2605 if (bbp17 != sc->bbp17) { 2606 rt2661_bbp_write(sc, 17, bbp17); 2607 sc->bbp17 = bbp17; 2608 } 2609 } 2610 2611 /* 2612 * Enter/Leave radar detection mode. 2613 * This is for 802.11h additional regulatory domains. 2614 */ 2615 static void 2616 rt2661_radar_start(struct rt2661_softc *sc) 2617 { 2618 uint32_t tmp; 2619 2620 /* disable Rx */ 2621 tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2622 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 2623 2624 rt2661_bbp_write(sc, 82, 0x20); 2625 rt2661_bbp_write(sc, 83, 0x00); 2626 rt2661_bbp_write(sc, 84, 0x40); 2627 2628 /* save current BBP registers values */ 2629 sc->bbp18 = rt2661_bbp_read(sc, 18); 2630 sc->bbp21 = rt2661_bbp_read(sc, 21); 2631 sc->bbp22 = rt2661_bbp_read(sc, 22); 2632 sc->bbp16 = rt2661_bbp_read(sc, 16); 2633 sc->bbp17 = rt2661_bbp_read(sc, 17); 2634 sc->bbp64 = rt2661_bbp_read(sc, 64); 2635 2636 rt2661_bbp_write(sc, 18, 0xff); 2637 rt2661_bbp_write(sc, 21, 0x3f); 2638 rt2661_bbp_write(sc, 22, 0x3f); 2639 rt2661_bbp_write(sc, 16, 0xbd); 2640 rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34); 2641 rt2661_bbp_write(sc, 64, 0x21); 2642 2643 /* restore Rx filter */ 2644 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2645 } 2646 2647 static int 2648 rt2661_radar_stop(struct rt2661_softc *sc) 2649 { 2650 uint8_t bbp66; 2651 2652 /* read radar detection result */ 2653 bbp66 = rt2661_bbp_read(sc, 66); 2654 2655 /* restore BBP registers values */ 2656 rt2661_bbp_write(sc, 16, sc->bbp16); 2657 rt2661_bbp_write(sc, 17, sc->bbp17); 2658 rt2661_bbp_write(sc, 18, sc->bbp18); 2659 rt2661_bbp_write(sc, 21, sc->bbp21); 2660 rt2661_bbp_write(sc, 22, sc->bbp22); 2661 rt2661_bbp_write(sc, 64, sc->bbp64); 2662 2663 return bbp66 == 1; 2664 } 2665 #endif 2666 2667 static int 2668 rt2661_prepare_beacon(struct rt2661_softc *sc, struct ieee80211vap *vap) 2669 { 2670 struct ieee80211com *ic = vap->iv_ic; 2671 struct ieee80211_beacon_offsets bo; 2672 struct rt2661_tx_desc desc; 2673 struct mbuf *m0; 2674 int rate; 2675 2676 m0 = ieee80211_beacon_alloc(vap->iv_bss, &bo); 2677 if (m0 == NULL) { 2678 device_printf(sc->sc_dev, "could not allocate beacon frame\n"); 2679 return ENOBUFS; 2680 } 2681 2682 /* send beacons at the lowest available rate */ 2683 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan) ? 12 : 2; 2684 2685 rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ, 2686 m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT); 2687 2688 /* copy the first 24 bytes of Tx descriptor into NIC memory */ 2689 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24); 2690 2691 /* copy beacon header and payload into NIC memory */ 2692 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24, 2693 mtod(m0, uint8_t *), m0->m_pkthdr.len); 2694 2695 m_freem(m0); 2696 2697 return 0; 2698 } 2699 2700 /* 2701 * Enable TSF synchronization and tell h/w to start sending beacons for IBSS 2702 * and HostAP operating modes. 2703 */ 2704 static void 2705 rt2661_enable_tsf_sync(struct rt2661_softc *sc) 2706 { 2707 struct ifnet *ifp = sc->sc_ifp; 2708 struct ieee80211com *ic = ifp->if_l2com; 2709 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2710 uint32_t tmp; 2711 2712 if (vap->iv_opmode != IEEE80211_M_STA) { 2713 /* 2714 * Change default 16ms TBTT adjustment to 8ms. 2715 * Must be done before enabling beacon generation. 2716 */ 2717 RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8); 2718 } 2719 2720 tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000; 2721 2722 /* set beacon interval (in 1/16ms unit) */ 2723 tmp |= vap->iv_bss->ni_intval * 16; 2724 2725 tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT; 2726 if (vap->iv_opmode == IEEE80211_M_STA) 2727 tmp |= RT2661_TSF_MODE(1); 2728 else 2729 tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON; 2730 2731 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp); 2732 } 2733 2734 static void 2735 rt2661_enable_tsf(struct rt2661_softc *sc) 2736 { 2737 RAL_WRITE(sc, RT2661_TXRX_CSR9, 2738 (RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000) 2739 | RT2661_TSF_TICKING | RT2661_TSF_MODE(2)); 2740 } 2741 2742 /* 2743 * Retrieve the "Received Signal Strength Indicator" from the raw values 2744 * contained in Rx descriptors. The computation depends on which band the 2745 * frame was received. Correction values taken from the reference driver. 2746 */ 2747 static int 2748 rt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw) 2749 { 2750 int lna, agc, rssi; 2751 2752 lna = (raw >> 5) & 0x3; 2753 agc = raw & 0x1f; 2754 2755 if (lna == 0) { 2756 /* 2757 * No mapping available. 2758 * 2759 * NB: Since RSSI is relative to noise floor, -1 is 2760 * adequate for caller to know error happened. 2761 */ 2762 return -1; 2763 } 2764 2765 rssi = (2 * agc) - RT2661_NOISE_FLOOR; 2766 2767 if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) { 2768 rssi += sc->rssi_2ghz_corr; 2769 2770 if (lna == 1) 2771 rssi -= 64; 2772 else if (lna == 2) 2773 rssi -= 74; 2774 else if (lna == 3) 2775 rssi -= 90; 2776 } else { 2777 rssi += sc->rssi_5ghz_corr; 2778 2779 if (lna == 1) 2780 rssi -= 64; 2781 else if (lna == 2) 2782 rssi -= 86; 2783 else if (lna == 3) 2784 rssi -= 100; 2785 } 2786 return rssi; 2787 } 2788 2789 static void 2790 rt2661_scan_start(struct ieee80211com *ic) 2791 { 2792 struct ifnet *ifp = ic->ic_ifp; 2793 struct rt2661_softc *sc = ic->ic_softc; 2794 uint32_t tmp; 2795 2796 /* abort TSF synchronization */ 2797 tmp = RAL_READ(sc, RT2661_TXRX_CSR9); 2798 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0xffffff); 2799 rt2661_set_bssid(sc, ifp->if_broadcastaddr); 2800 } 2801 2802 static void 2803 rt2661_scan_end(struct ieee80211com *ic) 2804 { 2805 struct rt2661_softc *sc = ic->ic_softc; 2806 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2807 2808 rt2661_enable_tsf_sync(sc); 2809 /* XXX keep local copy */ 2810 rt2661_set_bssid(sc, vap->iv_bss->ni_bssid); 2811 } 2812 2813 static void 2814 rt2661_set_channel(struct ieee80211com *ic) 2815 { 2816 struct rt2661_softc *sc = ic->ic_softc; 2817 2818 rt2661_set_chan(sc, ic->ic_curchan); 2819 } 2820