1 /* 2 * Copyright (c) 1996 Gardner Buchanan <gbuchanan@shl.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Gardner Buchanan. 16 * 4. The name of Gardner Buchanan may not be used to endorse or promote 17 * products derived from this software without specific prior written 18 * permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 * $FreeBSD: src/sys/dev/sn/if_sn.c,v 1.7.2.3 2001/02/04 04:38:38 toshi Exp $ 32 * $DragonFly: src/sys/dev/netif/sn/if_sn.c,v 1.2 2003/06/17 04:28:29 dillon Exp $ 33 */ 34 35 /* 36 * This is a driver for SMC's 9000 series of Ethernet adapters. 37 * 38 * This FreeBSD driver is derived from the smc9194 Linux driver by 39 * Erik Stahlman and is Copyright (C) 1996 by Erik Stahlman. 40 * This driver also shamelessly borrows from the FreeBSD ep driver 41 * which is Copyright (C) 1994 Herb Peyerl <hpeyerl@novatel.ca> 42 * All rights reserved. 43 * 44 * It is set up for my SMC91C92 equipped Ampro LittleBoard embedded 45 * PC. It is adapted from Erik Stahlman's Linux driver which worked 46 * with his EFA Info*Express SVC VLB adaptor. According to SMC's databook, 47 * it will work for the entire SMC 9xxx series. (Ha Ha) 48 * 49 * "Features" of the SMC chip: 50 * 4608 byte packet memory. (for the 91C92. Others have more) 51 * EEPROM for configuration 52 * AUI/TP selection 53 * 54 * Authors: 55 * Erik Stahlman erik@vt.edu 56 * Herb Peyerl hpeyerl@novatel.ca 57 * Andres Vega Garcia avega@sophia.inria.fr 58 * Serge Babkin babkin@hq.icb.chel.su 59 * Gardner Buchanan gbuchanan@shl.com 60 * 61 * Sources: 62 * o SMC databook 63 * o "smc9194.c:v0.10(FIXED) 02/15/96 by Erik Stahlman (erik@vt.edu)" 64 * o "if_ep.c,v 1.19 1995/01/24 20:53:45 davidg Exp" 65 * 66 * Known Bugs: 67 * o The hardware multicast filter isn't used yet. 68 * o Setting of the hardware address isn't supported. 69 * o Hardware padding isn't used. 70 */ 71 72 /* 73 * Modifications for Megahertz X-Jack Ethernet Card (XJ-10BT) 74 * 75 * Copyright (c) 1996 by Tatsumi Hosokawa <hosokawa@jp.FreeBSD.org> 76 * BSD-nomads, Tokyo, Japan. 77 */ 78 /* 79 * Multicast support by Kei TANAKA <kei@pal.xerox.com> 80 * Special thanks to itojun@itojun.org 81 */ 82 83 #undef SN_DEBUG /* (by hosokawa) */ 84 85 #include <sys/param.h> 86 #include <sys/systm.h> 87 #include <sys/kernel.h> 88 #include <sys/errno.h> 89 #include <sys/sockio.h> 90 #include <sys/malloc.h> 91 #include <sys/mbuf.h> 92 #include <sys/socket.h> 93 #include <sys/syslog.h> 94 95 #include <sys/module.h> 96 #include <sys/bus.h> 97 98 #include <machine/bus.h> 99 #include <machine/resource.h> 100 #include <sys/rman.h> 101 102 #include <net/ethernet.h> 103 #include <net/if.h> 104 #include <net/if_arp.h> 105 #include <net/if_dl.h> 106 #include <net/if_types.h> 107 #include <net/if_mib.h> 108 109 #ifdef INET 110 #include <netinet/in.h> 111 #include <netinet/in_systm.h> 112 #include <netinet/in_var.h> 113 #include <netinet/ip.h> 114 #endif 115 116 #ifdef NS 117 #include <netns/ns.h> 118 #include <netns/ns_if.h> 119 #endif 120 121 #include <net/bpf.h> 122 #include <net/bpfdesc.h> 123 124 #include <machine/clock.h> 125 126 #include <dev/sn/if_snreg.h> 127 #include <dev/sn/if_snvar.h> 128 129 /* Exported variables */ 130 devclass_t sn_devclass; 131 132 static int snioctl(struct ifnet * ifp, u_long, caddr_t); 133 134 static void snresume(struct ifnet *); 135 136 void sninit(void *); 137 void snread(struct ifnet *); 138 void snreset(struct sn_softc *); 139 void snstart(struct ifnet *); 140 void snstop(struct sn_softc *); 141 void snwatchdog(struct ifnet *); 142 143 static void sn_setmcast(struct sn_softc *); 144 static int sn_getmcf(struct arpcom *ac, u_char *mcf); 145 static u_int smc_crc(u_char *); 146 147 /* I (GB) have been unlucky getting the hardware padding 148 * to work properly. 149 */ 150 #define SW_PAD 151 152 static const char *chip_ids[15] = { 153 NULL, NULL, NULL, 154 /* 3 */ "SMC91C90/91C92", 155 /* 4 */ "SMC91C94", 156 /* 5 */ "SMC91C95", 157 NULL, 158 /* 7 */ "SMC91C100", 159 /* 8 */ "SMC91C100FD", 160 NULL, NULL, NULL, 161 NULL, NULL, NULL 162 }; 163 164 int 165 sn_attach(device_t dev) 166 { 167 struct sn_softc *sc = device_get_softc(dev); 168 struct ifnet *ifp = &sc->arpcom.ac_if; 169 u_short i; 170 u_char *p; 171 struct ifaddr *ifa; 172 struct sockaddr_dl *sdl; 173 int rev; 174 u_short address; 175 int j; 176 177 sn_activate(dev); 178 179 snstop(sc); 180 181 sc->dev = dev; 182 sc->pages_wanted = -1; 183 184 device_printf(dev, " "); 185 186 SMC_SELECT_BANK(3); 187 rev = inw(BASE + REVISION_REG_W); 188 if (chip_ids[(rev >> 4) & 0xF]) 189 printf("%s ", chip_ids[(rev >> 4) & 0xF]); 190 191 SMC_SELECT_BANK(1); 192 i = inw(BASE + CONFIG_REG_W); 193 printf(i & CR_AUI_SELECT ? "AUI" : "UTP"); 194 195 if (sc->pccard_enaddr) 196 for (j = 0; j < 3; j++) { 197 u_short w; 198 199 w = (u_short)sc->arpcom.ac_enaddr[j * 2] | 200 (((u_short)sc->arpcom.ac_enaddr[j * 2 + 1]) << 8); 201 outw(BASE + IAR_ADDR0_REG_W + j * 2, w); 202 } 203 204 /* 205 * Read the station address from the chip. The MAC address is bank 1, 206 * regs 4 - 9 207 */ 208 SMC_SELECT_BANK(1); 209 p = (u_char *) & sc->arpcom.ac_enaddr; 210 for (i = 0; i < 6; i += 2) { 211 address = inw(BASE + IAR_ADDR0_REG_W + i); 212 p[i + 1] = address >> 8; 213 p[i] = address & 0xFF; 214 } 215 printf(" MAC address %6D\n", sc->arpcom.ac_enaddr, ":"); 216 ifp->if_softc = sc; 217 ifp->if_unit = device_get_unit(dev); 218 ifp->if_name = "sn"; 219 ifp->if_mtu = ETHERMTU; 220 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 221 ifp->if_output = ether_output; 222 ifp->if_start = snstart; 223 ifp->if_ioctl = snioctl; 224 ifp->if_watchdog = snwatchdog; 225 ifp->if_init = sninit; 226 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN; 227 ifp->if_timer = 0; 228 229 ether_ifattach(ifp, ETHER_BPF_SUPPORTED); 230 231 /* 232 * Fill the hardware address into ifa_addr if we find an AF_LINK 233 * entry. We need to do this so bpf's can get the hardware addr of 234 * this card. netstat likes this too! 235 */ 236 ifa = TAILQ_FIRST(&ifp->if_addrhead); 237 while ((ifa != 0) && (ifa->ifa_addr != 0) && 238 (ifa->ifa_addr->sa_family != AF_LINK)) 239 ifa = TAILQ_NEXT(ifa, ifa_link); 240 241 if ((ifa != 0) && (ifa->ifa_addr != 0)) { 242 sdl = (struct sockaddr_dl *) ifa->ifa_addr; 243 sdl->sdl_type = IFT_ETHER; 244 sdl->sdl_alen = ETHER_ADDR_LEN; 245 sdl->sdl_slen = 0; 246 bcopy(sc->arpcom.ac_enaddr, LLADDR(sdl), ETHER_ADDR_LEN); 247 } 248 249 return 0; 250 } 251 252 253 /* 254 * Reset and initialize the chip 255 */ 256 void 257 sninit(void *xsc) 258 { 259 register struct sn_softc *sc = xsc; 260 register struct ifnet *ifp = &sc->arpcom.ac_if; 261 int s; 262 int flags; 263 int mask; 264 265 s = splimp(); 266 267 /* 268 * This resets the registers mostly to defaults, but doesn't affect 269 * EEPROM. After the reset cycle, we pause briefly for the chip to 270 * be happy. 271 */ 272 SMC_SELECT_BANK(0); 273 outw(BASE + RECV_CONTROL_REG_W, RCR_SOFTRESET); 274 SMC_DELAY(); 275 outw(BASE + RECV_CONTROL_REG_W, 0x0000); 276 SMC_DELAY(); 277 SMC_DELAY(); 278 279 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000); 280 281 /* 282 * Set the control register to automatically release succesfully 283 * transmitted packets (making the best use out of our limited 284 * memory) and to enable the EPH interrupt on certain TX errors. 285 */ 286 SMC_SELECT_BANK(1); 287 outw(BASE + CONTROL_REG_W, (CTR_AUTO_RELEASE | CTR_TE_ENABLE | 288 CTR_CR_ENABLE | CTR_LE_ENABLE)); 289 290 /* Set squelch level to 240mV (default 480mV) */ 291 flags = inw(BASE + CONFIG_REG_W); 292 flags |= CR_SET_SQLCH; 293 outw(BASE + CONFIG_REG_W, flags); 294 295 /* 296 * Reset the MMU and wait for it to be un-busy. 297 */ 298 SMC_SELECT_BANK(2); 299 outw(BASE + MMU_CMD_REG_W, MMUCR_RESET); 300 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 301 ; 302 303 /* 304 * Disable all interrupts 305 */ 306 outb(BASE + INTR_MASK_REG_B, 0x00); 307 308 sn_setmcast(sc); 309 310 /* 311 * Set the transmitter control. We want it enabled. 312 */ 313 flags = TCR_ENABLE; 314 315 #ifndef SW_PAD 316 /* 317 * I (GB) have been unlucky getting this to work. 318 */ 319 flags |= TCR_PAD_ENABLE; 320 #endif /* SW_PAD */ 321 322 outw(BASE + TXMIT_CONTROL_REG_W, flags); 323 324 325 /* 326 * Now, enable interrupts 327 */ 328 SMC_SELECT_BANK(2); 329 330 mask = IM_EPH_INT | 331 IM_RX_OVRN_INT | 332 IM_RCV_INT | 333 IM_TX_INT; 334 335 outb(BASE + INTR_MASK_REG_B, mask); 336 sc->intr_mask = mask; 337 sc->pages_wanted = -1; 338 339 340 /* 341 * Mark the interface running but not active. 342 */ 343 ifp->if_flags |= IFF_RUNNING; 344 ifp->if_flags &= ~IFF_OACTIVE; 345 346 /* 347 * Attempt to push out any waiting packets. 348 */ 349 snstart(ifp); 350 351 splx(s); 352 } 353 354 355 void 356 snstart(struct ifnet *ifp) 357 { 358 register struct sn_softc *sc = ifp->if_softc; 359 register u_int len; 360 register struct mbuf *m; 361 struct mbuf *top; 362 int s, pad; 363 int mask; 364 u_short length; 365 u_short numPages; 366 u_char packet_no; 367 int time_out; 368 369 s = splimp(); 370 371 if (sc->arpcom.ac_if.if_flags & IFF_OACTIVE) { 372 splx(s); 373 return; 374 } 375 if (sc->pages_wanted != -1) { 376 splx(s); 377 printf("sn%d: snstart() while memory allocation pending\n", 378 ifp->if_unit); 379 return; 380 } 381 startagain: 382 383 /* 384 * Sneak a peek at the next packet 385 */ 386 m = sc->arpcom.ac_if.if_snd.ifq_head; 387 if (m == 0) { 388 splx(s); 389 return; 390 } 391 /* 392 * Compute the frame length and set pad to give an overall even 393 * number of bytes. Below we assume that the packet length is even. 394 */ 395 for (len = 0, top = m; m; m = m->m_next) 396 len += m->m_len; 397 398 pad = (len & 1); 399 400 /* 401 * We drop packets that are too large. Perhaps we should truncate 402 * them instead? 403 */ 404 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) { 405 printf("sn%d: large packet discarded (A)\n", ifp->if_unit); 406 ++sc->arpcom.ac_if.if_oerrors; 407 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); 408 m_freem(m); 409 goto readcheck; 410 } 411 #ifdef SW_PAD 412 413 /* 414 * If HW padding is not turned on, then pad to ETHER_MIN_LEN. 415 */ 416 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN) 417 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 418 419 #endif /* SW_PAD */ 420 421 length = pad + len; 422 423 /* 424 * The MMU wants the number of pages to be the number of 256 byte 425 * 'pages', minus 1 (A packet can't ever have 0 pages. We also 426 * include space for the status word, byte count and control bytes in 427 * the allocation request. 428 */ 429 numPages = (length + 6) >> 8; 430 431 432 /* 433 * Now, try to allocate the memory 434 */ 435 SMC_SELECT_BANK(2); 436 outw(BASE + MMU_CMD_REG_W, MMUCR_ALLOC | numPages); 437 438 /* 439 * Wait a short amount of time to see if the allocation request 440 * completes. Otherwise, I enable the interrupt and wait for 441 * completion asyncronously. 442 */ 443 444 time_out = MEMORY_WAIT_TIME; 445 do { 446 if (inb(BASE + INTR_STAT_REG_B) & IM_ALLOC_INT) 447 break; 448 } while (--time_out); 449 450 if (!time_out) { 451 452 /* 453 * No memory now. Oh well, wait until the chip finds memory 454 * later. Remember how many pages we were asking for and 455 * enable the allocation completion interrupt. Also set a 456 * watchdog in case we miss the interrupt. We mark the 457 * interface active since there is no point in attempting an 458 * snstart() until after the memory is available. 459 */ 460 mask = inb(BASE + INTR_MASK_REG_B) | IM_ALLOC_INT; 461 outb(BASE + INTR_MASK_REG_B, mask); 462 sc->intr_mask = mask; 463 464 sc->arpcom.ac_if.if_timer = 1; 465 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE; 466 sc->pages_wanted = numPages; 467 468 splx(s); 469 return; 470 } 471 /* 472 * The memory allocation completed. Check the results. 473 */ 474 packet_no = inb(BASE + ALLOC_RESULT_REG_B); 475 if (packet_no & ARR_FAILED) { 476 printf("sn%d: Memory allocation failed\n", ifp->if_unit); 477 goto startagain; 478 } 479 /* 480 * We have a packet number, so tell the card to use it. 481 */ 482 outb(BASE + PACKET_NUM_REG_B, packet_no); 483 484 /* 485 * Point to the beginning of the packet 486 */ 487 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000); 488 489 /* 490 * Send the packet length (+6 for status, length and control byte) 491 * and the status word (set to zeros) 492 */ 493 outw(BASE + DATA_REG_W, 0); 494 outb(BASE + DATA_REG_B, (length + 6) & 0xFF); 495 outb(BASE + DATA_REG_B, (length + 6) >> 8); 496 497 /* 498 * Get the packet from the kernel. This will include the Ethernet 499 * frame header, MAC Addresses etc. 500 */ 501 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); 502 503 /* 504 * Push out the data to the card. 505 */ 506 for (top = m; m != 0; m = m->m_next) { 507 508 /* 509 * Push out words. 510 */ 511 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2); 512 513 /* 514 * Push out remaining byte. 515 */ 516 if (m->m_len & 1) 517 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1)); 518 } 519 520 /* 521 * Push out padding. 522 */ 523 while (pad > 1) { 524 outw(BASE + DATA_REG_W, 0); 525 pad -= 2; 526 } 527 if (pad) 528 outb(BASE + DATA_REG_B, 0); 529 530 /* 531 * Push out control byte and unused packet byte The control byte is 0 532 * meaning the packet is even lengthed and no special CRC handling is 533 * desired. 534 */ 535 outw(BASE + DATA_REG_W, 0); 536 537 /* 538 * Enable the interrupts and let the chipset deal with it Also set a 539 * watchdog in case we miss the interrupt. 540 */ 541 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT); 542 outb(BASE + INTR_MASK_REG_B, mask); 543 sc->intr_mask = mask; 544 545 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE); 546 547 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE; 548 sc->arpcom.ac_if.if_timer = 1; 549 550 if (ifp->if_bpf) { 551 bpf_mtap(ifp, top); 552 } 553 554 sc->arpcom.ac_if.if_opackets++; 555 m_freem(top); 556 557 558 readcheck: 559 560 /* 561 * Is another packet coming in? We don't want to overflow the tiny 562 * RX FIFO. If nothing has arrived then attempt to queue another 563 * transmit packet. 564 */ 565 if (inw(BASE + FIFO_PORTS_REG_W) & FIFO_REMPTY) 566 goto startagain; 567 568 splx(s); 569 return; 570 } 571 572 573 574 /* Resume a packet transmit operation after a memory allocation 575 * has completed. 576 * 577 * This is basically a hacked up copy of snstart() which handles 578 * a completed memory allocation the same way snstart() does. 579 * It then passes control to snstart to handle any other queued 580 * packets. 581 */ 582 static void 583 snresume(struct ifnet *ifp) 584 { 585 register struct sn_softc *sc = ifp->if_softc; 586 register u_int len; 587 register struct mbuf *m; 588 struct mbuf *top; 589 int pad; 590 int mask; 591 u_short length; 592 u_short numPages; 593 u_short pages_wanted; 594 u_char packet_no; 595 596 if (sc->pages_wanted < 0) 597 return; 598 599 pages_wanted = sc->pages_wanted; 600 sc->pages_wanted = -1; 601 602 /* 603 * Sneak a peek at the next packet 604 */ 605 m = sc->arpcom.ac_if.if_snd.ifq_head; 606 if (m == 0) { 607 printf("sn%d: snresume() with nothing to send\n", ifp->if_unit); 608 return; 609 } 610 /* 611 * Compute the frame length and set pad to give an overall even 612 * number of bytes. Below we assume that the packet length is even. 613 */ 614 for (len = 0, top = m; m; m = m->m_next) 615 len += m->m_len; 616 617 pad = (len & 1); 618 619 /* 620 * We drop packets that are too large. Perhaps we should truncate 621 * them instead? 622 */ 623 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) { 624 printf("sn%d: large packet discarded (B)\n", ifp->if_unit); 625 ++sc->arpcom.ac_if.if_oerrors; 626 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); 627 m_freem(m); 628 return; 629 } 630 #ifdef SW_PAD 631 632 /* 633 * If HW padding is not turned on, then pad to ETHER_MIN_LEN. 634 */ 635 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN) 636 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 637 638 #endif /* SW_PAD */ 639 640 length = pad + len; 641 642 643 /* 644 * The MMU wants the number of pages to be the number of 256 byte 645 * 'pages', minus 1 (A packet can't ever have 0 pages. We also 646 * include space for the status word, byte count and control bytes in 647 * the allocation request. 648 */ 649 numPages = (length + 6) >> 8; 650 651 652 SMC_SELECT_BANK(2); 653 654 /* 655 * The memory allocation completed. Check the results. If it failed, 656 * we simply set a watchdog timer and hope for the best. 657 */ 658 packet_no = inb(BASE + ALLOC_RESULT_REG_B); 659 if (packet_no & ARR_FAILED) { 660 printf("sn%d: Memory allocation failed. Weird.\n", ifp->if_unit); 661 sc->arpcom.ac_if.if_timer = 1; 662 goto try_start; 663 } 664 /* 665 * We have a packet number, so tell the card to use it. 666 */ 667 outb(BASE + PACKET_NUM_REG_B, packet_no); 668 669 /* 670 * Now, numPages should match the pages_wanted recorded when the 671 * memory allocation was initiated. 672 */ 673 if (pages_wanted != numPages) { 674 printf("sn%d: memory allocation wrong size. Weird.\n", ifp->if_unit); 675 /* 676 * If the allocation was the wrong size we simply release the 677 * memory once it is granted. Wait for the MMU to be un-busy. 678 */ 679 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 680 ; 681 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT); 682 683 return; 684 } 685 /* 686 * Point to the beginning of the packet 687 */ 688 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000); 689 690 /* 691 * Send the packet length (+6 for status, length and control byte) 692 * and the status word (set to zeros) 693 */ 694 outw(BASE + DATA_REG_W, 0); 695 outb(BASE + DATA_REG_B, (length + 6) & 0xFF); 696 outb(BASE + DATA_REG_B, (length + 6) >> 8); 697 698 /* 699 * Get the packet from the kernel. This will include the Ethernet 700 * frame header, MAC Addresses etc. 701 */ 702 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); 703 704 /* 705 * Push out the data to the card. 706 */ 707 for (top = m; m != 0; m = m->m_next) { 708 709 /* 710 * Push out words. 711 */ 712 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2); 713 714 /* 715 * Push out remaining byte. 716 */ 717 if (m->m_len & 1) 718 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1)); 719 } 720 721 /* 722 * Push out padding. 723 */ 724 while (pad > 1) { 725 outw(BASE + DATA_REG_W, 0); 726 pad -= 2; 727 } 728 if (pad) 729 outb(BASE + DATA_REG_B, 0); 730 731 /* 732 * Push out control byte and unused packet byte The control byte is 0 733 * meaning the packet is even lengthed and no special CRC handling is 734 * desired. 735 */ 736 outw(BASE + DATA_REG_W, 0); 737 738 /* 739 * Enable the interrupts and let the chipset deal with it Also set a 740 * watchdog in case we miss the interrupt. 741 */ 742 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT); 743 outb(BASE + INTR_MASK_REG_B, mask); 744 sc->intr_mask = mask; 745 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE); 746 747 if (ifp->if_bpf) { 748 bpf_mtap(ifp, top); 749 } 750 751 sc->arpcom.ac_if.if_opackets++; 752 m_freem(top); 753 754 try_start: 755 756 /* 757 * Now pass control to snstart() to queue any additional packets 758 */ 759 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 760 snstart(ifp); 761 762 /* 763 * We've sent something, so we're active. Set a watchdog in case the 764 * TX_EMPTY interrupt is lost. 765 */ 766 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE; 767 sc->arpcom.ac_if.if_timer = 1; 768 769 return; 770 } 771 772 773 void 774 sn_intr(void *arg) 775 { 776 int status, interrupts; 777 register struct sn_softc *sc = (struct sn_softc *) arg; 778 struct ifnet *ifp = &sc->arpcom.ac_if; 779 int x; 780 781 /* 782 * Chip state registers 783 */ 784 u_char mask; 785 u_char packet_no; 786 u_short tx_status; 787 u_short card_stats; 788 789 /* 790 * if_ep.c did this, so I do too. Yet if_ed.c doesn't. I wonder... 791 */ 792 x = splbio(); 793 794 /* 795 * Clear the watchdog. 796 */ 797 ifp->if_timer = 0; 798 799 SMC_SELECT_BANK(2); 800 801 /* 802 * Obtain the current interrupt mask and clear the hardware mask 803 * while servicing interrupts. 804 */ 805 mask = inb(BASE + INTR_MASK_REG_B); 806 outb(BASE + INTR_MASK_REG_B, 0x00); 807 808 /* 809 * Get the set of interrupts which occurred and eliminate any which 810 * are masked. 811 */ 812 interrupts = inb(BASE + INTR_STAT_REG_B); 813 status = interrupts & mask; 814 815 /* 816 * Now, process each of the interrupt types. 817 */ 818 819 /* 820 * Receive Overrun. 821 */ 822 if (status & IM_RX_OVRN_INT) { 823 824 /* 825 * Acknowlege Interrupt 826 */ 827 SMC_SELECT_BANK(2); 828 outb(BASE + INTR_ACK_REG_B, IM_RX_OVRN_INT); 829 830 ++sc->arpcom.ac_if.if_ierrors; 831 } 832 /* 833 * Got a packet. 834 */ 835 if (status & IM_RCV_INT) { 836 #if 1 837 int packet_number; 838 839 SMC_SELECT_BANK(2); 840 packet_number = inw(BASE + FIFO_PORTS_REG_W); 841 842 if (packet_number & FIFO_REMPTY) { 843 844 /* 845 * we got called , but nothing was on the FIFO 846 */ 847 printf("sn: Receive interrupt with nothing on FIFO\n"); 848 849 goto out; 850 } 851 #endif 852 snread(ifp); 853 } 854 /* 855 * An on-card memory allocation came through. 856 */ 857 if (status & IM_ALLOC_INT) { 858 859 /* 860 * Disable this interrupt. 861 */ 862 mask &= ~IM_ALLOC_INT; 863 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 864 snresume(&sc->arpcom.ac_if); 865 } 866 /* 867 * TX Completion. Handle a transmit error message. This will only be 868 * called when there is an error, because of the AUTO_RELEASE mode. 869 */ 870 if (status & IM_TX_INT) { 871 872 /* 873 * Acknowlege Interrupt 874 */ 875 SMC_SELECT_BANK(2); 876 outb(BASE + INTR_ACK_REG_B, IM_TX_INT); 877 878 packet_no = inw(BASE + FIFO_PORTS_REG_W); 879 packet_no &= FIFO_TX_MASK; 880 881 /* 882 * select this as the packet to read from 883 */ 884 outb(BASE + PACKET_NUM_REG_B, packet_no); 885 886 /* 887 * Position the pointer to the first word from this packet 888 */ 889 outw(BASE + POINTER_REG_W, PTR_AUTOINC | PTR_READ | 0x0000); 890 891 /* 892 * Fetch the TX status word. The value found here will be a 893 * copy of the EPH_STATUS_REG_W at the time the transmit 894 * failed. 895 */ 896 tx_status = inw(BASE + DATA_REG_W); 897 898 if (tx_status & EPHSR_TX_SUC) { 899 device_printf(sc->dev, 900 "Successful packet caused interrupt\n"); 901 } else { 902 ++sc->arpcom.ac_if.if_oerrors; 903 } 904 905 if (tx_status & EPHSR_LATCOL) 906 ++sc->arpcom.ac_if.if_collisions; 907 908 /* 909 * Some of these errors will have disabled transmit. 910 * Re-enable transmit now. 911 */ 912 SMC_SELECT_BANK(0); 913 914 #ifdef SW_PAD 915 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE); 916 #else 917 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE | TCR_PAD_ENABLE); 918 #endif /* SW_PAD */ 919 920 /* 921 * kill the failed packet. Wait for the MMU to be un-busy. 922 */ 923 SMC_SELECT_BANK(2); 924 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 925 ; 926 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT); 927 928 /* 929 * Attempt to queue more transmits. 930 */ 931 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 932 snstart(&sc->arpcom.ac_if); 933 } 934 /* 935 * Transmit underrun. We use this opportunity to update transmit 936 * statistics from the card. 937 */ 938 if (status & IM_TX_EMPTY_INT) { 939 940 /* 941 * Acknowlege Interrupt 942 */ 943 SMC_SELECT_BANK(2); 944 outb(BASE + INTR_ACK_REG_B, IM_TX_EMPTY_INT); 945 946 /* 947 * Disable this interrupt. 948 */ 949 mask &= ~IM_TX_EMPTY_INT; 950 951 SMC_SELECT_BANK(0); 952 card_stats = inw(BASE + COUNTER_REG_W); 953 954 /* 955 * Single collisions 956 */ 957 sc->arpcom.ac_if.if_collisions += card_stats & ECR_COLN_MASK; 958 959 /* 960 * Multiple collisions 961 */ 962 sc->arpcom.ac_if.if_collisions += (card_stats & ECR_MCOLN_MASK) >> 4; 963 964 SMC_SELECT_BANK(2); 965 966 /* 967 * Attempt to enqueue some more stuff. 968 */ 969 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 970 snstart(&sc->arpcom.ac_if); 971 } 972 /* 973 * Some other error. Try to fix it by resetting the adapter. 974 */ 975 if (status & IM_EPH_INT) { 976 snstop(sc); 977 sninit(sc); 978 } 979 980 out: 981 /* 982 * Handled all interrupt sources. 983 */ 984 985 SMC_SELECT_BANK(2); 986 987 /* 988 * Reestablish interrupts from mask which have not been deselected 989 * during this interrupt. Note that the hardware mask, which was set 990 * to 0x00 at the start of this service routine, may have been 991 * updated by one or more of the interrupt handers and we must let 992 * those new interrupts stay enabled here. 993 */ 994 mask |= inb(BASE + INTR_MASK_REG_B); 995 outb(BASE + INTR_MASK_REG_B, mask); 996 sc->intr_mask = mask; 997 998 splx(x); 999 } 1000 1001 void 1002 snread(register struct ifnet *ifp) 1003 { 1004 struct sn_softc *sc = ifp->if_softc; 1005 struct ether_header *eh; 1006 struct mbuf *m; 1007 short status; 1008 int packet_number; 1009 u_short packet_length; 1010 u_char *data; 1011 1012 SMC_SELECT_BANK(2); 1013 #if 0 1014 packet_number = inw(BASE + FIFO_PORTS_REG_W); 1015 1016 if (packet_number & FIFO_REMPTY) { 1017 1018 /* 1019 * we got called , but nothing was on the FIFO 1020 */ 1021 printf("sn: Receive interrupt with nothing on FIFO\n"); 1022 return; 1023 } 1024 #endif 1025 read_another: 1026 1027 /* 1028 * Start reading from the start of the packet. Since PTR_RCV is set, 1029 * packet number is found in FIFO_PORTS_REG_W, FIFO_RX_MASK. 1030 */ 1031 outw(BASE + POINTER_REG_W, PTR_READ | PTR_RCV | PTR_AUTOINC | 0x0000); 1032 1033 /* 1034 * First two words are status and packet_length 1035 */ 1036 status = inw(BASE + DATA_REG_W); 1037 packet_length = inw(BASE + DATA_REG_W) & RLEN_MASK; 1038 1039 /* 1040 * The packet length contains 3 extra words: status, length, and a 1041 * extra word with the control byte. 1042 */ 1043 packet_length -= 6; 1044 1045 /* 1046 * Account for receive errors and discard. 1047 */ 1048 if (status & RS_ERRORS) { 1049 ++sc->arpcom.ac_if.if_ierrors; 1050 goto out; 1051 } 1052 /* 1053 * A packet is received. 1054 */ 1055 1056 /* 1057 * Adjust for odd-length packet. 1058 */ 1059 if (status & RS_ODDFRAME) 1060 packet_length++; 1061 1062 /* 1063 * Allocate a header mbuf from the kernel. 1064 */ 1065 MGETHDR(m, M_DONTWAIT, MT_DATA); 1066 if (m == NULL) 1067 goto out; 1068 1069 m->m_pkthdr.rcvif = &sc->arpcom.ac_if; 1070 m->m_pkthdr.len = m->m_len = packet_length; 1071 1072 /* 1073 * Attach an mbuf cluster 1074 */ 1075 MCLGET(m, M_DONTWAIT); 1076 1077 /* 1078 * Insist on getting a cluster 1079 */ 1080 if ((m->m_flags & M_EXT) == 0) { 1081 m_freem(m); 1082 ++sc->arpcom.ac_if.if_ierrors; 1083 printf("sn: snread() kernel memory allocation problem\n"); 1084 goto out; 1085 } 1086 eh = mtod(m, struct ether_header *); 1087 1088 /* 1089 * Get packet, including link layer address, from interface. 1090 */ 1091 1092 data = (u_char *) eh; 1093 insw(BASE + DATA_REG_W, data, packet_length >> 1); 1094 if (packet_length & 1) { 1095 data += packet_length & ~1; 1096 *data = inb(BASE + DATA_REG_B); 1097 } 1098 ++sc->arpcom.ac_if.if_ipackets; 1099 1100 /* 1101 * Remove link layer addresses and whatnot. 1102 */ 1103 m->m_pkthdr.len = m->m_len = packet_length - sizeof(struct ether_header); 1104 m->m_data += sizeof(struct ether_header); 1105 1106 ether_input(&sc->arpcom.ac_if, eh, m); 1107 1108 out: 1109 1110 /* 1111 * Error or good, tell the card to get rid of this packet Wait for 1112 * the MMU to be un-busy. 1113 */ 1114 SMC_SELECT_BANK(2); 1115 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 1116 ; 1117 outw(BASE + MMU_CMD_REG_W, MMUCR_RELEASE); 1118 1119 /* 1120 * Check whether another packet is ready 1121 */ 1122 packet_number = inw(BASE + FIFO_PORTS_REG_W); 1123 if (packet_number & FIFO_REMPTY) { 1124 return; 1125 } 1126 goto read_another; 1127 } 1128 1129 1130 /* 1131 * Handle IOCTLS. This function is completely stolen from if_ep.c 1132 * As with its progenitor, it does not handle hardware address 1133 * changes. 1134 */ 1135 static int 1136 snioctl(register struct ifnet *ifp, u_long cmd, caddr_t data) 1137 { 1138 struct sn_softc *sc = ifp->if_softc; 1139 int s, error = 0; 1140 1141 s = splimp(); 1142 1143 switch (cmd) { 1144 case SIOCSIFADDR: 1145 case SIOCGIFADDR: 1146 case SIOCSIFMTU: 1147 error = ether_ioctl(ifp, cmd, data); 1148 break; 1149 1150 case SIOCSIFFLAGS: 1151 if ((ifp->if_flags & IFF_UP) == 0 && ifp->if_flags & IFF_RUNNING) { 1152 ifp->if_flags &= ~IFF_RUNNING; 1153 snstop(sc); 1154 break; 1155 } else { 1156 /* reinitialize card on any parameter change */ 1157 sninit(sc); 1158 break; 1159 } 1160 break; 1161 1162 #ifdef notdef 1163 case SIOCGHWADDR: 1164 bcopy((caddr_t) sc->sc_addr, (caddr_t) & ifr->ifr_data, 1165 sizeof(sc->sc_addr)); 1166 break; 1167 #endif 1168 1169 case SIOCADDMULTI: 1170 /* update multicast filter list. */ 1171 sn_setmcast(sc); 1172 error = 0; 1173 break; 1174 case SIOCDELMULTI: 1175 /* update multicast filter list. */ 1176 sn_setmcast(sc); 1177 error = 0; 1178 break; 1179 default: 1180 error = EINVAL; 1181 } 1182 1183 splx(s); 1184 1185 return (error); 1186 } 1187 1188 void 1189 snreset(struct sn_softc *sc) 1190 { 1191 int s; 1192 1193 s = splimp(); 1194 snstop(sc); 1195 sninit(sc); 1196 1197 splx(s); 1198 } 1199 1200 void 1201 snwatchdog(struct ifnet *ifp) 1202 { 1203 int s; 1204 s = splimp(); 1205 sn_intr(ifp->if_softc); 1206 splx(s); 1207 } 1208 1209 1210 /* 1. zero the interrupt mask 1211 * 2. clear the enable receive flag 1212 * 3. clear the enable xmit flags 1213 */ 1214 void 1215 snstop(struct sn_softc *sc) 1216 { 1217 1218 struct ifnet *ifp = &sc->arpcom.ac_if; 1219 1220 /* 1221 * Clear interrupt mask; disable all interrupts. 1222 */ 1223 SMC_SELECT_BANK(2); 1224 outb(BASE + INTR_MASK_REG_B, 0x00); 1225 1226 /* 1227 * Disable transmitter and Receiver 1228 */ 1229 SMC_SELECT_BANK(0); 1230 outw(BASE + RECV_CONTROL_REG_W, 0x0000); 1231 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000); 1232 1233 /* 1234 * Cancel watchdog. 1235 */ 1236 ifp->if_timer = 0; 1237 } 1238 1239 1240 int 1241 sn_activate(device_t dev) 1242 { 1243 struct sn_softc *sc = device_get_softc(dev); 1244 int err; 1245 1246 sc->port_rid = 0; 1247 sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->port_rid, 1248 0, ~0, SMC_IO_EXTENT, RF_ACTIVE); 1249 if (!sc->port_res) { 1250 #ifdef SN_DEBUG 1251 device_printf(dev, "Cannot allocate ioport\n"); 1252 #endif 1253 return ENOMEM; 1254 } 1255 1256 sc->irq_rid = 0; 1257 sc->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irq_rid, 1258 0, ~0, 1, RF_ACTIVE); 1259 if (!sc->irq_res) { 1260 #ifdef SN_DEBUG 1261 device_printf(dev, "Cannot allocate irq\n"); 1262 #endif 1263 sn_deactivate(dev); 1264 return ENOMEM; 1265 } 1266 if ((err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET, sn_intr, sc, 1267 &sc->intrhand)) != 0) { 1268 sn_deactivate(dev); 1269 return err; 1270 } 1271 1272 sc->sn_io_addr = rman_get_start(sc->port_res); 1273 return (0); 1274 } 1275 1276 void 1277 sn_deactivate(device_t dev) 1278 { 1279 struct sn_softc *sc = device_get_softc(dev); 1280 1281 if (sc->intrhand) 1282 bus_teardown_intr(dev, sc->irq_res, sc->intrhand); 1283 sc->intrhand = 0; 1284 if (sc->port_res) 1285 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid, 1286 sc->port_res); 1287 sc->port_res = 0; 1288 if (sc->irq_res) 1289 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, 1290 sc->irq_res); 1291 sc->irq_res = 0; 1292 return; 1293 } 1294 1295 /* 1296 * Function: sn_probe( device_t dev, int pccard ) 1297 * 1298 * Purpose: 1299 * Tests to see if a given ioaddr points to an SMC9xxx chip. 1300 * Tries to cause as little damage as possible if it's not a SMC chip. 1301 * Returns a 0 on success 1302 * 1303 * Algorithm: 1304 * (1) see if the high byte of BANK_SELECT is 0x33 1305 * (2) compare the ioaddr with the base register's address 1306 * (3) see if I recognize the chip ID in the appropriate register 1307 * 1308 * 1309 */ 1310 int 1311 sn_probe(device_t dev, int pccard) 1312 { 1313 struct sn_softc *sc = device_get_softc(dev); 1314 u_int bank; 1315 u_short revision_register; 1316 u_short base_address_register; 1317 u_short ioaddr; 1318 int err; 1319 1320 if ((err = sn_activate(dev)) != 0) 1321 return err; 1322 1323 ioaddr = sc->sn_io_addr; 1324 1325 /* 1326 * First, see if the high byte is 0x33 1327 */ 1328 bank = inw(ioaddr + BANK_SELECT_REG_W); 1329 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) { 1330 #ifdef SN_DEBUG 1331 device_printf(dev, "test1 failed\n"); 1332 #endif 1333 goto error; 1334 } 1335 /* 1336 * The above MIGHT indicate a device, but I need to write to further 1337 * test this. Go to bank 0, then test that the register still 1338 * reports the high byte is 0x33. 1339 */ 1340 outw(ioaddr + BANK_SELECT_REG_W, 0x0000); 1341 bank = inw(ioaddr + BANK_SELECT_REG_W); 1342 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) { 1343 #ifdef SN_DEBUG 1344 device_printf(dev, "test2 failed\n"); 1345 #endif 1346 goto error; 1347 } 1348 /* 1349 * well, we've already written once, so hopefully another time won't 1350 * hurt. This time, I need to switch the bank register to bank 1, so 1351 * I can access the base address register. The contents of the 1352 * BASE_ADDR_REG_W register, after some jiggery pokery, is expected 1353 * to match the I/O port address where the adapter is being probed. 1354 */ 1355 outw(ioaddr + BANK_SELECT_REG_W, 0x0001); 1356 base_address_register = inw(ioaddr + BASE_ADDR_REG_W); 1357 1358 /* 1359 * This test is nonsence on PC-card architecture, so if 1360 * pccard == 1, skip this test. (hosokawa) 1361 */ 1362 if (!pccard && (ioaddr != (base_address_register >> 3 & 0x3E0))) { 1363 1364 /* 1365 * Well, the base address register didn't match. Must not 1366 * have been a SMC chip after all. 1367 */ 1368 /* 1369 * printf("sn: ioaddr %x doesn't match card configuration 1370 * (%x)\n", ioaddr, base_address_register >> 3 & 0x3E0 ); 1371 */ 1372 1373 #ifdef SN_DEBUG 1374 device_printf(dev, "test3 failed ioaddr = 0x%x, " 1375 "base_address_register = 0x%x\n", ioaddr, 1376 base_address_register >> 3 & 0x3E0); 1377 #endif 1378 goto error; 1379 } 1380 /* 1381 * Check if the revision register is something that I recognize. 1382 * These might need to be added to later, as future revisions could 1383 * be added. 1384 */ 1385 outw(ioaddr + BANK_SELECT_REG_W, 0x3); 1386 revision_register = inw(ioaddr + REVISION_REG_W); 1387 if (!chip_ids[(revision_register >> 4) & 0xF]) { 1388 1389 /* 1390 * I don't regonize this chip, so... 1391 */ 1392 #ifdef SN_DEBUG 1393 device_printf(dev, "test4 failed\n"); 1394 #endif 1395 goto error; 1396 } 1397 /* 1398 * at this point I'll assume that the chip is an SMC9xxx. It might be 1399 * prudent to check a listing of MAC addresses against the hardware 1400 * address, or do some other tests. 1401 */ 1402 sn_deactivate(dev); 1403 return 0; 1404 error: 1405 sn_deactivate(dev); 1406 return ENXIO; 1407 } 1408 1409 #define MCFSZ 8 1410 1411 static void 1412 sn_setmcast(struct sn_softc *sc) 1413 { 1414 struct ifnet *ifp = (struct ifnet *)sc; 1415 int flags; 1416 1417 /* 1418 * Set the receiver filter. We want receive enabled and auto strip 1419 * of CRC from received packet. If we are promiscuous then set that 1420 * bit too. 1421 */ 1422 flags = RCR_ENABLE | RCR_STRIP_CRC; 1423 1424 if (ifp->if_flags & IFF_PROMISC) { 1425 flags |= RCR_PROMISC | RCR_ALMUL; 1426 } else if (ifp->if_flags & IFF_ALLMULTI) { 1427 flags |= RCR_ALMUL; 1428 } else { 1429 u_char mcf[MCFSZ]; 1430 if (sn_getmcf(&sc->arpcom, mcf)) { 1431 /* set filter */ 1432 SMC_SELECT_BANK(3); 1433 outw(BASE + MULTICAST1_REG_W, 1434 ((u_short)mcf[1] << 8) | mcf[0]); 1435 outw(BASE + MULTICAST2_REG_W, 1436 ((u_short)mcf[3] << 8) | mcf[2]); 1437 outw(BASE + MULTICAST3_REG_W, 1438 ((u_short)mcf[5] << 8) | mcf[4]); 1439 outw(BASE + MULTICAST4_REG_W, 1440 ((u_short)mcf[7] << 8) | mcf[6]); 1441 } else { 1442 flags |= RCR_ALMUL; 1443 } 1444 } 1445 SMC_SELECT_BANK(0); 1446 outw(BASE + RECV_CONTROL_REG_W, flags); 1447 } 1448 1449 static int 1450 sn_getmcf(struct arpcom *ac, u_char *mcf) 1451 { 1452 int i; 1453 register u_int index, index2; 1454 register u_char *af = (u_char *) mcf; 1455 struct ifmultiaddr *ifma; 1456 1457 bzero(mcf, MCFSZ); 1458 1459 for (ifma = ac->ac_if.if_multiaddrs.lh_first; ifma; 1460 ifma = ifma->ifma_link.le_next) { 1461 if (ifma->ifma_addr->sa_family != AF_LINK) 1462 return 0; 1463 index = smc_crc(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)) & 0x3f; 1464 index2 = 0; 1465 for (i = 0; i < 6; i++) { 1466 index2 <<= 1; 1467 index2 |= (index & 0x01); 1468 index >>= 1; 1469 } 1470 af[index2 >> 3] |= 1 << (index2 & 7); 1471 } 1472 return 1; /* use multicast filter */ 1473 } 1474 1475 static u_int 1476 smc_crc(u_char *s) 1477 { 1478 int perByte; 1479 int perBit; 1480 const u_int poly = 0xedb88320; 1481 u_int v = 0xffffffff; 1482 u_char c; 1483 1484 for (perByte = 0; perByte < ETHER_ADDR_LEN; perByte++) { 1485 c = s[perByte]; 1486 for (perBit = 0; perBit < 8; perBit++) { 1487 v = (v >> 1)^(((v ^ c) & 0x01) ? poly : 0); 1488 c >>= 1; 1489 } 1490 } 1491 return v; 1492 } 1493