1 /* 2 * Copyright (c) 1996 Gardner Buchanan <gbuchanan@shl.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Gardner Buchanan. 16 * 4. The name of Gardner Buchanan may not be used to endorse or promote 17 * products derived from this software without specific prior written 18 * permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 * $FreeBSD: src/sys/dev/sn/if_sn.c,v 1.7.2.3 2001/02/04 04:38:38 toshi Exp $ 32 * $DragonFly: src/sys/dev/netif/sn/if_sn.c,v 1.21 2005/06/20 15:10:41 joerg Exp $ 33 */ 34 35 /* 36 * This is a driver for SMC's 9000 series of Ethernet adapters. 37 * 38 * This FreeBSD driver is derived from the smc9194 Linux driver by 39 * Erik Stahlman and is Copyright (C) 1996 by Erik Stahlman. 40 * This driver also shamelessly borrows from the FreeBSD ep driver 41 * which is Copyright (C) 1994 Herb Peyerl <hpeyerl@novatel.ca> 42 * All rights reserved. 43 * 44 * It is set up for my SMC91C92 equipped Ampro LittleBoard embedded 45 * PC. It is adapted from Erik Stahlman's Linux driver which worked 46 * with his EFA Info*Express SVC VLB adaptor. According to SMC's databook, 47 * it will work for the entire SMC 9xxx series. (Ha Ha) 48 * 49 * "Features" of the SMC chip: 50 * 4608 byte packet memory. (for the 91C92. Others have more) 51 * EEPROM for configuration 52 * AUI/TP selection 53 * 54 * Authors: 55 * Erik Stahlman erik@vt.edu 56 * Herb Peyerl hpeyerl@novatel.ca 57 * Andres Vega Garcia avega@sophia.inria.fr 58 * Serge Babkin babkin@hq.icb.chel.su 59 * Gardner Buchanan gbuchanan@shl.com 60 * 61 * Sources: 62 * o SMC databook 63 * o "smc9194.c:v0.10(FIXED) 02/15/96 by Erik Stahlman (erik@vt.edu)" 64 * o "if_ep.c,v 1.19 1995/01/24 20:53:45 davidg Exp" 65 * 66 * Known Bugs: 67 * o The hardware multicast filter isn't used yet. 68 * o Setting of the hardware address isn't supported. 69 * o Hardware padding isn't used. 70 */ 71 72 /* 73 * Modifications for Megahertz X-Jack Ethernet Card (XJ-10BT) 74 * 75 * Copyright (c) 1996 by Tatsumi Hosokawa <hosokawa@jp.FreeBSD.org> 76 * BSD-nomads, Tokyo, Japan. 77 */ 78 /* 79 * Multicast support by Kei TANAKA <kei@pal.xerox.com> 80 * Special thanks to itojun@itojun.org 81 */ 82 83 #undef SN_DEBUG /* (by hosokawa) */ 84 85 #include <sys/param.h> 86 #include <sys/systm.h> 87 #include <sys/kernel.h> 88 #include <sys/errno.h> 89 #include <sys/sockio.h> 90 #include <sys/malloc.h> 91 #include <sys/mbuf.h> 92 #include <sys/socket.h> 93 #include <sys/syslog.h> 94 #include <sys/thread2.h> 95 96 #include <sys/module.h> 97 #include <sys/bus.h> 98 99 #include <machine/bus.h> 100 #include <machine/resource.h> 101 #include <sys/rman.h> 102 103 #include <net/ethernet.h> 104 #include <net/if.h> 105 #include <net/ifq_var.h> 106 #include <net/if_arp.h> 107 #include <net/if_dl.h> 108 #include <net/if_types.h> 109 #include <net/if_mib.h> 110 111 #ifdef INET 112 #include <netinet/in.h> 113 #include <netinet/in_systm.h> 114 #include <netinet/in_var.h> 115 #include <netinet/ip.h> 116 #endif 117 118 #ifdef NS 119 #include <netns/ns.h> 120 #include <netns/ns_if.h> 121 #endif 122 123 #include <net/bpf.h> 124 #include <net/bpfdesc.h> 125 126 #include <machine/clock.h> 127 128 #include "if_snreg.h" 129 #include "if_snvar.h" 130 131 /* Exported variables */ 132 devclass_t sn_devclass; 133 134 static int snioctl(struct ifnet * ifp, u_long, caddr_t, struct ucred *); 135 136 static void snresume(struct ifnet *); 137 138 void sninit(void *); 139 void snread(struct ifnet *); 140 void snreset(struct sn_softc *); 141 void snstart(struct ifnet *); 142 void snstop(struct sn_softc *); 143 void snwatchdog(struct ifnet *); 144 145 static void sn_setmcast(struct sn_softc *); 146 static int sn_getmcf(struct arpcom *ac, u_char *mcf); 147 static u_int smc_crc(u_char *); 148 149 DECLARE_DUMMY_MODULE(if_sn); 150 151 /* I (GB) have been unlucky getting the hardware padding 152 * to work properly. 153 */ 154 #define SW_PAD 155 156 static const char *chip_ids[15] = { 157 NULL, NULL, NULL, 158 /* 3 */ "SMC91C90/91C92", 159 /* 4 */ "SMC91C94", 160 /* 5 */ "SMC91C95", 161 NULL, 162 /* 7 */ "SMC91C100", 163 /* 8 */ "SMC91C100FD", 164 NULL, NULL, NULL, 165 NULL, NULL, NULL 166 }; 167 168 int 169 sn_attach(device_t dev) 170 { 171 struct sn_softc *sc = device_get_softc(dev); 172 struct ifnet *ifp = &sc->arpcom.ac_if; 173 u_short i; 174 u_char *p; 175 int rev; 176 u_short address; 177 int j; 178 179 sn_activate(dev); 180 181 snstop(sc); 182 183 sc->dev = dev; 184 sc->pages_wanted = -1; 185 186 device_printf(dev, " "); 187 188 SMC_SELECT_BANK(3); 189 rev = inw(BASE + REVISION_REG_W); 190 if (chip_ids[(rev >> 4) & 0xF]) 191 printf("%s ", chip_ids[(rev >> 4) & 0xF]); 192 193 SMC_SELECT_BANK(1); 194 i = inw(BASE + CONFIG_REG_W); 195 printf("%s\n", i & CR_AUI_SELECT ? "AUI" : "UTP"); 196 197 if (sc->pccard_enaddr) 198 for (j = 0; j < 3; j++) { 199 u_short w; 200 201 w = (u_short)sc->arpcom.ac_enaddr[j * 2] | 202 (((u_short)sc->arpcom.ac_enaddr[j * 2 + 1]) << 8); 203 outw(BASE + IAR_ADDR0_REG_W + j * 2, w); 204 } 205 206 /* 207 * Read the station address from the chip. The MAC address is bank 1, 208 * regs 4 - 9 209 */ 210 SMC_SELECT_BANK(1); 211 p = (u_char *) & sc->arpcom.ac_enaddr; 212 for (i = 0; i < 6; i += 2) { 213 address = inw(BASE + IAR_ADDR0_REG_W + i); 214 p[i + 1] = address >> 8; 215 p[i] = address & 0xFF; 216 } 217 ifp->if_softc = sc; 218 if_initname(ifp, "sn", device_get_unit(dev)); 219 ifp->if_mtu = ETHERMTU; 220 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 221 ifp->if_start = snstart; 222 ifp->if_ioctl = snioctl; 223 ifp->if_watchdog = snwatchdog; 224 ifp->if_init = sninit; 225 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN); 226 ifq_set_ready(&ifp->if_snd); 227 ifp->if_timer = 0; 228 229 ether_ifattach(ifp, sc->arpcom.ac_enaddr); 230 231 return 0; 232 } 233 234 235 /* 236 * Reset and initialize the chip 237 */ 238 void 239 sninit(void *xsc) 240 { 241 struct sn_softc *sc = xsc; 242 struct ifnet *ifp = &sc->arpcom.ac_if; 243 int flags; 244 int mask; 245 246 crit_enter(); 247 248 /* 249 * This resets the registers mostly to defaults, but doesn't affect 250 * EEPROM. After the reset cycle, we pause briefly for the chip to 251 * be happy. 252 */ 253 SMC_SELECT_BANK(0); 254 outw(BASE + RECV_CONTROL_REG_W, RCR_SOFTRESET); 255 SMC_DELAY(); 256 outw(BASE + RECV_CONTROL_REG_W, 0x0000); 257 SMC_DELAY(); 258 SMC_DELAY(); 259 260 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000); 261 262 /* 263 * Set the control register to automatically release succesfully 264 * transmitted packets (making the best use out of our limited 265 * memory) and to enable the EPH interrupt on certain TX errors. 266 */ 267 SMC_SELECT_BANK(1); 268 outw(BASE + CONTROL_REG_W, (CTR_AUTO_RELEASE | CTR_TE_ENABLE | 269 CTR_CR_ENABLE | CTR_LE_ENABLE)); 270 271 /* Set squelch level to 240mV (default 480mV) */ 272 flags = inw(BASE + CONFIG_REG_W); 273 flags |= CR_SET_SQLCH; 274 outw(BASE + CONFIG_REG_W, flags); 275 276 /* 277 * Reset the MMU and wait for it to be un-busy. 278 */ 279 SMC_SELECT_BANK(2); 280 outw(BASE + MMU_CMD_REG_W, MMUCR_RESET); 281 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 282 ; 283 284 /* 285 * Disable all interrupts 286 */ 287 outb(BASE + INTR_MASK_REG_B, 0x00); 288 289 sn_setmcast(sc); 290 291 /* 292 * Set the transmitter control. We want it enabled. 293 */ 294 flags = TCR_ENABLE; 295 296 #ifndef SW_PAD 297 /* 298 * I (GB) have been unlucky getting this to work. 299 */ 300 flags |= TCR_PAD_ENABLE; 301 #endif /* SW_PAD */ 302 303 outw(BASE + TXMIT_CONTROL_REG_W, flags); 304 305 306 /* 307 * Now, enable interrupts 308 */ 309 SMC_SELECT_BANK(2); 310 311 mask = IM_EPH_INT | 312 IM_RX_OVRN_INT | 313 IM_RCV_INT | 314 IM_TX_INT; 315 316 outb(BASE + INTR_MASK_REG_B, mask); 317 sc->intr_mask = mask; 318 sc->pages_wanted = -1; 319 320 321 /* 322 * Mark the interface running but not active. 323 */ 324 ifp->if_flags |= IFF_RUNNING; 325 ifp->if_flags &= ~IFF_OACTIVE; 326 327 /* 328 * Attempt to push out any waiting packets. 329 */ 330 snstart(ifp); 331 332 crit_exit(); 333 } 334 335 336 void 337 snstart(struct ifnet *ifp) 338 { 339 struct sn_softc *sc = ifp->if_softc; 340 u_int len; 341 struct mbuf *m; 342 struct mbuf *top; 343 int pad; 344 int mask; 345 u_short length; 346 u_short numPages; 347 u_char packet_no; 348 int time_out; 349 350 crit_enter(); 351 352 if (ifp->if_flags & IFF_OACTIVE) { 353 crit_exit(); 354 return; 355 } 356 if (sc->pages_wanted != -1) { 357 crit_exit(); 358 printf("%s: snstart() while memory allocation pending\n", 359 ifp->if_xname); 360 return; 361 } 362 startagain: 363 364 /* 365 * Sneak a peek at the next packet 366 */ 367 m = ifq_poll(&ifp->if_snd); 368 if (m == 0) { 369 crit_exit(); 370 return; 371 } 372 /* 373 * Compute the frame length and set pad to give an overall even 374 * number of bytes. Below we assume that the packet length is even. 375 */ 376 for (len = 0, top = m; m; m = m->m_next) 377 len += m->m_len; 378 379 pad = (len & 1); 380 381 /* 382 * We drop packets that are too large. Perhaps we should truncate 383 * them instead? 384 */ 385 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) { 386 printf("%s: large packet discarded (A)\n", ifp->if_xname); 387 ++sc->arpcom.ac_if.if_oerrors; 388 m = ifq_dequeue(&ifp->if_snd); 389 m_freem(m); 390 goto readcheck; 391 } 392 #ifdef SW_PAD 393 394 /* 395 * If HW padding is not turned on, then pad to ETHER_MIN_LEN. 396 */ 397 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN) 398 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 399 400 #endif /* SW_PAD */ 401 402 length = pad + len; 403 404 /* 405 * The MMU wants the number of pages to be the number of 256 byte 406 * 'pages', minus 1 (A packet can't ever have 0 pages. We also 407 * include space for the status word, byte count and control bytes in 408 * the allocation request. 409 */ 410 numPages = (length + 6) >> 8; 411 412 413 /* 414 * Now, try to allocate the memory 415 */ 416 SMC_SELECT_BANK(2); 417 outw(BASE + MMU_CMD_REG_W, MMUCR_ALLOC | numPages); 418 419 /* 420 * Wait a short amount of time to see if the allocation request 421 * completes. Otherwise, I enable the interrupt and wait for 422 * completion asyncronously. 423 */ 424 425 time_out = MEMORY_WAIT_TIME; 426 do { 427 if (inb(BASE + INTR_STAT_REG_B) & IM_ALLOC_INT) 428 break; 429 } while (--time_out); 430 431 if (!time_out) { 432 433 /* 434 * No memory now. Oh well, wait until the chip finds memory 435 * later. Remember how many pages we were asking for and 436 * enable the allocation completion interrupt. Also set a 437 * watchdog in case we miss the interrupt. We mark the 438 * interface active since there is no point in attempting an 439 * snstart() until after the memory is available. 440 */ 441 mask = inb(BASE + INTR_MASK_REG_B) | IM_ALLOC_INT; 442 outb(BASE + INTR_MASK_REG_B, mask); 443 sc->intr_mask = mask; 444 445 ifp->if_timer = 1; 446 ifp->if_flags |= IFF_OACTIVE; 447 sc->pages_wanted = numPages; 448 449 crit_exit(); 450 return; 451 } 452 /* 453 * The memory allocation completed. Check the results. 454 */ 455 packet_no = inb(BASE + ALLOC_RESULT_REG_B); 456 if (packet_no & ARR_FAILED) { 457 printf("%s: Memory allocation failed\n", ifp->if_xname); 458 goto startagain; 459 } 460 /* 461 * We have a packet number, so tell the card to use it. 462 */ 463 outb(BASE + PACKET_NUM_REG_B, packet_no); 464 465 /* 466 * Point to the beginning of the packet 467 */ 468 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000); 469 470 /* 471 * Send the packet length (+6 for status, length and control byte) 472 * and the status word (set to zeros) 473 */ 474 outw(BASE + DATA_REG_W, 0); 475 outb(BASE + DATA_REG_B, (length + 6) & 0xFF); 476 outb(BASE + DATA_REG_B, (length + 6) >> 8); 477 478 /* 479 * Get the packet from the kernel. This will include the Ethernet 480 * frame header, MAC Addresses etc. 481 */ 482 m = ifq_dequeue(&ifp->if_snd); 483 484 /* 485 * Push out the data to the card. 486 */ 487 for (top = m; m != 0; m = m->m_next) { 488 489 /* 490 * Push out words. 491 */ 492 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2); 493 494 /* 495 * Push out remaining byte. 496 */ 497 if (m->m_len & 1) 498 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1)); 499 } 500 501 /* 502 * Push out padding. 503 */ 504 while (pad > 1) { 505 outw(BASE + DATA_REG_W, 0); 506 pad -= 2; 507 } 508 if (pad) 509 outb(BASE + DATA_REG_B, 0); 510 511 /* 512 * Push out control byte and unused packet byte The control byte is 0 513 * meaning the packet is even lengthed and no special CRC handling is 514 * desired. 515 */ 516 outw(BASE + DATA_REG_W, 0); 517 518 /* 519 * Enable the interrupts and let the chipset deal with it Also set a 520 * watchdog in case we miss the interrupt. 521 */ 522 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT); 523 outb(BASE + INTR_MASK_REG_B, mask); 524 sc->intr_mask = mask; 525 526 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE); 527 528 ifp->if_flags |= IFF_OACTIVE; 529 ifp->if_timer = 1; 530 531 BPF_MTAP(ifp, top); 532 533 ifp->if_opackets++; 534 m_freem(top); 535 536 readcheck: 537 538 /* 539 * Is another packet coming in? We don't want to overflow the tiny 540 * RX FIFO. If nothing has arrived then attempt to queue another 541 * transmit packet. 542 */ 543 if (inw(BASE + FIFO_PORTS_REG_W) & FIFO_REMPTY) 544 goto startagain; 545 546 crit_exit(); 547 } 548 549 550 551 /* Resume a packet transmit operation after a memory allocation 552 * has completed. 553 * 554 * This is basically a hacked up copy of snstart() which handles 555 * a completed memory allocation the same way snstart() does. 556 * It then passes control to snstart to handle any other queued 557 * packets. 558 */ 559 static void 560 snresume(struct ifnet *ifp) 561 { 562 struct sn_softc *sc = ifp->if_softc; 563 u_int len; 564 struct mbuf *m; 565 struct mbuf *top; 566 int pad; 567 int mask; 568 u_short length; 569 u_short numPages; 570 u_short pages_wanted; 571 u_char packet_no; 572 573 if (sc->pages_wanted < 0) 574 return; 575 576 pages_wanted = sc->pages_wanted; 577 sc->pages_wanted = -1; 578 579 /* 580 * Sneak a peek at the next packet 581 */ 582 m = ifq_poll(&ifp->if_snd); 583 if (m == 0) { 584 printf("%s: snresume() with nothing to send\n", ifp->if_xname); 585 return; 586 } 587 /* 588 * Compute the frame length and set pad to give an overall even 589 * number of bytes. Below we assume that the packet length is even. 590 */ 591 for (len = 0, top = m; m; m = m->m_next) 592 len += m->m_len; 593 594 pad = (len & 1); 595 596 /* 597 * We drop packets that are too large. Perhaps we should truncate 598 * them instead? 599 */ 600 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) { 601 printf("%s: large packet discarded (B)\n", ifp->if_xname); 602 ++ifp->if_oerrors; 603 ifq_dequeue(&ifp->if_snd); 604 m_freem(m); 605 return; 606 } 607 #ifdef SW_PAD 608 609 /* 610 * If HW padding is not turned on, then pad to ETHER_MIN_LEN. 611 */ 612 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN) 613 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 614 615 #endif /* SW_PAD */ 616 617 length = pad + len; 618 619 620 /* 621 * The MMU wants the number of pages to be the number of 256 byte 622 * 'pages', minus 1 (A packet can't ever have 0 pages. We also 623 * include space for the status word, byte count and control bytes in 624 * the allocation request. 625 */ 626 numPages = (length + 6) >> 8; 627 628 629 SMC_SELECT_BANK(2); 630 631 /* 632 * The memory allocation completed. Check the results. If it failed, 633 * we simply set a watchdog timer and hope for the best. 634 */ 635 packet_no = inb(BASE + ALLOC_RESULT_REG_B); 636 if (packet_no & ARR_FAILED) { 637 printf("%s: Memory allocation failed. Weird.\n", ifp->if_xname); 638 ifp->if_timer = 1; 639 goto try_start; 640 } 641 /* 642 * We have a packet number, so tell the card to use it. 643 */ 644 outb(BASE + PACKET_NUM_REG_B, packet_no); 645 646 /* 647 * Now, numPages should match the pages_wanted recorded when the 648 * memory allocation was initiated. 649 */ 650 if (pages_wanted != numPages) { 651 printf("%s: memory allocation wrong size. Weird.\n", ifp->if_xname); 652 /* 653 * If the allocation was the wrong size we simply release the 654 * memory once it is granted. Wait for the MMU to be un-busy. 655 */ 656 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 657 ; 658 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT); 659 660 return; 661 } 662 /* 663 * Point to the beginning of the packet 664 */ 665 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000); 666 667 /* 668 * Send the packet length (+6 for status, length and control byte) 669 * and the status word (set to zeros) 670 */ 671 outw(BASE + DATA_REG_W, 0); 672 outb(BASE + DATA_REG_B, (length + 6) & 0xFF); 673 outb(BASE + DATA_REG_B, (length + 6) >> 8); 674 675 /* 676 * Get the packet from the kernel. This will include the Ethernet 677 * frame header, MAC Addresses etc. 678 */ 679 m = ifq_dequeue(&ifp->if_snd); 680 681 /* 682 * Push out the data to the card. 683 */ 684 for (top = m; m != 0; m = m->m_next) { 685 686 /* 687 * Push out words. 688 */ 689 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2); 690 691 /* 692 * Push out remaining byte. 693 */ 694 if (m->m_len & 1) 695 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1)); 696 } 697 698 /* 699 * Push out padding. 700 */ 701 while (pad > 1) { 702 outw(BASE + DATA_REG_W, 0); 703 pad -= 2; 704 } 705 if (pad) 706 outb(BASE + DATA_REG_B, 0); 707 708 /* 709 * Push out control byte and unused packet byte The control byte is 0 710 * meaning the packet is even lengthed and no special CRC handling is 711 * desired. 712 */ 713 outw(BASE + DATA_REG_W, 0); 714 715 /* 716 * Enable the interrupts and let the chipset deal with it Also set a 717 * watchdog in case we miss the interrupt. 718 */ 719 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT); 720 outb(BASE + INTR_MASK_REG_B, mask); 721 sc->intr_mask = mask; 722 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE); 723 724 BPF_MTAP(ifp, top); 725 726 ifp->if_opackets++; 727 m_freem(top); 728 729 try_start: 730 731 /* 732 * Now pass control to snstart() to queue any additional packets 733 */ 734 ifp->if_flags &= ~IFF_OACTIVE; 735 snstart(ifp); 736 737 /* 738 * We've sent something, so we're active. Set a watchdog in case the 739 * TX_EMPTY interrupt is lost. 740 */ 741 ifp->if_flags |= IFF_OACTIVE; 742 ifp->if_timer = 1; 743 } 744 745 746 void 747 sn_intr(void *arg) 748 { 749 int status, interrupts; 750 struct sn_softc *sc = (struct sn_softc *) arg; 751 struct ifnet *ifp = &sc->arpcom.ac_if; 752 753 /* 754 * Chip state registers 755 */ 756 u_char mask; 757 u_char packet_no; 758 u_short tx_status; 759 u_short card_stats; 760 761 crit_enter(); 762 763 /* 764 * Clear the watchdog. 765 */ 766 ifp->if_timer = 0; 767 768 SMC_SELECT_BANK(2); 769 770 /* 771 * Obtain the current interrupt mask and clear the hardware mask 772 * while servicing interrupts. 773 */ 774 mask = inb(BASE + INTR_MASK_REG_B); 775 outb(BASE + INTR_MASK_REG_B, 0x00); 776 777 /* 778 * Get the set of interrupts which occurred and eliminate any which 779 * are masked. 780 */ 781 interrupts = inb(BASE + INTR_STAT_REG_B); 782 status = interrupts & mask; 783 784 /* 785 * Now, process each of the interrupt types. 786 */ 787 788 /* 789 * Receive Overrun. 790 */ 791 if (status & IM_RX_OVRN_INT) { 792 793 /* 794 * Acknowlege Interrupt 795 */ 796 SMC_SELECT_BANK(2); 797 outb(BASE + INTR_ACK_REG_B, IM_RX_OVRN_INT); 798 799 ++sc->arpcom.ac_if.if_ierrors; 800 } 801 /* 802 * Got a packet. 803 */ 804 if (status & IM_RCV_INT) { 805 #if 1 806 int packet_number; 807 808 SMC_SELECT_BANK(2); 809 packet_number = inw(BASE + FIFO_PORTS_REG_W); 810 811 if (packet_number & FIFO_REMPTY) { 812 813 /* 814 * we got called , but nothing was on the FIFO 815 */ 816 printf("sn: Receive interrupt with nothing on FIFO\n"); 817 818 goto out; 819 } 820 #endif 821 snread(ifp); 822 } 823 /* 824 * An on-card memory allocation came through. 825 */ 826 if (status & IM_ALLOC_INT) { 827 828 /* 829 * Disable this interrupt. 830 */ 831 mask &= ~IM_ALLOC_INT; 832 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 833 snresume(&sc->arpcom.ac_if); 834 } 835 /* 836 * TX Completion. Handle a transmit error message. This will only be 837 * called when there is an error, because of the AUTO_RELEASE mode. 838 */ 839 if (status & IM_TX_INT) { 840 841 /* 842 * Acknowlege Interrupt 843 */ 844 SMC_SELECT_BANK(2); 845 outb(BASE + INTR_ACK_REG_B, IM_TX_INT); 846 847 packet_no = inw(BASE + FIFO_PORTS_REG_W); 848 packet_no &= FIFO_TX_MASK; 849 850 /* 851 * select this as the packet to read from 852 */ 853 outb(BASE + PACKET_NUM_REG_B, packet_no); 854 855 /* 856 * Position the pointer to the first word from this packet 857 */ 858 outw(BASE + POINTER_REG_W, PTR_AUTOINC | PTR_READ | 0x0000); 859 860 /* 861 * Fetch the TX status word. The value found here will be a 862 * copy of the EPH_STATUS_REG_W at the time the transmit 863 * failed. 864 */ 865 tx_status = inw(BASE + DATA_REG_W); 866 867 if (tx_status & EPHSR_TX_SUC) { 868 device_printf(sc->dev, 869 "Successful packet caused interrupt\n"); 870 } else { 871 ++sc->arpcom.ac_if.if_oerrors; 872 } 873 874 if (tx_status & EPHSR_LATCOL) 875 ++sc->arpcom.ac_if.if_collisions; 876 877 /* 878 * Some of these errors will have disabled transmit. 879 * Re-enable transmit now. 880 */ 881 SMC_SELECT_BANK(0); 882 883 #ifdef SW_PAD 884 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE); 885 #else 886 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE | TCR_PAD_ENABLE); 887 #endif /* SW_PAD */ 888 889 /* 890 * kill the failed packet. Wait for the MMU to be un-busy. 891 */ 892 SMC_SELECT_BANK(2); 893 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 894 ; 895 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT); 896 897 /* 898 * Attempt to queue more transmits. 899 */ 900 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 901 snstart(&sc->arpcom.ac_if); 902 } 903 /* 904 * Transmit underrun. We use this opportunity to update transmit 905 * statistics from the card. 906 */ 907 if (status & IM_TX_EMPTY_INT) { 908 909 /* 910 * Acknowlege Interrupt 911 */ 912 SMC_SELECT_BANK(2); 913 outb(BASE + INTR_ACK_REG_B, IM_TX_EMPTY_INT); 914 915 /* 916 * Disable this interrupt. 917 */ 918 mask &= ~IM_TX_EMPTY_INT; 919 920 SMC_SELECT_BANK(0); 921 card_stats = inw(BASE + COUNTER_REG_W); 922 923 /* 924 * Single collisions 925 */ 926 sc->arpcom.ac_if.if_collisions += card_stats & ECR_COLN_MASK; 927 928 /* 929 * Multiple collisions 930 */ 931 sc->arpcom.ac_if.if_collisions += (card_stats & ECR_MCOLN_MASK) >> 4; 932 933 SMC_SELECT_BANK(2); 934 935 /* 936 * Attempt to enqueue some more stuff. 937 */ 938 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 939 snstart(&sc->arpcom.ac_if); 940 } 941 /* 942 * Some other error. Try to fix it by resetting the adapter. 943 */ 944 if (status & IM_EPH_INT) { 945 snstop(sc); 946 sninit(sc); 947 } 948 949 out: 950 /* 951 * Handled all interrupt sources. 952 */ 953 954 SMC_SELECT_BANK(2); 955 956 /* 957 * Reestablish interrupts from mask which have not been deselected 958 * during this interrupt. Note that the hardware mask, which was set 959 * to 0x00 at the start of this service routine, may have been 960 * updated by one or more of the interrupt handers and we must let 961 * those new interrupts stay enabled here. 962 */ 963 mask |= inb(BASE + INTR_MASK_REG_B); 964 outb(BASE + INTR_MASK_REG_B, mask); 965 sc->intr_mask = mask; 966 967 crit_exit(); 968 } 969 970 void 971 snread(struct ifnet *ifp) 972 { 973 struct sn_softc *sc = ifp->if_softc; 974 struct mbuf *m; 975 short status; 976 int packet_number; 977 u_short packet_length; 978 u_char *data; 979 980 SMC_SELECT_BANK(2); 981 #if 0 982 packet_number = inw(BASE + FIFO_PORTS_REG_W); 983 984 if (packet_number & FIFO_REMPTY) { 985 986 /* 987 * we got called , but nothing was on the FIFO 988 */ 989 printf("sn: Receive interrupt with nothing on FIFO\n"); 990 return; 991 } 992 #endif 993 read_another: 994 995 /* 996 * Start reading from the start of the packet. Since PTR_RCV is set, 997 * packet number is found in FIFO_PORTS_REG_W, FIFO_RX_MASK. 998 */ 999 outw(BASE + POINTER_REG_W, PTR_READ | PTR_RCV | PTR_AUTOINC | 0x0000); 1000 1001 /* 1002 * First two words are status and packet_length 1003 */ 1004 status = inw(BASE + DATA_REG_W); 1005 packet_length = inw(BASE + DATA_REG_W) & RLEN_MASK; 1006 1007 /* 1008 * The packet length contains 3 extra words: status, length, and a 1009 * extra word with the control byte. 1010 */ 1011 packet_length -= 6; 1012 1013 /* 1014 * Account for receive errors and discard. 1015 */ 1016 if (status & RS_ERRORS) { 1017 ++ifp->if_ierrors; 1018 goto out; 1019 } 1020 /* 1021 * A packet is received. 1022 */ 1023 1024 /* 1025 * Adjust for odd-length packet. 1026 */ 1027 if (status & RS_ODDFRAME) 1028 packet_length++; 1029 1030 /* 1031 * Allocate a header mbuf from the kernel. 1032 */ 1033 MGETHDR(m, MB_DONTWAIT, MT_DATA); 1034 if (m == NULL) 1035 goto out; 1036 1037 m->m_pkthdr.rcvif = ifp; 1038 m->m_pkthdr.len = m->m_len = packet_length; 1039 1040 /* 1041 * Attach an mbuf cluster 1042 */ 1043 MCLGET(m, MB_DONTWAIT); 1044 1045 /* 1046 * Insist on getting a cluster 1047 */ 1048 if ((m->m_flags & M_EXT) == 0) { 1049 m_freem(m); 1050 ++ifp->if_ierrors; 1051 printf("sn: snread() kernel memory allocation problem\n"); 1052 goto out; 1053 } 1054 1055 /* 1056 * Get packet, including link layer address, from interface. 1057 */ 1058 1059 data = mtod(m, u_char *); 1060 insw(BASE + DATA_REG_W, data, packet_length >> 1); 1061 if (packet_length & 1) { 1062 data += packet_length & ~1; 1063 *data = inb(BASE + DATA_REG_B); 1064 } 1065 ++ifp->if_ipackets; 1066 1067 m->m_pkthdr.len = m->m_len = packet_length; 1068 1069 (*ifp->if_input)(ifp, m); 1070 1071 out: 1072 1073 /* 1074 * Error or good, tell the card to get rid of this packet Wait for 1075 * the MMU to be un-busy. 1076 */ 1077 SMC_SELECT_BANK(2); 1078 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 1079 ; 1080 outw(BASE + MMU_CMD_REG_W, MMUCR_RELEASE); 1081 1082 /* 1083 * Check whether another packet is ready 1084 */ 1085 packet_number = inw(BASE + FIFO_PORTS_REG_W); 1086 if (packet_number & FIFO_REMPTY) { 1087 return; 1088 } 1089 goto read_another; 1090 } 1091 1092 1093 /* 1094 * Handle IOCTLS. This function is completely stolen from if_ep.c 1095 * As with its progenitor, it does not handle hardware address 1096 * changes. 1097 */ 1098 static int 1099 snioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr) 1100 { 1101 struct sn_softc *sc = ifp->if_softc; 1102 int error = 0; 1103 1104 crit_enter(); 1105 1106 switch (cmd) { 1107 case SIOCSIFFLAGS: 1108 if ((ifp->if_flags & IFF_UP) == 0 && ifp->if_flags & IFF_RUNNING) { 1109 ifp->if_flags &= ~IFF_RUNNING; 1110 snstop(sc); 1111 break; 1112 } else { 1113 /* reinitialize card on any parameter change */ 1114 sninit(sc); 1115 break; 1116 } 1117 break; 1118 1119 #ifdef notdef 1120 case SIOCGHWADDR: 1121 bcopy((caddr_t) sc->sc_addr, (caddr_t) & ifr->ifr_data, 1122 sizeof(sc->sc_addr)); 1123 break; 1124 #endif 1125 1126 case SIOCADDMULTI: 1127 /* update multicast filter list. */ 1128 sn_setmcast(sc); 1129 error = 0; 1130 break; 1131 case SIOCDELMULTI: 1132 /* update multicast filter list. */ 1133 sn_setmcast(sc); 1134 error = 0; 1135 break; 1136 default: 1137 error = ether_ioctl(ifp, cmd, data); 1138 break; 1139 } 1140 1141 crit_exit(); 1142 1143 return (error); 1144 } 1145 1146 void 1147 snreset(struct sn_softc *sc) 1148 { 1149 crit_enter(); 1150 1151 snstop(sc); 1152 sninit(sc); 1153 1154 crit_exit(); 1155 } 1156 1157 void 1158 snwatchdog(struct ifnet *ifp) 1159 { 1160 crit_enter(); 1161 1162 sn_intr(ifp->if_softc); 1163 1164 crit_exit(); 1165 } 1166 1167 1168 /* 1. zero the interrupt mask 1169 * 2. clear the enable receive flag 1170 * 3. clear the enable xmit flags 1171 */ 1172 void 1173 snstop(struct sn_softc *sc) 1174 { 1175 1176 struct ifnet *ifp = &sc->arpcom.ac_if; 1177 1178 /* 1179 * Clear interrupt mask; disable all interrupts. 1180 */ 1181 SMC_SELECT_BANK(2); 1182 outb(BASE + INTR_MASK_REG_B, 0x00); 1183 1184 /* 1185 * Disable transmitter and Receiver 1186 */ 1187 SMC_SELECT_BANK(0); 1188 outw(BASE + RECV_CONTROL_REG_W, 0x0000); 1189 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000); 1190 1191 /* 1192 * Cancel watchdog. 1193 */ 1194 ifp->if_timer = 0; 1195 } 1196 1197 1198 int 1199 sn_activate(device_t dev) 1200 { 1201 struct sn_softc *sc = device_get_softc(dev); 1202 int err; 1203 1204 sc->port_rid = 0; 1205 sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->port_rid, 1206 0, ~0, SMC_IO_EXTENT, RF_ACTIVE); 1207 if (!sc->port_res) { 1208 #ifdef SN_DEBUG 1209 device_printf(dev, "Cannot allocate ioport\n"); 1210 #endif 1211 return ENOMEM; 1212 } 1213 1214 sc->irq_rid = 0; 1215 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid, 1216 RF_ACTIVE); 1217 if (!sc->irq_res) { 1218 #ifdef SN_DEBUG 1219 device_printf(dev, "Cannot allocate irq\n"); 1220 #endif 1221 sn_deactivate(dev); 1222 return ENOMEM; 1223 } 1224 err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET, sn_intr, sc, 1225 &sc->intrhand, NULL); 1226 if (err) { 1227 sn_deactivate(dev); 1228 return err; 1229 } 1230 1231 sc->sn_io_addr = rman_get_start(sc->port_res); 1232 return (0); 1233 } 1234 1235 void 1236 sn_deactivate(device_t dev) 1237 { 1238 struct sn_softc *sc = device_get_softc(dev); 1239 1240 if (sc->intrhand) 1241 bus_teardown_intr(dev, sc->irq_res, sc->intrhand); 1242 sc->intrhand = 0; 1243 if (sc->port_res) 1244 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid, 1245 sc->port_res); 1246 sc->port_res = 0; 1247 if (sc->irq_res) 1248 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, 1249 sc->irq_res); 1250 sc->irq_res = 0; 1251 return; 1252 } 1253 1254 /* 1255 * Function: sn_probe( device_t dev, int pccard ) 1256 * 1257 * Purpose: 1258 * Tests to see if a given ioaddr points to an SMC9xxx chip. 1259 * Tries to cause as little damage as possible if it's not a SMC chip. 1260 * Returns a 0 on success 1261 * 1262 * Algorithm: 1263 * (1) see if the high byte of BANK_SELECT is 0x33 1264 * (2) compare the ioaddr with the base register's address 1265 * (3) see if I recognize the chip ID in the appropriate register 1266 * 1267 * 1268 */ 1269 int 1270 sn_probe(device_t dev, int pccard) 1271 { 1272 struct sn_softc *sc = device_get_softc(dev); 1273 u_int bank; 1274 u_short revision_register; 1275 u_short base_address_register; 1276 u_short ioaddr; 1277 int err; 1278 1279 if ((err = sn_activate(dev)) != 0) 1280 return err; 1281 1282 ioaddr = sc->sn_io_addr; 1283 1284 /* 1285 * First, see if the high byte is 0x33 1286 */ 1287 bank = inw(ioaddr + BANK_SELECT_REG_W); 1288 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) { 1289 #ifdef SN_DEBUG 1290 device_printf(dev, "test1 failed\n"); 1291 #endif 1292 goto error; 1293 } 1294 /* 1295 * The above MIGHT indicate a device, but I need to write to further 1296 * test this. Go to bank 0, then test that the register still 1297 * reports the high byte is 0x33. 1298 */ 1299 outw(ioaddr + BANK_SELECT_REG_W, 0x0000); 1300 bank = inw(ioaddr + BANK_SELECT_REG_W); 1301 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) { 1302 #ifdef SN_DEBUG 1303 device_printf(dev, "test2 failed\n"); 1304 #endif 1305 goto error; 1306 } 1307 /* 1308 * well, we've already written once, so hopefully another time won't 1309 * hurt. This time, I need to switch the bank register to bank 1, so 1310 * I can access the base address register. The contents of the 1311 * BASE_ADDR_REG_W register, after some jiggery pokery, is expected 1312 * to match the I/O port address where the adapter is being probed. 1313 */ 1314 outw(ioaddr + BANK_SELECT_REG_W, 0x0001); 1315 base_address_register = inw(ioaddr + BASE_ADDR_REG_W); 1316 1317 /* 1318 * This test is nonsence on PC-card architecture, so if 1319 * pccard == 1, skip this test. (hosokawa) 1320 */ 1321 if (!pccard && (ioaddr != (base_address_register >> 3 & 0x3E0))) { 1322 1323 /* 1324 * Well, the base address register didn't match. Must not 1325 * have been a SMC chip after all. 1326 */ 1327 /* 1328 * printf("sn: ioaddr %x doesn't match card configuration 1329 * (%x)\n", ioaddr, base_address_register >> 3 & 0x3E0 ); 1330 */ 1331 1332 #ifdef SN_DEBUG 1333 device_printf(dev, "test3 failed ioaddr = 0x%x, " 1334 "base_address_register = 0x%x\n", ioaddr, 1335 base_address_register >> 3 & 0x3E0); 1336 #endif 1337 goto error; 1338 } 1339 /* 1340 * Check if the revision register is something that I recognize. 1341 * These might need to be added to later, as future revisions could 1342 * be added. 1343 */ 1344 outw(ioaddr + BANK_SELECT_REG_W, 0x3); 1345 revision_register = inw(ioaddr + REVISION_REG_W); 1346 if (!chip_ids[(revision_register >> 4) & 0xF]) { 1347 1348 /* 1349 * I don't regonize this chip, so... 1350 */ 1351 #ifdef SN_DEBUG 1352 device_printf(dev, "test4 failed\n"); 1353 #endif 1354 goto error; 1355 } 1356 /* 1357 * at this point I'll assume that the chip is an SMC9xxx. It might be 1358 * prudent to check a listing of MAC addresses against the hardware 1359 * address, or do some other tests. 1360 */ 1361 sn_deactivate(dev); 1362 return 0; 1363 error: 1364 sn_deactivate(dev); 1365 return ENXIO; 1366 } 1367 1368 #define MCFSZ 8 1369 1370 static void 1371 sn_setmcast(struct sn_softc *sc) 1372 { 1373 struct ifnet *ifp = (struct ifnet *)sc; 1374 int flags; 1375 1376 /* 1377 * Set the receiver filter. We want receive enabled and auto strip 1378 * of CRC from received packet. If we are promiscuous then set that 1379 * bit too. 1380 */ 1381 flags = RCR_ENABLE | RCR_STRIP_CRC; 1382 1383 if (ifp->if_flags & IFF_PROMISC) { 1384 flags |= RCR_PROMISC | RCR_ALMUL; 1385 } else if (ifp->if_flags & IFF_ALLMULTI) { 1386 flags |= RCR_ALMUL; 1387 } else { 1388 u_char mcf[MCFSZ]; 1389 if (sn_getmcf(&sc->arpcom, mcf)) { 1390 /* set filter */ 1391 SMC_SELECT_BANK(3); 1392 outw(BASE + MULTICAST1_REG_W, 1393 ((u_short)mcf[1] << 8) | mcf[0]); 1394 outw(BASE + MULTICAST2_REG_W, 1395 ((u_short)mcf[3] << 8) | mcf[2]); 1396 outw(BASE + MULTICAST3_REG_W, 1397 ((u_short)mcf[5] << 8) | mcf[4]); 1398 outw(BASE + MULTICAST4_REG_W, 1399 ((u_short)mcf[7] << 8) | mcf[6]); 1400 } else { 1401 flags |= RCR_ALMUL; 1402 } 1403 } 1404 SMC_SELECT_BANK(0); 1405 outw(BASE + RECV_CONTROL_REG_W, flags); 1406 } 1407 1408 static int 1409 sn_getmcf(struct arpcom *ac, u_char *mcf) 1410 { 1411 int i; 1412 u_int index, index2; 1413 u_char *af = (u_char *) mcf; 1414 struct ifmultiaddr *ifma; 1415 1416 bzero(mcf, MCFSZ); 1417 1418 LIST_FOREACH(ifma, &ac->ac_if.if_multiaddrs, ifma_link) { 1419 if (ifma->ifma_addr->sa_family != AF_LINK) 1420 return 0; 1421 index = smc_crc(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)) & 0x3f; 1422 index2 = 0; 1423 for (i = 0; i < 6; i++) { 1424 index2 <<= 1; 1425 index2 |= (index & 0x01); 1426 index >>= 1; 1427 } 1428 af[index2 >> 3] |= 1 << (index2 & 7); 1429 } 1430 return 1; /* use multicast filter */ 1431 } 1432 1433 static u_int 1434 smc_crc(u_char *s) 1435 { 1436 int perByte; 1437 int perBit; 1438 const u_int poly = 0xedb88320; 1439 u_int v = 0xffffffff; 1440 u_char c; 1441 1442 for (perByte = 0; perByte < ETHER_ADDR_LEN; perByte++) { 1443 c = s[perByte]; 1444 for (perBit = 0; perBit < 8; perBit++) { 1445 v = (v >> 1)^(((v ^ c) & 0x01) ? poly : 0); 1446 c >>= 1; 1447 } 1448 } 1449 return v; 1450 } 1451