1 /* 2 * Copyright (c) 1996 Gardner Buchanan <gbuchanan@shl.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Gardner Buchanan. 16 * 4. The name of Gardner Buchanan may not be used to endorse or promote 17 * products derived from this software without specific prior written 18 * permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 * $FreeBSD: src/sys/dev/sn/if_sn.c,v 1.7.2.3 2001/02/04 04:38:38 toshi Exp $ 32 * $DragonFly: src/sys/dev/netif/sn/if_sn.c,v 1.6 2004/01/06 01:40:49 dillon Exp $ 33 */ 34 35 /* 36 * This is a driver for SMC's 9000 series of Ethernet adapters. 37 * 38 * This FreeBSD driver is derived from the smc9194 Linux driver by 39 * Erik Stahlman and is Copyright (C) 1996 by Erik Stahlman. 40 * This driver also shamelessly borrows from the FreeBSD ep driver 41 * which is Copyright (C) 1994 Herb Peyerl <hpeyerl@novatel.ca> 42 * All rights reserved. 43 * 44 * It is set up for my SMC91C92 equipped Ampro LittleBoard embedded 45 * PC. It is adapted from Erik Stahlman's Linux driver which worked 46 * with his EFA Info*Express SVC VLB adaptor. According to SMC's databook, 47 * it will work for the entire SMC 9xxx series. (Ha Ha) 48 * 49 * "Features" of the SMC chip: 50 * 4608 byte packet memory. (for the 91C92. Others have more) 51 * EEPROM for configuration 52 * AUI/TP selection 53 * 54 * Authors: 55 * Erik Stahlman erik@vt.edu 56 * Herb Peyerl hpeyerl@novatel.ca 57 * Andres Vega Garcia avega@sophia.inria.fr 58 * Serge Babkin babkin@hq.icb.chel.su 59 * Gardner Buchanan gbuchanan@shl.com 60 * 61 * Sources: 62 * o SMC databook 63 * o "smc9194.c:v0.10(FIXED) 02/15/96 by Erik Stahlman (erik@vt.edu)" 64 * o "if_ep.c,v 1.19 1995/01/24 20:53:45 davidg Exp" 65 * 66 * Known Bugs: 67 * o The hardware multicast filter isn't used yet. 68 * o Setting of the hardware address isn't supported. 69 * o Hardware padding isn't used. 70 */ 71 72 /* 73 * Modifications for Megahertz X-Jack Ethernet Card (XJ-10BT) 74 * 75 * Copyright (c) 1996 by Tatsumi Hosokawa <hosokawa@jp.FreeBSD.org> 76 * BSD-nomads, Tokyo, Japan. 77 */ 78 /* 79 * Multicast support by Kei TANAKA <kei@pal.xerox.com> 80 * Special thanks to itojun@itojun.org 81 */ 82 83 #undef SN_DEBUG /* (by hosokawa) */ 84 85 #include <sys/param.h> 86 #include <sys/systm.h> 87 #include <sys/kernel.h> 88 #include <sys/errno.h> 89 #include <sys/sockio.h> 90 #include <sys/malloc.h> 91 #include <sys/mbuf.h> 92 #include <sys/socket.h> 93 #include <sys/syslog.h> 94 95 #include <sys/module.h> 96 #include <sys/bus.h> 97 98 #include <machine/bus.h> 99 #include <machine/resource.h> 100 #include <sys/rman.h> 101 102 #include <net/ethernet.h> 103 #include <net/if.h> 104 #include <net/if_arp.h> 105 #include <net/if_dl.h> 106 #include <net/if_types.h> 107 #include <net/if_mib.h> 108 109 #ifdef INET 110 #include <netinet/in.h> 111 #include <netinet/in_systm.h> 112 #include <netinet/in_var.h> 113 #include <netinet/ip.h> 114 #endif 115 116 #ifdef NS 117 #include <netns/ns.h> 118 #include <netns/ns_if.h> 119 #endif 120 121 #include <net/bpf.h> 122 #include <net/bpfdesc.h> 123 124 #include <machine/clock.h> 125 126 #include "if_snreg.h" 127 #include "if_snvar.h" 128 129 /* Exported variables */ 130 devclass_t sn_devclass; 131 132 static int snioctl(struct ifnet * ifp, u_long, caddr_t); 133 134 static void snresume(struct ifnet *); 135 136 void sninit(void *); 137 void snread(struct ifnet *); 138 void snreset(struct sn_softc *); 139 void snstart(struct ifnet *); 140 void snstop(struct sn_softc *); 141 void snwatchdog(struct ifnet *); 142 143 static void sn_setmcast(struct sn_softc *); 144 static int sn_getmcf(struct arpcom *ac, u_char *mcf); 145 static u_int smc_crc(u_char *); 146 147 DECLARE_DUMMY_MODULE(if_sn); 148 149 /* I (GB) have been unlucky getting the hardware padding 150 * to work properly. 151 */ 152 #define SW_PAD 153 154 static const char *chip_ids[15] = { 155 NULL, NULL, NULL, 156 /* 3 */ "SMC91C90/91C92", 157 /* 4 */ "SMC91C94", 158 /* 5 */ "SMC91C95", 159 NULL, 160 /* 7 */ "SMC91C100", 161 /* 8 */ "SMC91C100FD", 162 NULL, NULL, NULL, 163 NULL, NULL, NULL 164 }; 165 166 int 167 sn_attach(device_t dev) 168 { 169 struct sn_softc *sc = device_get_softc(dev); 170 struct ifnet *ifp = &sc->arpcom.ac_if; 171 u_short i; 172 u_char *p; 173 struct ifaddr *ifa; 174 struct sockaddr_dl *sdl; 175 int rev; 176 u_short address; 177 int j; 178 179 sn_activate(dev); 180 181 snstop(sc); 182 183 sc->dev = dev; 184 sc->pages_wanted = -1; 185 186 device_printf(dev, " "); 187 188 SMC_SELECT_BANK(3); 189 rev = inw(BASE + REVISION_REG_W); 190 if (chip_ids[(rev >> 4) & 0xF]) 191 printf("%s ", chip_ids[(rev >> 4) & 0xF]); 192 193 SMC_SELECT_BANK(1); 194 i = inw(BASE + CONFIG_REG_W); 195 printf(i & CR_AUI_SELECT ? "AUI" : "UTP"); 196 197 if (sc->pccard_enaddr) 198 for (j = 0; j < 3; j++) { 199 u_short w; 200 201 w = (u_short)sc->arpcom.ac_enaddr[j * 2] | 202 (((u_short)sc->arpcom.ac_enaddr[j * 2 + 1]) << 8); 203 outw(BASE + IAR_ADDR0_REG_W + j * 2, w); 204 } 205 206 /* 207 * Read the station address from the chip. The MAC address is bank 1, 208 * regs 4 - 9 209 */ 210 SMC_SELECT_BANK(1); 211 p = (u_char *) & sc->arpcom.ac_enaddr; 212 for (i = 0; i < 6; i += 2) { 213 address = inw(BASE + IAR_ADDR0_REG_W + i); 214 p[i + 1] = address >> 8; 215 p[i] = address & 0xFF; 216 } 217 printf(" MAC address %6D\n", sc->arpcom.ac_enaddr, ":"); 218 ifp->if_softc = sc; 219 if_initname(ifp, "sn", device_get_unit(dev)); 220 ifp->if_mtu = ETHERMTU; 221 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 222 ifp->if_output = ether_output; 223 ifp->if_start = snstart; 224 ifp->if_ioctl = snioctl; 225 ifp->if_watchdog = snwatchdog; 226 ifp->if_init = sninit; 227 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN; 228 ifp->if_timer = 0; 229 230 ether_ifattach(ifp, ETHER_BPF_SUPPORTED); 231 232 /* 233 * Fill the hardware address into ifa_addr if we find an AF_LINK 234 * entry. We need to do this so bpf's can get the hardware addr of 235 * this card. netstat likes this too! 236 */ 237 ifa = TAILQ_FIRST(&ifp->if_addrhead); 238 while ((ifa != 0) && (ifa->ifa_addr != 0) && 239 (ifa->ifa_addr->sa_family != AF_LINK)) 240 ifa = TAILQ_NEXT(ifa, ifa_link); 241 242 if ((ifa != 0) && (ifa->ifa_addr != 0)) { 243 sdl = (struct sockaddr_dl *) ifa->ifa_addr; 244 sdl->sdl_type = IFT_ETHER; 245 sdl->sdl_alen = ETHER_ADDR_LEN; 246 sdl->sdl_slen = 0; 247 bcopy(sc->arpcom.ac_enaddr, LLADDR(sdl), ETHER_ADDR_LEN); 248 } 249 250 return 0; 251 } 252 253 254 /* 255 * Reset and initialize the chip 256 */ 257 void 258 sninit(void *xsc) 259 { 260 struct sn_softc *sc = xsc; 261 struct ifnet *ifp = &sc->arpcom.ac_if; 262 int s; 263 int flags; 264 int mask; 265 266 s = splimp(); 267 268 /* 269 * This resets the registers mostly to defaults, but doesn't affect 270 * EEPROM. After the reset cycle, we pause briefly for the chip to 271 * be happy. 272 */ 273 SMC_SELECT_BANK(0); 274 outw(BASE + RECV_CONTROL_REG_W, RCR_SOFTRESET); 275 SMC_DELAY(); 276 outw(BASE + RECV_CONTROL_REG_W, 0x0000); 277 SMC_DELAY(); 278 SMC_DELAY(); 279 280 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000); 281 282 /* 283 * Set the control register to automatically release succesfully 284 * transmitted packets (making the best use out of our limited 285 * memory) and to enable the EPH interrupt on certain TX errors. 286 */ 287 SMC_SELECT_BANK(1); 288 outw(BASE + CONTROL_REG_W, (CTR_AUTO_RELEASE | CTR_TE_ENABLE | 289 CTR_CR_ENABLE | CTR_LE_ENABLE)); 290 291 /* Set squelch level to 240mV (default 480mV) */ 292 flags = inw(BASE + CONFIG_REG_W); 293 flags |= CR_SET_SQLCH; 294 outw(BASE + CONFIG_REG_W, flags); 295 296 /* 297 * Reset the MMU and wait for it to be un-busy. 298 */ 299 SMC_SELECT_BANK(2); 300 outw(BASE + MMU_CMD_REG_W, MMUCR_RESET); 301 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 302 ; 303 304 /* 305 * Disable all interrupts 306 */ 307 outb(BASE + INTR_MASK_REG_B, 0x00); 308 309 sn_setmcast(sc); 310 311 /* 312 * Set the transmitter control. We want it enabled. 313 */ 314 flags = TCR_ENABLE; 315 316 #ifndef SW_PAD 317 /* 318 * I (GB) have been unlucky getting this to work. 319 */ 320 flags |= TCR_PAD_ENABLE; 321 #endif /* SW_PAD */ 322 323 outw(BASE + TXMIT_CONTROL_REG_W, flags); 324 325 326 /* 327 * Now, enable interrupts 328 */ 329 SMC_SELECT_BANK(2); 330 331 mask = IM_EPH_INT | 332 IM_RX_OVRN_INT | 333 IM_RCV_INT | 334 IM_TX_INT; 335 336 outb(BASE + INTR_MASK_REG_B, mask); 337 sc->intr_mask = mask; 338 sc->pages_wanted = -1; 339 340 341 /* 342 * Mark the interface running but not active. 343 */ 344 ifp->if_flags |= IFF_RUNNING; 345 ifp->if_flags &= ~IFF_OACTIVE; 346 347 /* 348 * Attempt to push out any waiting packets. 349 */ 350 snstart(ifp); 351 352 splx(s); 353 } 354 355 356 void 357 snstart(struct ifnet *ifp) 358 { 359 struct sn_softc *sc = ifp->if_softc; 360 u_int len; 361 struct mbuf *m; 362 struct mbuf *top; 363 int s, pad; 364 int mask; 365 u_short length; 366 u_short numPages; 367 u_char packet_no; 368 int time_out; 369 370 s = splimp(); 371 372 if (sc->arpcom.ac_if.if_flags & IFF_OACTIVE) { 373 splx(s); 374 return; 375 } 376 if (sc->pages_wanted != -1) { 377 splx(s); 378 printf("%s: snstart() while memory allocation pending\n", 379 ifp->if_xname); 380 return; 381 } 382 startagain: 383 384 /* 385 * Sneak a peek at the next packet 386 */ 387 m = sc->arpcom.ac_if.if_snd.ifq_head; 388 if (m == 0) { 389 splx(s); 390 return; 391 } 392 /* 393 * Compute the frame length and set pad to give an overall even 394 * number of bytes. Below we assume that the packet length is even. 395 */ 396 for (len = 0, top = m; m; m = m->m_next) 397 len += m->m_len; 398 399 pad = (len & 1); 400 401 /* 402 * We drop packets that are too large. Perhaps we should truncate 403 * them instead? 404 */ 405 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) { 406 printf("%s: large packet discarded (A)\n", ifp->if_xname); 407 ++sc->arpcom.ac_if.if_oerrors; 408 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); 409 m_freem(m); 410 goto readcheck; 411 } 412 #ifdef SW_PAD 413 414 /* 415 * If HW padding is not turned on, then pad to ETHER_MIN_LEN. 416 */ 417 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN) 418 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 419 420 #endif /* SW_PAD */ 421 422 length = pad + len; 423 424 /* 425 * The MMU wants the number of pages to be the number of 256 byte 426 * 'pages', minus 1 (A packet can't ever have 0 pages. We also 427 * include space for the status word, byte count and control bytes in 428 * the allocation request. 429 */ 430 numPages = (length + 6) >> 8; 431 432 433 /* 434 * Now, try to allocate the memory 435 */ 436 SMC_SELECT_BANK(2); 437 outw(BASE + MMU_CMD_REG_W, MMUCR_ALLOC | numPages); 438 439 /* 440 * Wait a short amount of time to see if the allocation request 441 * completes. Otherwise, I enable the interrupt and wait for 442 * completion asyncronously. 443 */ 444 445 time_out = MEMORY_WAIT_TIME; 446 do { 447 if (inb(BASE + INTR_STAT_REG_B) & IM_ALLOC_INT) 448 break; 449 } while (--time_out); 450 451 if (!time_out) { 452 453 /* 454 * No memory now. Oh well, wait until the chip finds memory 455 * later. Remember how many pages we were asking for and 456 * enable the allocation completion interrupt. Also set a 457 * watchdog in case we miss the interrupt. We mark the 458 * interface active since there is no point in attempting an 459 * snstart() until after the memory is available. 460 */ 461 mask = inb(BASE + INTR_MASK_REG_B) | IM_ALLOC_INT; 462 outb(BASE + INTR_MASK_REG_B, mask); 463 sc->intr_mask = mask; 464 465 sc->arpcom.ac_if.if_timer = 1; 466 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE; 467 sc->pages_wanted = numPages; 468 469 splx(s); 470 return; 471 } 472 /* 473 * The memory allocation completed. Check the results. 474 */ 475 packet_no = inb(BASE + ALLOC_RESULT_REG_B); 476 if (packet_no & ARR_FAILED) { 477 printf("%s: Memory allocation failed\n", ifp->if_xname); 478 goto startagain; 479 } 480 /* 481 * We have a packet number, so tell the card to use it. 482 */ 483 outb(BASE + PACKET_NUM_REG_B, packet_no); 484 485 /* 486 * Point to the beginning of the packet 487 */ 488 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000); 489 490 /* 491 * Send the packet length (+6 for status, length and control byte) 492 * and the status word (set to zeros) 493 */ 494 outw(BASE + DATA_REG_W, 0); 495 outb(BASE + DATA_REG_B, (length + 6) & 0xFF); 496 outb(BASE + DATA_REG_B, (length + 6) >> 8); 497 498 /* 499 * Get the packet from the kernel. This will include the Ethernet 500 * frame header, MAC Addresses etc. 501 */ 502 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); 503 504 /* 505 * Push out the data to the card. 506 */ 507 for (top = m; m != 0; m = m->m_next) { 508 509 /* 510 * Push out words. 511 */ 512 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2); 513 514 /* 515 * Push out remaining byte. 516 */ 517 if (m->m_len & 1) 518 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1)); 519 } 520 521 /* 522 * Push out padding. 523 */ 524 while (pad > 1) { 525 outw(BASE + DATA_REG_W, 0); 526 pad -= 2; 527 } 528 if (pad) 529 outb(BASE + DATA_REG_B, 0); 530 531 /* 532 * Push out control byte and unused packet byte The control byte is 0 533 * meaning the packet is even lengthed and no special CRC handling is 534 * desired. 535 */ 536 outw(BASE + DATA_REG_W, 0); 537 538 /* 539 * Enable the interrupts and let the chipset deal with it Also set a 540 * watchdog in case we miss the interrupt. 541 */ 542 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT); 543 outb(BASE + INTR_MASK_REG_B, mask); 544 sc->intr_mask = mask; 545 546 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE); 547 548 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE; 549 sc->arpcom.ac_if.if_timer = 1; 550 551 if (ifp->if_bpf) { 552 bpf_mtap(ifp, top); 553 } 554 555 sc->arpcom.ac_if.if_opackets++; 556 m_freem(top); 557 558 559 readcheck: 560 561 /* 562 * Is another packet coming in? We don't want to overflow the tiny 563 * RX FIFO. If nothing has arrived then attempt to queue another 564 * transmit packet. 565 */ 566 if (inw(BASE + FIFO_PORTS_REG_W) & FIFO_REMPTY) 567 goto startagain; 568 569 splx(s); 570 return; 571 } 572 573 574 575 /* Resume a packet transmit operation after a memory allocation 576 * has completed. 577 * 578 * This is basically a hacked up copy of snstart() which handles 579 * a completed memory allocation the same way snstart() does. 580 * It then passes control to snstart to handle any other queued 581 * packets. 582 */ 583 static void 584 snresume(struct ifnet *ifp) 585 { 586 struct sn_softc *sc = ifp->if_softc; 587 u_int len; 588 struct mbuf *m; 589 struct mbuf *top; 590 int pad; 591 int mask; 592 u_short length; 593 u_short numPages; 594 u_short pages_wanted; 595 u_char packet_no; 596 597 if (sc->pages_wanted < 0) 598 return; 599 600 pages_wanted = sc->pages_wanted; 601 sc->pages_wanted = -1; 602 603 /* 604 * Sneak a peek at the next packet 605 */ 606 m = sc->arpcom.ac_if.if_snd.ifq_head; 607 if (m == 0) { 608 printf("%s: snresume() with nothing to send\n", ifp->if_xname); 609 return; 610 } 611 /* 612 * Compute the frame length and set pad to give an overall even 613 * number of bytes. Below we assume that the packet length is even. 614 */ 615 for (len = 0, top = m; m; m = m->m_next) 616 len += m->m_len; 617 618 pad = (len & 1); 619 620 /* 621 * We drop packets that are too large. Perhaps we should truncate 622 * them instead? 623 */ 624 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) { 625 printf("%s: large packet discarded (B)\n", ifp->if_xname); 626 ++sc->arpcom.ac_if.if_oerrors; 627 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); 628 m_freem(m); 629 return; 630 } 631 #ifdef SW_PAD 632 633 /* 634 * If HW padding is not turned on, then pad to ETHER_MIN_LEN. 635 */ 636 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN) 637 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 638 639 #endif /* SW_PAD */ 640 641 length = pad + len; 642 643 644 /* 645 * The MMU wants the number of pages to be the number of 256 byte 646 * 'pages', minus 1 (A packet can't ever have 0 pages. We also 647 * include space for the status word, byte count and control bytes in 648 * the allocation request. 649 */ 650 numPages = (length + 6) >> 8; 651 652 653 SMC_SELECT_BANK(2); 654 655 /* 656 * The memory allocation completed. Check the results. If it failed, 657 * we simply set a watchdog timer and hope for the best. 658 */ 659 packet_no = inb(BASE + ALLOC_RESULT_REG_B); 660 if (packet_no & ARR_FAILED) { 661 printf("%s: Memory allocation failed. Weird.\n", ifp->if_xname); 662 sc->arpcom.ac_if.if_timer = 1; 663 goto try_start; 664 } 665 /* 666 * We have a packet number, so tell the card to use it. 667 */ 668 outb(BASE + PACKET_NUM_REG_B, packet_no); 669 670 /* 671 * Now, numPages should match the pages_wanted recorded when the 672 * memory allocation was initiated. 673 */ 674 if (pages_wanted != numPages) { 675 printf("%s: memory allocation wrong size. Weird.\n", ifp->if_xname); 676 /* 677 * If the allocation was the wrong size we simply release the 678 * memory once it is granted. Wait for the MMU to be un-busy. 679 */ 680 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 681 ; 682 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT); 683 684 return; 685 } 686 /* 687 * Point to the beginning of the packet 688 */ 689 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000); 690 691 /* 692 * Send the packet length (+6 for status, length and control byte) 693 * and the status word (set to zeros) 694 */ 695 outw(BASE + DATA_REG_W, 0); 696 outb(BASE + DATA_REG_B, (length + 6) & 0xFF); 697 outb(BASE + DATA_REG_B, (length + 6) >> 8); 698 699 /* 700 * Get the packet from the kernel. This will include the Ethernet 701 * frame header, MAC Addresses etc. 702 */ 703 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); 704 705 /* 706 * Push out the data to the card. 707 */ 708 for (top = m; m != 0; m = m->m_next) { 709 710 /* 711 * Push out words. 712 */ 713 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2); 714 715 /* 716 * Push out remaining byte. 717 */ 718 if (m->m_len & 1) 719 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1)); 720 } 721 722 /* 723 * Push out padding. 724 */ 725 while (pad > 1) { 726 outw(BASE + DATA_REG_W, 0); 727 pad -= 2; 728 } 729 if (pad) 730 outb(BASE + DATA_REG_B, 0); 731 732 /* 733 * Push out control byte and unused packet byte The control byte is 0 734 * meaning the packet is even lengthed and no special CRC handling is 735 * desired. 736 */ 737 outw(BASE + DATA_REG_W, 0); 738 739 /* 740 * Enable the interrupts and let the chipset deal with it Also set a 741 * watchdog in case we miss the interrupt. 742 */ 743 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT); 744 outb(BASE + INTR_MASK_REG_B, mask); 745 sc->intr_mask = mask; 746 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE); 747 748 if (ifp->if_bpf) { 749 bpf_mtap(ifp, top); 750 } 751 752 sc->arpcom.ac_if.if_opackets++; 753 m_freem(top); 754 755 try_start: 756 757 /* 758 * Now pass control to snstart() to queue any additional packets 759 */ 760 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 761 snstart(ifp); 762 763 /* 764 * We've sent something, so we're active. Set a watchdog in case the 765 * TX_EMPTY interrupt is lost. 766 */ 767 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE; 768 sc->arpcom.ac_if.if_timer = 1; 769 770 return; 771 } 772 773 774 void 775 sn_intr(void *arg) 776 { 777 int status, interrupts; 778 struct sn_softc *sc = (struct sn_softc *) arg; 779 struct ifnet *ifp = &sc->arpcom.ac_if; 780 int x; 781 782 /* 783 * Chip state registers 784 */ 785 u_char mask; 786 u_char packet_no; 787 u_short tx_status; 788 u_short card_stats; 789 790 /* 791 * if_ep.c did this, so I do too. Yet if_ed.c doesn't. I wonder... 792 */ 793 x = splbio(); 794 795 /* 796 * Clear the watchdog. 797 */ 798 ifp->if_timer = 0; 799 800 SMC_SELECT_BANK(2); 801 802 /* 803 * Obtain the current interrupt mask and clear the hardware mask 804 * while servicing interrupts. 805 */ 806 mask = inb(BASE + INTR_MASK_REG_B); 807 outb(BASE + INTR_MASK_REG_B, 0x00); 808 809 /* 810 * Get the set of interrupts which occurred and eliminate any which 811 * are masked. 812 */ 813 interrupts = inb(BASE + INTR_STAT_REG_B); 814 status = interrupts & mask; 815 816 /* 817 * Now, process each of the interrupt types. 818 */ 819 820 /* 821 * Receive Overrun. 822 */ 823 if (status & IM_RX_OVRN_INT) { 824 825 /* 826 * Acknowlege Interrupt 827 */ 828 SMC_SELECT_BANK(2); 829 outb(BASE + INTR_ACK_REG_B, IM_RX_OVRN_INT); 830 831 ++sc->arpcom.ac_if.if_ierrors; 832 } 833 /* 834 * Got a packet. 835 */ 836 if (status & IM_RCV_INT) { 837 #if 1 838 int packet_number; 839 840 SMC_SELECT_BANK(2); 841 packet_number = inw(BASE + FIFO_PORTS_REG_W); 842 843 if (packet_number & FIFO_REMPTY) { 844 845 /* 846 * we got called , but nothing was on the FIFO 847 */ 848 printf("sn: Receive interrupt with nothing on FIFO\n"); 849 850 goto out; 851 } 852 #endif 853 snread(ifp); 854 } 855 /* 856 * An on-card memory allocation came through. 857 */ 858 if (status & IM_ALLOC_INT) { 859 860 /* 861 * Disable this interrupt. 862 */ 863 mask &= ~IM_ALLOC_INT; 864 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 865 snresume(&sc->arpcom.ac_if); 866 } 867 /* 868 * TX Completion. Handle a transmit error message. This will only be 869 * called when there is an error, because of the AUTO_RELEASE mode. 870 */ 871 if (status & IM_TX_INT) { 872 873 /* 874 * Acknowlege Interrupt 875 */ 876 SMC_SELECT_BANK(2); 877 outb(BASE + INTR_ACK_REG_B, IM_TX_INT); 878 879 packet_no = inw(BASE + FIFO_PORTS_REG_W); 880 packet_no &= FIFO_TX_MASK; 881 882 /* 883 * select this as the packet to read from 884 */ 885 outb(BASE + PACKET_NUM_REG_B, packet_no); 886 887 /* 888 * Position the pointer to the first word from this packet 889 */ 890 outw(BASE + POINTER_REG_W, PTR_AUTOINC | PTR_READ | 0x0000); 891 892 /* 893 * Fetch the TX status word. The value found here will be a 894 * copy of the EPH_STATUS_REG_W at the time the transmit 895 * failed. 896 */ 897 tx_status = inw(BASE + DATA_REG_W); 898 899 if (tx_status & EPHSR_TX_SUC) { 900 device_printf(sc->dev, 901 "Successful packet caused interrupt\n"); 902 } else { 903 ++sc->arpcom.ac_if.if_oerrors; 904 } 905 906 if (tx_status & EPHSR_LATCOL) 907 ++sc->arpcom.ac_if.if_collisions; 908 909 /* 910 * Some of these errors will have disabled transmit. 911 * Re-enable transmit now. 912 */ 913 SMC_SELECT_BANK(0); 914 915 #ifdef SW_PAD 916 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE); 917 #else 918 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE | TCR_PAD_ENABLE); 919 #endif /* SW_PAD */ 920 921 /* 922 * kill the failed packet. Wait for the MMU to be un-busy. 923 */ 924 SMC_SELECT_BANK(2); 925 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 926 ; 927 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT); 928 929 /* 930 * Attempt to queue more transmits. 931 */ 932 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 933 snstart(&sc->arpcom.ac_if); 934 } 935 /* 936 * Transmit underrun. We use this opportunity to update transmit 937 * statistics from the card. 938 */ 939 if (status & IM_TX_EMPTY_INT) { 940 941 /* 942 * Acknowlege Interrupt 943 */ 944 SMC_SELECT_BANK(2); 945 outb(BASE + INTR_ACK_REG_B, IM_TX_EMPTY_INT); 946 947 /* 948 * Disable this interrupt. 949 */ 950 mask &= ~IM_TX_EMPTY_INT; 951 952 SMC_SELECT_BANK(0); 953 card_stats = inw(BASE + COUNTER_REG_W); 954 955 /* 956 * Single collisions 957 */ 958 sc->arpcom.ac_if.if_collisions += card_stats & ECR_COLN_MASK; 959 960 /* 961 * Multiple collisions 962 */ 963 sc->arpcom.ac_if.if_collisions += (card_stats & ECR_MCOLN_MASK) >> 4; 964 965 SMC_SELECT_BANK(2); 966 967 /* 968 * Attempt to enqueue some more stuff. 969 */ 970 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 971 snstart(&sc->arpcom.ac_if); 972 } 973 /* 974 * Some other error. Try to fix it by resetting the adapter. 975 */ 976 if (status & IM_EPH_INT) { 977 snstop(sc); 978 sninit(sc); 979 } 980 981 out: 982 /* 983 * Handled all interrupt sources. 984 */ 985 986 SMC_SELECT_BANK(2); 987 988 /* 989 * Reestablish interrupts from mask which have not been deselected 990 * during this interrupt. Note that the hardware mask, which was set 991 * to 0x00 at the start of this service routine, may have been 992 * updated by one or more of the interrupt handers and we must let 993 * those new interrupts stay enabled here. 994 */ 995 mask |= inb(BASE + INTR_MASK_REG_B); 996 outb(BASE + INTR_MASK_REG_B, mask); 997 sc->intr_mask = mask; 998 999 splx(x); 1000 } 1001 1002 void 1003 snread(struct ifnet *ifp) 1004 { 1005 struct sn_softc *sc = ifp->if_softc; 1006 struct ether_header *eh; 1007 struct mbuf *m; 1008 short status; 1009 int packet_number; 1010 u_short packet_length; 1011 u_char *data; 1012 1013 SMC_SELECT_BANK(2); 1014 #if 0 1015 packet_number = inw(BASE + FIFO_PORTS_REG_W); 1016 1017 if (packet_number & FIFO_REMPTY) { 1018 1019 /* 1020 * we got called , but nothing was on the FIFO 1021 */ 1022 printf("sn: Receive interrupt with nothing on FIFO\n"); 1023 return; 1024 } 1025 #endif 1026 read_another: 1027 1028 /* 1029 * Start reading from the start of the packet. Since PTR_RCV is set, 1030 * packet number is found in FIFO_PORTS_REG_W, FIFO_RX_MASK. 1031 */ 1032 outw(BASE + POINTER_REG_W, PTR_READ | PTR_RCV | PTR_AUTOINC | 0x0000); 1033 1034 /* 1035 * First two words are status and packet_length 1036 */ 1037 status = inw(BASE + DATA_REG_W); 1038 packet_length = inw(BASE + DATA_REG_W) & RLEN_MASK; 1039 1040 /* 1041 * The packet length contains 3 extra words: status, length, and a 1042 * extra word with the control byte. 1043 */ 1044 packet_length -= 6; 1045 1046 /* 1047 * Account for receive errors and discard. 1048 */ 1049 if (status & RS_ERRORS) { 1050 ++sc->arpcom.ac_if.if_ierrors; 1051 goto out; 1052 } 1053 /* 1054 * A packet is received. 1055 */ 1056 1057 /* 1058 * Adjust for odd-length packet. 1059 */ 1060 if (status & RS_ODDFRAME) 1061 packet_length++; 1062 1063 /* 1064 * Allocate a header mbuf from the kernel. 1065 */ 1066 MGETHDR(m, M_DONTWAIT, MT_DATA); 1067 if (m == NULL) 1068 goto out; 1069 1070 m->m_pkthdr.rcvif = &sc->arpcom.ac_if; 1071 m->m_pkthdr.len = m->m_len = packet_length; 1072 1073 /* 1074 * Attach an mbuf cluster 1075 */ 1076 MCLGET(m, M_DONTWAIT); 1077 1078 /* 1079 * Insist on getting a cluster 1080 */ 1081 if ((m->m_flags & M_EXT) == 0) { 1082 m_freem(m); 1083 ++sc->arpcom.ac_if.if_ierrors; 1084 printf("sn: snread() kernel memory allocation problem\n"); 1085 goto out; 1086 } 1087 eh = mtod(m, struct ether_header *); 1088 1089 /* 1090 * Get packet, including link layer address, from interface. 1091 */ 1092 1093 data = (u_char *) eh; 1094 insw(BASE + DATA_REG_W, data, packet_length >> 1); 1095 if (packet_length & 1) { 1096 data += packet_length & ~1; 1097 *data = inb(BASE + DATA_REG_B); 1098 } 1099 ++sc->arpcom.ac_if.if_ipackets; 1100 1101 /* 1102 * Remove link layer addresses and whatnot. 1103 */ 1104 m->m_pkthdr.len = m->m_len = packet_length - sizeof(struct ether_header); 1105 m->m_data += sizeof(struct ether_header); 1106 1107 ether_input(&sc->arpcom.ac_if, eh, m); 1108 1109 out: 1110 1111 /* 1112 * Error or good, tell the card to get rid of this packet Wait for 1113 * the MMU to be un-busy. 1114 */ 1115 SMC_SELECT_BANK(2); 1116 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 1117 ; 1118 outw(BASE + MMU_CMD_REG_W, MMUCR_RELEASE); 1119 1120 /* 1121 * Check whether another packet is ready 1122 */ 1123 packet_number = inw(BASE + FIFO_PORTS_REG_W); 1124 if (packet_number & FIFO_REMPTY) { 1125 return; 1126 } 1127 goto read_another; 1128 } 1129 1130 1131 /* 1132 * Handle IOCTLS. This function is completely stolen from if_ep.c 1133 * As with its progenitor, it does not handle hardware address 1134 * changes. 1135 */ 1136 static int 1137 snioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1138 { 1139 struct sn_softc *sc = ifp->if_softc; 1140 int s, error = 0; 1141 1142 s = splimp(); 1143 1144 switch (cmd) { 1145 case SIOCSIFADDR: 1146 case SIOCGIFADDR: 1147 case SIOCSIFMTU: 1148 error = ether_ioctl(ifp, cmd, data); 1149 break; 1150 1151 case SIOCSIFFLAGS: 1152 if ((ifp->if_flags & IFF_UP) == 0 && ifp->if_flags & IFF_RUNNING) { 1153 ifp->if_flags &= ~IFF_RUNNING; 1154 snstop(sc); 1155 break; 1156 } else { 1157 /* reinitialize card on any parameter change */ 1158 sninit(sc); 1159 break; 1160 } 1161 break; 1162 1163 #ifdef notdef 1164 case SIOCGHWADDR: 1165 bcopy((caddr_t) sc->sc_addr, (caddr_t) & ifr->ifr_data, 1166 sizeof(sc->sc_addr)); 1167 break; 1168 #endif 1169 1170 case SIOCADDMULTI: 1171 /* update multicast filter list. */ 1172 sn_setmcast(sc); 1173 error = 0; 1174 break; 1175 case SIOCDELMULTI: 1176 /* update multicast filter list. */ 1177 sn_setmcast(sc); 1178 error = 0; 1179 break; 1180 default: 1181 error = EINVAL; 1182 } 1183 1184 splx(s); 1185 1186 return (error); 1187 } 1188 1189 void 1190 snreset(struct sn_softc *sc) 1191 { 1192 int s; 1193 1194 s = splimp(); 1195 snstop(sc); 1196 sninit(sc); 1197 1198 splx(s); 1199 } 1200 1201 void 1202 snwatchdog(struct ifnet *ifp) 1203 { 1204 int s; 1205 s = splimp(); 1206 sn_intr(ifp->if_softc); 1207 splx(s); 1208 } 1209 1210 1211 /* 1. zero the interrupt mask 1212 * 2. clear the enable receive flag 1213 * 3. clear the enable xmit flags 1214 */ 1215 void 1216 snstop(struct sn_softc *sc) 1217 { 1218 1219 struct ifnet *ifp = &sc->arpcom.ac_if; 1220 1221 /* 1222 * Clear interrupt mask; disable all interrupts. 1223 */ 1224 SMC_SELECT_BANK(2); 1225 outb(BASE + INTR_MASK_REG_B, 0x00); 1226 1227 /* 1228 * Disable transmitter and Receiver 1229 */ 1230 SMC_SELECT_BANK(0); 1231 outw(BASE + RECV_CONTROL_REG_W, 0x0000); 1232 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000); 1233 1234 /* 1235 * Cancel watchdog. 1236 */ 1237 ifp->if_timer = 0; 1238 } 1239 1240 1241 int 1242 sn_activate(device_t dev) 1243 { 1244 struct sn_softc *sc = device_get_softc(dev); 1245 int err; 1246 1247 sc->port_rid = 0; 1248 sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->port_rid, 1249 0, ~0, SMC_IO_EXTENT, RF_ACTIVE); 1250 if (!sc->port_res) { 1251 #ifdef SN_DEBUG 1252 device_printf(dev, "Cannot allocate ioport\n"); 1253 #endif 1254 return ENOMEM; 1255 } 1256 1257 sc->irq_rid = 0; 1258 sc->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irq_rid, 1259 0, ~0, 1, RF_ACTIVE); 1260 if (!sc->irq_res) { 1261 #ifdef SN_DEBUG 1262 device_printf(dev, "Cannot allocate irq\n"); 1263 #endif 1264 sn_deactivate(dev); 1265 return ENOMEM; 1266 } 1267 if ((err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET, sn_intr, sc, 1268 &sc->intrhand)) != 0) { 1269 sn_deactivate(dev); 1270 return err; 1271 } 1272 1273 sc->sn_io_addr = rman_get_start(sc->port_res); 1274 return (0); 1275 } 1276 1277 void 1278 sn_deactivate(device_t dev) 1279 { 1280 struct sn_softc *sc = device_get_softc(dev); 1281 1282 if (sc->intrhand) 1283 bus_teardown_intr(dev, sc->irq_res, sc->intrhand); 1284 sc->intrhand = 0; 1285 if (sc->port_res) 1286 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid, 1287 sc->port_res); 1288 sc->port_res = 0; 1289 if (sc->irq_res) 1290 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, 1291 sc->irq_res); 1292 sc->irq_res = 0; 1293 return; 1294 } 1295 1296 /* 1297 * Function: sn_probe( device_t dev, int pccard ) 1298 * 1299 * Purpose: 1300 * Tests to see if a given ioaddr points to an SMC9xxx chip. 1301 * Tries to cause as little damage as possible if it's not a SMC chip. 1302 * Returns a 0 on success 1303 * 1304 * Algorithm: 1305 * (1) see if the high byte of BANK_SELECT is 0x33 1306 * (2) compare the ioaddr with the base register's address 1307 * (3) see if I recognize the chip ID in the appropriate register 1308 * 1309 * 1310 */ 1311 int 1312 sn_probe(device_t dev, int pccard) 1313 { 1314 struct sn_softc *sc = device_get_softc(dev); 1315 u_int bank; 1316 u_short revision_register; 1317 u_short base_address_register; 1318 u_short ioaddr; 1319 int err; 1320 1321 if ((err = sn_activate(dev)) != 0) 1322 return err; 1323 1324 ioaddr = sc->sn_io_addr; 1325 1326 /* 1327 * First, see if the high byte is 0x33 1328 */ 1329 bank = inw(ioaddr + BANK_SELECT_REG_W); 1330 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) { 1331 #ifdef SN_DEBUG 1332 device_printf(dev, "test1 failed\n"); 1333 #endif 1334 goto error; 1335 } 1336 /* 1337 * The above MIGHT indicate a device, but I need to write to further 1338 * test this. Go to bank 0, then test that the register still 1339 * reports the high byte is 0x33. 1340 */ 1341 outw(ioaddr + BANK_SELECT_REG_W, 0x0000); 1342 bank = inw(ioaddr + BANK_SELECT_REG_W); 1343 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) { 1344 #ifdef SN_DEBUG 1345 device_printf(dev, "test2 failed\n"); 1346 #endif 1347 goto error; 1348 } 1349 /* 1350 * well, we've already written once, so hopefully another time won't 1351 * hurt. This time, I need to switch the bank register to bank 1, so 1352 * I can access the base address register. The contents of the 1353 * BASE_ADDR_REG_W register, after some jiggery pokery, is expected 1354 * to match the I/O port address where the adapter is being probed. 1355 */ 1356 outw(ioaddr + BANK_SELECT_REG_W, 0x0001); 1357 base_address_register = inw(ioaddr + BASE_ADDR_REG_W); 1358 1359 /* 1360 * This test is nonsence on PC-card architecture, so if 1361 * pccard == 1, skip this test. (hosokawa) 1362 */ 1363 if (!pccard && (ioaddr != (base_address_register >> 3 & 0x3E0))) { 1364 1365 /* 1366 * Well, the base address register didn't match. Must not 1367 * have been a SMC chip after all. 1368 */ 1369 /* 1370 * printf("sn: ioaddr %x doesn't match card configuration 1371 * (%x)\n", ioaddr, base_address_register >> 3 & 0x3E0 ); 1372 */ 1373 1374 #ifdef SN_DEBUG 1375 device_printf(dev, "test3 failed ioaddr = 0x%x, " 1376 "base_address_register = 0x%x\n", ioaddr, 1377 base_address_register >> 3 & 0x3E0); 1378 #endif 1379 goto error; 1380 } 1381 /* 1382 * Check if the revision register is something that I recognize. 1383 * These might need to be added to later, as future revisions could 1384 * be added. 1385 */ 1386 outw(ioaddr + BANK_SELECT_REG_W, 0x3); 1387 revision_register = inw(ioaddr + REVISION_REG_W); 1388 if (!chip_ids[(revision_register >> 4) & 0xF]) { 1389 1390 /* 1391 * I don't regonize this chip, so... 1392 */ 1393 #ifdef SN_DEBUG 1394 device_printf(dev, "test4 failed\n"); 1395 #endif 1396 goto error; 1397 } 1398 /* 1399 * at this point I'll assume that the chip is an SMC9xxx. It might be 1400 * prudent to check a listing of MAC addresses against the hardware 1401 * address, or do some other tests. 1402 */ 1403 sn_deactivate(dev); 1404 return 0; 1405 error: 1406 sn_deactivate(dev); 1407 return ENXIO; 1408 } 1409 1410 #define MCFSZ 8 1411 1412 static void 1413 sn_setmcast(struct sn_softc *sc) 1414 { 1415 struct ifnet *ifp = (struct ifnet *)sc; 1416 int flags; 1417 1418 /* 1419 * Set the receiver filter. We want receive enabled and auto strip 1420 * of CRC from received packet. If we are promiscuous then set that 1421 * bit too. 1422 */ 1423 flags = RCR_ENABLE | RCR_STRIP_CRC; 1424 1425 if (ifp->if_flags & IFF_PROMISC) { 1426 flags |= RCR_PROMISC | RCR_ALMUL; 1427 } else if (ifp->if_flags & IFF_ALLMULTI) { 1428 flags |= RCR_ALMUL; 1429 } else { 1430 u_char mcf[MCFSZ]; 1431 if (sn_getmcf(&sc->arpcom, mcf)) { 1432 /* set filter */ 1433 SMC_SELECT_BANK(3); 1434 outw(BASE + MULTICAST1_REG_W, 1435 ((u_short)mcf[1] << 8) | mcf[0]); 1436 outw(BASE + MULTICAST2_REG_W, 1437 ((u_short)mcf[3] << 8) | mcf[2]); 1438 outw(BASE + MULTICAST3_REG_W, 1439 ((u_short)mcf[5] << 8) | mcf[4]); 1440 outw(BASE + MULTICAST4_REG_W, 1441 ((u_short)mcf[7] << 8) | mcf[6]); 1442 } else { 1443 flags |= RCR_ALMUL; 1444 } 1445 } 1446 SMC_SELECT_BANK(0); 1447 outw(BASE + RECV_CONTROL_REG_W, flags); 1448 } 1449 1450 static int 1451 sn_getmcf(struct arpcom *ac, u_char *mcf) 1452 { 1453 int i; 1454 u_int index, index2; 1455 u_char *af = (u_char *) mcf; 1456 struct ifmultiaddr *ifma; 1457 1458 bzero(mcf, MCFSZ); 1459 1460 for (ifma = ac->ac_if.if_multiaddrs.lh_first; ifma; 1461 ifma = ifma->ifma_link.le_next) { 1462 if (ifma->ifma_addr->sa_family != AF_LINK) 1463 return 0; 1464 index = smc_crc(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)) & 0x3f; 1465 index2 = 0; 1466 for (i = 0; i < 6; i++) { 1467 index2 <<= 1; 1468 index2 |= (index & 0x01); 1469 index >>= 1; 1470 } 1471 af[index2 >> 3] |= 1 << (index2 & 7); 1472 } 1473 return 1; /* use multicast filter */ 1474 } 1475 1476 static u_int 1477 smc_crc(u_char *s) 1478 { 1479 int perByte; 1480 int perBit; 1481 const u_int poly = 0xedb88320; 1482 u_int v = 0xffffffff; 1483 u_char c; 1484 1485 for (perByte = 0; perByte < ETHER_ADDR_LEN; perByte++) { 1486 c = s[perByte]; 1487 for (perBit = 0; perBit < 8; perBit++) { 1488 v = (v >> 1)^(((v ^ c) & 0x01) ? poly : 0); 1489 c >>= 1; 1490 } 1491 } 1492 return v; 1493 } 1494