1 /*- 2 * Copyright (c) 1999,2000 Michael Smith 3 * Copyright (c) 2000 BSDi 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * Copyright (c) 2002 Eric Moore 28 * Copyright (c) 2002 LSI Logic Corporation 29 * All rights reserved. 30 * 31 * Redistribution and use in source and binary forms, with or without 32 * modification, are permitted provided that the following conditions 33 * are met: 34 * 1. Redistributions of source code must retain the above copyright 35 * notice, this list of conditions and the following disclaimer. 36 * 2. Redistributions in binary form must reproduce the above copyright 37 * notice, this list of conditions and the following disclaimer in the 38 * documentation and/or other materials provided with the distribution. 39 * 3. The party using or redistributing the source code and binary forms 40 * agrees to the disclaimer below and the terms and conditions set forth 41 * herein. 42 * 43 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 44 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 45 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 46 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 47 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 48 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 49 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 50 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 51 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 52 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 53 * SUCH DAMAGE. 54 * 55 * $FreeBSD: src/sys/dev/amr/amr_pci.c,v 1.1.2.9 2002/12/20 15:12:04 emoore Exp $ 56 * $DragonFly: src/sys/dev/raid/amr/amr_pci.c,v 1.9 2006/12/22 23:26:23 swildner Exp $ 57 */ 58 59 #include <sys/param.h> 60 #include <sys/systm.h> 61 #include <sys/kernel.h> 62 63 #include "amr_compat.h" 64 #include <sys/bus.h> 65 #include <sys/conf.h> 66 #include <sys/devicestat.h> 67 #include <sys/disk.h> 68 #include <sys/rman.h> 69 70 #include <bus/pci/pcireg.h> 71 #include <bus/pci/pcivar.h> 72 73 #include "amrio.h" 74 #include "amrreg.h" 75 #include "amrvar.h" 76 77 static int amr_pci_probe(device_t dev); 78 static int amr_pci_attach(device_t dev); 79 static int amr_pci_detach(device_t dev); 80 static int amr_pci_shutdown(device_t dev); 81 static int amr_pci_suspend(device_t dev); 82 static int amr_pci_resume(device_t dev); 83 static void amr_pci_intr(void *arg); 84 static void amr_pci_free(struct amr_softc *sc); 85 static void amr_sglist_map_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error); 86 static int amr_sglist_map(struct amr_softc *sc); 87 static void amr_setup_mbox_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error); 88 static int amr_setup_mbox(struct amr_softc *sc); 89 90 static device_method_t amr_methods[] = { 91 /* Device interface */ 92 DEVMETHOD(device_probe, amr_pci_probe), 93 DEVMETHOD(device_attach, amr_pci_attach), 94 DEVMETHOD(device_detach, amr_pci_detach), 95 DEVMETHOD(device_shutdown, amr_pci_shutdown), 96 DEVMETHOD(device_suspend, amr_pci_suspend), 97 DEVMETHOD(device_resume, amr_pci_resume), 98 99 DEVMETHOD(bus_print_child, bus_generic_print_child), 100 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 101 { 0, 0 } 102 }; 103 104 static driver_t amr_pci_driver = { 105 "amr", 106 amr_methods, 107 sizeof(struct amr_softc) 108 }; 109 110 static devclass_t amr_devclass; 111 DRIVER_MODULE(amr, pci, amr_pci_driver, amr_devclass, 0, 0); 112 113 static struct 114 { 115 int vendor; 116 int device; 117 int flag; 118 #define PROBE_SIGNATURE (1<<0) 119 } amr_device_ids[] = { 120 {0x101e, 0x9010, 0}, 121 {0x101e, 0x9060, 0}, 122 {0x8086, 0x1960, PROBE_SIGNATURE},/* generic i960RD, check for signature */ 123 {0x101e, 0x1960, 0}, 124 {0x1000, 0x1960, PROBE_SIGNATURE}, 125 {0x1000, 0x0407, 0}, 126 {0x1028, 0x000e, PROBE_SIGNATURE}, /* perc4/di i960 */ 127 {0x1028, 0x000f, 0}, /* perc4/di Verde*/ 128 {0, 0, 0} 129 }; 130 131 static int 132 amr_pci_probe(device_t dev) 133 { 134 int i, sig; 135 136 debug_called(1); 137 138 for (i = 0; amr_device_ids[i].vendor != 0; i++) { 139 if ((pci_get_vendor(dev) == amr_device_ids[i].vendor) && 140 (pci_get_device(dev) == amr_device_ids[i].device)) { 141 142 /* do we need to test for a signature? */ 143 if (amr_device_ids[i].flag & PROBE_SIGNATURE) { 144 sig = pci_read_config(dev, AMR_CFG_SIG, 2); 145 if ((sig != AMR_SIGNATURE_1) && (sig != AMR_SIGNATURE_2)) 146 continue; 147 } 148 device_set_desc(dev, "LSILogic MegaRAID"); 149 return(-10); /* allow room to be overridden */ 150 } 151 } 152 return(ENXIO); 153 } 154 155 static int 156 amr_pci_attach(device_t dev) 157 { 158 struct amr_softc *sc; 159 int rid, rtype, error; 160 u_int32_t command; 161 162 debug_called(1); 163 164 /* 165 * Initialise softc. 166 */ 167 sc = device_get_softc(dev); 168 bzero(sc, sizeof(*sc)); 169 sc->amr_dev = dev; 170 171 /* assume failure is 'not configured' */ 172 error = ENXIO; 173 174 /* 175 * Determine board type. 176 */ 177 command = pci_read_config(dev, PCIR_COMMAND, 1); 178 if ((pci_get_device(dev) == 0x1960) || (pci_get_device(dev) == 0x0407) || 179 (pci_get_device(dev) == 0x000e) || (pci_get_device(dev) == 0x000f)) { 180 /* 181 * Make sure we are going to be able to talk to this board. 182 */ 183 if ((command & PCIM_CMD_MEMEN) == 0) { 184 device_printf(dev, "memory window not available\n"); 185 goto out; 186 } 187 sc->amr_type |= AMR_TYPE_QUARTZ; 188 189 } else { 190 /* 191 * Make sure we are going to be able to talk to this board. 192 */ 193 if ((command & PCIM_CMD_PORTEN) == 0) { 194 device_printf(dev, "I/O window not available\n"); 195 goto out; 196 } 197 } 198 199 /* force the busmaster enable bit on */ 200 if (!(command & PCIM_CMD_BUSMASTEREN)) { 201 device_printf(dev, "busmaster bit not set, enabling\n"); 202 command |= PCIM_CMD_BUSMASTEREN; 203 pci_write_config(dev, PCIR_COMMAND, command, 2); 204 } 205 206 /* 207 * Allocate the PCI register window. 208 */ 209 rid = PCIR_MAPS; 210 rtype = AMR_IS_QUARTZ(sc) ? SYS_RES_MEMORY : SYS_RES_IOPORT; 211 sc->amr_reg = bus_alloc_resource(dev, rtype, &rid, 0, ~0, 1, RF_ACTIVE); 212 if (sc->amr_reg == NULL) { 213 device_printf(sc->amr_dev, "can't allocate register window\n"); 214 goto out; 215 } 216 sc->amr_btag = rman_get_bustag(sc->amr_reg); 217 sc->amr_bhandle = rman_get_bushandle(sc->amr_reg); 218 219 /* 220 * Allocate and connect our interrupt. 221 */ 222 rid = 0; 223 sc->amr_irq = bus_alloc_resource(sc->amr_dev, SYS_RES_IRQ, &rid, 0, ~0, 1, RF_SHAREABLE | RF_ACTIVE); 224 if (sc->amr_irq == NULL) { 225 device_printf(sc->amr_dev, "can't allocate interrupt\n"); 226 goto out; 227 } 228 error = bus_setup_intr(sc->amr_dev, sc->amr_irq, 229 0, amr_pci_intr, sc, 230 &sc->amr_intr, NULL); 231 if (error) { 232 device_printf(sc->amr_dev, "can't set up interrupt\n"); 233 goto out; 234 } 235 236 debug(2, "interrupt attached"); 237 238 /* assume failure is 'out of memory' */ 239 error = ENOMEM; 240 241 /* 242 * Allocate the parent bus DMA tag appropriate for PCI. 243 */ 244 if (bus_dma_tag_create(NULL, /* parent */ 245 1, 0, /* alignment, boundary */ 246 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 247 BUS_SPACE_MAXADDR, /* highaddr */ 248 NULL, NULL, /* filter, filterarg */ 249 MAXBSIZE, AMR_NSEG, /* maxsize, nsegments */ 250 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 251 BUS_DMA_ALLOCNOW, /* flags */ 252 &sc->amr_parent_dmat)) { 253 device_printf(dev, "can't allocate parent DMA tag\n"); 254 goto out; 255 } 256 257 /* 258 * Create DMA tag for mapping buffers into controller-addressable space. 259 */ 260 if (bus_dma_tag_create(sc->amr_parent_dmat, /* parent */ 261 1, 0, /* alignment, boundary */ 262 BUS_SPACE_MAXADDR, /* lowaddr */ 263 BUS_SPACE_MAXADDR, /* highaddr */ 264 NULL, NULL, /* filter, filterarg */ 265 MAXBSIZE, AMR_NSEG, /* maxsize, nsegments */ 266 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 267 0, /* flags */ 268 &sc->amr_buffer_dmat)) { 269 device_printf(sc->amr_dev, "can't allocate buffer DMA tag\n"); 270 goto out; 271 } 272 273 debug(2, "dma tag done"); 274 275 /* 276 * Allocate and set up mailbox in a bus-visible fashion. 277 */ 278 if ((error = amr_setup_mbox(sc)) != 0) 279 goto out; 280 281 debug(2, "mailbox setup"); 282 283 /* 284 * Build the scatter/gather buffers. 285 */ 286 if (amr_sglist_map(sc)) 287 goto out; 288 289 debug(2, "s/g list mapped"); 290 291 /* 292 * Do bus-independant initialisation, bring controller online. 293 */ 294 error = amr_attach(sc); 295 296 out: 297 if (error) 298 amr_pci_free(sc); 299 return(error); 300 } 301 302 /******************************************************************************** 303 * Disconnect from the controller completely, in preparation for unload. 304 */ 305 static int 306 amr_pci_detach(device_t dev) 307 { 308 struct amr_softc *sc = device_get_softc(dev); 309 int error; 310 311 debug_called(1); 312 313 if (sc->amr_state & AMR_STATE_OPEN) 314 return(EBUSY); 315 316 if ((error = amr_pci_shutdown(dev))) 317 return(error); 318 319 amr_pci_free(sc); 320 321 return(0); 322 } 323 324 /******************************************************************************** 325 * Bring the controller down to a dormant state and detach all child devices. 326 * 327 * This function is called before detach, system shutdown, or before performing 328 * an operation which may add or delete system disks. (Call amr_startup to 329 * resume normal operation.) 330 * 331 * Note that we can assume that the bioq on the controller is empty, as we won't 332 * allow shutdown if any device is open. 333 */ 334 static int 335 amr_pci_shutdown(device_t dev) 336 { 337 struct amr_softc *sc = device_get_softc(dev); 338 int i,error; 339 340 debug_called(1); 341 342 /* mark ourselves as in-shutdown */ 343 sc->amr_state |= AMR_STATE_SHUTDOWN; 344 345 346 /* flush controller */ 347 device_printf(sc->amr_dev, "flushing cache..."); 348 kprintf("%s\n", amr_flush(sc) ? "failed" : "done"); 349 350 crit_enter(); 351 error = 0; 352 353 /* delete all our child devices */ 354 for(i = 0 ; i < AMR_MAXLD; i++) { 355 if( sc->amr_drive[i].al_disk != 0) { 356 if((error = device_delete_child(sc->amr_dev,sc->amr_drive[i].al_disk)) != 0) 357 goto shutdown_out; 358 sc->amr_drive[i].al_disk = 0; 359 } 360 } 361 362 /* XXX disable interrupts? */ 363 364 shutdown_out: 365 crit_exit(); 366 return(error); 367 } 368 369 /******************************************************************************** 370 * Bring the controller to a quiescent state, ready for system suspend. 371 */ 372 static int 373 amr_pci_suspend(device_t dev) 374 { 375 struct amr_softc *sc = device_get_softc(dev); 376 377 debug_called(1); 378 379 sc->amr_state |= AMR_STATE_SUSPEND; 380 381 /* flush controller */ 382 device_printf(sc->amr_dev, "flushing cache..."); 383 kprintf("%s\n", amr_flush(sc) ? "failed" : "done"); 384 385 /* XXX disable interrupts? */ 386 387 return(0); 388 } 389 390 /******************************************************************************** 391 * Bring the controller back to a state ready for operation. 392 */ 393 static int 394 amr_pci_resume(device_t dev) 395 { 396 struct amr_softc *sc = device_get_softc(dev); 397 398 debug_called(1); 399 400 sc->amr_state &= ~AMR_STATE_SUSPEND; 401 402 /* XXX enable interrupts? */ 403 404 return(0); 405 } 406 407 /******************************************************************************* 408 * Take an interrupt, or be poked by other code to look for interrupt-worthy 409 * status. 410 */ 411 static void 412 amr_pci_intr(void *arg) 413 { 414 struct amr_softc *sc = (struct amr_softc *)arg; 415 416 debug_called(2); 417 418 /* collect finished commands, queue anything waiting */ 419 amr_done(sc); 420 } 421 422 /******************************************************************************** 423 * Free all of the resources associated with (sc) 424 * 425 * Should not be called if the controller is active. 426 */ 427 static void 428 amr_pci_free(struct amr_softc *sc) 429 { 430 u_int8_t *p; 431 432 debug_called(1); 433 434 amr_free(sc); 435 436 /* destroy data-transfer DMA tag */ 437 if (sc->amr_buffer_dmat) 438 bus_dma_tag_destroy(sc->amr_buffer_dmat); 439 440 /* free and destroy DMA memory and tag for s/g lists */ 441 if (sc->amr_sgtable) 442 bus_dmamem_free(sc->amr_sg_dmat, sc->amr_sgtable, sc->amr_sg_dmamap); 443 if (sc->amr_sg_dmat) 444 bus_dma_tag_destroy(sc->amr_sg_dmat); 445 446 /* free and destroy DMA memory and tag for mailbox */ 447 if (sc->amr_mailbox) { 448 p = (u_int8_t *)(uintptr_t)(volatile void *)sc->amr_mailbox; 449 bus_dmamem_free(sc->amr_mailbox_dmat, p - 16, sc->amr_mailbox_dmamap); 450 } 451 if (sc->amr_mailbox_dmat) 452 bus_dma_tag_destroy(sc->amr_mailbox_dmat); 453 454 /* disconnect the interrupt handler */ 455 if (sc->amr_intr) 456 bus_teardown_intr(sc->amr_dev, sc->amr_irq, sc->amr_intr); 457 if (sc->amr_irq != NULL) 458 bus_release_resource(sc->amr_dev, SYS_RES_IRQ, 0, sc->amr_irq); 459 460 /* destroy the parent DMA tag */ 461 if (sc->amr_parent_dmat) 462 bus_dma_tag_destroy(sc->amr_parent_dmat); 463 464 /* release the register window mapping */ 465 if (sc->amr_reg != NULL) 466 bus_release_resource(sc->amr_dev, 467 AMR_IS_QUARTZ(sc) ? SYS_RES_MEMORY : SYS_RES_IOPORT, 468 PCIR_MAPS, sc->amr_reg); 469 } 470 471 /******************************************************************************** 472 * Allocate and map the scatter/gather table in bus space. 473 */ 474 static void 475 amr_sglist_map_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error) 476 { 477 struct amr_softc *sc = (struct amr_softc *)arg; 478 479 debug_called(1); 480 481 /* save base of s/g table's address in bus space */ 482 sc->amr_sgbusaddr = segs->ds_addr; 483 } 484 485 static int 486 amr_sglist_map(struct amr_softc *sc) 487 { 488 size_t segsize; 489 int error; 490 491 debug_called(1); 492 493 /* 494 * Create a single tag describing a region large enough to hold all of 495 * the s/g lists we will need. 496 * 497 * Note that we could probably use AMR_LIMITCMD here, but that may become tunable. 498 */ 499 segsize = sizeof(struct amr_sgentry) * AMR_NSEG * AMR_MAXCMD; 500 error = bus_dma_tag_create(sc->amr_parent_dmat, /* parent */ 501 1, 0, /* alignment, boundary */ 502 BUS_SPACE_MAXADDR, /* lowaddr */ 503 BUS_SPACE_MAXADDR, /* highaddr */ 504 NULL, NULL, /* filter, filterarg */ 505 segsize, 1, /* maxsize, nsegments */ 506 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 507 0, /* flags */ 508 &sc->amr_sg_dmat); 509 if (error != 0) { 510 device_printf(sc->amr_dev, "can't allocate scatter/gather DMA tag\n"); 511 return(ENOMEM); 512 } 513 514 /* 515 * Allocate enough s/g maps for all commands and permanently map them into 516 * controller-visible space. 517 * 518 * XXX this assumes we can get enough space for all the s/g maps in one 519 * contiguous slab. We may need to switch to a more complex arrangement where 520 * we allocate in smaller chunks and keep a lookup table from slot to bus address. 521 * 522 * XXX HACK ALERT: at least some controllers don't like the s/g memory being 523 * allocated below 0x2000. We leak some memory if we get some 524 * below this mark and allocate again. We should be able to 525 * avoid this with the tag setup, but that does't seem to work. 526 */ 527 retry: 528 error = bus_dmamem_alloc(sc->amr_sg_dmat, (void **)&sc->amr_sgtable, BUS_DMA_NOWAIT, &sc->amr_sg_dmamap); 529 if (error) { 530 device_printf(sc->amr_dev, "can't allocate s/g table\n"); 531 return(ENOMEM); 532 } 533 bus_dmamap_load(sc->amr_sg_dmat, sc->amr_sg_dmamap, sc->amr_sgtable, segsize, amr_sglist_map_helper, sc, 0); 534 if (sc->amr_sgbusaddr < 0x2000) { 535 debug(1, "s/g table too low (0x%x), reallocating\n", sc->amr_sgbusaddr); 536 goto retry; 537 } 538 return(0); 539 } 540 541 /******************************************************************************** 542 * Allocate and set up mailbox areas for the controller (sc) 543 * 544 * The basic mailbox structure should be 16-byte aligned. This means that the 545 * mailbox64 structure has 4 bytes hanging off the bottom. 546 */ 547 static void 548 amr_setup_mbox_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error) 549 { 550 struct amr_softc *sc = (struct amr_softc *)arg; 551 552 debug_called(1); 553 554 /* save phsyical base of the basic mailbox structure */ 555 sc->amr_mailboxphys = segs->ds_addr + 16; 556 } 557 558 static int 559 amr_setup_mbox(struct amr_softc *sc) 560 { 561 int error; 562 u_int8_t *p; 563 564 debug_called(1); 565 566 /* 567 * Create a single tag describing a region large enough to hold the entire 568 * mailbox. 569 */ 570 error = bus_dma_tag_create(sc->amr_parent_dmat, /* parent */ 571 16, 0, /* alignment, boundary */ 572 BUS_SPACE_MAXADDR, /* lowaddr */ 573 BUS_SPACE_MAXADDR, /* highaddr */ 574 NULL, NULL, /* filter, filterarg */ 575 sizeof(struct amr_mailbox) + 16, 1, /* maxsize, nsegments */ 576 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 577 0, /* flags */ 578 &sc->amr_mailbox_dmat); 579 if (error != 0) { 580 device_printf(sc->amr_dev, "can't allocate mailbox tag\n"); 581 return(ENOMEM); 582 } 583 584 /* 585 * Allocate the mailbox structure and permanently map it into 586 * controller-visible space. 587 */ 588 error = bus_dmamem_alloc(sc->amr_mailbox_dmat, (void **)&p, BUS_DMA_NOWAIT, 589 &sc->amr_mailbox_dmamap); 590 if (error) { 591 device_printf(sc->amr_dev, "can't allocate mailbox memory\n"); 592 return(ENOMEM); 593 } 594 bus_dmamap_load(sc->amr_mailbox_dmat, sc->amr_mailbox_dmamap, p, 595 sizeof(struct amr_mailbox64), amr_setup_mbox_helper, sc, 0); 596 /* 597 * Conventional mailbox is inside the mailbox64 region. 598 */ 599 bzero(p, sizeof(struct amr_mailbox64)); 600 sc->amr_mailbox64 = (struct amr_mailbox64 *)(p + 12); 601 sc->amr_mailbox = (struct amr_mailbox *)(p + 16); 602 603 return(0); 604 } 605