1 /*- 2 * Copyright (c) 1999,2000 Michael Smith 3 * Copyright (c) 2000 BSDi 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * Copyright (c) 2002 Eric Moore 28 * Copyright (c) 2002 LSI Logic Corporation 29 * All rights reserved. 30 * 31 * Redistribution and use in source and binary forms, with or without 32 * modification, are permitted provided that the following conditions 33 * are met: 34 * 1. Redistributions of source code must retain the above copyright 35 * notice, this list of conditions and the following disclaimer. 36 * 2. Redistributions in binary form must reproduce the above copyright 37 * notice, this list of conditions and the following disclaimer in the 38 * documentation and/or other materials provided with the distribution. 39 * 3. The party using or redistributing the source code and binary forms 40 * agrees to the disclaimer below and the terms and conditions set forth 41 * herein. 42 * 43 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 44 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 45 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 46 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 47 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 48 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 49 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 50 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 51 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 52 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 53 * SUCH DAMAGE. 54 * 55 * $FreeBSD: src/sys/dev/amr/amr_pci.c,v 1.1.2.9 2002/12/20 15:12:04 emoore Exp $ 56 * $DragonFly: src/sys/dev/raid/amr/amr_pci.c,v 1.6 2005/10/12 17:35:54 dillon Exp $ 57 */ 58 59 #include <sys/param.h> 60 #include <sys/systm.h> 61 #include <sys/kernel.h> 62 63 #include "amr_compat.h" 64 #include <sys/bus.h> 65 #include <sys/conf.h> 66 #include <sys/devicestat.h> 67 #include <sys/disk.h> 68 69 #include <machine/bus_memio.h> 70 #include <machine/bus_pio.h> 71 #include <machine/bus.h> 72 #include <machine/resource.h> 73 #include <sys/rman.h> 74 75 #include <bus/pci/pcireg.h> 76 #include <bus/pci/pcivar.h> 77 78 #include "amrio.h" 79 #include "amrreg.h" 80 #include "amrvar.h" 81 82 static int amr_pci_probe(device_t dev); 83 static int amr_pci_attach(device_t dev); 84 static int amr_pci_detach(device_t dev); 85 static int amr_pci_shutdown(device_t dev); 86 static int amr_pci_suspend(device_t dev); 87 static int amr_pci_resume(device_t dev); 88 static void amr_pci_intr(void *arg); 89 static void amr_pci_free(struct amr_softc *sc); 90 static void amr_sglist_map_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error); 91 static int amr_sglist_map(struct amr_softc *sc); 92 static void amr_setup_mbox_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error); 93 static int amr_setup_mbox(struct amr_softc *sc); 94 95 static device_method_t amr_methods[] = { 96 /* Device interface */ 97 DEVMETHOD(device_probe, amr_pci_probe), 98 DEVMETHOD(device_attach, amr_pci_attach), 99 DEVMETHOD(device_detach, amr_pci_detach), 100 DEVMETHOD(device_shutdown, amr_pci_shutdown), 101 DEVMETHOD(device_suspend, amr_pci_suspend), 102 DEVMETHOD(device_resume, amr_pci_resume), 103 104 DEVMETHOD(bus_print_child, bus_generic_print_child), 105 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 106 { 0, 0 } 107 }; 108 109 static driver_t amr_pci_driver = { 110 "amr", 111 amr_methods, 112 sizeof(struct amr_softc) 113 }; 114 115 static devclass_t amr_devclass; 116 DRIVER_MODULE(amr, pci, amr_pci_driver, amr_devclass, 0, 0); 117 118 static struct 119 { 120 int vendor; 121 int device; 122 int flag; 123 #define PROBE_SIGNATURE (1<<0) 124 } amr_device_ids[] = { 125 {0x101e, 0x9010, 0}, 126 {0x101e, 0x9060, 0}, 127 {0x8086, 0x1960, PROBE_SIGNATURE},/* generic i960RD, check for signature */ 128 {0x101e, 0x1960, 0}, 129 {0x1000, 0x1960, PROBE_SIGNATURE}, 130 {0x1000, 0x0407, 0}, 131 {0x1028, 0x000e, PROBE_SIGNATURE}, /* perc4/di i960 */ 132 {0x1028, 0x000f, 0}, /* perc4/di Verde*/ 133 {0, 0, 0} 134 }; 135 136 static int 137 amr_pci_probe(device_t dev) 138 { 139 int i, sig; 140 141 debug_called(1); 142 143 for (i = 0; amr_device_ids[i].vendor != 0; i++) { 144 if ((pci_get_vendor(dev) == amr_device_ids[i].vendor) && 145 (pci_get_device(dev) == amr_device_ids[i].device)) { 146 147 /* do we need to test for a signature? */ 148 if (amr_device_ids[i].flag & PROBE_SIGNATURE) { 149 sig = pci_read_config(dev, AMR_CFG_SIG, 2); 150 if ((sig != AMR_SIGNATURE_1) && (sig != AMR_SIGNATURE_2)) 151 continue; 152 } 153 device_set_desc(dev, "LSILogic MegaRAID"); 154 return(-10); /* allow room to be overridden */ 155 } 156 } 157 return(ENXIO); 158 } 159 160 static int 161 amr_pci_attach(device_t dev) 162 { 163 struct amr_softc *sc; 164 int rid, rtype, error; 165 u_int32_t command; 166 167 debug_called(1); 168 169 /* 170 * Initialise softc. 171 */ 172 sc = device_get_softc(dev); 173 bzero(sc, sizeof(*sc)); 174 sc->amr_dev = dev; 175 176 /* assume failure is 'not configured' */ 177 error = ENXIO; 178 179 /* 180 * Determine board type. 181 */ 182 command = pci_read_config(dev, PCIR_COMMAND, 1); 183 if ((pci_get_device(dev) == 0x1960) || (pci_get_device(dev) == 0x0407) || 184 (pci_get_device(dev) == 0x000e) || (pci_get_device(dev) == 0x000f)) { 185 /* 186 * Make sure we are going to be able to talk to this board. 187 */ 188 if ((command & PCIM_CMD_MEMEN) == 0) { 189 device_printf(dev, "memory window not available\n"); 190 goto out; 191 } 192 sc->amr_type |= AMR_TYPE_QUARTZ; 193 194 } else { 195 /* 196 * Make sure we are going to be able to talk to this board. 197 */ 198 if ((command & PCIM_CMD_PORTEN) == 0) { 199 device_printf(dev, "I/O window not available\n"); 200 goto out; 201 } 202 } 203 204 /* force the busmaster enable bit on */ 205 if (!(command & PCIM_CMD_BUSMASTEREN)) { 206 device_printf(dev, "busmaster bit not set, enabling\n"); 207 command |= PCIM_CMD_BUSMASTEREN; 208 pci_write_config(dev, PCIR_COMMAND, command, 2); 209 } 210 211 /* 212 * Allocate the PCI register window. 213 */ 214 rid = PCIR_MAPS; 215 rtype = AMR_IS_QUARTZ(sc) ? SYS_RES_MEMORY : SYS_RES_IOPORT; 216 sc->amr_reg = bus_alloc_resource(dev, rtype, &rid, 0, ~0, 1, RF_ACTIVE); 217 if (sc->amr_reg == NULL) { 218 device_printf(sc->amr_dev, "can't allocate register window\n"); 219 goto out; 220 } 221 sc->amr_btag = rman_get_bustag(sc->amr_reg); 222 sc->amr_bhandle = rman_get_bushandle(sc->amr_reg); 223 224 /* 225 * Allocate and connect our interrupt. 226 */ 227 rid = 0; 228 sc->amr_irq = bus_alloc_resource(sc->amr_dev, SYS_RES_IRQ, &rid, 0, ~0, 1, RF_SHAREABLE | RF_ACTIVE); 229 if (sc->amr_irq == NULL) { 230 device_printf(sc->amr_dev, "can't allocate interrupt\n"); 231 goto out; 232 } 233 error = bus_setup_intr(sc->amr_dev, sc->amr_irq, 234 INTR_ENTROPY, amr_pci_intr, sc, 235 &sc->amr_intr, NULL); 236 if (error) { 237 device_printf(sc->amr_dev, "can't set up interrupt\n"); 238 goto out; 239 } 240 241 debug(2, "interrupt attached"); 242 243 /* assume failure is 'out of memory' */ 244 error = ENOMEM; 245 246 /* 247 * Allocate the parent bus DMA tag appropriate for PCI. 248 */ 249 if (bus_dma_tag_create(NULL, /* parent */ 250 1, 0, /* alignment, boundary */ 251 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 252 BUS_SPACE_MAXADDR, /* highaddr */ 253 NULL, NULL, /* filter, filterarg */ 254 MAXBSIZE, AMR_NSEG, /* maxsize, nsegments */ 255 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 256 BUS_DMA_ALLOCNOW, /* flags */ 257 &sc->amr_parent_dmat)) { 258 device_printf(dev, "can't allocate parent DMA tag\n"); 259 goto out; 260 } 261 262 /* 263 * Create DMA tag for mapping buffers into controller-addressable space. 264 */ 265 if (bus_dma_tag_create(sc->amr_parent_dmat, /* parent */ 266 1, 0, /* alignment, boundary */ 267 BUS_SPACE_MAXADDR, /* lowaddr */ 268 BUS_SPACE_MAXADDR, /* highaddr */ 269 NULL, NULL, /* filter, filterarg */ 270 MAXBSIZE, AMR_NSEG, /* maxsize, nsegments */ 271 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 272 0, /* flags */ 273 &sc->amr_buffer_dmat)) { 274 device_printf(sc->amr_dev, "can't allocate buffer DMA tag\n"); 275 goto out; 276 } 277 278 debug(2, "dma tag done"); 279 280 /* 281 * Allocate and set up mailbox in a bus-visible fashion. 282 */ 283 if ((error = amr_setup_mbox(sc)) != 0) 284 goto out; 285 286 debug(2, "mailbox setup"); 287 288 /* 289 * Build the scatter/gather buffers. 290 */ 291 if (amr_sglist_map(sc)) 292 goto out; 293 294 debug(2, "s/g list mapped"); 295 296 /* 297 * Do bus-independant initialisation, bring controller online. 298 */ 299 error = amr_attach(sc); 300 301 out: 302 if (error) 303 amr_pci_free(sc); 304 return(error); 305 } 306 307 /******************************************************************************** 308 * Disconnect from the controller completely, in preparation for unload. 309 */ 310 static int 311 amr_pci_detach(device_t dev) 312 { 313 struct amr_softc *sc = device_get_softc(dev); 314 int error; 315 316 debug_called(1); 317 318 if (sc->amr_state & AMR_STATE_OPEN) 319 return(EBUSY); 320 321 if ((error = amr_pci_shutdown(dev))) 322 return(error); 323 324 amr_pci_free(sc); 325 326 return(0); 327 } 328 329 /******************************************************************************** 330 * Bring the controller down to a dormant state and detach all child devices. 331 * 332 * This function is called before detach, system shutdown, or before performing 333 * an operation which may add or delete system disks. (Call amr_startup to 334 * resume normal operation.) 335 * 336 * Note that we can assume that the bioq on the controller is empty, as we won't 337 * allow shutdown if any device is open. 338 */ 339 static int 340 amr_pci_shutdown(device_t dev) 341 { 342 struct amr_softc *sc = device_get_softc(dev); 343 int i,error; 344 345 debug_called(1); 346 347 /* mark ourselves as in-shutdown */ 348 sc->amr_state |= AMR_STATE_SHUTDOWN; 349 350 351 /* flush controller */ 352 device_printf(sc->amr_dev, "flushing cache..."); 353 printf("%s\n", amr_flush(sc) ? "failed" : "done"); 354 355 crit_enter(); 356 error = 0; 357 358 /* delete all our child devices */ 359 for(i = 0 ; i < AMR_MAXLD; i++) { 360 if( sc->amr_drive[i].al_disk != 0) { 361 if((error = device_delete_child(sc->amr_dev,sc->amr_drive[i].al_disk)) != 0) 362 goto shutdown_out; 363 sc->amr_drive[i].al_disk = 0; 364 } 365 } 366 367 /* XXX disable interrupts? */ 368 369 shutdown_out: 370 crit_exit(); 371 return(error); 372 } 373 374 /******************************************************************************** 375 * Bring the controller to a quiescent state, ready for system suspend. 376 */ 377 static int 378 amr_pci_suspend(device_t dev) 379 { 380 struct amr_softc *sc = device_get_softc(dev); 381 382 debug_called(1); 383 384 sc->amr_state |= AMR_STATE_SUSPEND; 385 386 /* flush controller */ 387 device_printf(sc->amr_dev, "flushing cache..."); 388 printf("%s\n", amr_flush(sc) ? "failed" : "done"); 389 390 /* XXX disable interrupts? */ 391 392 return(0); 393 } 394 395 /******************************************************************************** 396 * Bring the controller back to a state ready for operation. 397 */ 398 static int 399 amr_pci_resume(device_t dev) 400 { 401 struct amr_softc *sc = device_get_softc(dev); 402 403 debug_called(1); 404 405 sc->amr_state &= ~AMR_STATE_SUSPEND; 406 407 /* XXX enable interrupts? */ 408 409 return(0); 410 } 411 412 /******************************************************************************* 413 * Take an interrupt, or be poked by other code to look for interrupt-worthy 414 * status. 415 */ 416 static void 417 amr_pci_intr(void *arg) 418 { 419 struct amr_softc *sc = (struct amr_softc *)arg; 420 421 debug_called(2); 422 423 /* collect finished commands, queue anything waiting */ 424 amr_done(sc); 425 } 426 427 /******************************************************************************** 428 * Free all of the resources associated with (sc) 429 * 430 * Should not be called if the controller is active. 431 */ 432 static void 433 amr_pci_free(struct amr_softc *sc) 434 { 435 u_int8_t *p; 436 437 debug_called(1); 438 439 amr_free(sc); 440 441 /* destroy data-transfer DMA tag */ 442 if (sc->amr_buffer_dmat) 443 bus_dma_tag_destroy(sc->amr_buffer_dmat); 444 445 /* free and destroy DMA memory and tag for s/g lists */ 446 if (sc->amr_sgtable) 447 bus_dmamem_free(sc->amr_sg_dmat, sc->amr_sgtable, sc->amr_sg_dmamap); 448 if (sc->amr_sg_dmat) 449 bus_dma_tag_destroy(sc->amr_sg_dmat); 450 451 /* free and destroy DMA memory and tag for mailbox */ 452 if (sc->amr_mailbox) { 453 p = (u_int8_t *)(uintptr_t)(volatile void *)sc->amr_mailbox; 454 bus_dmamem_free(sc->amr_mailbox_dmat, p - 16, sc->amr_mailbox_dmamap); 455 } 456 if (sc->amr_mailbox_dmat) 457 bus_dma_tag_destroy(sc->amr_mailbox_dmat); 458 459 /* disconnect the interrupt handler */ 460 if (sc->amr_intr) 461 bus_teardown_intr(sc->amr_dev, sc->amr_irq, sc->amr_intr); 462 if (sc->amr_irq != NULL) 463 bus_release_resource(sc->amr_dev, SYS_RES_IRQ, 0, sc->amr_irq); 464 465 /* destroy the parent DMA tag */ 466 if (sc->amr_parent_dmat) 467 bus_dma_tag_destroy(sc->amr_parent_dmat); 468 469 /* release the register window mapping */ 470 if (sc->amr_reg != NULL) 471 bus_release_resource(sc->amr_dev, 472 AMR_IS_QUARTZ(sc) ? SYS_RES_MEMORY : SYS_RES_IOPORT, 473 PCIR_MAPS, sc->amr_reg); 474 } 475 476 /******************************************************************************** 477 * Allocate and map the scatter/gather table in bus space. 478 */ 479 static void 480 amr_sglist_map_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error) 481 { 482 struct amr_softc *sc = (struct amr_softc *)arg; 483 484 debug_called(1); 485 486 /* save base of s/g table's address in bus space */ 487 sc->amr_sgbusaddr = segs->ds_addr; 488 } 489 490 static int 491 amr_sglist_map(struct amr_softc *sc) 492 { 493 size_t segsize; 494 int error; 495 496 debug_called(1); 497 498 /* 499 * Create a single tag describing a region large enough to hold all of 500 * the s/g lists we will need. 501 * 502 * Note that we could probably use AMR_LIMITCMD here, but that may become tunable. 503 */ 504 segsize = sizeof(struct amr_sgentry) * AMR_NSEG * AMR_MAXCMD; 505 error = bus_dma_tag_create(sc->amr_parent_dmat, /* parent */ 506 1, 0, /* alignment, boundary */ 507 BUS_SPACE_MAXADDR, /* lowaddr */ 508 BUS_SPACE_MAXADDR, /* highaddr */ 509 NULL, NULL, /* filter, filterarg */ 510 segsize, 1, /* maxsize, nsegments */ 511 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 512 0, /* flags */ 513 &sc->amr_sg_dmat); 514 if (error != 0) { 515 device_printf(sc->amr_dev, "can't allocate scatter/gather DMA tag\n"); 516 return(ENOMEM); 517 } 518 519 /* 520 * Allocate enough s/g maps for all commands and permanently map them into 521 * controller-visible space. 522 * 523 * XXX this assumes we can get enough space for all the s/g maps in one 524 * contiguous slab. We may need to switch to a more complex arrangement where 525 * we allocate in smaller chunks and keep a lookup table from slot to bus address. 526 * 527 * XXX HACK ALERT: at least some controllers don't like the s/g memory being 528 * allocated below 0x2000. We leak some memory if we get some 529 * below this mark and allocate again. We should be able to 530 * avoid this with the tag setup, but that does't seem to work. 531 */ 532 retry: 533 error = bus_dmamem_alloc(sc->amr_sg_dmat, (void **)&sc->amr_sgtable, BUS_DMA_NOWAIT, &sc->amr_sg_dmamap); 534 if (error) { 535 device_printf(sc->amr_dev, "can't allocate s/g table\n"); 536 return(ENOMEM); 537 } 538 bus_dmamap_load(sc->amr_sg_dmat, sc->amr_sg_dmamap, sc->amr_sgtable, segsize, amr_sglist_map_helper, sc, 0); 539 if (sc->amr_sgbusaddr < 0x2000) { 540 debug(1, "s/g table too low (0x%x), reallocating\n", sc->amr_sgbusaddr); 541 goto retry; 542 } 543 return(0); 544 } 545 546 /******************************************************************************** 547 * Allocate and set up mailbox areas for the controller (sc) 548 * 549 * The basic mailbox structure should be 16-byte aligned. This means that the 550 * mailbox64 structure has 4 bytes hanging off the bottom. 551 */ 552 static void 553 amr_setup_mbox_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error) 554 { 555 struct amr_softc *sc = (struct amr_softc *)arg; 556 557 debug_called(1); 558 559 /* save phsyical base of the basic mailbox structure */ 560 sc->amr_mailboxphys = segs->ds_addr + 16; 561 } 562 563 static int 564 amr_setup_mbox(struct amr_softc *sc) 565 { 566 int error; 567 u_int8_t *p; 568 569 debug_called(1); 570 571 /* 572 * Create a single tag describing a region large enough to hold the entire 573 * mailbox. 574 */ 575 error = bus_dma_tag_create(sc->amr_parent_dmat, /* parent */ 576 16, 0, /* alignment, boundary */ 577 BUS_SPACE_MAXADDR, /* lowaddr */ 578 BUS_SPACE_MAXADDR, /* highaddr */ 579 NULL, NULL, /* filter, filterarg */ 580 sizeof(struct amr_mailbox) + 16, 1, /* maxsize, nsegments */ 581 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 582 0, /* flags */ 583 &sc->amr_mailbox_dmat); 584 if (error != 0) { 585 device_printf(sc->amr_dev, "can't allocate mailbox tag\n"); 586 return(ENOMEM); 587 } 588 589 /* 590 * Allocate the mailbox structure and permanently map it into 591 * controller-visible space. 592 */ 593 error = bus_dmamem_alloc(sc->amr_mailbox_dmat, (void **)&p, BUS_DMA_NOWAIT, 594 &sc->amr_mailbox_dmamap); 595 if (error) { 596 device_printf(sc->amr_dev, "can't allocate mailbox memory\n"); 597 return(ENOMEM); 598 } 599 bus_dmamap_load(sc->amr_mailbox_dmat, sc->amr_mailbox_dmamap, p, 600 sizeof(struct amr_mailbox64), amr_setup_mbox_helper, sc, 0); 601 /* 602 * Conventional mailbox is inside the mailbox64 region. 603 */ 604 bzero(p, sizeof(struct amr_mailbox64)); 605 sc->amr_mailbox64 = (struct amr_mailbox64 *)(p + 12); 606 sc->amr_mailbox = (struct amr_mailbox *)(p + 16); 607 608 return(0); 609 } 610