1 /* 2 * Copyright (c) 1997 by Simon Shapiro 3 * All Rights Reserved 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions, and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 /* 31 * dpt_scsi.c: SCSI dependant code for the DPT driver 32 * 33 * credits: Assisted by Mike Neuffer in the early low level DPT code 34 * Thanx to Mark Salyzyn of DPT for his assistance. 35 * Special thanx to Justin Gibbs for invaluable help in 36 * making this driver look and work like a FreeBSD component. 37 * Last but not least, many thanx to UCB and the FreeBSD 38 * team for creating and maintaining such a wonderful O/S. 39 * 40 * TODO: * Add ISA probe code. 41 * * Add driver-level RAID-0. This will allow interoperability with 42 * NiceTry, M$-Doze, Win-Dog, Slowlaris, etc., in recognizing RAID 43 * arrays that span controllers (Wow!). 44 */ 45 46 #ident "$FreeBSD: src/sys/dev/dpt/dpt_scsi.c,v 1.28.2.3 2003/01/31 02:47:10 grog Exp $" 47 #ident "$DragonFly: src/sys/dev/raid/dpt/dpt_scsi.c,v 1.8 2004/09/17 03:39:39 joerg Exp $" 48 49 #define _DPT_C_ 50 51 #include "opt_dpt.h" 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/eventhandler.h> 55 #include <sys/malloc.h> 56 #include <sys/kernel.h> 57 58 #include <sys/bus.h> 59 60 #include <machine/bus_memio.h> 61 #include <machine/bus_pio.h> 62 #include <machine/bus.h> 63 64 #include <machine/clock.h> 65 66 #include <bus/cam/cam.h> 67 #include <bus/cam/cam_ccb.h> 68 #include <bus/cam/cam_sim.h> 69 #include <bus/cam/cam_xpt_sim.h> 70 #include <bus/cam/cam_debug.h> 71 #include <bus/cam/scsi/scsi_all.h> 72 #include <bus/cam/scsi/scsi_message.h> 73 74 #include <vm/vm.h> 75 #include <vm/pmap.h> 76 77 #include "dpt.h" 78 79 /* dpt_isa.c, dpt_eisa.c, and dpt_pci.c need this in a central place */ 80 int dpt_controllers_present; 81 82 u_long dpt_unit; /* Next unit number to use */ 83 84 /* The linked list of softc structures */ 85 struct dpt_softc_list dpt_softcs = TAILQ_HEAD_INITIALIZER(dpt_softcs); 86 87 #define microtime_now dpt_time_now() 88 89 #define dpt_inl(dpt, port) \ 90 bus_space_read_4((dpt)->tag, (dpt)->bsh, port) 91 #define dpt_inb(dpt, port) \ 92 bus_space_read_1((dpt)->tag, (dpt)->bsh, port) 93 #define dpt_outl(dpt, port, value) \ 94 bus_space_write_4((dpt)->tag, (dpt)->bsh, port, value) 95 #define dpt_outb(dpt, port, value) \ 96 bus_space_write_1((dpt)->tag, (dpt)->bsh, port, value) 97 98 /* 99 * These will have to be setup by parameters passed at boot/load time. For 100 * perfromance reasons, we make them constants for the time being. 101 */ 102 #define dpt_min_segs DPT_MAX_SEGS 103 #define dpt_max_segs DPT_MAX_SEGS 104 105 /* Definitions for our use of the SIM private CCB area */ 106 #define ccb_dccb_ptr spriv_ptr0 107 #define ccb_dpt_ptr spriv_ptr1 108 109 /* ================= Private Inline Function declarations ===================*/ 110 static __inline int dpt_just_reset(dpt_softc_t * dpt); 111 static __inline int dpt_raid_busy(dpt_softc_t * dpt); 112 static __inline int dpt_pio_wait (u_int32_t, u_int, u_int, u_int); 113 static __inline int dpt_wait(dpt_softc_t *dpt, u_int bits, 114 u_int state); 115 static __inline struct dpt_ccb* dptgetccb(struct dpt_softc *dpt); 116 static __inline void dptfreeccb(struct dpt_softc *dpt, 117 struct dpt_ccb *dccb); 118 static __inline u_int32_t dptccbvtop(struct dpt_softc *dpt, 119 struct dpt_ccb *dccb); 120 121 static __inline int dpt_send_immediate(dpt_softc_t *dpt, 122 eata_ccb_t *cmd_block, 123 u_int32_t cmd_busaddr, 124 u_int retries, 125 u_int ifc, u_int code, 126 u_int code2); 127 128 /* ==================== Private Function declarations =======================*/ 129 static void dptmapmem(void *arg, bus_dma_segment_t *segs, 130 int nseg, int error); 131 132 static struct sg_map_node* 133 dptallocsgmap(struct dpt_softc *dpt); 134 135 static int dptallocccbs(dpt_softc_t *dpt); 136 137 static int dpt_get_conf(dpt_softc_t *dpt, dpt_ccb_t *dccb, 138 u_int32_t dccb_busaddr, u_int size, 139 u_int page, u_int target, int extent); 140 static void dpt_detect_cache(dpt_softc_t *dpt, dpt_ccb_t *dccb, 141 u_int32_t dccb_busaddr, 142 u_int8_t *buff); 143 144 static void dpt_poll(struct cam_sim *sim); 145 146 static void dptexecuteccb(void *arg, bus_dma_segment_t *dm_segs, 147 int nseg, int error); 148 149 static void dpt_action(struct cam_sim *sim, union ccb *ccb); 150 151 static int dpt_send_eata_command(dpt_softc_t *dpt, eata_ccb_t *cmd, 152 u_int32_t cmd_busaddr, 153 u_int command, u_int retries, 154 u_int ifc, u_int code, 155 u_int code2); 156 static void dptprocesserror(dpt_softc_t *dpt, dpt_ccb_t *dccb, 157 union ccb *ccb, u_int hba_stat, 158 u_int scsi_stat, u_int32_t resid); 159 160 static void dpttimeout(void *arg); 161 static void dptshutdown(void *arg, int howto); 162 163 /* ================= Private Inline Function definitions ====================*/ 164 static __inline int 165 dpt_just_reset(dpt_softc_t * dpt) 166 { 167 if ((dpt_inb(dpt, 2) == 'D') 168 && (dpt_inb(dpt, 3) == 'P') 169 && (dpt_inb(dpt, 4) == 'T') 170 && (dpt_inb(dpt, 5) == 'H')) 171 return (1); 172 else 173 return (0); 174 } 175 176 static __inline int 177 dpt_raid_busy(dpt_softc_t * dpt) 178 { 179 if ((dpt_inb(dpt, 0) == 'D') 180 && (dpt_inb(dpt, 1) == 'P') 181 && (dpt_inb(dpt, 2) == 'T')) 182 return (1); 183 else 184 return (0); 185 } 186 187 static __inline int 188 dpt_pio_wait (u_int32_t base, u_int reg, u_int bits, u_int state) 189 { 190 int i; 191 u_int c; 192 193 for (i = 0; i < 20000; i++) { /* wait 20ms for not busy */ 194 c = inb(base + reg) & bits; 195 if (!(c == state)) 196 return (0); 197 else 198 DELAY(50); 199 } 200 return (-1); 201 } 202 203 static __inline int 204 dpt_wait(dpt_softc_t *dpt, u_int bits, u_int state) 205 { 206 int i; 207 u_int c; 208 209 for (i = 0; i < 20000; i++) { /* wait 20ms for not busy */ 210 c = dpt_inb(dpt, HA_RSTATUS) & bits; 211 if (c == state) 212 return (0); 213 else 214 DELAY(50); 215 } 216 return (-1); 217 } 218 219 static __inline struct dpt_ccb* 220 dptgetccb(struct dpt_softc *dpt) 221 { 222 struct dpt_ccb* dccb; 223 int s; 224 225 s = splcam(); 226 if ((dccb = SLIST_FIRST(&dpt->free_dccb_list)) != NULL) { 227 SLIST_REMOVE_HEAD(&dpt->free_dccb_list, links); 228 dpt->free_dccbs--; 229 } else if (dpt->total_dccbs < dpt->max_dccbs) { 230 dptallocccbs(dpt); 231 dccb = SLIST_FIRST(&dpt->free_dccb_list); 232 if (dccb == NULL) 233 printf("dpt%d: Can't malloc DCCB\n", dpt->unit); 234 else { 235 SLIST_REMOVE_HEAD(&dpt->free_dccb_list, links); 236 dpt->free_dccbs--; 237 } 238 } 239 splx(s); 240 241 return (dccb); 242 } 243 244 static __inline void 245 dptfreeccb(struct dpt_softc *dpt, struct dpt_ccb *dccb) 246 { 247 int s; 248 249 s = splcam(); 250 if ((dccb->state & DCCB_ACTIVE) != 0) 251 LIST_REMOVE(&dccb->ccb->ccb_h, sim_links.le); 252 if ((dccb->state & DCCB_RELEASE_SIMQ) != 0) 253 dccb->ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 254 else if (dpt->resource_shortage != 0 255 && (dccb->ccb->ccb_h.status & CAM_RELEASE_SIMQ) == 0) { 256 dccb->ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 257 dpt->resource_shortage = FALSE; 258 } 259 dccb->state = DCCB_FREE; 260 SLIST_INSERT_HEAD(&dpt->free_dccb_list, dccb, links); 261 ++dpt->free_dccbs; 262 splx(s); 263 } 264 265 static __inline u_int32_t 266 dptccbvtop(struct dpt_softc *dpt, struct dpt_ccb *dccb) 267 { 268 return (dpt->dpt_ccb_busbase 269 + (u_int32_t)((caddr_t)dccb - (caddr_t)dpt->dpt_dccbs)); 270 } 271 272 static __inline struct dpt_ccb * 273 dptccbptov(struct dpt_softc *dpt, u_int32_t busaddr) 274 { 275 return (dpt->dpt_dccbs 276 + ((struct dpt_ccb *)busaddr 277 - (struct dpt_ccb *)dpt->dpt_ccb_busbase)); 278 } 279 280 /* 281 * Send a command for immediate execution by the DPT 282 * See above function for IMPORTANT notes. 283 */ 284 static __inline int 285 dpt_send_immediate(dpt_softc_t *dpt, eata_ccb_t *cmd_block, 286 u_int32_t cmd_busaddr, u_int retries, 287 u_int ifc, u_int code, u_int code2) 288 { 289 return (dpt_send_eata_command(dpt, cmd_block, cmd_busaddr, 290 EATA_CMD_IMMEDIATE, retries, ifc, 291 code, code2)); 292 } 293 294 295 /* ===================== Private Function definitions =======================*/ 296 static void 297 dptmapmem(void *arg, bus_dma_segment_t *segs, int nseg, int error) 298 { 299 bus_addr_t *busaddrp; 300 301 busaddrp = (bus_addr_t *)arg; 302 *busaddrp = segs->ds_addr; 303 } 304 305 static struct sg_map_node * 306 dptallocsgmap(struct dpt_softc *dpt) 307 { 308 struct sg_map_node *sg_map; 309 310 sg_map = malloc(sizeof(*sg_map), M_DEVBUF, M_INTWAIT); 311 312 /* Allocate S/G space for the next batch of CCBS */ 313 if (bus_dmamem_alloc(dpt->sg_dmat, (void **)&sg_map->sg_vaddr, 314 BUS_DMA_NOWAIT, &sg_map->sg_dmamap) != 0) { 315 free(sg_map, M_DEVBUF); 316 return (NULL); 317 } 318 319 (void)bus_dmamap_load(dpt->sg_dmat, sg_map->sg_dmamap, sg_map->sg_vaddr, 320 PAGE_SIZE, dptmapmem, &sg_map->sg_physaddr, 321 /*flags*/0); 322 323 SLIST_INSERT_HEAD(&dpt->sg_maps, sg_map, links); 324 325 return (sg_map); 326 } 327 328 /* 329 * Allocate another chunk of CCB's. Return count of entries added. 330 * Assumed to be called at splcam(). 331 */ 332 static int 333 dptallocccbs(dpt_softc_t *dpt) 334 { 335 struct dpt_ccb *next_ccb; 336 struct sg_map_node *sg_map; 337 bus_addr_t physaddr; 338 dpt_sg_t *segs; 339 int newcount; 340 int i; 341 342 next_ccb = &dpt->dpt_dccbs[dpt->total_dccbs]; 343 344 if (next_ccb == dpt->dpt_dccbs) { 345 /* 346 * First time through. Re-use the S/G 347 * space we allocated for initialization 348 * CCBS. 349 */ 350 sg_map = SLIST_FIRST(&dpt->sg_maps); 351 } else { 352 sg_map = dptallocsgmap(dpt); 353 } 354 355 if (sg_map == NULL) 356 return (0); 357 358 segs = sg_map->sg_vaddr; 359 physaddr = sg_map->sg_physaddr; 360 361 newcount = (PAGE_SIZE / (dpt->sgsize * sizeof(dpt_sg_t))); 362 for (i = 0; dpt->total_dccbs < dpt->max_dccbs && i < newcount; i++) { 363 int error; 364 365 error = bus_dmamap_create(dpt->buffer_dmat, /*flags*/0, 366 &next_ccb->dmamap); 367 if (error != 0) 368 break; 369 next_ccb->sg_list = segs; 370 next_ccb->sg_busaddr = htonl(physaddr); 371 next_ccb->eata_ccb.cp_dataDMA = htonl(physaddr); 372 next_ccb->eata_ccb.cp_statDMA = htonl(dpt->sp_physaddr); 373 next_ccb->eata_ccb.cp_reqDMA = 374 htonl(dptccbvtop(dpt, next_ccb) 375 + offsetof(struct dpt_ccb, sense_data)); 376 next_ccb->eata_ccb.cp_busaddr = dpt->dpt_ccb_busend; 377 next_ccb->state = DCCB_FREE; 378 next_ccb->tag = dpt->total_dccbs; 379 SLIST_INSERT_HEAD(&dpt->free_dccb_list, next_ccb, links); 380 segs += dpt->sgsize; 381 physaddr += (dpt->sgsize * sizeof(dpt_sg_t)); 382 dpt->dpt_ccb_busend += sizeof(*next_ccb); 383 next_ccb++; 384 dpt->total_dccbs++; 385 } 386 return (i); 387 } 388 389 dpt_conf_t * 390 dpt_pio_get_conf (u_int32_t base) 391 { 392 static dpt_conf_t * conf; 393 u_int16_t * p; 394 int i; 395 396 /* 397 * Allocate a dpt_conf_t 398 */ 399 if (conf == NULL) 400 conf = malloc(sizeof(dpt_conf_t), M_DEVBUF, M_INTWAIT); 401 402 /* 403 * If we have one, clean it up. 404 */ 405 bzero(conf, sizeof(dpt_conf_t)); 406 407 /* 408 * Reset the controller. 409 */ 410 outb((base + HA_WCOMMAND), EATA_CMD_RESET); 411 412 /* 413 * Wait for the controller to become ready. 414 * For some reason there can be -no- delays after calling reset 415 * before we wait on ready status. 416 */ 417 if (dpt_pio_wait(base, HA_RSTATUS, HA_SBUSY, 0)) { 418 printf("dpt: timeout waiting for controller to become ready\n"); 419 return (NULL); 420 } 421 422 if (dpt_pio_wait(base, HA_RAUXSTAT, HA_ABUSY, 0)) { 423 printf("dpt: timetout waiting for adapter ready.\n"); 424 return (NULL); 425 } 426 427 /* 428 * Send the PIO_READ_CONFIG command. 429 */ 430 outb((base + HA_WCOMMAND), EATA_CMD_PIO_READ_CONFIG); 431 432 /* 433 * Read the data into the struct. 434 */ 435 p = (u_int16_t *)conf; 436 for (i = 0; i < (sizeof(dpt_conf_t) / 2); i++) { 437 438 if (dpt_pio_wait(base, HA_RSTATUS, HA_SDRQ, 0)) { 439 printf("dpt: timeout in data read.\n"); 440 return (NULL); 441 } 442 443 (*p) = inw(base + HA_RDATA); 444 p++; 445 } 446 447 if (inb(base + HA_RSTATUS) & HA_SERROR) { 448 printf("dpt: error reading configuration data.\n"); 449 return (NULL); 450 } 451 452 #define BE_EATA_SIGNATURE 0x45415441 453 #define LE_EATA_SIGNATURE 0x41544145 454 455 /* 456 * Test to see if we have a valid card. 457 */ 458 if ((conf->signature == BE_EATA_SIGNATURE) || 459 (conf->signature == LE_EATA_SIGNATURE)) { 460 461 while (inb(base + HA_RSTATUS) & HA_SDRQ) { 462 inw(base + HA_RDATA); 463 } 464 465 return (conf); 466 } 467 return (NULL); 468 } 469 470 /* 471 * Read a configuration page into the supplied dpt_cont_t buffer. 472 */ 473 static int 474 dpt_get_conf(dpt_softc_t *dpt, dpt_ccb_t *dccb, u_int32_t dccb_busaddr, 475 u_int size, u_int page, u_int target, int extent) 476 { 477 eata_ccb_t *cp; 478 479 u_int8_t status; 480 481 int ndx; 482 int ospl; 483 int result; 484 485 cp = &dccb->eata_ccb; 486 bzero((void *)(uintptr_t)(volatile void *)dpt->sp, sizeof(*dpt->sp)); 487 488 cp->Interpret = 1; 489 cp->DataIn = 1; 490 cp->Auto_Req_Sen = 1; 491 cp->reqlen = sizeof(struct scsi_sense_data); 492 493 cp->cp_id = target; 494 cp->cp_LUN = 0; /* In the EATA packet */ 495 cp->cp_lun = 0; /* In the SCSI command */ 496 497 cp->cp_scsi_cmd = INQUIRY; 498 cp->cp_len = size; 499 500 cp->cp_extent = extent; 501 502 cp->cp_page = page; 503 cp->cp_channel = 0; /* DNC, Interpret mode is set */ 504 cp->cp_identify = 1; 505 cp->cp_datalen = htonl(size); 506 507 ospl = splcam(); 508 509 /* 510 * This could be a simple for loop, but we suspected the compiler To 511 * have optimized it a bit too much. Wait for the controller to 512 * become ready 513 */ 514 while (((status = dpt_inb(dpt, HA_RSTATUS)) != (HA_SREADY | HA_SSC) 515 && (status != (HA_SREADY | HA_SSC | HA_SERROR)) 516 && (status != (HA_SDRDY | HA_SERROR | HA_SDRQ))) 517 || (dpt_wait(dpt, HA_SBUSY, 0))) { 518 519 /* 520 * RAID Drives still Spinning up? (This should only occur if 521 * the DPT controller is in a NON PC (PCI?) platform). 522 */ 523 if (dpt_raid_busy(dpt)) { 524 printf("dpt%d WARNING: Get_conf() RSUS failed.\n", 525 dpt->unit); 526 splx(ospl); 527 return (0); 528 } 529 } 530 531 DptStat_Reset_BUSY(dpt->sp); 532 533 /* 534 * XXXX We might want to do something more clever than aborting at 535 * this point, like resetting (rebooting) the controller and trying 536 * again. 537 */ 538 if ((result = dpt_send_eata_command(dpt, cp, dccb_busaddr, 539 EATA_CMD_DMA_SEND_CP, 540 10000, 0, 0, 0)) != 0) { 541 printf("dpt%d WARNING: Get_conf() failed (%d) to send " 542 "EATA_CMD_DMA_READ_CONFIG\n", 543 dpt->unit, result); 544 splx(ospl); 545 return (0); 546 } 547 /* Wait for two seconds for a response. This can be slow */ 548 for (ndx = 0; 549 (ndx < 20000) 550 && !((status = dpt_inb(dpt, HA_RAUXSTAT)) & HA_AIRQ); 551 ndx++) { 552 DELAY(50); 553 } 554 555 /* Grab the status and clear interrupts */ 556 status = dpt_inb(dpt, HA_RSTATUS); 557 558 splx(ospl); 559 560 /* 561 * Check the status carefully. Return only if the 562 * command was successful. 563 */ 564 if (((status & HA_SERROR) == 0) 565 && (dpt->sp->hba_stat == 0) 566 && (dpt->sp->scsi_stat == 0) 567 && (dpt->sp->residue_len == 0)) 568 return (0); 569 570 if (dpt->sp->scsi_stat == SCSI_STATUS_CHECK_COND) 571 return (0); 572 573 return (1); 574 } 575 576 /* Detect Cache parameters and size */ 577 static void 578 dpt_detect_cache(dpt_softc_t *dpt, dpt_ccb_t *dccb, u_int32_t dccb_busaddr, 579 u_int8_t *buff) 580 { 581 eata_ccb_t *cp; 582 u_int8_t *param; 583 int bytes; 584 int result; 585 int ospl; 586 int ndx; 587 u_int8_t status; 588 589 /* 590 * Default setting, for best perfromance.. 591 * This is what virtually all cards default to.. 592 */ 593 dpt->cache_type = DPT_CACHE_WRITEBACK; 594 dpt->cache_size = 0; 595 596 cp = &dccb->eata_ccb; 597 bzero((void *)(uintptr_t)(volatile void *)dpt->sp, sizeof(dpt->sp)); 598 bzero(buff, 512); 599 600 /* Setup the command structure */ 601 cp->Interpret = 1; 602 cp->DataIn = 1; 603 cp->Auto_Req_Sen = 1; 604 cp->reqlen = sizeof(struct scsi_sense_data); 605 606 cp->cp_id = 0; /* who cares? The HBA will interpret.. */ 607 cp->cp_LUN = 0; /* In the EATA packet */ 608 cp->cp_lun = 0; /* In the SCSI command */ 609 cp->cp_channel = 0; 610 611 cp->cp_scsi_cmd = EATA_CMD_DMA_SEND_CP; 612 cp->cp_len = 56; 613 614 cp->cp_extent = 0; 615 cp->cp_page = 0; 616 cp->cp_identify = 1; 617 cp->cp_dispri = 1; 618 619 /* 620 * Build the EATA Command Packet structure 621 * for a Log Sense Command. 622 */ 623 cp->cp_cdb[0] = 0x4d; 624 cp->cp_cdb[1] = 0x0; 625 cp->cp_cdb[2] = 0x40 | 0x33; 626 cp->cp_cdb[7] = 1; 627 628 cp->cp_datalen = htonl(512); 629 630 ospl = splcam(); 631 result = dpt_send_eata_command(dpt, cp, dccb_busaddr, 632 EATA_CMD_DMA_SEND_CP, 633 10000, 0, 0, 0); 634 if (result != 0) { 635 printf("dpt%d WARNING: detect_cache() failed (%d) to send " 636 "EATA_CMD_DMA_SEND_CP\n", dpt->unit, result); 637 splx(ospl); 638 return; 639 } 640 /* Wait for two seconds for a response. This can be slow... */ 641 for (ndx = 0; 642 (ndx < 20000) && 643 !((status = dpt_inb(dpt, HA_RAUXSTAT)) & HA_AIRQ); 644 ndx++) { 645 DELAY(50); 646 } 647 648 /* Grab the status and clear interrupts */ 649 status = dpt_inb(dpt, HA_RSTATUS); 650 splx(ospl); 651 652 /* 653 * Sanity check 654 */ 655 if (buff[0] != 0x33) { 656 return; 657 } 658 bytes = DPT_HCP_LENGTH(buff); 659 param = DPT_HCP_FIRST(buff); 660 661 if (DPT_HCP_CODE(param) != 1) { 662 /* 663 * DPT Log Page layout error 664 */ 665 printf("dpt%d: NOTICE: Log Page (1) layout error\n", 666 dpt->unit); 667 return; 668 } 669 if (!(param[4] & 0x4)) { 670 dpt->cache_type = DPT_NO_CACHE; 671 return; 672 } 673 while (DPT_HCP_CODE(param) != 6) { 674 param = DPT_HCP_NEXT(param); 675 if ((param < buff) 676 || (param >= &buff[bytes])) { 677 return; 678 } 679 } 680 681 if (param[4] & 0x2) { 682 /* 683 * Cache disabled 684 */ 685 dpt->cache_type = DPT_NO_CACHE; 686 return; 687 } 688 689 if (param[4] & 0x4) { 690 dpt->cache_type = DPT_CACHE_WRITETHROUGH; 691 } 692 693 /* XXX This isn't correct. This log parameter only has two bytes.... */ 694 #if 0 695 dpt->cache_size = param[5] 696 | (param[6] << 8) 697 | (param[7] << 16) 698 | (param[8] << 24); 699 #endif 700 } 701 702 static void 703 dpt_poll(struct cam_sim *sim) 704 { 705 dpt_intr(cam_sim_softc(sim)); 706 } 707 708 static void 709 dptexecuteccb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error) 710 { 711 struct dpt_ccb *dccb; 712 union ccb *ccb; 713 struct dpt_softc *dpt; 714 int s; 715 716 dccb = (struct dpt_ccb *)arg; 717 ccb = dccb->ccb; 718 dpt = (struct dpt_softc *)ccb->ccb_h.ccb_dpt_ptr; 719 720 if (error != 0) { 721 if (error != EFBIG) 722 printf("dpt%d: Unexepected error 0x%x returned from " 723 "bus_dmamap_load\n", dpt->unit, error); 724 if (ccb->ccb_h.status == CAM_REQ_INPROG) { 725 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1); 726 ccb->ccb_h.status = CAM_REQ_TOO_BIG|CAM_DEV_QFRZN; 727 } 728 dptfreeccb(dpt, dccb); 729 xpt_done(ccb); 730 return; 731 } 732 733 if (nseg != 0) { 734 dpt_sg_t *sg; 735 bus_dma_segment_t *end_seg; 736 bus_dmasync_op_t op; 737 738 end_seg = dm_segs + nseg; 739 740 /* Copy the segments into our SG list */ 741 sg = dccb->sg_list; 742 while (dm_segs < end_seg) { 743 sg->seg_len = htonl(dm_segs->ds_len); 744 sg->seg_addr = htonl(dm_segs->ds_addr); 745 sg++; 746 dm_segs++; 747 } 748 749 if (nseg > 1) { 750 dccb->eata_ccb.scatter = 1; 751 dccb->eata_ccb.cp_dataDMA = dccb->sg_busaddr; 752 dccb->eata_ccb.cp_datalen = 753 htonl(nseg * sizeof(dpt_sg_t)); 754 } else { 755 dccb->eata_ccb.cp_dataDMA = dccb->sg_list[0].seg_addr; 756 dccb->eata_ccb.cp_datalen = dccb->sg_list[0].seg_len; 757 } 758 759 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 760 op = BUS_DMASYNC_PREREAD; 761 else 762 op = BUS_DMASYNC_PREWRITE; 763 764 bus_dmamap_sync(dpt->buffer_dmat, dccb->dmamap, op); 765 766 } else { 767 dccb->eata_ccb.cp_dataDMA = 0; 768 dccb->eata_ccb.cp_datalen = 0; 769 } 770 771 s = splcam(); 772 773 /* 774 * Last time we need to check if this CCB needs to 775 * be aborted. 776 */ 777 if (ccb->ccb_h.status != CAM_REQ_INPROG) { 778 if (nseg != 0) 779 bus_dmamap_unload(dpt->buffer_dmat, dccb->dmamap); 780 dptfreeccb(dpt, dccb); 781 xpt_done(ccb); 782 splx(s); 783 return; 784 } 785 786 dccb->state |= DCCB_ACTIVE; 787 ccb->ccb_h.status |= CAM_SIM_QUEUED; 788 LIST_INSERT_HEAD(&dpt->pending_ccb_list, &ccb->ccb_h, sim_links.le); 789 callout_reset(&ccb->ccb_h.timeout_ch, (ccb->ccb_h.timeout * hz) / 1000, 790 dpttimeout, dccb); 791 if (dpt_send_eata_command(dpt, &dccb->eata_ccb, 792 dccb->eata_ccb.cp_busaddr, 793 EATA_CMD_DMA_SEND_CP, 0, 0, 0, 0) != 0) { 794 ccb->ccb_h.status = CAM_NO_HBA; /* HBA dead or just busy?? */ 795 if (nseg != 0) 796 bus_dmamap_unload(dpt->buffer_dmat, dccb->dmamap); 797 dptfreeccb(dpt, dccb); 798 xpt_done(ccb); 799 } 800 801 splx(s); 802 } 803 804 static void 805 dpt_action(struct cam_sim *sim, union ccb *ccb) 806 { 807 struct dpt_softc *dpt; 808 809 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("dpt_action\n")); 810 811 dpt = (struct dpt_softc *)cam_sim_softc(sim); 812 813 if ((dpt->state & DPT_HA_SHUTDOWN_ACTIVE) != 0) { 814 xpt_print_path(ccb->ccb_h.path); 815 printf("controller is shutdown. Aborting CCB.\n"); 816 ccb->ccb_h.status = CAM_NO_HBA; 817 xpt_done(ccb); 818 return; 819 } 820 821 switch (ccb->ccb_h.func_code) { 822 /* Common cases first */ 823 case XPT_SCSI_IO: /* Execute the requested I/O operation */ 824 { 825 struct ccb_scsiio *csio; 826 struct ccb_hdr *ccbh; 827 struct dpt_ccb *dccb; 828 struct eata_ccb *eccb; 829 830 csio = &ccb->csio; 831 ccbh = &ccb->ccb_h; 832 /* Max CDB length is 12 bytes */ 833 if (csio->cdb_len > 12) { 834 ccb->ccb_h.status = CAM_REQ_INVALID; 835 xpt_done(ccb); 836 return; 837 } 838 if ((dccb = dptgetccb(dpt)) == NULL) { 839 int s; 840 841 s = splcam(); 842 dpt->resource_shortage = 1; 843 splx(s); 844 xpt_freeze_simq(sim, /*count*/1); 845 ccb->ccb_h.status = CAM_REQUEUE_REQ; 846 xpt_done(ccb); 847 return; 848 } 849 eccb = &dccb->eata_ccb; 850 851 /* Link dccb and ccb so we can find one from the other */ 852 dccb->ccb = ccb; 853 ccb->ccb_h.ccb_dccb_ptr = dccb; 854 ccb->ccb_h.ccb_dpt_ptr = dpt; 855 856 /* 857 * Explicitly set all flags so that the compiler can 858 * be smart about setting them. 859 */ 860 eccb->SCSI_Reset = 0; 861 eccb->HBA_Init = 0; 862 eccb->Auto_Req_Sen = (ccb->ccb_h.flags & CAM_DIS_AUTOSENSE) 863 ? 0 : 1; 864 eccb->scatter = 0; 865 eccb->Quick = 0; 866 eccb->Interpret = 867 ccb->ccb_h.target_id == dpt->hostid[cam_sim_bus(sim)] 868 ? 1 : 0; 869 eccb->DataOut = (ccb->ccb_h.flags & CAM_DIR_OUT) ? 1 : 0; 870 eccb->DataIn = (ccb->ccb_h.flags & CAM_DIR_IN) ? 1 : 0; 871 eccb->reqlen = csio->sense_len; 872 eccb->cp_id = ccb->ccb_h.target_id; 873 eccb->cp_channel = cam_sim_bus(sim); 874 eccb->cp_LUN = ccb->ccb_h.target_lun; 875 eccb->cp_luntar = 0; 876 eccb->cp_dispri = (ccb->ccb_h.flags & CAM_DIS_DISCONNECT) 877 ? 0 : 1; 878 eccb->cp_identify = 1; 879 880 if ((ccb->ccb_h.flags & CAM_TAG_ACTION_VALID) != 0 881 && csio->tag_action != CAM_TAG_ACTION_NONE) { 882 eccb->cp_msg[0] = csio->tag_action; 883 eccb->cp_msg[1] = dccb->tag; 884 } else { 885 eccb->cp_msg[0] = 0; 886 eccb->cp_msg[1] = 0; 887 } 888 eccb->cp_msg[2] = 0; 889 890 if ((ccb->ccb_h.flags & CAM_CDB_POINTER) != 0) { 891 if ((ccb->ccb_h.flags & CAM_CDB_PHYS) == 0) { 892 bcopy(csio->cdb_io.cdb_ptr, 893 eccb->cp_cdb, csio->cdb_len); 894 } else { 895 /* I guess I could map it in... */ 896 ccb->ccb_h.status = CAM_REQ_INVALID; 897 dptfreeccb(dpt, dccb); 898 xpt_done(ccb); 899 return; 900 } 901 } else { 902 bcopy(csio->cdb_io.cdb_bytes, 903 eccb->cp_cdb, csio->cdb_len); 904 } 905 /* 906 * If we have any data to send with this command, 907 * map it into bus space. 908 */ 909 /* Only use S/G if there is a transfer */ 910 if ((ccbh->flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 911 if ((ccbh->flags & CAM_SCATTER_VALID) == 0) { 912 /* 913 * We've been given a pointer 914 * to a single buffer. 915 */ 916 if ((ccbh->flags & CAM_DATA_PHYS) == 0) { 917 int s; 918 int error; 919 920 s = splsoftvm(); 921 error = 922 bus_dmamap_load(dpt->buffer_dmat, 923 dccb->dmamap, 924 csio->data_ptr, 925 csio->dxfer_len, 926 dptexecuteccb, 927 dccb, /*flags*/0); 928 if (error == EINPROGRESS) { 929 /* 930 * So as to maintain ordering, 931 * freeze the controller queue 932 * until our mapping is 933 * returned. 934 */ 935 xpt_freeze_simq(sim, 1); 936 dccb->state |= CAM_RELEASE_SIMQ; 937 } 938 splx(s); 939 } else { 940 struct bus_dma_segment seg; 941 942 /* Pointer to physical buffer */ 943 seg.ds_addr = 944 (bus_addr_t)csio->data_ptr; 945 seg.ds_len = csio->dxfer_len; 946 dptexecuteccb(dccb, &seg, 1, 0); 947 } 948 } else { 949 struct bus_dma_segment *segs; 950 951 if ((ccbh->flags & CAM_DATA_PHYS) != 0) 952 panic("dpt_action - Physical " 953 "segment pointers " 954 "unsupported"); 955 956 if ((ccbh->flags&CAM_SG_LIST_PHYS)==0) 957 panic("dpt_action - Virtual " 958 "segment addresses " 959 "unsupported"); 960 961 /* Just use the segments provided */ 962 segs = (struct bus_dma_segment *)csio->data_ptr; 963 dptexecuteccb(dccb, segs, csio->sglist_cnt, 0); 964 } 965 } else { 966 /* 967 * XXX JGibbs. 968 * Does it want them both on or both off? 969 * CAM_DIR_NONE is both on, so this code can 970 * be removed if this is also what the DPT 971 * exptects. 972 */ 973 eccb->DataOut = 0; 974 eccb->DataIn = 0; 975 dptexecuteccb(dccb, NULL, 0, 0); 976 } 977 break; 978 } 979 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 980 case XPT_ABORT: /* Abort the specified CCB */ 981 /* XXX Implement */ 982 ccb->ccb_h.status = CAM_REQ_INVALID; 983 xpt_done(ccb); 984 break; 985 case XPT_SET_TRAN_SETTINGS: 986 { 987 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; 988 xpt_done(ccb); 989 break; 990 } 991 case XPT_GET_TRAN_SETTINGS: 992 /* Get default/user set transfer settings for the target */ 993 { 994 struct ccb_trans_settings *cts; 995 u_int target_mask; 996 997 cts = &ccb->cts; 998 target_mask = 0x01 << ccb->ccb_h.target_id; 999 if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) { 1000 cts->flags = CCB_TRANS_DISC_ENB|CCB_TRANS_TAG_ENB; 1001 cts->bus_width = (dpt->max_id > 7) 1002 ? MSG_EXT_WDTR_BUS_8_BIT 1003 : MSG_EXT_WDTR_BUS_16_BIT; 1004 cts->sync_period = 25; /* 10MHz */ 1005 1006 if (cts->sync_period != 0) 1007 cts->sync_offset = 15; 1008 1009 cts->valid = CCB_TRANS_SYNC_RATE_VALID 1010 | CCB_TRANS_SYNC_OFFSET_VALID 1011 | CCB_TRANS_BUS_WIDTH_VALID 1012 | CCB_TRANS_DISC_VALID 1013 | CCB_TRANS_TQ_VALID; 1014 ccb->ccb_h.status = CAM_REQ_CMP; 1015 } else { 1016 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; 1017 } 1018 xpt_done(ccb); 1019 break; 1020 } 1021 case XPT_CALC_GEOMETRY: 1022 { 1023 struct ccb_calc_geometry *ccg; 1024 u_int32_t size_mb; 1025 u_int32_t secs_per_cylinder; 1026 int extended; 1027 1028 /* 1029 * XXX Use Adaptec translation until I find out how to 1030 * get this information from the card. 1031 */ 1032 ccg = &ccb->ccg; 1033 size_mb = ccg->volume_size 1034 / ((1024L * 1024L) / ccg->block_size); 1035 extended = 1; 1036 1037 if (size_mb > 1024 && extended) { 1038 ccg->heads = 255; 1039 ccg->secs_per_track = 63; 1040 } else { 1041 ccg->heads = 64; 1042 ccg->secs_per_track = 32; 1043 } 1044 secs_per_cylinder = ccg->heads * ccg->secs_per_track; 1045 ccg->cylinders = ccg->volume_size / secs_per_cylinder; 1046 ccb->ccb_h.status = CAM_REQ_CMP; 1047 xpt_done(ccb); 1048 break; 1049 } 1050 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 1051 { 1052 /* XXX Implement */ 1053 ccb->ccb_h.status = CAM_REQ_CMP; 1054 xpt_done(ccb); 1055 break; 1056 } 1057 case XPT_TERM_IO: /* Terminate the I/O process */ 1058 /* XXX Implement */ 1059 ccb->ccb_h.status = CAM_REQ_INVALID; 1060 xpt_done(ccb); 1061 break; 1062 case XPT_PATH_INQ: /* Path routing inquiry */ 1063 { 1064 struct ccb_pathinq *cpi = &ccb->cpi; 1065 1066 cpi->version_num = 1; 1067 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE; 1068 if (dpt->max_id > 7) 1069 cpi->hba_inquiry |= PI_WIDE_16; 1070 cpi->target_sprt = 0; 1071 cpi->hba_misc = 0; 1072 cpi->hba_eng_cnt = 0; 1073 cpi->max_target = dpt->max_id; 1074 cpi->max_lun = dpt->max_lun; 1075 cpi->initiator_id = dpt->hostid[cam_sim_bus(sim)]; 1076 cpi->bus_id = cam_sim_bus(sim); 1077 cpi->base_transfer_speed = 3300; 1078 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1079 strncpy(cpi->hba_vid, "DPT", HBA_IDLEN); 1080 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 1081 cpi->unit_number = cam_sim_unit(sim); 1082 cpi->ccb_h.status = CAM_REQ_CMP; 1083 xpt_done(ccb); 1084 break; 1085 } 1086 default: 1087 ccb->ccb_h.status = CAM_REQ_INVALID; 1088 xpt_done(ccb); 1089 break; 1090 } 1091 } 1092 1093 /* 1094 * This routine will try to send an EATA command to the DPT HBA. 1095 * It will, by default, try 20,000 times, waiting 50us between tries. 1096 * It returns 0 on success and 1 on failure. 1097 * It is assumed to be called at splcam(). 1098 */ 1099 static int 1100 dpt_send_eata_command(dpt_softc_t *dpt, eata_ccb_t *cmd_block, 1101 u_int32_t cmd_busaddr, u_int command, u_int retries, 1102 u_int ifc, u_int code, u_int code2) 1103 { 1104 u_int loop; 1105 1106 if (!retries) 1107 retries = 20000; 1108 1109 /* 1110 * I hate this polling nonsense. Wish there was a way to tell the DPT 1111 * to go get commands at its own pace, or to interrupt when ready. 1112 * In the mean time we will measure how many itterations it really 1113 * takes. 1114 */ 1115 for (loop = 0; loop < retries; loop++) { 1116 if ((dpt_inb(dpt, HA_RAUXSTAT) & HA_ABUSY) == 0) 1117 break; 1118 else 1119 DELAY(50); 1120 } 1121 1122 if (loop < retries) { 1123 #ifdef DPT_MEASURE_PERFORMANCE 1124 if (loop > dpt->performance.max_eata_tries) 1125 dpt->performance.max_eata_tries = loop; 1126 1127 if (loop < dpt->performance.min_eata_tries) 1128 dpt->performance.min_eata_tries = loop; 1129 #endif 1130 } else { 1131 #ifdef DPT_MEASURE_PERFORMANCE 1132 ++dpt->performance.command_too_busy; 1133 #endif 1134 return (1); 1135 } 1136 1137 /* The controller is alive, advance the wedge timer */ 1138 #ifdef DPT_RESET_HBA 1139 dpt->last_contact = microtime_now; 1140 #endif 1141 1142 if (cmd_block == NULL) 1143 cmd_busaddr = 0; 1144 #if (BYTE_ORDER == BIG_ENDIAN) 1145 else { 1146 cmd_busaddr = ((cmd_busaddr >> 24) & 0xFF) 1147 | ((cmd_busaddr >> 16) & 0xFF) 1148 | ((cmd_busaddr >> 8) & 0xFF) 1149 | (cmd_busaddr & 0xFF); 1150 } 1151 #endif 1152 /* And now the address */ 1153 dpt_outl(dpt, HA_WDMAADDR, cmd_busaddr); 1154 1155 if (command == EATA_CMD_IMMEDIATE) { 1156 if (cmd_block == NULL) { 1157 dpt_outb(dpt, HA_WCODE2, code2); 1158 dpt_outb(dpt, HA_WCODE, code); 1159 } 1160 dpt_outb(dpt, HA_WIFC, ifc); 1161 } 1162 dpt_outb(dpt, HA_WCOMMAND, command); 1163 1164 return (0); 1165 } 1166 1167 1168 /* ==================== Exported Function definitions =======================*/ 1169 dpt_softc_t * 1170 dpt_alloc(device_t dev, bus_space_tag_t tag, bus_space_handle_t bsh) 1171 { 1172 dpt_softc_t *dpt = device_get_softc(dev); 1173 int i; 1174 1175 bzero(dpt, sizeof(dpt_softc_t)); 1176 dpt->tag = tag; 1177 dpt->bsh = bsh; 1178 dpt->unit = device_get_unit(dev); 1179 SLIST_INIT(&dpt->free_dccb_list); 1180 LIST_INIT(&dpt->pending_ccb_list); 1181 TAILQ_INSERT_TAIL(&dpt_softcs, dpt, links); 1182 for (i = 0; i < MAX_CHANNELS; i++) 1183 dpt->resetlevel[i] = DPT_HA_OK; 1184 1185 #ifdef DPT_MEASURE_PERFORMANCE 1186 dpt_reset_performance(dpt); 1187 #endif /* DPT_MEASURE_PERFORMANCE */ 1188 return (dpt); 1189 } 1190 1191 void 1192 dpt_free(struct dpt_softc *dpt) 1193 { 1194 switch (dpt->init_level) { 1195 default: 1196 case 5: 1197 bus_dmamap_unload(dpt->dccb_dmat, dpt->dccb_dmamap); 1198 case 4: 1199 bus_dmamem_free(dpt->dccb_dmat, dpt->dpt_dccbs, 1200 dpt->dccb_dmamap); 1201 bus_dmamap_destroy(dpt->dccb_dmat, dpt->dccb_dmamap); 1202 case 3: 1203 bus_dma_tag_destroy(dpt->dccb_dmat); 1204 case 2: 1205 bus_dma_tag_destroy(dpt->buffer_dmat); 1206 case 1: 1207 { 1208 struct sg_map_node *sg_map; 1209 1210 while ((sg_map = SLIST_FIRST(&dpt->sg_maps)) != NULL) { 1211 SLIST_REMOVE_HEAD(&dpt->sg_maps, links); 1212 bus_dmamap_unload(dpt->sg_dmat, 1213 sg_map->sg_dmamap); 1214 bus_dmamem_free(dpt->sg_dmat, sg_map->sg_vaddr, 1215 sg_map->sg_dmamap); 1216 free(sg_map, M_DEVBUF); 1217 } 1218 bus_dma_tag_destroy(dpt->sg_dmat); 1219 } 1220 case 0: 1221 break; 1222 } 1223 TAILQ_REMOVE(&dpt_softcs, dpt, links); 1224 } 1225 1226 static u_int8_t string_sizes[] = 1227 { 1228 sizeof(((dpt_inq_t*)NULL)->vendor), 1229 sizeof(((dpt_inq_t*)NULL)->modelNum), 1230 sizeof(((dpt_inq_t*)NULL)->firmware), 1231 sizeof(((dpt_inq_t*)NULL)->protocol), 1232 }; 1233 1234 int 1235 dpt_init(struct dpt_softc *dpt) 1236 { 1237 dpt_conf_t conf; 1238 struct sg_map_node *sg_map; 1239 dpt_ccb_t *dccb; 1240 u_int8_t *strp; 1241 int index; 1242 int i; 1243 int retval; 1244 1245 dpt->init_level = 0; 1246 SLIST_INIT(&dpt->sg_maps); 1247 1248 #ifdef DPT_RESET_BOARD 1249 printf("dpt%d: resetting HBA\n", dpt->unit); 1250 dpt_outb(dpt, HA_WCOMMAND, EATA_CMD_RESET); 1251 DELAY(750000); 1252 /* XXX Shouldn't we poll a status register or something??? */ 1253 #endif 1254 /* DMA tag for our S/G structures. We allocate in page sized chunks */ 1255 if (bus_dma_tag_create(dpt->parent_dmat, /*alignment*/1, /*boundary*/0, 1256 /*lowaddr*/BUS_SPACE_MAXADDR, 1257 /*highaddr*/BUS_SPACE_MAXADDR, 1258 /*filter*/NULL, /*filterarg*/NULL, 1259 PAGE_SIZE, /*nsegments*/1, 1260 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 1261 /*flags*/0, &dpt->sg_dmat) != 0) { 1262 goto error_exit; 1263 } 1264 1265 dpt->init_level++; 1266 1267 /* 1268 * We allocate our DPT ccbs as a contiguous array of bus dma'able 1269 * memory. To get the allocation size, we need to know how many 1270 * ccbs the card supports. This requires a ccb. We solve this 1271 * chicken and egg problem by allocating some re-usable S/G space 1272 * up front, and treating it as our status packet, CCB, and target 1273 * memory space for these commands. 1274 */ 1275 sg_map = dptallocsgmap(dpt); 1276 if (sg_map == NULL) 1277 goto error_exit; 1278 1279 dpt->sp = (volatile dpt_sp_t *)sg_map->sg_vaddr; 1280 dccb = (struct dpt_ccb *)(uintptr_t)(volatile void *)&dpt->sp[1]; 1281 bzero(dccb, sizeof(*dccb)); 1282 dpt->sp_physaddr = sg_map->sg_physaddr; 1283 dccb->eata_ccb.cp_dataDMA = 1284 htonl(sg_map->sg_physaddr + sizeof(dpt_sp_t) + sizeof(*dccb)); 1285 dccb->eata_ccb.cp_busaddr = ~0; 1286 dccb->eata_ccb.cp_statDMA = htonl(dpt->sp_physaddr); 1287 dccb->eata_ccb.cp_reqDMA = htonl(dpt->sp_physaddr + sizeof(*dccb) 1288 + offsetof(struct dpt_ccb, sense_data)); 1289 1290 /* Okay. Fetch our config */ 1291 bzero(&dccb[1], sizeof(conf)); /* data area */ 1292 retval = dpt_get_conf(dpt, dccb, sg_map->sg_physaddr + sizeof(dpt_sp_t), 1293 sizeof(conf), 0xc1, 7, 1); 1294 1295 if (retval != 0) { 1296 printf("dpt%d: Failed to get board configuration\n", dpt->unit); 1297 return (retval); 1298 } 1299 bcopy(&dccb[1], &conf, sizeof(conf)); 1300 1301 bzero(&dccb[1], sizeof(dpt->board_data)); 1302 retval = dpt_get_conf(dpt, dccb, sg_map->sg_physaddr + sizeof(dpt_sp_t), 1303 sizeof(dpt->board_data), 0, conf.scsi_id0, 0); 1304 if (retval != 0) { 1305 printf("dpt%d: Failed to get inquiry information\n", dpt->unit); 1306 return (retval); 1307 } 1308 bcopy(&dccb[1], &dpt->board_data, sizeof(dpt->board_data)); 1309 1310 dpt_detect_cache(dpt, dccb, sg_map->sg_physaddr + sizeof(dpt_sp_t), 1311 (u_int8_t *)&dccb[1]); 1312 1313 switch (ntohl(conf.splen)) { 1314 case DPT_EATA_REVA: 1315 dpt->EATA_revision = 'a'; 1316 break; 1317 case DPT_EATA_REVB: 1318 dpt->EATA_revision = 'b'; 1319 break; 1320 case DPT_EATA_REVC: 1321 dpt->EATA_revision = 'c'; 1322 break; 1323 case DPT_EATA_REVZ: 1324 dpt->EATA_revision = 'z'; 1325 break; 1326 default: 1327 dpt->EATA_revision = '?'; 1328 } 1329 1330 dpt->max_id = conf.MAX_ID; 1331 dpt->max_lun = conf.MAX_LUN; 1332 dpt->irq = conf.IRQ; 1333 dpt->dma_channel = (8 - conf.DMA_channel) & 7; 1334 dpt->channels = conf.MAX_CHAN + 1; 1335 dpt->state |= DPT_HA_OK; 1336 if (conf.SECOND) 1337 dpt->primary = FALSE; 1338 else 1339 dpt->primary = TRUE; 1340 1341 dpt->more_support = conf.MORE_support; 1342 1343 if (strncmp(dpt->board_data.firmware, "07G0", 4) >= 0) 1344 dpt->immediate_support = 1; 1345 else 1346 dpt->immediate_support = 0; 1347 1348 dpt->broken_INQUIRY = FALSE; 1349 1350 dpt->cplen = ntohl(conf.cplen); 1351 dpt->cppadlen = ntohs(conf.cppadlen); 1352 dpt->max_dccbs = ntohs(conf.queuesiz); 1353 1354 if (dpt->max_dccbs > 256) { 1355 printf("dpt%d: Max CCBs reduced from %d to " 1356 "256 due to tag algorithm\n", dpt->unit, dpt->max_dccbs); 1357 dpt->max_dccbs = 256; 1358 } 1359 1360 dpt->hostid[0] = conf.scsi_id0; 1361 dpt->hostid[1] = conf.scsi_id1; 1362 dpt->hostid[2] = conf.scsi_id2; 1363 1364 if (conf.SG_64K) 1365 dpt->sgsize = 8192; 1366 else 1367 dpt->sgsize = ntohs(conf.SGsiz); 1368 1369 /* We can only get 64k buffers, so don't bother to waste space. */ 1370 if (dpt->sgsize < 17 || dpt->sgsize > 32) 1371 dpt->sgsize = 32; 1372 1373 if (dpt->sgsize > dpt_max_segs) 1374 dpt->sgsize = dpt_max_segs; 1375 1376 /* DMA tag for mapping buffers into device visible space. */ 1377 if (bus_dma_tag_create(dpt->parent_dmat, /*alignment*/1, /*boundary*/0, 1378 /*lowaddr*/BUS_SPACE_MAXADDR, 1379 /*highaddr*/BUS_SPACE_MAXADDR, 1380 /*filter*/NULL, /*filterarg*/NULL, 1381 /*maxsize*/MAXBSIZE, /*nsegments*/dpt->sgsize, 1382 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 1383 /*flags*/BUS_DMA_ALLOCNOW, 1384 &dpt->buffer_dmat) != 0) { 1385 printf("dpt: bus_dma_tag_create(...,dpt->buffer_dmat) failed\n"); 1386 goto error_exit; 1387 } 1388 1389 dpt->init_level++; 1390 1391 /* DMA tag for our ccb structures and interrupt status packet */ 1392 if (bus_dma_tag_create(dpt->parent_dmat, /*alignment*/1, /*boundary*/0, 1393 /*lowaddr*/BUS_SPACE_MAXADDR, 1394 /*highaddr*/BUS_SPACE_MAXADDR, 1395 /*filter*/NULL, /*filterarg*/NULL, 1396 (dpt->max_dccbs * sizeof(struct dpt_ccb)) 1397 + sizeof(dpt_sp_t), 1398 /*nsegments*/1, 1399 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 1400 /*flags*/0, &dpt->dccb_dmat) != 0) { 1401 printf("dpt: bus_dma_tag_create(...,dpt->dccb_dmat) failed\n"); 1402 goto error_exit; 1403 } 1404 1405 dpt->init_level++; 1406 1407 /* Allocation for our ccbs and interrupt status packet */ 1408 if (bus_dmamem_alloc(dpt->dccb_dmat, (void **)&dpt->dpt_dccbs, 1409 BUS_DMA_NOWAIT, &dpt->dccb_dmamap) != 0) { 1410 printf("dpt: bus_dmamem_alloc(dpt->dccb_dmat,...) failed\n"); 1411 goto error_exit; 1412 } 1413 1414 dpt->init_level++; 1415 1416 /* And permanently map them */ 1417 bus_dmamap_load(dpt->dccb_dmat, dpt->dccb_dmamap, 1418 dpt->dpt_dccbs, 1419 (dpt->max_dccbs * sizeof(struct dpt_ccb)) 1420 + sizeof(dpt_sp_t), 1421 dptmapmem, &dpt->dpt_ccb_busbase, /*flags*/0); 1422 1423 /* Clear them out. */ 1424 bzero(dpt->dpt_dccbs, 1425 (dpt->max_dccbs * sizeof(struct dpt_ccb)) + sizeof(dpt_sp_t)); 1426 1427 dpt->dpt_ccb_busend = dpt->dpt_ccb_busbase; 1428 1429 dpt->sp = (dpt_sp_t*)&dpt->dpt_dccbs[dpt->max_dccbs]; 1430 dpt->sp_physaddr = dpt->dpt_ccb_busbase 1431 + (dpt->max_dccbs * sizeof(dpt_ccb_t)); 1432 dpt->init_level++; 1433 1434 /* Allocate our first batch of ccbs */ 1435 if (dptallocccbs(dpt) == 0) { 1436 printf("dpt: dptallocccbs(dpt) == 0\n"); 1437 return (2); 1438 } 1439 1440 /* Prepare for Target Mode */ 1441 dpt->target_mode_enabled = 1; 1442 1443 /* Nuke excess spaces from inquiry information */ 1444 strp = dpt->board_data.vendor; 1445 for (i = 0; i < sizeof(string_sizes); i++) { 1446 index = string_sizes[i] - 1; 1447 while (index && (strp[index] == ' ')) 1448 strp[index--] = '\0'; 1449 strp += string_sizes[i]; 1450 } 1451 1452 printf("dpt%d: %.8s %.16s FW Rev. %.4s, ", 1453 dpt->unit, dpt->board_data.vendor, 1454 dpt->board_data.modelNum, dpt->board_data.firmware); 1455 1456 printf("%d channel%s, ", dpt->channels, dpt->channels > 1 ? "s" : ""); 1457 1458 if (dpt->cache_type != DPT_NO_CACHE 1459 && dpt->cache_size != 0) { 1460 printf("%s Cache, ", 1461 dpt->cache_type == DPT_CACHE_WRITETHROUGH 1462 ? "Write-Through" : "Write-Back"); 1463 } 1464 1465 printf("%d CCBs\n", dpt->max_dccbs); 1466 return (0); 1467 1468 error_exit: 1469 return (1); 1470 } 1471 1472 int 1473 dpt_attach(dpt_softc_t *dpt) 1474 { 1475 struct cam_devq *devq; 1476 int i; 1477 1478 /* 1479 * Create the device queue for our SIM. 1480 */ 1481 devq = cam_simq_alloc(dpt->max_dccbs); 1482 if (devq == NULL) 1483 return (0); 1484 1485 for (i = 0; i < dpt->channels; i++) { 1486 /* 1487 * Construct our SIM entry 1488 */ 1489 dpt->sims[i] = cam_sim_alloc(dpt_action, dpt_poll, "dpt", 1490 dpt, dpt->unit, /*untagged*/2, 1491 /*tagged*/dpt->max_dccbs, devq); 1492 if (xpt_bus_register(dpt->sims[i], i) != CAM_SUCCESS) { 1493 cam_sim_free(dpt->sims[i]); 1494 break; 1495 } 1496 1497 if (xpt_create_path(&dpt->paths[i], /*periph*/NULL, 1498 cam_sim_path(dpt->sims[i]), 1499 CAM_TARGET_WILDCARD, 1500 CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 1501 xpt_bus_deregister(cam_sim_path(dpt->sims[i])); 1502 cam_sim_free(dpt->sims[i]); 1503 break; 1504 } 1505 1506 } 1507 cam_simq_release(devq); 1508 if (i > 0) 1509 EVENTHANDLER_REGISTER(shutdown_final, dptshutdown, 1510 dpt, SHUTDOWN_PRI_DEFAULT); 1511 return (i); 1512 } 1513 1514 1515 /* 1516 * This is the interrupt handler for the DPT driver. 1517 */ 1518 void 1519 dpt_intr(void *arg) 1520 { 1521 dpt_softc_t *dpt; 1522 dpt_ccb_t *dccb; 1523 union ccb *ccb; 1524 u_int status; 1525 u_int aux_status; 1526 u_int hba_stat; 1527 u_int scsi_stat; 1528 u_int32_t residue_len; /* Number of bytes not transferred */ 1529 1530 dpt = (dpt_softc_t *)arg; 1531 1532 /* First order of business is to check if this interrupt is for us */ 1533 while (((aux_status = dpt_inb(dpt, HA_RAUXSTAT)) & HA_AIRQ) != 0) { 1534 1535 /* 1536 * What we want to do now, is to capture the status, all of it, 1537 * move it where it belongs, wake up whoever sleeps waiting to 1538 * process this result, and get out of here. 1539 */ 1540 if (dpt->sp->ccb_busaddr < dpt->dpt_ccb_busbase 1541 || dpt->sp->ccb_busaddr >= dpt->dpt_ccb_busend) { 1542 printf("Encountered bogus status packet\n"); 1543 status = dpt_inb(dpt, HA_RSTATUS); 1544 return; 1545 } 1546 1547 dccb = dptccbptov(dpt, dpt->sp->ccb_busaddr); 1548 1549 dpt->sp->ccb_busaddr = ~0; 1550 1551 /* Ignore status packets with EOC not set */ 1552 if (dpt->sp->EOC == 0) { 1553 printf("dpt%d ERROR: Request %d received with " 1554 "clear EOC.\n Marking as LOST.\n", 1555 dpt->unit, dccb->transaction_id); 1556 1557 #ifdef DPT_HANDLE_TIMEOUTS 1558 dccb->state |= DPT_CCB_STATE_MARKED_LOST; 1559 #endif 1560 /* This CLEARS the interrupt! */ 1561 status = dpt_inb(dpt, HA_RSTATUS); 1562 continue; 1563 } 1564 dpt->sp->EOC = 0; 1565 1566 /* 1567 * Double buffer the status information so the hardware can 1568 * work on updating the status packet while we decifer the 1569 * one we were just interrupted for. 1570 * According to Mark Salyzyn, we only need few pieces of it. 1571 */ 1572 hba_stat = dpt->sp->hba_stat; 1573 scsi_stat = dpt->sp->scsi_stat; 1574 residue_len = dpt->sp->residue_len; 1575 1576 /* Clear interrupts, check for error */ 1577 if ((status = dpt_inb(dpt, HA_RSTATUS)) & HA_SERROR) { 1578 /* 1579 * Error Condition. Check for magic cookie. Exit 1580 * this test on earliest sign of non-reset condition 1581 */ 1582 1583 /* Check that this is not a board reset interrupt */ 1584 if (dpt_just_reset(dpt)) { 1585 printf("dpt%d: HBA rebooted.\n" 1586 " All transactions should be " 1587 "resubmitted\n", 1588 dpt->unit); 1589 1590 printf("dpt%d: >>---->> This is incomplete, " 1591 "fix me.... <<----<<", dpt->unit); 1592 panic("DPT Rebooted"); 1593 1594 } 1595 } 1596 /* Process CCB */ 1597 ccb = dccb->ccb; 1598 callout_stop(&ccb->ccb_h.timeout_ch); 1599 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1600 bus_dmasync_op_t op; 1601 1602 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 1603 op = BUS_DMASYNC_POSTREAD; 1604 else 1605 op = BUS_DMASYNC_POSTWRITE; 1606 bus_dmamap_sync(dpt->buffer_dmat, dccb->dmamap, op); 1607 bus_dmamap_unload(dpt->buffer_dmat, dccb->dmamap); 1608 } 1609 1610 /* Common Case inline... */ 1611 if (hba_stat == HA_NO_ERROR) { 1612 ccb->csio.scsi_status = scsi_stat; 1613 ccb->ccb_h.status = 0; 1614 switch (scsi_stat) { 1615 case SCSI_STATUS_OK: 1616 ccb->ccb_h.status |= CAM_REQ_CMP; 1617 break; 1618 case SCSI_STATUS_CHECK_COND: 1619 case SCSI_STATUS_CMD_TERMINATED: 1620 bcopy(&dccb->sense_data, &ccb->csio.sense_data, 1621 ccb->csio.sense_len); 1622 ccb->ccb_h.status |= CAM_AUTOSNS_VALID; 1623 /* FALLTHROUGH */ 1624 default: 1625 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 1626 /* XXX Freeze DevQ */ 1627 break; 1628 } 1629 ccb->csio.resid = residue_len; 1630 dptfreeccb(dpt, dccb); 1631 xpt_done(ccb); 1632 } else { 1633 dptprocesserror(dpt, dccb, ccb, hba_stat, scsi_stat, 1634 residue_len); 1635 } 1636 } 1637 } 1638 1639 static void 1640 dptprocesserror(dpt_softc_t *dpt, dpt_ccb_t *dccb, union ccb *ccb, 1641 u_int hba_stat, u_int scsi_stat, u_int32_t resid) 1642 { 1643 ccb->csio.resid = resid; 1644 switch (hba_stat) { 1645 case HA_ERR_SEL_TO: 1646 ccb->ccb_h.status = CAM_SEL_TIMEOUT; 1647 break; 1648 case HA_ERR_CMD_TO: 1649 ccb->ccb_h.status = CAM_CMD_TIMEOUT; 1650 break; 1651 case HA_SCSIBUS_RESET: 1652 case HA_HBA_POWER_UP: /* Similar effect to a bus reset??? */ 1653 ccb->ccb_h.status = CAM_SCSI_BUS_RESET; 1654 break; 1655 case HA_CP_ABORTED: 1656 case HA_CP_RESET: /* XXX ??? */ 1657 case HA_CP_ABORT_NA: /* XXX ??? */ 1658 case HA_CP_RESET_NA: /* XXX ??? */ 1659 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG) 1660 ccb->ccb_h.status = CAM_REQ_ABORTED; 1661 break; 1662 case HA_PCI_PARITY: 1663 case HA_PCI_MABORT: 1664 case HA_PCI_TABORT: 1665 case HA_PCI_STABORT: 1666 case HA_BUS_PARITY: 1667 case HA_PARITY_ERR: 1668 case HA_ECC_ERR: 1669 ccb->ccb_h.status = CAM_UNCOR_PARITY; 1670 break; 1671 case HA_UNX_MSGRJCT: 1672 ccb->ccb_h.status = CAM_MSG_REJECT_REC; 1673 break; 1674 case HA_UNX_BUSPHASE: 1675 ccb->ccb_h.status = CAM_SEQUENCE_FAIL; 1676 break; 1677 case HA_UNX_BUS_FREE: 1678 ccb->ccb_h.status = CAM_UNEXP_BUSFREE; 1679 break; 1680 case HA_SCSI_HUNG: 1681 case HA_RESET_STUCK: 1682 /* 1683 * Dead??? Can the controller get unstuck 1684 * from these conditions 1685 */ 1686 ccb->ccb_h.status = CAM_NO_HBA; 1687 break; 1688 case HA_RSENSE_FAIL: 1689 ccb->ccb_h.status = CAM_AUTOSENSE_FAIL; 1690 break; 1691 default: 1692 printf("dpt%d: Undocumented Error %x\n", dpt->unit, hba_stat); 1693 printf("Please mail this message to shimon@simon-shapiro.org\n"); 1694 ccb->ccb_h.status = CAM_REQ_CMP_ERR; 1695 break; 1696 } 1697 dptfreeccb(dpt, dccb); 1698 xpt_done(ccb); 1699 } 1700 1701 static void 1702 dpttimeout(void *arg) 1703 { 1704 struct dpt_ccb *dccb; 1705 union ccb *ccb; 1706 struct dpt_softc *dpt; 1707 int s; 1708 1709 dccb = (struct dpt_ccb *)arg; 1710 ccb = dccb->ccb; 1711 dpt = (struct dpt_softc *)ccb->ccb_h.ccb_dpt_ptr; 1712 xpt_print_path(ccb->ccb_h.path); 1713 printf("CCB %p - timed out\n", (void *)dccb); 1714 1715 s = splcam(); 1716 1717 /* 1718 * Try to clear any pending jobs. FreeBSD will loose interrupts, 1719 * leaving the controller suspended, and commands timed-out. 1720 * By calling the interrupt handler, any command thus stuck will be 1721 * completed. 1722 */ 1723 dpt_intr(dpt); 1724 1725 if ((dccb->state & DCCB_ACTIVE) == 0) { 1726 xpt_print_path(ccb->ccb_h.path); 1727 printf("CCB %p - timed out CCB already completed\n", 1728 (void *)dccb); 1729 splx(s); 1730 return; 1731 } 1732 1733 /* Abort this particular command. Leave all others running */ 1734 dpt_send_immediate(dpt, &dccb->eata_ccb, dccb->eata_ccb.cp_busaddr, 1735 /*retries*/20000, EATA_SPECIFIC_ABORT, 0, 0); 1736 ccb->ccb_h.status = CAM_CMD_TIMEOUT; 1737 splx(s); 1738 } 1739 1740 /* 1741 * Shutdown the controller and ensure that the cache is completely flushed. 1742 * Called from the shutdown_final event after all disk access has completed. 1743 */ 1744 static void 1745 dptshutdown(void *arg, int howto) 1746 { 1747 dpt_softc_t *dpt; 1748 1749 dpt = (dpt_softc_t *)arg; 1750 1751 printf("dpt%d: Shutting down (mode %x) HBA. Please wait...\n", 1752 dpt->unit, howto); 1753 1754 /* 1755 * What we do for a shutdown, is give the DPT early power loss warning 1756 */ 1757 dpt_send_immediate(dpt, NULL, 0, EATA_POWER_OFF_WARN, 0, 0, 0); 1758 DELAY(1000 * 1000 * 5); 1759 printf("dpt%d: Controller was warned of shutdown and is now " 1760 "disabled\n", dpt->unit); 1761 } 1762 1763 /*============================================================================*/ 1764 1765 #if 0 1766 #ifdef DPT_RESET_HBA 1767 1768 /* 1769 ** Function name : dpt_reset_hba 1770 ** 1771 ** Description : Reset the HBA and properly discard all pending work 1772 ** Input : Softc 1773 ** Output : Nothing 1774 */ 1775 static void 1776 dpt_reset_hba(dpt_softc_t *dpt) 1777 { 1778 eata_ccb_t *ccb; 1779 int ospl; 1780 dpt_ccb_t dccb, *dccbp; 1781 int result; 1782 struct scsi_xfer *xs; 1783 1784 /* Prepare a control block. The SCSI command part is immaterial */ 1785 dccb.xs = NULL; 1786 dccb.flags = 0; 1787 dccb.state = DPT_CCB_STATE_NEW; 1788 dccb.std_callback = NULL; 1789 dccb.wrbuff_callback = NULL; 1790 1791 ccb = &dccb.eata_ccb; 1792 ccb->CP_OpCode = EATA_CMD_RESET; 1793 ccb->SCSI_Reset = 0; 1794 ccb->HBA_Init = 1; 1795 ccb->Auto_Req_Sen = 1; 1796 ccb->cp_id = 0; /* Should be ignored */ 1797 ccb->DataIn = 1; 1798 ccb->DataOut = 0; 1799 ccb->Interpret = 1; 1800 ccb->reqlen = htonl(sizeof(struct scsi_sense_data)); 1801 ccb->cp_statDMA = htonl(vtophys(&ccb->cp_statDMA)); 1802 ccb->cp_reqDMA = htonl(vtophys(&ccb->cp_reqDMA)); 1803 ccb->cp_viraddr = (u_int32_t) & ccb; 1804 1805 ccb->cp_msg[0] = HA_IDENTIFY_MSG | HA_DISCO_RECO; 1806 ccb->cp_scsi_cmd = 0; /* Should be ignored */ 1807 1808 /* Lock up the submitted queue. We are very persistant here */ 1809 ospl = splcam(); 1810 while (dpt->queue_status & DPT_SUBMITTED_QUEUE_ACTIVE) { 1811 DELAY(100); 1812 } 1813 1814 dpt->queue_status |= DPT_SUBMITTED_QUEUE_ACTIVE; 1815 splx(ospl); 1816 1817 /* Send the RESET message */ 1818 if ((result = dpt_send_eata_command(dpt, &dccb.eata_ccb, 1819 EATA_CMD_RESET, 0, 0, 0, 0)) != 0) { 1820 printf("dpt%d: Failed to send the RESET message.\n" 1821 " Trying cold boot (ouch!)\n", dpt->unit); 1822 1823 1824 if ((result = dpt_send_eata_command(dpt, &dccb.eata_ccb, 1825 EATA_COLD_BOOT, 0, 0, 1826 0, 0)) != 0) { 1827 panic("dpt%d: Faild to cold boot the HBA\n", 1828 dpt->unit); 1829 } 1830 #ifdef DPT_MEASURE_PERFORMANCE 1831 dpt->performance.cold_boots++; 1832 #endif /* DPT_MEASURE_PERFORMANCE */ 1833 } 1834 1835 #ifdef DPT_MEASURE_PERFORMANCE 1836 dpt->performance.warm_starts++; 1837 #endif /* DPT_MEASURE_PERFORMANCE */ 1838 1839 printf("dpt%d: Aborting pending requests. O/S should re-submit\n", 1840 dpt->unit); 1841 1842 while ((dccbp = TAILQ_FIRST(&dpt->completed_ccbs)) != NULL) { 1843 struct scsi_xfer *xs = dccbp->xs; 1844 1845 /* Not all transactions have xs structs */ 1846 if (xs != NULL) { 1847 /* Tell the kernel proper this did not complete well */ 1848 xs->error |= XS_SELTIMEOUT; 1849 xs->flags |= SCSI_ITSDONE; 1850 scsi_done(xs); 1851 } 1852 1853 dpt_Qremove_submitted(dpt, dccbp); 1854 1855 /* Remember, Callbacks are NOT in the standard queue */ 1856 if (dccbp->std_callback != NULL) { 1857 (dccbp->std_callback)(dpt, dccbp->eata_ccb.cp_channel, 1858 dccbp); 1859 } else { 1860 ospl = splcam(); 1861 dpt_Qpush_free(dpt, dccbp); 1862 splx(ospl); 1863 } 1864 } 1865 1866 printf("dpt%d: reset done aborting all pending commands\n", dpt->unit); 1867 dpt->queue_status &= ~DPT_SUBMITTED_QUEUE_ACTIVE; 1868 } 1869 1870 #endif /* DPT_RESET_HBA */ 1871 1872 /* 1873 * Build a Command Block for target mode READ/WRITE BUFFER, 1874 * with the ``sync'' bit ON. 1875 * 1876 * Although the length and offset are 24 bit fields in the command, they cannot 1877 * exceed 8192 bytes, so we take them as short integers andcheck their range. 1878 * If they are sensless, we round them to zero offset, maximum length and 1879 * complain. 1880 */ 1881 1882 static void 1883 dpt_target_ccb(dpt_softc_t * dpt, int bus, u_int8_t target, u_int8_t lun, 1884 dpt_ccb_t * ccb, int mode, u_int8_t command, 1885 u_int16_t length, u_int16_t offset) 1886 { 1887 eata_ccb_t *cp; 1888 int ospl; 1889 1890 if ((length + offset) > DPT_MAX_TARGET_MODE_BUFFER_SIZE) { 1891 printf("dpt%d: Length of %d, and offset of %d are wrong\n", 1892 dpt->unit, length, offset); 1893 length = DPT_MAX_TARGET_MODE_BUFFER_SIZE; 1894 offset = 0; 1895 } 1896 ccb->xs = NULL; 1897 ccb->flags = 0; 1898 ccb->state = DPT_CCB_STATE_NEW; 1899 ccb->std_callback = (ccb_callback) dpt_target_done; 1900 ccb->wrbuff_callback = NULL; 1901 1902 cp = &ccb->eata_ccb; 1903 cp->CP_OpCode = EATA_CMD_DMA_SEND_CP; 1904 cp->SCSI_Reset = 0; 1905 cp->HBA_Init = 0; 1906 cp->Auto_Req_Sen = 1; 1907 cp->cp_id = target; 1908 cp->DataIn = 1; 1909 cp->DataOut = 0; 1910 cp->Interpret = 0; 1911 cp->reqlen = htonl(sizeof(struct scsi_sense_data)); 1912 cp->cp_statDMA = htonl(vtophys(&cp->cp_statDMA)); 1913 cp->cp_reqDMA = htonl(vtophys(&cp->cp_reqDMA)); 1914 cp->cp_viraddr = (u_int32_t) & ccb; 1915 1916 cp->cp_msg[0] = HA_IDENTIFY_MSG | HA_DISCO_RECO; 1917 1918 cp->cp_scsi_cmd = command; 1919 cp->cp_cdb[1] = (u_int8_t) (mode & SCSI_TM_MODE_MASK); 1920 cp->cp_lun = lun; /* Order is important here! */ 1921 cp->cp_cdb[2] = 0x00; /* Buffer Id, only 1 :-( */ 1922 cp->cp_cdb[3] = (length >> 16) & 0xFF; /* Buffer offset MSB */ 1923 cp->cp_cdb[4] = (length >> 8) & 0xFF; 1924 cp->cp_cdb[5] = length & 0xFF; 1925 cp->cp_cdb[6] = (length >> 16) & 0xFF; /* Length MSB */ 1926 cp->cp_cdb[7] = (length >> 8) & 0xFF; 1927 cp->cp_cdb[8] = length & 0xFF; /* Length LSB */ 1928 cp->cp_cdb[9] = 0; /* No sync, no match bits */ 1929 1930 /* 1931 * This could be optimized to live in dpt_register_buffer. 1932 * We keep it here, just in case the kernel decides to reallocate pages 1933 */ 1934 if (dpt_scatter_gather(dpt, ccb, DPT_RW_BUFFER_SIZE, 1935 dpt->rw_buffer[bus][target][lun])) { 1936 printf("dpt%d: Failed to setup Scatter/Gather for " 1937 "Target-Mode buffer\n", dpt->unit); 1938 } 1939 } 1940 1941 /* Setup a target mode READ command */ 1942 1943 static void 1944 dpt_set_target(int redo, dpt_softc_t * dpt, 1945 u_int8_t bus, u_int8_t target, u_int8_t lun, int mode, 1946 u_int16_t length, u_int16_t offset, dpt_ccb_t * ccb) 1947 { 1948 int ospl; 1949 1950 if (dpt->target_mode_enabled) { 1951 ospl = splcam(); 1952 1953 if (!redo) 1954 dpt_target_ccb(dpt, bus, target, lun, ccb, mode, 1955 SCSI_TM_READ_BUFFER, length, offset); 1956 1957 ccb->transaction_id = ++dpt->commands_processed; 1958 1959 #ifdef DPT_MEASURE_PERFORMANCE 1960 dpt->performance.command_count[ccb->eata_ccb.cp_scsi_cmd]++; 1961 ccb->command_started = microtime_now; 1962 #endif 1963 dpt_Qadd_waiting(dpt, ccb); 1964 dpt_sched_queue(dpt); 1965 1966 splx(ospl); 1967 } else { 1968 printf("dpt%d: Target Mode Request, but Target Mode is OFF\n", 1969 dpt->unit); 1970 } 1971 } 1972 1973 /* 1974 * Schedule a buffer to be sent to another target. 1975 * The work will be scheduled and the callback provided will be called when 1976 * the work is actually done. 1977 * 1978 * Please NOTE: ``Anyone'' can send a buffer, but only registered clients 1979 * get notified of receipt of buffers. 1980 */ 1981 1982 int 1983 dpt_send_buffer(int unit, u_int8_t channel, u_int8_t target, u_int8_t lun, 1984 u_int8_t mode, u_int16_t length, u_int16_t offset, void *data, 1985 buff_wr_done callback) 1986 { 1987 dpt_softc_t *dpt; 1988 dpt_ccb_t *ccb = NULL; 1989 int ospl; 1990 1991 /* This is an external call. Be a bit paranoid */ 1992 for (dpt = TAILQ_FIRST(&dpt_softc_list); 1993 dpt != NULL; 1994 dpt = TAILQ_NEXT(dpt, links)) { 1995 if (dpt->unit == unit) 1996 goto valid_unit; 1997 } 1998 1999 return (INVALID_UNIT); 2000 2001 valid_unit: 2002 2003 if (dpt->target_mode_enabled) { 2004 if ((channel >= dpt->channels) || (target > dpt->max_id) || 2005 (lun > dpt->max_lun)) { 2006 return (INVALID_SENDER); 2007 } 2008 if ((dpt->rw_buffer[channel][target][lun] == NULL) || 2009 (dpt->buffer_receiver[channel][target][lun] == NULL)) 2010 return (NOT_REGISTERED); 2011 2012 ospl = splsoftcam(); 2013 /* Process the free list */ 2014 if ((TAILQ_EMPTY(&dpt->free_ccbs)) && dpt_alloc_freelist(dpt)) { 2015 printf("dpt%d ERROR: Cannot allocate any more free CCB's.\n" 2016 " Please try later\n", 2017 dpt->unit); 2018 splx(ospl); 2019 return (NO_RESOURCES); 2020 } 2021 /* Now grab the newest CCB */ 2022 if ((ccb = dpt_Qpop_free(dpt)) == NULL) { 2023 splx(ospl); 2024 panic("dpt%d: Got a NULL CCB from pop_free()\n", dpt->unit); 2025 } 2026 splx(ospl); 2027 2028 bcopy(dpt->rw_buffer[channel][target][lun] + offset, data, length); 2029 dpt_target_ccb(dpt, channel, target, lun, ccb, mode, 2030 SCSI_TM_WRITE_BUFFER, 2031 length, offset); 2032 ccb->std_callback = (ccb_callback) callback; /* Potential trouble */ 2033 2034 ospl = splcam(); 2035 ccb->transaction_id = ++dpt->commands_processed; 2036 2037 #ifdef DPT_MEASURE_PERFORMANCE 2038 dpt->performance.command_count[ccb->eata_ccb.cp_scsi_cmd]++; 2039 ccb->command_started = microtime_now; 2040 #endif 2041 dpt_Qadd_waiting(dpt, ccb); 2042 dpt_sched_queue(dpt); 2043 2044 splx(ospl); 2045 return (0); 2046 } 2047 return (DRIVER_DOWN); 2048 } 2049 2050 static void 2051 dpt_target_done(dpt_softc_t * dpt, int bus, dpt_ccb_t * ccb) 2052 { 2053 int ospl; 2054 eata_ccb_t *cp; 2055 2056 cp = &ccb->eata_ccb; 2057 2058 /* 2059 * Remove the CCB from the waiting queue. 2060 * We do NOT put it back on the free, etc., queues as it is a special 2061 * ccb, owned by the dpt_softc of this unit. 2062 */ 2063 ospl = splsoftcam(); 2064 dpt_Qremove_completed(dpt, ccb); 2065 splx(ospl); 2066 2067 #define br_channel (ccb->eata_ccb.cp_channel) 2068 #define br_target (ccb->eata_ccb.cp_id) 2069 #define br_lun (ccb->eata_ccb.cp_LUN) 2070 #define br_index [br_channel][br_target][br_lun] 2071 #define read_buffer_callback (dpt->buffer_receiver br_index ) 2072 #define read_buffer (dpt->rw_buffer[br_channel][br_target][br_lun]) 2073 #define cb(offset) (ccb->eata_ccb.cp_cdb[offset]) 2074 #define br_offset ((cb(3) << 16) | (cb(4) << 8) | cb(5)) 2075 #define br_length ((cb(6) << 16) | (cb(7) << 8) | cb(8)) 2076 2077 /* Different reasons for being here, you know... */ 2078 switch (ccb->eata_ccb.cp_scsi_cmd) { 2079 case SCSI_TM_READ_BUFFER: 2080 if (read_buffer_callback != NULL) { 2081 /* This is a buffer generated by a kernel process */ 2082 read_buffer_callback(dpt->unit, br_channel, 2083 br_target, br_lun, 2084 read_buffer, 2085 br_offset, br_length); 2086 } else { 2087 /* 2088 * This is a buffer waited for by a user (sleeping) 2089 * command 2090 */ 2091 wakeup(ccb); 2092 } 2093 2094 /* We ALWAYS re-issue the same command; args are don't-care */ 2095 dpt_set_target(1, 0, 0, 0, 0, 0, 0, 0, 0); 2096 break; 2097 2098 case SCSI_TM_WRITE_BUFFER: 2099 (ccb->wrbuff_callback) (dpt->unit, br_channel, br_target, 2100 br_offset, br_length, 2101 br_lun, ccb->status_packet.hba_stat); 2102 break; 2103 default: 2104 printf("dpt%d: %s is an unsupported command for target mode\n", 2105 dpt->unit, scsi_cmd_name(ccb->eata_ccb.cp_scsi_cmd)); 2106 } 2107 ospl = splsoftcam(); 2108 dpt->target_ccb[br_channel][br_target][br_lun] = NULL; 2109 dpt_Qpush_free(dpt, ccb); 2110 splx(ospl); 2111 } 2112 2113 2114 /* 2115 * Use this function to register a client for a buffer read target operation. 2116 * The function you register will be called every time a buffer is received 2117 * by the target mode code. 2118 */ 2119 dpt_rb_t 2120 dpt_register_buffer(int unit, u_int8_t channel, u_int8_t target, u_int8_t lun, 2121 u_int8_t mode, u_int16_t length, u_int16_t offset, 2122 dpt_rec_buff callback, dpt_rb_op_t op) 2123 { 2124 dpt_softc_t *dpt; 2125 dpt_ccb_t *ccb = NULL; 2126 int ospl; 2127 2128 for (dpt = TAILQ_FIRST(&dpt_softc_list); 2129 dpt != NULL; 2130 dpt = TAILQ_NEXT(dpt, links)) { 2131 if (dpt->unit == unit) 2132 goto valid_unit; 2133 } 2134 2135 return (INVALID_UNIT); 2136 2137 valid_unit: 2138 2139 if (dpt->state & DPT_HA_SHUTDOWN_ACTIVE) 2140 return (DRIVER_DOWN); 2141 2142 if ((channel > (dpt->channels - 1)) || (target > (dpt->max_id - 1)) || 2143 (lun > (dpt->max_lun - 1))) 2144 return (INVALID_SENDER); 2145 2146 if (dpt->buffer_receiver[channel][target][lun] == NULL) { 2147 if (op == REGISTER_BUFFER) { 2148 /* Assign the requested callback */ 2149 dpt->buffer_receiver[channel][target][lun] = callback; 2150 /* Get a CCB */ 2151 ospl = splsoftcam(); 2152 2153 /* Process the free list */ 2154 if ((TAILQ_EMPTY(&dpt->free_ccbs)) && dpt_alloc_freelist(dpt)) { 2155 printf("dpt%d ERROR: Cannot allocate any more free CCB's.\n" 2156 " Please try later\n", 2157 dpt->unit); 2158 splx(ospl); 2159 return (NO_RESOURCES); 2160 } 2161 /* Now grab the newest CCB */ 2162 if ((ccb = dpt_Qpop_free(dpt)) == NULL) { 2163 splx(ospl); 2164 panic("dpt%d: Got a NULL CCB from pop_free()\n", 2165 dpt->unit); 2166 } 2167 splx(ospl); 2168 2169 /* Clean up the leftover of the previous tenant */ 2170 ccb->status = DPT_CCB_STATE_NEW; 2171 dpt->target_ccb[channel][target][lun] = ccb; 2172 2173 dpt->rw_buffer[channel][target][lun] = 2174 malloc(DPT_RW_BUFFER_SIZE, M_DEVBUF, M_INTWAIT); 2175 dpt_set_target(0, dpt, channel, target, lun, mode, 2176 length, offset, ccb); 2177 return (SUCCESSFULLY_REGISTERED); 2178 } else 2179 return (NOT_REGISTERED); 2180 } else { 2181 if (op == REGISTER_BUFFER) { 2182 if (dpt->buffer_receiver[channel][target][lun] == callback) 2183 return (ALREADY_REGISTERED); 2184 else 2185 return (REGISTERED_TO_ANOTHER); 2186 } else { 2187 if (dpt->buffer_receiver[channel][target][lun] == callback) { 2188 dpt->buffer_receiver[channel][target][lun] = NULL; 2189 ospl = splsoftcam(); 2190 dpt_Qpush_free(dpt, ccb); 2191 splx(ospl); 2192 free(dpt->rw_buffer[channel][target][lun], M_DEVBUF); 2193 return (SUCCESSFULLY_REGISTERED); 2194 } else 2195 return (INVALID_CALLBACK); 2196 } 2197 2198 } 2199 } 2200 2201 /* Return the state of the blinking DPT LED's */ 2202 u_int8_t 2203 dpt_blinking_led(dpt_softc_t * dpt) 2204 { 2205 int ndx; 2206 int ospl; 2207 u_int32_t state; 2208 u_int32_t previous; 2209 u_int8_t result; 2210 2211 ospl = splcam(); 2212 2213 result = 0; 2214 2215 for (ndx = 0, state = 0, previous = 0; 2216 (ndx < 10) && (state != previous); 2217 ndx++) { 2218 previous = state; 2219 state = dpt_inl(dpt, 1); 2220 } 2221 2222 if ((state == previous) && (state == DPT_BLINK_INDICATOR)) 2223 result = dpt_inb(dpt, 5); 2224 2225 splx(ospl); 2226 return (result); 2227 } 2228 2229 /* 2230 * Execute a command which did not come from the kernel's SCSI layer. 2231 * The only way to map user commands to bus and target is to comply with the 2232 * standard DPT wire-down scheme: 2233 */ 2234 int 2235 dpt_user_cmd(dpt_softc_t * dpt, eata_pt_t * user_cmd, 2236 caddr_t cmdarg, int minor_no) 2237 { 2238 dpt_ccb_t *ccb; 2239 void *data; 2240 int channel, target, lun; 2241 int huh; 2242 int result; 2243 int ospl; 2244 int submitted; 2245 2246 data = NULL; 2247 channel = minor2hba(minor_no); 2248 target = minor2target(minor_no); 2249 lun = minor2lun(minor_no); 2250 2251 if ((channel > (dpt->channels - 1)) 2252 || (target > dpt->max_id) 2253 || (lun > dpt->max_lun)) 2254 return (ENXIO); 2255 2256 if (target == dpt->sc_scsi_link[channel].adapter_targ) { 2257 /* This one is for the controller itself */ 2258 if ((user_cmd->eataID[0] != 'E') 2259 || (user_cmd->eataID[1] != 'A') 2260 || (user_cmd->eataID[2] != 'T') 2261 || (user_cmd->eataID[3] != 'A')) { 2262 return (ENXIO); 2263 } 2264 } 2265 /* Get a DPT CCB, so we can prepare a command */ 2266 ospl = splsoftcam(); 2267 2268 /* Process the free list */ 2269 if ((TAILQ_EMPTY(&dpt->free_ccbs)) && dpt_alloc_freelist(dpt)) { 2270 printf("dpt%d ERROR: Cannot allocate any more free CCB's.\n" 2271 " Please try later\n", 2272 dpt->unit); 2273 splx(ospl); 2274 return (EFAULT); 2275 } 2276 /* Now grab the newest CCB */ 2277 if ((ccb = dpt_Qpop_free(dpt)) == NULL) { 2278 splx(ospl); 2279 panic("dpt%d: Got a NULL CCB from pop_free()\n", dpt->unit); 2280 } else { 2281 splx(ospl); 2282 /* Clean up the leftover of the previous tenant */ 2283 ccb->status = DPT_CCB_STATE_NEW; 2284 } 2285 2286 bcopy((caddr_t) & user_cmd->command_packet, (caddr_t) & ccb->eata_ccb, 2287 sizeof(eata_ccb_t)); 2288 2289 /* We do not want to do user specified scatter/gather. Why?? */ 2290 if (ccb->eata_ccb.scatter == 1) 2291 return (EINVAL); 2292 2293 ccb->eata_ccb.Auto_Req_Sen = 1; 2294 ccb->eata_ccb.reqlen = htonl(sizeof(struct scsi_sense_data)); 2295 ccb->eata_ccb.cp_datalen = htonl(sizeof(ccb->eata_ccb.cp_datalen)); 2296 ccb->eata_ccb.cp_dataDMA = htonl(vtophys(ccb->eata_ccb.cp_dataDMA)); 2297 ccb->eata_ccb.cp_statDMA = htonl(vtophys(&ccb->eata_ccb.cp_statDMA)); 2298 ccb->eata_ccb.cp_reqDMA = htonl(vtophys(&ccb->eata_ccb.cp_reqDMA)); 2299 ccb->eata_ccb.cp_viraddr = (u_int32_t) & ccb; 2300 2301 if (ccb->eata_ccb.DataIn || ccb->eata_ccb.DataOut) { 2302 /* Data I/O is involved in this command. Alocate buffer */ 2303 if (ccb->eata_ccb.cp_datalen > PAGE_SIZE) { 2304 data = contigmalloc(ccb->eata_ccb.cp_datalen, 2305 M_TEMP, M_WAITOK, 0, ~0, 2306 ccb->eata_ccb.cp_datalen, 2307 0x10000); 2308 } else { 2309 data = malloc(ccb->eata_ccb.cp_datalen, M_TEMP, 2310 M_WAITOK); 2311 } 2312 2313 if (data == NULL) { 2314 printf("dpt%d: Cannot allocate %d bytes " 2315 "for EATA command\n", dpt->unit, 2316 ccb->eata_ccb.cp_datalen); 2317 return (EFAULT); 2318 } 2319 #define usr_cmd_DMA (caddr_t)user_cmd->command_packet.cp_dataDMA 2320 if (ccb->eata_ccb.DataIn == 1) { 2321 if (copyin(usr_cmd_DMA, 2322 data, ccb->eata_ccb.cp_datalen) == -1) 2323 return (EFAULT); 2324 } 2325 } else { 2326 /* No data I/O involved here. Make sure the DPT knows that */ 2327 ccb->eata_ccb.cp_datalen = 0; 2328 data = NULL; 2329 } 2330 2331 if (ccb->eata_ccb.FWNEST == 1) 2332 ccb->eata_ccb.FWNEST = 0; 2333 2334 if (ccb->eata_ccb.cp_datalen != 0) { 2335 if (dpt_scatter_gather(dpt, ccb, ccb->eata_ccb.cp_datalen, 2336 data) != 0) { 2337 if (data != NULL) 2338 free(data, M_TEMP); 2339 return (EFAULT); 2340 } 2341 } 2342 /** 2343 * We are required to quiet a SCSI bus. 2344 * since we do not queue comands on a bus basis, 2345 * we wait for ALL commands on a controller to complete. 2346 * In the mean time, sched_queue() will not schedule new commands. 2347 */ 2348 if ((ccb->eata_ccb.cp_cdb[0] == MULTIFUNCTION_CMD) 2349 && (ccb->eata_ccb.cp_cdb[2] == BUS_QUIET)) { 2350 /* We wait for ALL traffic for this HBa to subside */ 2351 ospl = splsoftcam(); 2352 dpt->state |= DPT_HA_QUIET; 2353 splx(ospl); 2354 2355 while ((submitted = dpt->submitted_ccbs_count) != 0) { 2356 huh = tsleep((void *) dpt, PCATCH, "dptqt", 100 * hz); 2357 switch (huh) { 2358 case 0: 2359 /* Wakeup call received */ 2360 break; 2361 case EWOULDBLOCK: 2362 /* Timer Expired */ 2363 break; 2364 default: 2365 /* anything else */ 2366 break; 2367 } 2368 } 2369 } 2370 /* Resume normal operation */ 2371 if ((ccb->eata_ccb.cp_cdb[0] == MULTIFUNCTION_CMD) 2372 && (ccb->eata_ccb.cp_cdb[2] == BUS_UNQUIET)) { 2373 ospl = splsoftcam(); 2374 dpt->state &= ~DPT_HA_QUIET; 2375 splx(ospl); 2376 } 2377 /** 2378 * Schedule the command and submit it. 2379 * We bypass dpt_sched_queue, as it will block on DPT_HA_QUIET 2380 */ 2381 ccb->xs = NULL; 2382 ccb->flags = 0; 2383 ccb->eata_ccb.Auto_Req_Sen = 1; /* We always want this feature */ 2384 2385 ccb->transaction_id = ++dpt->commands_processed; 2386 ccb->std_callback = (ccb_callback) dpt_user_cmd_done; 2387 ccb->result = (u_int32_t) & cmdarg; 2388 ccb->data = data; 2389 2390 #ifdef DPT_MEASURE_PERFORMANCE 2391 ++dpt->performance.command_count[ccb->eata_ccb.cp_scsi_cmd]; 2392 ccb->command_started = microtime_now; 2393 #endif 2394 ospl = splcam(); 2395 dpt_Qadd_waiting(dpt, ccb); 2396 splx(ospl); 2397 2398 dpt_sched_queue(dpt); 2399 2400 /* Wait for the command to complete */ 2401 (void) tsleep((void *) ccb, PCATCH, "dptucw", 100 * hz); 2402 2403 /* Free allocated memory */ 2404 if (data != NULL) 2405 free(data, M_TEMP); 2406 2407 return (0); 2408 } 2409 2410 static void 2411 dpt_user_cmd_done(dpt_softc_t * dpt, int bus, dpt_ccb_t * ccb) 2412 { 2413 int ospl = splsoftcam(); 2414 u_int32_t result; 2415 caddr_t cmd_arg; 2416 2417 /** 2418 * If Auto Request Sense is on, copyout the sense struct 2419 */ 2420 #define usr_pckt_DMA (caddr_t)(intptr_t)ntohl(ccb->eata_ccb.cp_reqDMA) 2421 #define usr_pckt_len ntohl(ccb->eata_ccb.cp_datalen) 2422 if (ccb->eata_ccb.Auto_Req_Sen == 1) { 2423 if (copyout((caddr_t) & ccb->sense_data, usr_pckt_DMA, 2424 sizeof(struct scsi_sense_data))) { 2425 ccb->result = EFAULT; 2426 dpt_Qpush_free(dpt, ccb); 2427 splx(ospl); 2428 wakeup(ccb); 2429 return; 2430 } 2431 } 2432 /* If DataIn is on, copyout the data */ 2433 if ((ccb->eata_ccb.DataIn == 1) 2434 && (ccb->status_packet.hba_stat == HA_NO_ERROR)) { 2435 if (copyout(ccb->data, usr_pckt_DMA, usr_pckt_len)) { 2436 dpt_Qpush_free(dpt, ccb); 2437 ccb->result = EFAULT; 2438 2439 splx(ospl); 2440 wakeup(ccb); 2441 return; 2442 } 2443 } 2444 /* Copyout the status */ 2445 result = ccb->status_packet.hba_stat; 2446 cmd_arg = (caddr_t) ccb->result; 2447 2448 if (copyout((caddr_t) & result, cmd_arg, sizeof(result))) { 2449 dpt_Qpush_free(dpt, ccb); 2450 ccb->result = EFAULT; 2451 splx(ospl); 2452 wakeup(ccb); 2453 return; 2454 } 2455 /* Put the CCB back in the freelist */ 2456 ccb->state |= DPT_CCB_STATE_COMPLETED; 2457 dpt_Qpush_free(dpt, ccb); 2458 2459 /* Free allocated memory */ 2460 splx(ospl); 2461 return; 2462 } 2463 2464 #ifdef DPT_HANDLE_TIMEOUTS 2465 /** 2466 * This function walks down the SUBMITTED queue. 2467 * Every request that is too old gets aborted and marked. 2468 * Since the DPT will complete (interrupt) immediately (what does that mean?), 2469 * We just walk the list, aborting old commands and marking them as such. 2470 * The dpt_complete function will get rid of the that were interrupted in the 2471 * normal manner. 2472 * 2473 * This function needs to run at splcam(), as it interacts with the submitted 2474 * queue, as well as the completed and free queues. Just like dpt_intr() does. 2475 * To run it at any ISPL other than that of dpt_intr(), will mean that dpt_intr 2476 * willbe able to pre-empt it, grab a transaction in progress (towards 2477 * destruction) and operate on it. The state of this transaction will be not 2478 * very clear. 2479 * The only other option, is to lock it only as long as necessary but have 2480 * dpt_intr() spin-wait on it. In a UP environment this makes no sense and in 2481 * a SMP environment, the advantage is dubvious for a function that runs once 2482 * every ten seconds for few microseconds and, on systems with healthy 2483 * hardware, does not do anything anyway. 2484 */ 2485 2486 static void 2487 dpt_handle_timeouts(dpt_softc_t * dpt) 2488 { 2489 dpt_ccb_t *ccb; 2490 int ospl; 2491 2492 ospl = splcam(); 2493 2494 if (dpt->state & DPT_HA_TIMEOUTS_ACTIVE) { 2495 printf("dpt%d WARNING: Timeout Handling Collision\n", 2496 dpt->unit); 2497 splx(ospl); 2498 return; 2499 } 2500 dpt->state |= DPT_HA_TIMEOUTS_ACTIVE; 2501 2502 /* Loop through the entire submitted queue, looking for lost souls */ 2503 for (ccb = TAILQ_FIRST(&dpt->submitted_ccbs); 2504 ccb != NULL; 2505 ccb = TAILQ_NEXT(ccb, links)) { 2506 struct scsi_xfer *xs; 2507 u_int32_t age, max_age; 2508 2509 xs = ccb->xs; 2510 age = dpt_time_delta(ccb->command_started, microtime_now); 2511 2512 #define TenSec 10000000 2513 2514 if (xs == NULL) { /* Local, non-kernel call */ 2515 max_age = TenSec; 2516 } else { 2517 max_age = (((xs->timeout * (dpt->submitted_ccbs_count 2518 + DPT_TIMEOUT_FACTOR)) 2519 > TenSec) 2520 ? (xs->timeout * (dpt->submitted_ccbs_count 2521 + DPT_TIMEOUT_FACTOR)) 2522 : TenSec); 2523 } 2524 2525 /* 2526 * If a transaction is marked lost and is TWICE as old as we 2527 * care, then, and only then do we destroy it! 2528 */ 2529 if (ccb->state & DPT_CCB_STATE_MARKED_LOST) { 2530 /* Remember who is next */ 2531 if (age > (max_age * 2)) { 2532 dpt_Qremove_submitted(dpt, ccb); 2533 ccb->state &= ~DPT_CCB_STATE_MARKED_LOST; 2534 ccb->state |= DPT_CCB_STATE_ABORTED; 2535 #define cmd_name scsi_cmd_name(ccb->eata_ccb.cp_scsi_cmd) 2536 if (ccb->retries++ > DPT_RETRIES) { 2537 printf("dpt%d ERROR: Destroying stale " 2538 "%d (%s)\n" 2539 " on " 2540 "c%db%dt%du%d (%d/%d)\n", 2541 dpt->unit, ccb->transaction_id, 2542 cmd_name, 2543 dpt->unit, 2544 ccb->eata_ccb.cp_channel, 2545 ccb->eata_ccb.cp_id, 2546 ccb->eata_ccb.cp_LUN, age, 2547 ccb->retries); 2548 #define send_ccb &ccb->eata_ccb 2549 #define ESA EATA_SPECIFIC_ABORT 2550 (void) dpt_send_immediate(dpt, 2551 send_ccb, 2552 ESA, 2553 0, 0); 2554 dpt_Qpush_free(dpt, ccb); 2555 2556 /* The SCSI layer should re-try */ 2557 xs->error |= XS_TIMEOUT; 2558 xs->flags |= SCSI_ITSDONE; 2559 scsi_done(xs); 2560 } else { 2561 printf("dpt%d ERROR: Stale %d (%s) on " 2562 "c%db%dt%du%d (%d)\n" 2563 " gets another " 2564 "chance(%d/%d)\n", 2565 dpt->unit, ccb->transaction_id, 2566 cmd_name, 2567 dpt->unit, 2568 ccb->eata_ccb.cp_channel, 2569 ccb->eata_ccb.cp_id, 2570 ccb->eata_ccb.cp_LUN, 2571 age, ccb->retries, DPT_RETRIES); 2572 2573 dpt_Qpush_waiting(dpt, ccb); 2574 dpt_sched_queue(dpt); 2575 } 2576 } 2577 } else { 2578 /* 2579 * This is a transaction that is not to be destroyed 2580 * (yet) But it is too old for our liking. We wait as 2581 * long as the upper layer thinks. Not really, we 2582 * multiply that by the number of commands in the 2583 * submitted queue + 1. 2584 */ 2585 if (!(ccb->state & DPT_CCB_STATE_MARKED_LOST) && 2586 (age != ~0) && (age > max_age)) { 2587 printf("dpt%d ERROR: Marking %d (%s) on " 2588 "c%db%dt%du%d \n" 2589 " as late after %dusec\n", 2590 dpt->unit, ccb->transaction_id, 2591 cmd_name, 2592 dpt->unit, ccb->eata_ccb.cp_channel, 2593 ccb->eata_ccb.cp_id, 2594 ccb->eata_ccb.cp_LUN, age); 2595 ccb->state |= DPT_CCB_STATE_MARKED_LOST; 2596 } 2597 } 2598 } 2599 2600 dpt->state &= ~DPT_HA_TIMEOUTS_ACTIVE; 2601 splx(ospl); 2602 } 2603 2604 #endif /* DPT_HANDLE_TIMEOUTS */ 2605 2606 #endif 2607