1 /* $FreeBSD: src/sys/dev/iir/iir.c,v 1.2.2.3 2002/05/05 08:18:12 asmodai Exp $ */ 2 /* $DragonFly: src/sys/dev/raid/iir/iir.c,v 1.10 2005/06/10 15:46:31 swildner Exp $ */ 3 /* 4 * Copyright (c) 2000-01 Intel Corporation 5 * All Rights Reserved 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification, immediately at the beginning of the file. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32 /* 33 * iir.c: SCSI dependant code for the Intel Integrated RAID Controller driver 34 * 35 * Written by: Achim Leubner <achim.leubner@intel.com> 36 * Fixes/Additions: Boji Tony Kannanthanam <boji.t.kannanthanam@intel.com> 37 * 38 * credits: Niklas Hallqvist; OpenBSD driver for the ICP Controllers. 39 * Mike Smith; Some driver source code. 40 * FreeBSD.ORG; Great O/S to work on and for. 41 * 42 * TODO: 43 */ 44 45 #ident "$Id: iir.c 1.2 2001/06/21 20:28:32 achim Exp $" 46 47 #define _IIR_C_ 48 49 /* #include "opt_iir.h" */ 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/types.h> 53 #include <sys/eventhandler.h> 54 #include <sys/malloc.h> 55 #include <sys/kernel.h> 56 #include <sys/bus.h> 57 #include <sys/thread2.h> 58 59 #include <machine/bus_memio.h> 60 #include <machine/bus_pio.h> 61 #include <machine/bus.h> 62 #include <machine/clock.h> 63 #include <machine/stdarg.h> 64 65 #include <bus/cam/cam.h> 66 #include <bus/cam/cam_ccb.h> 67 #include <bus/cam/cam_sim.h> 68 #include <bus/cam/cam_xpt_sim.h> 69 #include <bus/cam/cam_debug.h> 70 #include <bus/cam/scsi/scsi_all.h> 71 #include <bus/cam/scsi/scsi_message.h> 72 73 #include <vm/vm.h> 74 #include <vm/pmap.h> 75 76 #include "iir.h" 77 78 struct gdt_softc *gdt_wait_gdt; 79 int gdt_wait_index; 80 81 #ifdef GDT_DEBUG 82 int gdt_debug = GDT_DEBUG; 83 #ifdef __SERIAL__ 84 #define MAX_SERBUF 160 85 static void ser_init(void); 86 static void ser_puts(char *str); 87 static void ser_putc(int c); 88 static char strbuf[MAX_SERBUF+1]; 89 #ifdef __COM2__ 90 #define COM_BASE 0x2f8 91 #else 92 #define COM_BASE 0x3f8 93 #endif 94 static void ser_init() 95 { 96 unsigned port=COM_BASE; 97 98 outb(port+3, 0x80); 99 outb(port+1, 0); 100 /* 19200 Baud, if 9600: outb(12,port) */ 101 outb(port, 6); 102 outb(port+3, 3); 103 outb(port+1, 0); 104 } 105 106 static void ser_puts(char *str) 107 { 108 char *ptr; 109 110 ser_init(); 111 for (ptr=str;*ptr;++ptr) 112 ser_putc((int)(*ptr)); 113 } 114 115 static void ser_putc(int c) 116 { 117 unsigned port=COM_BASE; 118 119 while ((inb(port+5) & 0x20)==0); 120 outb(port, c); 121 if (c==0x0a) 122 { 123 while ((inb(port+5) & 0x20)==0); 124 outb(port, 0x0d); 125 } 126 } 127 128 int ser_printf(const char *fmt, ...) 129 { 130 __va_list args; 131 int i; 132 133 __va_start(args,fmt); 134 i = vsprintf(strbuf,fmt,args); 135 ser_puts(strbuf); 136 __va_end(args); 137 return i; 138 } 139 #endif 140 #endif 141 142 /* The linked list of softc structures */ 143 struct gdt_softc_list gdt_softcs = TAILQ_HEAD_INITIALIZER(gdt_softcs); 144 /* controller cnt. */ 145 int gdt_cnt = 0; 146 /* event buffer */ 147 static gdt_evt_str ebuffer[GDT_MAX_EVENTS]; 148 static int elastidx, eoldidx; 149 /* statistics */ 150 gdt_statist_t gdt_stat; 151 152 /* Definitions for our use of the SIM private CCB area */ 153 #define ccb_sim_ptr spriv_ptr0 154 #define ccb_priority spriv_field1 155 156 static void iir_action(struct cam_sim *sim, union ccb *ccb); 157 static void iir_poll(struct cam_sim *sim); 158 static void iir_shutdown(void *arg, int howto); 159 static void iir_timeout(void *arg); 160 static void iir_watchdog(void *arg); 161 162 static void gdt_eval_mapping(u_int32_t size, int *cyls, int *heads, 163 int *secs); 164 static int gdt_internal_cmd(struct gdt_softc *gdt, struct gdt_ccb *gccb, 165 u_int8_t service, u_int16_t opcode, 166 u_int32_t arg1, u_int32_t arg2, u_int32_t arg3); 167 static int gdt_wait(struct gdt_softc *gdt, struct gdt_ccb *ccb, 168 int timeout); 169 170 static struct gdt_ccb *gdt_get_ccb(struct gdt_softc *gdt); 171 static u_int32_t gdt_ccb_vtop(struct gdt_softc *gdt, 172 struct gdt_ccb *gccb); 173 174 static int gdt_sync_event(struct gdt_softc *gdt, int service, 175 u_int8_t index, struct gdt_ccb *gccb); 176 static int gdt_async_event(struct gdt_softc *gdt, int service); 177 static struct gdt_ccb *gdt_raw_cmd(struct gdt_softc *gdt, union ccb *ccb); 178 static struct gdt_ccb *gdt_cache_cmd(struct gdt_softc *gdt, union ccb *ccb); 179 static struct gdt_ccb *gdt_ioctl_cmd(struct gdt_softc *gdt, gdt_ucmd_t *ucmd); 180 static void gdt_internal_cache_cmd(struct gdt_softc *gdt,union ccb *ccb); 181 182 static void gdtmapmem(void *arg, bus_dma_segment_t *dm_segs, 183 int nseg, int error); 184 static void gdtexecuteccb(void *arg, bus_dma_segment_t *dm_segs, 185 int nseg, int error); 186 187 int 188 iir_init(struct gdt_softc *gdt) 189 { 190 u_int16_t cdev_cnt; 191 int i, id, drv_cyls, drv_hds, drv_secs; 192 struct gdt_ccb *gccb; 193 194 GDT_DPRINTF(GDT_D_DEBUG, ("iir_init()\n")); 195 196 gdt->sc_state = GDT_POLLING; 197 gdt_clear_events(); 198 bzero(&gdt_stat, sizeof(gdt_statist_t)); 199 200 SLIST_INIT(&gdt->sc_free_gccb); 201 SLIST_INIT(&gdt->sc_pending_gccb); 202 TAILQ_INIT(&gdt->sc_ccb_queue); 203 TAILQ_INIT(&gdt->sc_ucmd_queue); 204 TAILQ_INSERT_TAIL(&gdt_softcs, gdt, links); 205 206 /* DMA tag for mapping buffers into device visible space. */ 207 if (bus_dma_tag_create(gdt->sc_parent_dmat, /*alignment*/1, /*boundary*/0, 208 /*lowaddr*/BUS_SPACE_MAXADDR, 209 /*highaddr*/BUS_SPACE_MAXADDR, 210 /*filter*/NULL, /*filterarg*/NULL, 211 /*maxsize*/MAXBSIZE, /*nsegments*/GDT_MAXSG, 212 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 213 /*flags*/BUS_DMA_ALLOCNOW, 214 &gdt->sc_buffer_dmat) != 0) { 215 printf("iir%d: bus_dma_tag_create(...,gdt->sc_buffer_dmat) failed\n", 216 gdt->sc_hanum); 217 return (1); 218 } 219 gdt->sc_init_level++; 220 221 /* DMA tag for our ccb structures */ 222 if (bus_dma_tag_create(gdt->sc_parent_dmat, /*alignment*/1, /*boundary*/0, 223 /*lowaddr*/BUS_SPACE_MAXADDR, 224 /*highaddr*/BUS_SPACE_MAXADDR, 225 /*filter*/NULL, /*filterarg*/NULL, 226 GDT_MAXCMDS * sizeof(struct gdt_ccb), 227 /*nsegments*/1, 228 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 229 /*flags*/0, &gdt->sc_gccb_dmat) != 0) { 230 printf("iir%d: bus_dma_tag_create(...,gdt->sc_gccb_dmat) failed\n", 231 gdt->sc_hanum); 232 return (1); 233 } 234 gdt->sc_init_level++; 235 236 /* Allocation for our ccbs */ 237 if (bus_dmamem_alloc(gdt->sc_gccb_dmat, (void **)&gdt->sc_gccbs, 238 BUS_DMA_NOWAIT, &gdt->sc_gccb_dmamap) != 0) { 239 printf("iir%d: bus_dmamem_alloc(...,&gdt->sc_gccbs,...) failed\n", 240 gdt->sc_hanum); 241 return (1); 242 } 243 gdt->sc_init_level++; 244 245 /* And permanently map them */ 246 bus_dmamap_load(gdt->sc_gccb_dmat, gdt->sc_gccb_dmamap, 247 gdt->sc_gccbs, GDT_MAXCMDS * sizeof(struct gdt_ccb), 248 gdtmapmem, &gdt->sc_gccb_busbase, /*flags*/0); 249 gdt->sc_init_level++; 250 251 /* Clear them out. */ 252 bzero(gdt->sc_gccbs, GDT_MAXCMDS * sizeof(struct gdt_ccb)); 253 254 /* Initialize the ccbs */ 255 for (i = GDT_MAXCMDS-1; i >= 0; i--) { 256 gdt->sc_gccbs[i].gc_cmd_index = i + 2; 257 gdt->sc_gccbs[i].gc_flags = GDT_GCF_UNUSED; 258 gdt->sc_gccbs[i].gc_map_flag = FALSE; 259 if (bus_dmamap_create(gdt->sc_buffer_dmat, /*flags*/0, 260 &gdt->sc_gccbs[i].gc_dmamap) != 0) 261 return(1); 262 gdt->sc_gccbs[i].gc_map_flag = TRUE; 263 SLIST_INSERT_HEAD(&gdt->sc_free_gccb, &gdt->sc_gccbs[i], sle); 264 } 265 gdt->sc_init_level++; 266 267 /* create the control device */ 268 gdt->sc_dev = gdt_make_dev(gdt->sc_hanum); 269 270 /* allocate ccb for gdt_internal_cmd() */ 271 gccb = gdt_get_ccb(gdt); 272 if (gccb == NULL) { 273 printf("iir%d: No free command index found\n", 274 gdt->sc_hanum); 275 return (1); 276 } 277 278 if (!gdt_internal_cmd(gdt, gccb, GDT_SCREENSERVICE, GDT_INIT, 279 0, 0, 0)) { 280 printf("iir%d: Screen service initialization error %d\n", 281 gdt->sc_hanum, gdt->sc_status); 282 gdt_free_ccb(gdt, gccb); 283 return (1); 284 } 285 286 if (!gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_INIT, 287 GDT_LINUX_OS, 0, 0)) { 288 printf("iir%d: Cache service initialization error %d\n", 289 gdt->sc_hanum, gdt->sc_status); 290 gdt_free_ccb(gdt, gccb); 291 return (1); 292 } 293 gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_UNFREEZE_IO, 294 0, 0, 0); 295 296 if (!gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_MOUNT, 297 0xffff, 1, 0)) { 298 printf("iir%d: Cache service mount error %d\n", 299 gdt->sc_hanum, gdt->sc_status); 300 gdt_free_ccb(gdt, gccb); 301 return (1); 302 } 303 304 if (!gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_INIT, 305 GDT_LINUX_OS, 0, 0)) { 306 printf("iir%d: Cache service post-mount initialization error %d\n", 307 gdt->sc_hanum, gdt->sc_status); 308 gdt_free_ccb(gdt, gccb); 309 return (1); 310 } 311 cdev_cnt = (u_int16_t)gdt->sc_info; 312 gdt->sc_fw_vers = gdt->sc_service; 313 314 /* Detect number of buses */ 315 gdt_enc32(gccb->gc_scratch + GDT_IOC_VERSION, GDT_IOC_NEWEST); 316 gccb->gc_scratch[GDT_IOC_LIST_ENTRIES] = GDT_MAXBUS; 317 gccb->gc_scratch[GDT_IOC_FIRST_CHAN] = 0; 318 gccb->gc_scratch[GDT_IOC_LAST_CHAN] = GDT_MAXBUS - 1; 319 gdt_enc32(gccb->gc_scratch + GDT_IOC_LIST_OFFSET, GDT_IOC_HDR_SZ); 320 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL, 321 GDT_IOCHAN_RAW_DESC, GDT_INVALID_CHANNEL, 322 GDT_IOC_HDR_SZ + GDT_MAXBUS * GDT_RAWIOC_SZ)) { 323 gdt->sc_bus_cnt = gccb->gc_scratch[GDT_IOC_CHAN_COUNT]; 324 for (i = 0; i < gdt->sc_bus_cnt; i++) { 325 id = gccb->gc_scratch[GDT_IOC_HDR_SZ + 326 i * GDT_RAWIOC_SZ + GDT_RAWIOC_PROC_ID]; 327 gdt->sc_bus_id[i] = id < GDT_MAXID_FC ? id : 0xff; 328 } 329 } else { 330 /* New method failed, use fallback. */ 331 for (i = 0; i < GDT_MAXBUS; i++) { 332 gdt_enc32(gccb->gc_scratch + GDT_GETCH_CHANNEL_NO, i); 333 if (!gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL, 334 GDT_SCSI_CHAN_CNT | GDT_L_CTRL_PATTERN, 335 GDT_IO_CHANNEL | GDT_INVALID_CHANNEL, 336 GDT_GETCH_SZ)) { 337 if (i == 0) { 338 printf("iir%d: Cannot get channel count, " 339 "error %d\n", gdt->sc_hanum, gdt->sc_status); 340 gdt_free_ccb(gdt, gccb); 341 return (1); 342 } 343 break; 344 } 345 gdt->sc_bus_id[i] = 346 (gccb->gc_scratch[GDT_GETCH_SIOP_ID] < GDT_MAXID_FC) ? 347 gccb->gc_scratch[GDT_GETCH_SIOP_ID] : 0xff; 348 } 349 gdt->sc_bus_cnt = i; 350 } 351 /* add one "virtual" channel for the host drives */ 352 gdt->sc_virt_bus = gdt->sc_bus_cnt; 353 gdt->sc_bus_cnt++; 354 355 if (!gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_INIT, 356 0, 0, 0)) { 357 printf("iir%d: Raw service initialization error %d\n", 358 gdt->sc_hanum, gdt->sc_status); 359 gdt_free_ccb(gdt, gccb); 360 return (1); 361 } 362 363 /* Set/get features raw service (scatter/gather) */ 364 gdt->sc_raw_feat = 0; 365 if (gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_SET_FEAT, 366 GDT_SCATTER_GATHER, 0, 0)) { 367 if (gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_GET_FEAT, 368 0, 0, 0)) { 369 gdt->sc_raw_feat = gdt->sc_info; 370 if (!(gdt->sc_info & GDT_SCATTER_GATHER)) { 371 panic("iir%d: Scatter/Gather Raw Service " 372 "required but not supported!\n", gdt->sc_hanum); 373 gdt_free_ccb(gdt, gccb); 374 return (1); 375 } 376 } 377 } 378 379 /* Set/get features cache service (scatter/gather) */ 380 gdt->sc_cache_feat = 0; 381 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_SET_FEAT, 382 0, GDT_SCATTER_GATHER, 0)) { 383 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_GET_FEAT, 384 0, 0, 0)) { 385 gdt->sc_cache_feat = gdt->sc_info; 386 if (!(gdt->sc_info & GDT_SCATTER_GATHER)) { 387 panic("iir%d: Scatter/Gather Cache Service " 388 "required but not supported!\n", gdt->sc_hanum); 389 gdt_free_ccb(gdt, gccb); 390 return (1); 391 } 392 } 393 } 394 395 /* Scan for cache devices */ 396 for (i = 0; i < cdev_cnt && i < GDT_MAX_HDRIVES; i++) { 397 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_INFO, 398 i, 0, 0)) { 399 gdt->sc_hdr[i].hd_present = 1; 400 gdt->sc_hdr[i].hd_size = gdt->sc_info; 401 402 /* 403 * Evaluate mapping (sectors per head, heads per cyl) 404 */ 405 gdt->sc_hdr[i].hd_size &= ~GDT_SECS32; 406 if (gdt->sc_info2 == 0) 407 gdt_eval_mapping(gdt->sc_hdr[i].hd_size, 408 &drv_cyls, &drv_hds, &drv_secs); 409 else { 410 drv_hds = gdt->sc_info2 & 0xff; 411 drv_secs = (gdt->sc_info2 >> 8) & 0xff; 412 drv_cyls = gdt->sc_hdr[i].hd_size / drv_hds / 413 drv_secs; 414 } 415 gdt->sc_hdr[i].hd_heads = drv_hds; 416 gdt->sc_hdr[i].hd_secs = drv_secs; 417 /* Round the size */ 418 gdt->sc_hdr[i].hd_size = drv_cyls * drv_hds * drv_secs; 419 420 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, 421 GDT_DEVTYPE, i, 0, 0)) 422 gdt->sc_hdr[i].hd_devtype = gdt->sc_info; 423 } 424 } 425 426 GDT_DPRINTF(GDT_D_INIT, ("dpmem %x %d-bus %d cache device%s\n", 427 gdt->sc_dpmembase, 428 gdt->sc_bus_cnt, cdev_cnt, 429 cdev_cnt == 1 ? "" : "s")); 430 gdt_free_ccb(gdt, gccb); 431 432 gdt_cnt++; 433 return (0); 434 } 435 436 void 437 iir_free(struct gdt_softc *gdt) 438 { 439 int i; 440 441 GDT_DPRINTF(GDT_D_INIT, ("iir_free()\n")); 442 443 switch (gdt->sc_init_level) { 444 default: 445 gdt_destroy_dev(gdt->sc_dev); 446 case 5: 447 for (i = GDT_MAXCMDS-1; i >= 0; i--) 448 if (gdt->sc_gccbs[i].gc_map_flag) 449 bus_dmamap_destroy(gdt->sc_buffer_dmat, 450 gdt->sc_gccbs[i].gc_dmamap); 451 bus_dmamap_unload(gdt->sc_gccb_dmat, gdt->sc_gccb_dmamap); 452 case 4: 453 bus_dmamem_free(gdt->sc_gccb_dmat, gdt->sc_gccbs, gdt->sc_gccb_dmamap); 454 case 3: 455 bus_dma_tag_destroy(gdt->sc_gccb_dmat); 456 case 2: 457 bus_dma_tag_destroy(gdt->sc_buffer_dmat); 458 case 1: 459 bus_dma_tag_destroy(gdt->sc_parent_dmat); 460 case 0: 461 break; 462 } 463 TAILQ_REMOVE(&gdt_softcs, gdt, links); 464 } 465 466 void 467 iir_attach(struct gdt_softc *gdt) 468 { 469 struct cam_devq *devq; 470 int i; 471 472 GDT_DPRINTF(GDT_D_INIT, ("iir_attach()\n")); 473 474 callout_init(&gdt->watchdog_timer); 475 /* 476 * Create the device queue for our SIM. 477 */ 478 devq = cam_simq_alloc(GDT_MAXCMDS); 479 if (devq == NULL) 480 return; 481 482 for (i = 0; i < gdt->sc_bus_cnt; i++) { 483 /* 484 * Construct our SIM entry 485 */ 486 gdt->sims[i] = cam_sim_alloc(iir_action, iir_poll, "iir", 487 gdt, gdt->sc_hanum, /*untagged*/2, 488 /*tagged*/GDT_MAXCMDS, devq); 489 if (xpt_bus_register(gdt->sims[i], i) != CAM_SUCCESS) { 490 cam_sim_free(gdt->sims[i]); 491 break; 492 } 493 494 if (xpt_create_path(&gdt->paths[i], /*periph*/NULL, 495 cam_sim_path(gdt->sims[i]), 496 CAM_TARGET_WILDCARD, 497 CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 498 xpt_bus_deregister(cam_sim_path(gdt->sims[i])); 499 cam_sim_free(gdt->sims[i]); 500 break; 501 } 502 } 503 cam_simq_release(devq); 504 if (i > 0) 505 EVENTHANDLER_REGISTER(shutdown_final, iir_shutdown, 506 gdt, SHUTDOWN_PRI_DEFAULT); 507 /* iir_watchdog(gdt); */ 508 gdt->sc_state = GDT_NORMAL; 509 } 510 511 static void 512 gdt_eval_mapping(u_int32_t size, int *cyls, int *heads, int *secs) 513 { 514 *cyls = size / GDT_HEADS / GDT_SECS; 515 if (*cyls < GDT_MAXCYLS) { 516 *heads = GDT_HEADS; 517 *secs = GDT_SECS; 518 } else { 519 /* Too high for 64 * 32 */ 520 *cyls = size / GDT_MEDHEADS / GDT_MEDSECS; 521 if (*cyls < GDT_MAXCYLS) { 522 *heads = GDT_MEDHEADS; 523 *secs = GDT_MEDSECS; 524 } else { 525 /* Too high for 127 * 63 */ 526 *cyls = size / GDT_BIGHEADS / GDT_BIGSECS; 527 *heads = GDT_BIGHEADS; 528 *secs = GDT_BIGSECS; 529 } 530 } 531 } 532 533 static int 534 gdt_wait(struct gdt_softc *gdt, struct gdt_ccb *gccb, 535 int timeout) 536 { 537 int rv = 0; 538 539 GDT_DPRINTF(GDT_D_INIT, 540 ("gdt_wait(%p, %p, %d)\n", gdt, gccb, timeout)); 541 542 gdt->sc_state |= GDT_POLL_WAIT; 543 do { 544 iir_intr(gdt); 545 if (gdt == gdt_wait_gdt && 546 gccb->gc_cmd_index == gdt_wait_index) { 547 rv = 1; 548 break; 549 } 550 DELAY(1); 551 } while (--timeout); 552 gdt->sc_state &= ~GDT_POLL_WAIT; 553 554 while (gdt->sc_test_busy(gdt)) 555 DELAY(1); /* XXX correct? */ 556 557 return (rv); 558 } 559 560 static int 561 gdt_internal_cmd(struct gdt_softc *gdt, struct gdt_ccb *gccb, 562 u_int8_t service, u_int16_t opcode, 563 u_int32_t arg1, u_int32_t arg2, u_int32_t arg3) 564 { 565 int retries; 566 567 GDT_DPRINTF(GDT_D_CMD, ("gdt_internal_cmd(%p, %d, %d, %d, %d, %d)\n", 568 gdt, service, opcode, arg1, arg2, arg3)); 569 570 bzero(gdt->sc_cmd, GDT_CMD_SZ); 571 572 for (retries = GDT_RETRIES; ; ) { 573 gccb->gc_service = service; 574 gccb->gc_flags = GDT_GCF_INTERNAL; 575 576 gdt->sc_set_sema0(gdt); 577 gdt_enc32(gdt->sc_cmd + GDT_CMD_COMMANDINDEX, 578 gccb->gc_cmd_index); 579 gdt_enc16(gdt->sc_cmd + GDT_CMD_OPCODE, opcode); 580 581 switch (service) { 582 case GDT_CACHESERVICE: 583 if (opcode == GDT_IOCTL) { 584 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + 585 GDT_IOCTL_SUBFUNC, arg1); 586 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + 587 GDT_IOCTL_CHANNEL, arg2); 588 gdt_enc16(gdt->sc_cmd + GDT_CMD_UNION + 589 GDT_IOCTL_PARAM_SIZE, (u_int16_t)arg3); 590 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_IOCTL_P_PARAM, 591 gdt_ccb_vtop(gdt, gccb) + 592 offsetof(struct gdt_ccb, gc_scratch[0])); 593 } else { 594 gdt_enc16(gdt->sc_cmd + GDT_CMD_UNION + 595 GDT_CACHE_DEVICENO, (u_int16_t)arg1); 596 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + 597 GDT_CACHE_BLOCKNO, arg2); 598 } 599 break; 600 601 case GDT_SCSIRAWSERVICE: 602 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + 603 GDT_RAW_DIRECTION, arg1); 604 gdt->sc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] = 605 (u_int8_t)arg2; 606 gdt->sc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] = 607 (u_int8_t)arg3; 608 gdt->sc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] = 609 (u_int8_t)(arg3 >> 8); 610 } 611 612 gdt->sc_cmd_len = GDT_CMD_SZ; 613 gdt->sc_cmd_off = 0; 614 gdt->sc_cmd_cnt = 0; 615 gdt->sc_copy_cmd(gdt, gccb); 616 gdt->sc_release_event(gdt); 617 DELAY(20); 618 if (!gdt_wait(gdt, gccb, GDT_POLL_TIMEOUT)) 619 return (0); 620 if (gdt->sc_status != GDT_S_BSY || --retries == 0) 621 break; 622 DELAY(1); 623 } 624 return (gdt->sc_status == GDT_S_OK); 625 } 626 627 static struct gdt_ccb * 628 gdt_get_ccb(struct gdt_softc *gdt) 629 { 630 struct gdt_ccb *gccb; 631 632 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_get_ccb(%p)\n", gdt)); 633 634 crit_enter(); 635 gccb = SLIST_FIRST(&gdt->sc_free_gccb); 636 if (gccb != NULL) { 637 SLIST_REMOVE_HEAD(&gdt->sc_free_gccb, sle); 638 SLIST_INSERT_HEAD(&gdt->sc_pending_gccb, gccb, sle); 639 ++gdt_stat.cmd_index_act; 640 if (gdt_stat.cmd_index_act > gdt_stat.cmd_index_max) 641 gdt_stat.cmd_index_max = gdt_stat.cmd_index_act; 642 } 643 crit_exit(); 644 return (gccb); 645 } 646 647 void 648 gdt_free_ccb(struct gdt_softc *gdt, struct gdt_ccb *gccb) 649 { 650 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_free_ccb(%p, %p)\n", gdt, gccb)); 651 652 crit_enter(); 653 gccb->gc_flags = GDT_GCF_UNUSED; 654 SLIST_REMOVE(&gdt->sc_pending_gccb, gccb, gdt_ccb, sle); 655 SLIST_INSERT_HEAD(&gdt->sc_free_gccb, gccb, sle); 656 --gdt_stat.cmd_index_act; 657 crit_exit(); 658 if (gdt->sc_state & GDT_SHUTDOWN) 659 wakeup(gccb); 660 } 661 662 static u_int32_t 663 gdt_ccb_vtop(struct gdt_softc *gdt, struct gdt_ccb *gccb) 664 { 665 return (gdt->sc_gccb_busbase 666 + (u_int32_t)((caddr_t)gccb - (caddr_t)gdt->sc_gccbs)); 667 } 668 669 void 670 gdt_next(struct gdt_softc *gdt) 671 { 672 union ccb *ccb; 673 gdt_ucmd_t *ucmd; 674 struct cam_sim *sim; 675 int bus, target, lun; 676 int next_cmd; 677 678 struct ccb_scsiio *csio; 679 struct ccb_hdr *ccbh; 680 struct gdt_ccb *gccb = NULL; 681 u_int8_t cmd; 682 683 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_next(%p)\n", gdt)); 684 685 crit_enter(); 686 if (gdt->sc_test_busy(gdt)) { 687 if (!(gdt->sc_state & GDT_POLLING)) { 688 crit_exit(); 689 return; 690 } 691 while (gdt->sc_test_busy(gdt)) 692 DELAY(1); 693 } 694 695 gdt->sc_cmd_cnt = gdt->sc_cmd_off = 0; 696 next_cmd = TRUE; 697 for (;;) { 698 /* I/Os in queue? controller ready? */ 699 if (!TAILQ_FIRST(&gdt->sc_ucmd_queue) && 700 !TAILQ_FIRST(&gdt->sc_ccb_queue)) 701 break; 702 703 /* 1.: I/Os without ccb (IOCTLs) */ 704 ucmd = TAILQ_FIRST(&gdt->sc_ucmd_queue); 705 if (ucmd != NULL) { 706 TAILQ_REMOVE(&gdt->sc_ucmd_queue, ucmd, links); 707 if ((gccb = gdt_ioctl_cmd(gdt, ucmd)) == NULL) { 708 TAILQ_INSERT_HEAD(&gdt->sc_ucmd_queue, ucmd, links); 709 break; 710 } 711 break; 712 /* wenn mehrere Kdos. zulassen: if (!gdt_polling) continue; */ 713 } 714 715 /* 2.: I/Os with ccb */ 716 ccb = (union ccb *)TAILQ_FIRST(&gdt->sc_ccb_queue); 717 /* ist dann immer != NULL, da oben getestet */ 718 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr; 719 bus = cam_sim_bus(sim); 720 target = ccb->ccb_h.target_id; 721 lun = ccb->ccb_h.target_lun; 722 723 TAILQ_REMOVE(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe); 724 --gdt_stat.req_queue_act; 725 /* ccb->ccb_h.func_code is XPT_SCSI_IO */ 726 GDT_DPRINTF(GDT_D_QUEUE, ("XPT_SCSI_IO flags 0x%x)\n", 727 ccb->ccb_h.flags)); 728 csio = &ccb->csio; 729 ccbh = &ccb->ccb_h; 730 cmd = csio->cdb_io.cdb_bytes[0]; 731 /* Max CDB length is 12 bytes */ 732 if (csio->cdb_len > 12) { 733 ccbh->status = CAM_REQ_INVALID; 734 --gdt_stat.io_count_act; 735 xpt_done(ccb); 736 } else if (bus != gdt->sc_virt_bus) { 737 /* raw service command */ 738 if ((gccb = gdt_raw_cmd(gdt, ccb)) == NULL) { 739 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h, 740 sim_links.tqe); 741 ++gdt_stat.req_queue_act; 742 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max) 743 gdt_stat.req_queue_max = gdt_stat.req_queue_act; 744 next_cmd = FALSE; 745 } 746 } else if (target >= GDT_MAX_HDRIVES || 747 !gdt->sc_hdr[target].hd_present || lun != 0) { 748 ccbh->status = CAM_SEL_TIMEOUT; 749 --gdt_stat.io_count_act; 750 xpt_done(ccb); 751 } else { 752 /* cache service command */ 753 if (cmd == READ_6 || cmd == WRITE_6 || 754 cmd == READ_10 || cmd == WRITE_10) { 755 if ((gccb = gdt_cache_cmd(gdt, ccb)) == NULL) { 756 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h, 757 sim_links.tqe); 758 ++gdt_stat.req_queue_act; 759 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max) 760 gdt_stat.req_queue_max = gdt_stat.req_queue_act; 761 next_cmd = FALSE; 762 } 763 } else { 764 crit_exit(); 765 gdt_internal_cache_cmd(gdt, ccb); 766 crit_enter(); 767 } 768 } 769 if ((gdt->sc_state & GDT_POLLING) || !next_cmd) 770 break; 771 } 772 if (gdt->sc_cmd_cnt > 0) 773 gdt->sc_release_event(gdt); 774 775 crit_exit(); 776 777 if ((gdt->sc_state & GDT_POLLING) && gdt->sc_cmd_cnt > 0) { 778 gdt_wait(gdt, gccb, GDT_POLL_TIMEOUT); 779 } 780 } 781 782 static struct gdt_ccb * 783 gdt_raw_cmd(struct gdt_softc *gdt, union ccb *ccb) 784 { 785 struct gdt_ccb *gccb; 786 struct cam_sim *sim; 787 788 GDT_DPRINTF(GDT_D_CMD, ("gdt_raw_cmd(%p, %p)\n", gdt, ccb)); 789 790 if (roundup(GDT_CMD_UNION + GDT_RAW_SZ, sizeof(u_int32_t)) + 791 gdt->sc_cmd_off + GDT_DPMEM_COMMAND_OFFSET > 792 gdt->sc_ic_all_size) { 793 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: gdt_raw_cmd(): DPMEM overflow\n", 794 gdt->sc_hanum)); 795 return (NULL); 796 } 797 798 bzero(gdt->sc_cmd, GDT_CMD_SZ); 799 800 gccb = gdt_get_ccb(gdt); 801 if (gccb == NULL) { 802 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: No free command index found\n", 803 gdt->sc_hanum)); 804 return (gccb); 805 } 806 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr; 807 gccb->gc_ccb = ccb; 808 gccb->gc_service = GDT_SCSIRAWSERVICE; 809 gccb->gc_flags = GDT_GCF_SCSI; 810 811 if (gdt->sc_cmd_cnt == 0) 812 gdt->sc_set_sema0(gdt); 813 crit_exit(); 814 gdt_enc32(gdt->sc_cmd + GDT_CMD_COMMANDINDEX, 815 gccb->gc_cmd_index); 816 gdt_enc16(gdt->sc_cmd + GDT_CMD_OPCODE, GDT_WRITE); 817 818 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_DIRECTION, 819 (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ? 820 GDT_DATA_IN : GDT_DATA_OUT); 821 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SDLEN, 822 ccb->csio.dxfer_len); 823 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_CLEN, 824 ccb->csio.cdb_len); 825 bcopy(ccb->csio.cdb_io.cdb_bytes, gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_CMD, 826 ccb->csio.cdb_len); 827 gdt->sc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] = 828 ccb->ccb_h.target_id; 829 gdt->sc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] = 830 ccb->ccb_h.target_lun; 831 gdt->sc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] = 832 cam_sim_bus(sim); 833 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_LEN, 834 sizeof(struct scsi_sense_data)); 835 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_DATA, 836 gdt_ccb_vtop(gdt, gccb) + 837 offsetof(struct gdt_ccb, gc_scratch[0])); 838 839 /* 840 * If we have any data to send with this command, 841 * map it into bus space. 842 */ 843 /* Only use S/G if there is a transfer */ 844 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 845 if ((ccb->ccb_h.flags & CAM_SCATTER_VALID) == 0) { 846 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) == 0) { 847 int error; 848 849 /* vorher unlock von splcam() ??? */ 850 crit_enter(); 851 error = 852 bus_dmamap_load(gdt->sc_buffer_dmat, 853 gccb->gc_dmamap, 854 ccb->csio.data_ptr, 855 ccb->csio.dxfer_len, 856 gdtexecuteccb, 857 gccb, /*flags*/0); 858 if (error == EINPROGRESS) { 859 xpt_freeze_simq(sim, 1); 860 gccb->gc_state |= CAM_RELEASE_SIMQ; 861 } 862 crit_exit(); 863 } else { 864 struct bus_dma_segment seg; 865 866 /* Pointer to physical buffer */ 867 seg.ds_addr = 868 (bus_addr_t)ccb->csio.data_ptr; 869 seg.ds_len = ccb->csio.dxfer_len; 870 gdtexecuteccb(gccb, &seg, 1, 0); 871 } 872 } else { 873 struct bus_dma_segment *segs; 874 875 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) != 0) 876 panic("iir%d: iir_action - Physical " 877 "segment pointers unsupported", gdt->sc_hanum); 878 879 if ((ccb->ccb_h.flags & CAM_SG_LIST_PHYS)==0) 880 panic("iir%d: iir_action - Virtual " 881 "segment addresses unsupported", gdt->sc_hanum); 882 883 /* Just use the segments provided */ 884 segs = (struct bus_dma_segment *)ccb->csio.data_ptr; 885 gdtexecuteccb(gccb, segs, ccb->csio.sglist_cnt, 0); 886 } 887 } else { 888 gdtexecuteccb(gccb, NULL, 0, 0); 889 } 890 891 crit_enter(); 892 return (gccb); 893 } 894 895 static struct gdt_ccb * 896 gdt_cache_cmd(struct gdt_softc *gdt, union ccb *ccb) 897 { 898 struct gdt_ccb *gccb; 899 struct cam_sim *sim; 900 u_int8_t *cmdp; 901 u_int16_t opcode; 902 u_int32_t blockno, blockcnt; 903 904 GDT_DPRINTF(GDT_D_CMD, ("gdt_cache_cmd(%p, %p)\n", gdt, ccb)); 905 906 if (roundup(GDT_CMD_UNION + GDT_CACHE_SZ, sizeof(u_int32_t)) + 907 gdt->sc_cmd_off + GDT_DPMEM_COMMAND_OFFSET > 908 gdt->sc_ic_all_size) { 909 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: gdt_cache_cmd(): DPMEM overflow\n", 910 gdt->sc_hanum)); 911 return (NULL); 912 } 913 914 bzero(gdt->sc_cmd, GDT_CMD_SZ); 915 916 gccb = gdt_get_ccb(gdt); 917 if (gccb == NULL) { 918 GDT_DPRINTF(GDT_D_DEBUG, ("iir%d: No free command index found\n", 919 gdt->sc_hanum)); 920 return (gccb); 921 } 922 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr; 923 gccb->gc_ccb = ccb; 924 gccb->gc_service = GDT_CACHESERVICE; 925 gccb->gc_flags = GDT_GCF_SCSI; 926 927 if (gdt->sc_cmd_cnt == 0) 928 gdt->sc_set_sema0(gdt); 929 crit_exit(); 930 gdt_enc32(gdt->sc_cmd + GDT_CMD_COMMANDINDEX, 931 gccb->gc_cmd_index); 932 cmdp = ccb->csio.cdb_io.cdb_bytes; 933 opcode = (*cmdp == WRITE_6 || *cmdp == WRITE_10) ? GDT_WRITE : GDT_READ; 934 if ((gdt->sc_state & GDT_SHUTDOWN) && opcode == GDT_WRITE) 935 opcode = GDT_WRITE_THR; 936 gdt_enc16(gdt->sc_cmd + GDT_CMD_OPCODE, opcode); 937 938 gdt_enc16(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_DEVICENO, 939 ccb->ccb_h.target_id); 940 if (ccb->csio.cdb_len == 6) { 941 struct scsi_rw_6 *rw = (struct scsi_rw_6 *)cmdp; 942 blockno = scsi_3btoul(rw->addr) & ((SRW_TOPADDR<<16) | 0xffff); 943 blockcnt = rw->length ? rw->length : 0x100; 944 } else { 945 struct scsi_rw_10 *rw = (struct scsi_rw_10 *)cmdp; 946 blockno = scsi_4btoul(rw->addr); 947 blockcnt = scsi_2btoul(rw->length); 948 } 949 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKNO, 950 blockno); 951 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKCNT, 952 blockcnt); 953 954 /* 955 * If we have any data to send with this command, 956 * map it into bus space. 957 */ 958 /* Only use S/G if there is a transfer */ 959 if ((ccb->ccb_h.flags & CAM_SCATTER_VALID) == 0) { 960 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) == 0) { 961 int error; 962 963 /* vorher unlock von splcam() ??? */ 964 crit_enter(); 965 error = 966 bus_dmamap_load(gdt->sc_buffer_dmat, 967 gccb->gc_dmamap, 968 ccb->csio.data_ptr, 969 ccb->csio.dxfer_len, 970 gdtexecuteccb, 971 gccb, /*flags*/0); 972 if (error == EINPROGRESS) { 973 xpt_freeze_simq(sim, 1); 974 gccb->gc_state |= CAM_RELEASE_SIMQ; 975 } 976 crit_exit(); 977 } else { 978 struct bus_dma_segment seg; 979 980 /* Pointer to physical buffer */ 981 seg.ds_addr = 982 (bus_addr_t)ccb->csio.data_ptr; 983 seg.ds_len = ccb->csio.dxfer_len; 984 gdtexecuteccb(gccb, &seg, 1, 0); 985 } 986 } else { 987 struct bus_dma_segment *segs; 988 989 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) != 0) 990 panic("iir%d: iir_action - Physical " 991 "segment pointers unsupported", gdt->sc_hanum); 992 993 if ((ccb->ccb_h.flags & CAM_SG_LIST_PHYS)==0) 994 panic("iir%d: iir_action - Virtual " 995 "segment addresses unsupported", gdt->sc_hanum); 996 997 /* Just use the segments provided */ 998 segs = (struct bus_dma_segment *)ccb->csio.data_ptr; 999 gdtexecuteccb(gccb, segs, ccb->csio.sglist_cnt, 0); 1000 } 1001 1002 crit_enter(); 1003 return (gccb); 1004 } 1005 1006 static struct gdt_ccb * 1007 gdt_ioctl_cmd(struct gdt_softc *gdt, gdt_ucmd_t *ucmd) 1008 { 1009 struct gdt_ccb *gccb; 1010 u_int32_t cnt; 1011 1012 GDT_DPRINTF(GDT_D_DEBUG, ("gdt_ioctl_cmd(%p, %p)\n", gdt, ucmd)); 1013 1014 bzero(gdt->sc_cmd, GDT_CMD_SZ); 1015 1016 gccb = gdt_get_ccb(gdt); 1017 if (gccb == NULL) { 1018 GDT_DPRINTF(GDT_D_DEBUG, ("iir%d: No free command index found\n", 1019 gdt->sc_hanum)); 1020 return (gccb); 1021 } 1022 gccb->gc_ucmd = ucmd; 1023 gccb->gc_service = ucmd->service; 1024 gccb->gc_flags = GDT_GCF_IOCTL; 1025 1026 /* check DPMEM space, copy data buffer from user space */ 1027 if (ucmd->service == GDT_CACHESERVICE) { 1028 if (ucmd->OpCode == GDT_IOCTL) { 1029 gdt->sc_cmd_len = roundup(GDT_CMD_UNION + GDT_IOCTL_SZ, 1030 sizeof(u_int32_t)); 1031 cnt = ucmd->u.ioctl.param_size; 1032 if (cnt > GDT_SCRATCH_SZ) { 1033 printf("iir%d: Scratch buffer too small (%d/%d)\n", 1034 gdt->sc_hanum, GDT_SCRATCH_SZ, cnt); 1035 gdt_free_ccb(gdt, gccb); 1036 return (NULL); 1037 } 1038 } else { 1039 gdt->sc_cmd_len = roundup(GDT_CMD_UNION + GDT_CACHE_SG_LST + 1040 GDT_SG_SZ, sizeof(u_int32_t)); 1041 cnt = ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE; 1042 if (cnt > GDT_SCRATCH_SZ) { 1043 printf("iir%d: Scratch buffer too small (%d/%d)\n", 1044 gdt->sc_hanum, GDT_SCRATCH_SZ, cnt); 1045 gdt_free_ccb(gdt, gccb); 1046 return (NULL); 1047 } 1048 } 1049 } else { 1050 gdt->sc_cmd_len = roundup(GDT_CMD_UNION + GDT_RAW_SG_LST + 1051 GDT_SG_SZ, sizeof(u_int32_t)); 1052 cnt = ucmd->u.raw.sdlen; 1053 if (cnt + ucmd->u.raw.sense_len > GDT_SCRATCH_SZ) { 1054 printf("iir%d: Scratch buffer too small (%d/%d)\n", 1055 gdt->sc_hanum, GDT_SCRATCH_SZ, cnt + ucmd->u.raw.sense_len); 1056 gdt_free_ccb(gdt, gccb); 1057 return (NULL); 1058 } 1059 } 1060 if (cnt != 0) 1061 bcopy(ucmd->data, gccb->gc_scratch, cnt); 1062 1063 if (gdt->sc_cmd_off + gdt->sc_cmd_len + GDT_DPMEM_COMMAND_OFFSET > 1064 gdt->sc_ic_all_size) { 1065 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: gdt_ioctl_cmd(): DPMEM overflow\n", 1066 gdt->sc_hanum)); 1067 gdt_free_ccb(gdt, gccb); 1068 return (NULL); 1069 } 1070 1071 if (gdt->sc_cmd_cnt == 0) 1072 gdt->sc_set_sema0(gdt); 1073 crit_exit(); 1074 1075 /* fill cmd structure */ 1076 gdt_enc32(gdt->sc_cmd + GDT_CMD_COMMANDINDEX, 1077 gccb->gc_cmd_index); 1078 gdt_enc16(gdt->sc_cmd + GDT_CMD_OPCODE, 1079 ucmd->OpCode); 1080 1081 if (ucmd->service == GDT_CACHESERVICE) { 1082 if (ucmd->OpCode == GDT_IOCTL) { 1083 /* IOCTL */ 1084 gdt_enc16(gdt->sc_cmd + GDT_CMD_UNION + GDT_IOCTL_PARAM_SIZE, 1085 ucmd->u.ioctl.param_size); 1086 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_IOCTL_SUBFUNC, 1087 ucmd->u.ioctl.subfunc); 1088 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_IOCTL_CHANNEL, 1089 ucmd->u.ioctl.channel); 1090 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_IOCTL_P_PARAM, 1091 gdt_ccb_vtop(gdt, gccb) + 1092 offsetof(struct gdt_ccb, gc_scratch[0])); 1093 } else { 1094 /* cache service command */ 1095 gdt_enc16(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_DEVICENO, 1096 ucmd->u.cache.DeviceNo); 1097 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKNO, 1098 ucmd->u.cache.BlockNo); 1099 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKCNT, 1100 ucmd->u.cache.BlockCnt); 1101 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_DESTADDR, 1102 0xffffffffUL); 1103 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_CANZ, 1104 1); 1105 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST + 1106 GDT_SG_PTR, gdt_ccb_vtop(gdt, gccb) + 1107 offsetof(struct gdt_ccb, gc_scratch[0])); 1108 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST + 1109 GDT_SG_LEN, ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE); 1110 } 1111 } else { 1112 /* raw service command */ 1113 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_DIRECTION, 1114 ucmd->u.raw.direction); 1115 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SDATA, 1116 0xffffffffUL); 1117 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SDLEN, 1118 ucmd->u.raw.sdlen); 1119 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_CLEN, 1120 ucmd->u.raw.clen); 1121 bcopy(ucmd->u.raw.cmd, gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_CMD, 1122 12); 1123 gdt->sc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] = 1124 ucmd->u.raw.target; 1125 gdt->sc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] = 1126 ucmd->u.raw.lun; 1127 gdt->sc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] = 1128 ucmd->u.raw.bus; 1129 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_LEN, 1130 ucmd->u.raw.sense_len); 1131 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_DATA, 1132 gdt_ccb_vtop(gdt, gccb) + 1133 offsetof(struct gdt_ccb, gc_scratch[ucmd->u.raw.sdlen])); 1134 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SG_RANZ, 1135 1); 1136 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST + 1137 GDT_SG_PTR, gdt_ccb_vtop(gdt, gccb) + 1138 offsetof(struct gdt_ccb, gc_scratch[0])); 1139 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST + 1140 GDT_SG_LEN, ucmd->u.raw.sdlen); 1141 } 1142 1143 crit_enter(); 1144 gdt_stat.sg_count_act = 1; 1145 gdt->sc_copy_cmd(gdt, gccb); 1146 return (gccb); 1147 } 1148 1149 static void 1150 gdt_internal_cache_cmd(struct gdt_softc *gdt,union ccb *ccb) 1151 { 1152 int t; 1153 1154 t = ccb->ccb_h.target_id; 1155 GDT_DPRINTF(GDT_D_CMD, ("gdt_internal_cache_cmd(%p, %p, 0x%x, %d)\n", 1156 gdt, ccb, ccb->csio.cdb_io.cdb_bytes[0], t)); 1157 1158 switch (ccb->csio.cdb_io.cdb_bytes[0]) { 1159 case TEST_UNIT_READY: 1160 case START_STOP: 1161 break; 1162 case REQUEST_SENSE: 1163 GDT_DPRINTF(GDT_D_MISC, ("REQUEST_SENSE\n")); 1164 break; 1165 case INQUIRY: 1166 { 1167 struct scsi_inquiry_data *inq; 1168 1169 inq = (struct scsi_inquiry_data *)ccb->csio.data_ptr; 1170 bzero(inq, sizeof(struct scsi_inquiry_data)); 1171 inq->device = (gdt->sc_hdr[t].hd_devtype & 4) ? 1172 T_CDROM : T_DIRECT; 1173 inq->dev_qual2 = (gdt->sc_hdr[t].hd_devtype & 1) ? 0x80 : 0; 1174 inq->version = SCSI_REV_2; 1175 inq->response_format = 2; 1176 inq->additional_length = 32; 1177 inq->flags = SID_CmdQue | SID_Sync; 1178 strcpy(inq->vendor, "IIR "); 1179 sprintf(inq->product, "Host Drive #%02d", t); 1180 strcpy(inq->revision, " "); 1181 break; 1182 } 1183 case MODE_SENSE_6: 1184 { 1185 struct mpd_data { 1186 struct scsi_mode_hdr_6 hd; 1187 struct scsi_mode_block_descr bd; 1188 struct scsi_control_page cp; 1189 } *mpd; 1190 u_int8_t page; 1191 1192 mpd = (struct mpd_data *)ccb->csio.data_ptr; 1193 bzero(mpd, sizeof(struct mpd_data)); 1194 mpd->hd.datalen = sizeof(struct scsi_mode_hdr_6) + 1195 sizeof(struct scsi_mode_block_descr); 1196 mpd->hd.dev_specific = (gdt->sc_hdr[t].hd_devtype & 2) ? 0x80 : 0; 1197 mpd->hd.block_descr_len = sizeof(struct scsi_mode_block_descr); 1198 mpd->bd.block_len[0] = (GDT_SECTOR_SIZE & 0x00ff0000) >> 16; 1199 mpd->bd.block_len[1] = (GDT_SECTOR_SIZE & 0x0000ff00) >> 8; 1200 mpd->bd.block_len[2] = (GDT_SECTOR_SIZE & 0x000000ff); 1201 page=((struct scsi_mode_sense_6 *)ccb->csio.cdb_io.cdb_bytes)->page; 1202 switch (page) { 1203 default: 1204 GDT_DPRINTF(GDT_D_MISC, ("MODE_SENSE_6: page 0x%x\n", page)); 1205 break; 1206 } 1207 break; 1208 } 1209 case READ_CAPACITY: 1210 { 1211 struct scsi_read_capacity_data *rcd; 1212 1213 rcd = (struct scsi_read_capacity_data *)ccb->csio.data_ptr; 1214 bzero(rcd, sizeof(struct scsi_read_capacity_data)); 1215 scsi_ulto4b(gdt->sc_hdr[t].hd_size - 1, rcd->addr); 1216 scsi_ulto4b(GDT_SECTOR_SIZE, rcd->length); 1217 break; 1218 } 1219 default: 1220 GDT_DPRINTF(GDT_D_MISC, ("gdt_internal_cache_cmd(%d) unknown\n", 1221 ccb->csio.cdb_io.cdb_bytes[0])); 1222 break; 1223 } 1224 ccb->ccb_h.status = CAM_REQ_CMP; 1225 --gdt_stat.io_count_act; 1226 xpt_done(ccb); 1227 } 1228 1229 static void 1230 gdtmapmem(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error) 1231 { 1232 bus_addr_t *busaddrp; 1233 1234 busaddrp = (bus_addr_t *)arg; 1235 *busaddrp = dm_segs->ds_addr; 1236 } 1237 1238 static void 1239 gdtexecuteccb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error) 1240 { 1241 struct gdt_ccb *gccb; 1242 union ccb *ccb; 1243 struct gdt_softc *gdt; 1244 int i; 1245 1246 crit_enter(); 1247 1248 gccb = (struct gdt_ccb *)arg; 1249 ccb = gccb->gc_ccb; 1250 gdt = cam_sim_softc((struct cam_sim *)ccb->ccb_h.ccb_sim_ptr); 1251 1252 GDT_DPRINTF(GDT_D_CMD, ("gdtexecuteccb(%p, %p, %p, %d, %d)\n", 1253 gdt, gccb, dm_segs, nseg, error)); 1254 gdt_stat.sg_count_act = nseg; 1255 if (nseg > gdt_stat.sg_count_max) 1256 gdt_stat.sg_count_max = nseg; 1257 1258 /* Copy the segments into our SG list */ 1259 if (gccb->gc_service == GDT_CACHESERVICE) { 1260 for (i = 0; i < nseg; ++i) { 1261 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST + 1262 i * GDT_SG_SZ + GDT_SG_PTR, dm_segs->ds_addr); 1263 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST + 1264 i * GDT_SG_SZ + GDT_SG_LEN, dm_segs->ds_len); 1265 dm_segs++; 1266 } 1267 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_CANZ, 1268 nseg); 1269 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_CACHE_DESTADDR, 1270 0xffffffffUL); 1271 1272 gdt->sc_cmd_len = roundup(GDT_CMD_UNION + GDT_CACHE_SG_LST + 1273 nseg * GDT_SG_SZ, sizeof(u_int32_t)); 1274 } else { 1275 for (i = 0; i < nseg; ++i) { 1276 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST + 1277 i * GDT_SG_SZ + GDT_SG_PTR, dm_segs->ds_addr); 1278 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST + 1279 i * GDT_SG_SZ + GDT_SG_LEN, dm_segs->ds_len); 1280 dm_segs++; 1281 } 1282 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SG_RANZ, 1283 nseg); 1284 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_RAW_SDATA, 1285 0xffffffffUL); 1286 1287 gdt->sc_cmd_len = roundup(GDT_CMD_UNION + GDT_RAW_SG_LST + 1288 nseg * GDT_SG_SZ, sizeof(u_int32_t)); 1289 } 1290 1291 if (nseg != 0) { 1292 bus_dmasync_op_t op; 1293 1294 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 1295 op = BUS_DMASYNC_PREREAD; 1296 else 1297 op = BUS_DMASYNC_PREWRITE; 1298 bus_dmamap_sync(gdt->sc_buffer_dmat, gccb->gc_dmamap, op); 1299 } 1300 1301 /* We must NOT abort the command here if CAM_REQ_INPROG is not set, 1302 * because command semaphore is already set! 1303 */ 1304 1305 ccb->ccb_h.status |= CAM_SIM_QUEUED; 1306 /* timeout handling */ 1307 callout_reset(&ccb->ccb_h.timeout_ch, (ccb->ccb_h.timeout * hz) / 1000, 1308 iir_timeout, gccb); 1309 1310 gdt->sc_copy_cmd(gdt, gccb); 1311 crit_exit(); 1312 } 1313 1314 1315 static void 1316 iir_action( struct cam_sim *sim, union ccb *ccb ) 1317 { 1318 struct gdt_softc *gdt; 1319 int bus, target, lun; 1320 1321 gdt = (struct gdt_softc *)cam_sim_softc( sim ); 1322 ccb->ccb_h.ccb_sim_ptr = sim; 1323 bus = cam_sim_bus(sim); 1324 target = ccb->ccb_h.target_id; 1325 lun = ccb->ccb_h.target_lun; 1326 GDT_DPRINTF(GDT_D_CMD, 1327 ("iir_action(%p) func 0x%x cmd 0x%x bus %d target %d lun %d\n", 1328 gdt, ccb->ccb_h.func_code, ccb->csio.cdb_io.cdb_bytes[0], 1329 bus, target, lun)); 1330 ++gdt_stat.io_count_act; 1331 if (gdt_stat.io_count_act > gdt_stat.io_count_max) 1332 gdt_stat.io_count_max = gdt_stat.io_count_act; 1333 1334 switch (ccb->ccb_h.func_code) { 1335 case XPT_SCSI_IO: 1336 crit_enter(); 1337 TAILQ_INSERT_TAIL(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe); 1338 ++gdt_stat.req_queue_act; 1339 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max) 1340 gdt_stat.req_queue_max = gdt_stat.req_queue_act; 1341 crit_exit(); 1342 gdt_next(gdt); 1343 break; 1344 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 1345 case XPT_ABORT: /* Abort the specified CCB */ 1346 /* XXX Implement */ 1347 ccb->ccb_h.status = CAM_REQ_INVALID; 1348 --gdt_stat.io_count_act; 1349 xpt_done(ccb); 1350 break; 1351 case XPT_SET_TRAN_SETTINGS: 1352 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; 1353 --gdt_stat.io_count_act; 1354 xpt_done(ccb); 1355 break; 1356 case XPT_GET_TRAN_SETTINGS: 1357 /* Get default/user set transfer settings for the target */ 1358 { 1359 struct ccb_trans_settings *cts; 1360 u_int target_mask; 1361 1362 cts = &ccb->cts; 1363 target_mask = 0x01 << target; 1364 if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) { 1365 cts->flags = CCB_TRANS_DISC_ENB|CCB_TRANS_TAG_ENB; 1366 cts->bus_width = MSG_EXT_WDTR_BUS_16_BIT; 1367 cts->sync_period = 25; /* 10MHz */ 1368 if (cts->sync_period != 0) 1369 cts->sync_offset = 15; 1370 1371 cts->valid = CCB_TRANS_SYNC_RATE_VALID 1372 | CCB_TRANS_SYNC_OFFSET_VALID 1373 | CCB_TRANS_BUS_WIDTH_VALID 1374 | CCB_TRANS_DISC_VALID 1375 | CCB_TRANS_TQ_VALID; 1376 ccb->ccb_h.status = CAM_REQ_CMP; 1377 } else { 1378 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; 1379 } 1380 --gdt_stat.io_count_act; 1381 xpt_done(ccb); 1382 break; 1383 } 1384 case XPT_CALC_GEOMETRY: 1385 { 1386 struct ccb_calc_geometry *ccg; 1387 u_int32_t secs_per_cylinder; 1388 1389 ccg = &ccb->ccg; 1390 ccg->heads = gdt->sc_hdr[target].hd_heads; 1391 ccg->secs_per_track = gdt->sc_hdr[target].hd_secs; 1392 secs_per_cylinder = ccg->heads * ccg->secs_per_track; 1393 ccg->cylinders = ccg->volume_size / secs_per_cylinder; 1394 ccb->ccb_h.status = CAM_REQ_CMP; 1395 --gdt_stat.io_count_act; 1396 xpt_done(ccb); 1397 break; 1398 } 1399 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 1400 { 1401 /* XXX Implement */ 1402 ccb->ccb_h.status = CAM_REQ_CMP; 1403 --gdt_stat.io_count_act; 1404 xpt_done(ccb); 1405 break; 1406 } 1407 case XPT_TERM_IO: /* Terminate the I/O process */ 1408 /* XXX Implement */ 1409 ccb->ccb_h.status = CAM_REQ_INVALID; 1410 --gdt_stat.io_count_act; 1411 xpt_done(ccb); 1412 break; 1413 case XPT_PATH_INQ: /* Path routing inquiry */ 1414 { 1415 struct ccb_pathinq *cpi = &ccb->cpi; 1416 1417 cpi->version_num = 1; 1418 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE; 1419 cpi->hba_inquiry |= PI_WIDE_16; 1420 cpi->target_sprt = 1; 1421 cpi->hba_misc = 0; 1422 cpi->hba_eng_cnt = 0; 1423 if (bus == gdt->sc_virt_bus) 1424 cpi->max_target = GDT_MAX_HDRIVES - 1; 1425 else if (gdt->sc_class & GDT_FC) 1426 cpi->max_target = GDT_MAXID_FC - 1; 1427 else 1428 cpi->max_target = GDT_MAXID - 1; 1429 cpi->max_lun = 7; 1430 cpi->unit_number = cam_sim_unit(sim); 1431 cpi->bus_id = bus; 1432 cpi->initiator_id = 1433 (bus == gdt->sc_virt_bus ? 127 : gdt->sc_bus_id[bus]); 1434 cpi->base_transfer_speed = 3300; 1435 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1436 strncpy(cpi->hba_vid, "Intel Corp.", HBA_IDLEN); 1437 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 1438 cpi->ccb_h.status = CAM_REQ_CMP; 1439 --gdt_stat.io_count_act; 1440 xpt_done(ccb); 1441 break; 1442 } 1443 default: 1444 GDT_DPRINTF(GDT_D_INVALID, ("gdt_next(%p) cmd 0x%x invalid\n", 1445 gdt, ccb->ccb_h.func_code)); 1446 ccb->ccb_h.status = CAM_REQ_INVALID; 1447 --gdt_stat.io_count_act; 1448 xpt_done(ccb); 1449 break; 1450 } 1451 } 1452 1453 static void 1454 iir_poll( struct cam_sim *sim ) 1455 { 1456 struct gdt_softc *gdt; 1457 1458 gdt = (struct gdt_softc *)cam_sim_softc( sim ); 1459 GDT_DPRINTF(GDT_D_CMD, ("iir_poll sim %p gdt %p\n", sim, gdt)); 1460 iir_intr(gdt); 1461 } 1462 1463 static void 1464 iir_timeout(void *arg) 1465 { 1466 GDT_DPRINTF(GDT_D_TIMEOUT, ("iir_timeout(%p)\n", arg)); 1467 } 1468 1469 static void 1470 iir_watchdog(void *arg) 1471 { 1472 struct gdt_softc *gdt; 1473 1474 gdt = (struct gdt_softc *)arg; 1475 GDT_DPRINTF(GDT_D_DEBUG, ("iir_watchdog(%p)\n", gdt)); 1476 1477 { 1478 int ccbs = 0, ucmds = 0, frees = 0, pends = 0; 1479 struct gdt_ccb *p; 1480 struct ccb_hdr *h; 1481 struct gdt_ucmd *u; 1482 1483 for (h = TAILQ_FIRST(&gdt->sc_ccb_queue); h != NULL; 1484 h = TAILQ_NEXT(h, sim_links.tqe)) 1485 ccbs++; 1486 for (u = TAILQ_FIRST(&gdt->sc_ucmd_queue); u != NULL; 1487 u = TAILQ_NEXT(u, links)) 1488 ucmds++; 1489 for (p = SLIST_FIRST(&gdt->sc_free_gccb); p != NULL; 1490 p = SLIST_NEXT(p, sle)) 1491 frees++; 1492 for (p = SLIST_FIRST(&gdt->sc_pending_gccb); p != NULL; 1493 p = SLIST_NEXT(p, sle)) 1494 pends++; 1495 1496 GDT_DPRINTF(GDT_D_TIMEOUT, ("ccbs %d ucmds %d frees %d pends %d\n", 1497 ccbs, ucmds, frees, pends)); 1498 } 1499 1500 callout_reset(&gdt->watchdog_timer, hz * 15, iir_watchdog, gdt); 1501 } 1502 1503 static void 1504 iir_shutdown( void *arg, int howto ) 1505 { 1506 struct gdt_softc *gdt; 1507 struct gdt_ccb *gccb; 1508 gdt_ucmd_t *ucmd; 1509 int i; 1510 1511 gdt = (struct gdt_softc *)arg; 1512 GDT_DPRINTF(GDT_D_CMD, ("iir_shutdown(%p, %d)\n", gdt, howto)); 1513 1514 printf("iir%d: Flushing all Host Drives. Please wait ... ", 1515 gdt->sc_hanum); 1516 1517 /* allocate ucmd buffer */ 1518 ucmd = malloc(sizeof(gdt_ucmd_t), M_DEVBUF, M_INTWAIT | M_ZERO); 1519 1520 /* wait for pending IOs */ 1521 crit_enter(); 1522 gdt->sc_state = GDT_SHUTDOWN; 1523 crit_exit(); 1524 if ((gccb = SLIST_FIRST(&gdt->sc_pending_gccb)) != NULL) 1525 (void) tsleep((void *)gccb, PCATCH, "iirshw", 100 * hz); 1526 1527 /* flush */ 1528 for (i = 0; i < GDT_MAX_HDRIVES; ++i) { 1529 if (gdt->sc_hdr[i].hd_present) { 1530 ucmd->service = GDT_CACHESERVICE; 1531 ucmd->OpCode = GDT_FLUSH; 1532 ucmd->u.cache.DeviceNo = i; 1533 crit_enter(); 1534 TAILQ_INSERT_TAIL(&gdt->sc_ucmd_queue, ucmd, links); 1535 ucmd->complete_flag = FALSE; 1536 crit_exit(); 1537 gdt_next(gdt); 1538 if (!ucmd->complete_flag) 1539 (void) tsleep((void *)ucmd, PCATCH, "iirshw", 10*hz); 1540 } 1541 } 1542 1543 free(ucmd, M_DEVBUF); 1544 printf("Done.\n"); 1545 } 1546 1547 void 1548 iir_intr(void *arg) 1549 { 1550 struct gdt_softc *gdt = arg; 1551 struct gdt_intr_ctx ctx; 1552 struct gdt_ccb *gccb; 1553 gdt_ucmd_t *ucmd; 1554 u_int32_t cnt; 1555 1556 GDT_DPRINTF(GDT_D_INTR, ("gdt_intr(%p)\n", gdt)); 1557 1558 /* If polling and we were not called from gdt_wait, just return */ 1559 if ((gdt->sc_state & GDT_POLLING) && 1560 !(gdt->sc_state & GDT_POLL_WAIT)) 1561 return; 1562 1563 if (!(gdt->sc_state & GDT_POLLING)) 1564 crit_enter(); 1565 gdt_wait_index = 0; 1566 1567 ctx.istatus = gdt->sc_get_status(gdt); 1568 if (!ctx.istatus) { 1569 if (!(gdt->sc_state & GDT_POLLING)) 1570 crit_exit(); 1571 gdt->sc_status = GDT_S_NO_STATUS; 1572 return; 1573 } 1574 1575 gdt->sc_intr(gdt, &ctx); 1576 1577 gdt->sc_status = ctx.cmd_status; 1578 gdt->sc_service = ctx.service; 1579 gdt->sc_info = ctx.info; 1580 gdt->sc_info2 = ctx.info2; 1581 1582 if (gdt->sc_state & GDT_POLL_WAIT) { 1583 gdt_wait_gdt = gdt; 1584 gdt_wait_index = ctx.istatus; 1585 } 1586 1587 if (ctx.istatus == GDT_ASYNCINDEX) { 1588 gdt_async_event(gdt, ctx.service); 1589 if (!(gdt->sc_state & GDT_POLLING)) 1590 crit_exit(); 1591 return; 1592 } 1593 if (ctx.istatus == GDT_SPEZINDEX) { 1594 GDT_DPRINTF(GDT_D_INVALID, 1595 ("iir%d: Service unknown or not initialized!\n", 1596 gdt->sc_hanum)); 1597 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.driver); 1598 gdt->sc_dvr.eu.driver.ionode = gdt->sc_hanum; 1599 gdt_store_event(GDT_ES_DRIVER, 4, &gdt->sc_dvr); 1600 if (!(gdt->sc_state & GDT_POLLING)) 1601 crit_exit(); 1602 return; 1603 } 1604 1605 gccb = &gdt->sc_gccbs[ctx.istatus - 2]; 1606 ctx.service = gccb->gc_service; 1607 1608 switch (gccb->gc_flags) { 1609 case GDT_GCF_UNUSED: 1610 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: Index (%d) to unused command!\n", 1611 gdt->sc_hanum, ctx.istatus)); 1612 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.driver); 1613 gdt->sc_dvr.eu.driver.ionode = gdt->sc_hanum; 1614 gdt->sc_dvr.eu.driver.index = ctx.istatus; 1615 gdt_store_event(GDT_ES_DRIVER, 1, &gdt->sc_dvr); 1616 gdt_free_ccb(gdt, gccb); 1617 /* fallthrough */ 1618 1619 case GDT_GCF_INTERNAL: 1620 if (!(gdt->sc_state & GDT_POLLING)) 1621 crit_exit(); 1622 break; 1623 1624 case GDT_GCF_IOCTL: 1625 ucmd = gccb->gc_ucmd; 1626 if (gdt->sc_status == GDT_S_BSY) { 1627 GDT_DPRINTF(GDT_D_DEBUG, ("iir_intr(%p) ioctl: gccb %p busy\n", 1628 gdt, gccb)); 1629 TAILQ_INSERT_HEAD(&gdt->sc_ucmd_queue, ucmd, links); 1630 if (!(gdt->sc_state & GDT_POLLING)) 1631 crit_exit(); 1632 } else { 1633 ucmd->status = gdt->sc_status; 1634 ucmd->info = gdt->sc_info; 1635 ucmd->complete_flag = TRUE; 1636 if (ucmd->service == GDT_CACHESERVICE) { 1637 if (ucmd->OpCode == GDT_IOCTL) { 1638 cnt = ucmd->u.ioctl.param_size; 1639 if (cnt != 0) 1640 bcopy(gccb->gc_scratch, ucmd->data, cnt); 1641 } else { 1642 cnt = ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE; 1643 if (cnt != 0) 1644 bcopy(gccb->gc_scratch, ucmd->data, cnt); 1645 } 1646 } else { 1647 cnt = ucmd->u.raw.sdlen; 1648 if (cnt != 0) 1649 bcopy(gccb->gc_scratch, ucmd->data, cnt); 1650 if (ucmd->u.raw.sense_len != 0) 1651 bcopy(gccb->gc_scratch, ucmd->data, cnt); 1652 } 1653 gdt_free_ccb(gdt, gccb); 1654 if (!(gdt->sc_state & GDT_POLLING)) 1655 crit_exit(); 1656 /* wakeup */ 1657 wakeup(ucmd); 1658 } 1659 gdt_next(gdt); 1660 break; 1661 1662 default: 1663 gdt_free_ccb(gdt, gccb); 1664 gdt_sync_event(gdt, ctx.service, ctx.istatus, gccb); 1665 if (!(gdt->sc_state & GDT_POLLING)) 1666 crit_exit(); 1667 gdt_next(gdt); 1668 break; 1669 } 1670 } 1671 1672 int 1673 gdt_async_event(struct gdt_softc *gdt, int service) 1674 { 1675 struct gdt_ccb *gccb; 1676 1677 GDT_DPRINTF(GDT_D_INTR, ("gdt_async_event(%p, %d)\n", gdt, service)); 1678 1679 if (service == GDT_SCREENSERVICE) { 1680 if (gdt->sc_status == GDT_MSG_REQUEST) { 1681 while (gdt->sc_test_busy(gdt)) 1682 DELAY(1); 1683 bzero(gdt->sc_cmd, GDT_CMD_SZ); 1684 gccb = gdt_get_ccb(gdt); 1685 if (gccb == NULL) { 1686 printf("iir%d: No free command index found\n", 1687 gdt->sc_hanum); 1688 return (1); 1689 } 1690 gccb->gc_service = service; 1691 gccb->gc_flags = GDT_GCF_SCREEN; 1692 gdt->sc_set_sema0(gdt); 1693 gdt_enc32(gdt->sc_cmd + GDT_CMD_COMMANDINDEX, 1694 gccb->gc_cmd_index); 1695 gdt_enc16(gdt->sc_cmd + GDT_CMD_OPCODE, GDT_READ); 1696 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE, 1697 GDT_MSG_INV_HANDLE); 1698 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR, 1699 gdt_ccb_vtop(gdt, gccb) + 1700 offsetof(struct gdt_ccb, gc_scratch[0])); 1701 gdt->sc_cmd_off = 0; 1702 gdt->sc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ, 1703 sizeof(u_int32_t)); 1704 gdt->sc_cmd_cnt = 0; 1705 gdt->sc_copy_cmd(gdt, gccb); 1706 printf("iir%d: [PCI %d/%d] ", 1707 gdt->sc_hanum,gdt->sc_bus,gdt->sc_slot); 1708 gdt->sc_release_event(gdt); 1709 } 1710 1711 } else { 1712 if ((gdt->sc_fw_vers & 0xff) >= 0x1a) { 1713 gdt->sc_dvr.size = 0; 1714 gdt->sc_dvr.eu.async.ionode = gdt->sc_hanum; 1715 gdt->sc_dvr.eu.async.status = gdt->sc_status; 1716 /* severity and event_string already set! */ 1717 } else { 1718 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.async); 1719 gdt->sc_dvr.eu.async.ionode = gdt->sc_hanum; 1720 gdt->sc_dvr.eu.async.service = service; 1721 gdt->sc_dvr.eu.async.status = gdt->sc_status; 1722 gdt->sc_dvr.eu.async.info = gdt->sc_info; 1723 *(u_int32_t *)gdt->sc_dvr.eu.async.scsi_coord = gdt->sc_info2; 1724 } 1725 gdt_store_event(GDT_ES_ASYNC, service, &gdt->sc_dvr); 1726 printf("iir%d: %s\n", gdt->sc_hanum, gdt->sc_dvr.event_string); 1727 } 1728 1729 return (0); 1730 } 1731 1732 int 1733 gdt_sync_event(struct gdt_softc *gdt, int service, 1734 u_int8_t index, struct gdt_ccb *gccb) 1735 { 1736 union ccb *ccb; 1737 bus_dmasync_op_t op; 1738 1739 GDT_DPRINTF(GDT_D_INTR, 1740 ("gdt_sync_event(%p, %d, %d, %p)\n", gdt,service,index,gccb)); 1741 1742 ccb = gccb->gc_ccb; 1743 1744 if (service == GDT_SCREENSERVICE) { 1745 u_int32_t msg_len; 1746 1747 msg_len = gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_LEN); 1748 if (msg_len) 1749 if (!(gccb->gc_scratch[GDT_SCR_MSG_ANSWER] && 1750 gccb->gc_scratch[GDT_SCR_MSG_EXT])) { 1751 gccb->gc_scratch[GDT_SCR_MSG_TEXT + msg_len] = '\0'; 1752 printf("%s",&gccb->gc_scratch[GDT_SCR_MSG_TEXT]); 1753 } 1754 1755 if (gccb->gc_scratch[GDT_SCR_MSG_EXT] && 1756 !gccb->gc_scratch[GDT_SCR_MSG_ANSWER]) { 1757 while (gdt->sc_test_busy(gdt)) 1758 DELAY(1); 1759 bzero(gdt->sc_cmd, GDT_CMD_SZ); 1760 gccb = gdt_get_ccb(gdt); 1761 if (gccb == NULL) { 1762 printf("iir%d: No free command index found\n", 1763 gdt->sc_hanum); 1764 return (1); 1765 } 1766 gccb->gc_service = service; 1767 gccb->gc_flags = GDT_GCF_SCREEN; 1768 gdt->sc_set_sema0(gdt); 1769 gdt_enc32(gdt->sc_cmd + GDT_CMD_COMMANDINDEX, 1770 gccb->gc_cmd_index); 1771 gdt_enc16(gdt->sc_cmd + GDT_CMD_OPCODE, GDT_READ); 1772 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE, 1773 gccb->gc_scratch[GDT_SCR_MSG_HANDLE]); 1774 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR, 1775 gdt_ccb_vtop(gdt, gccb) + 1776 offsetof(struct gdt_ccb, gc_scratch[0])); 1777 gdt->sc_cmd_off = 0; 1778 gdt->sc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ, 1779 sizeof(u_int32_t)); 1780 gdt->sc_cmd_cnt = 0; 1781 gdt->sc_copy_cmd(gdt, gccb); 1782 gdt->sc_release_event(gdt); 1783 return (0); 1784 } 1785 1786 if (gccb->gc_scratch[GDT_SCR_MSG_ANSWER] && 1787 gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN)) { 1788 /* default answers (getchar() not possible) */ 1789 if (gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN) == 1) { 1790 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_ALEN, 0); 1791 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_LEN, 1); 1792 gccb->gc_scratch[GDT_SCR_MSG_TEXT] = 0; 1793 } else { 1794 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_ALEN, 1795 gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN) - 2); 1796 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_LEN, 2); 1797 gccb->gc_scratch[GDT_SCR_MSG_TEXT] = 1; 1798 gccb->gc_scratch[GDT_SCR_MSG_TEXT + 1] = 0; 1799 } 1800 gccb->gc_scratch[GDT_SCR_MSG_EXT] = 0; 1801 gccb->gc_scratch[GDT_SCR_MSG_ANSWER] = 0; 1802 while (gdt->sc_test_busy(gdt)) 1803 DELAY(1); 1804 bzero(gdt->sc_cmd, GDT_CMD_SZ); 1805 gccb = gdt_get_ccb(gdt); 1806 if (gccb == NULL) { 1807 printf("iir%d: No free command index found\n", 1808 gdt->sc_hanum); 1809 return (1); 1810 } 1811 gccb->gc_service = service; 1812 gccb->gc_flags = GDT_GCF_SCREEN; 1813 gdt->sc_set_sema0(gdt); 1814 gdt_enc32(gdt->sc_cmd + GDT_CMD_COMMANDINDEX, 1815 gccb->gc_cmd_index); 1816 gdt_enc16(gdt->sc_cmd + GDT_CMD_OPCODE, GDT_WRITE); 1817 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE, 1818 gccb->gc_scratch[GDT_SCR_MSG_HANDLE]); 1819 gdt_enc32(gdt->sc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR, 1820 gdt_ccb_vtop(gdt, gccb) + 1821 offsetof(struct gdt_ccb, gc_scratch[0])); 1822 gdt->sc_cmd_off = 0; 1823 gdt->sc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ, 1824 sizeof(u_int32_t)); 1825 gdt->sc_cmd_cnt = 0; 1826 gdt->sc_copy_cmd(gdt, gccb); 1827 gdt->sc_release_event(gdt); 1828 return (0); 1829 } 1830 printf("\n"); 1831 return (0); 1832 } else { 1833 callout_stop(&ccb->ccb_h.timeout_ch); 1834 if (gdt->sc_status == GDT_S_BSY) { 1835 GDT_DPRINTF(GDT_D_DEBUG, ("gdt_sync_event(%p) gccb %p busy\n", 1836 gdt, gccb)); 1837 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe); 1838 ++gdt_stat.req_queue_act; 1839 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max) 1840 gdt_stat.req_queue_max = gdt_stat.req_queue_act; 1841 return (2); 1842 } 1843 1844 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 1845 op = BUS_DMASYNC_POSTREAD; 1846 else 1847 op = BUS_DMASYNC_POSTWRITE; 1848 bus_dmamap_sync(gdt->sc_buffer_dmat, gccb->gc_dmamap, op); 1849 1850 ccb->csio.resid = 0; 1851 if (gdt->sc_status == GDT_S_OK) { 1852 ccb->ccb_h.status = CAM_REQ_CMP; 1853 } else { 1854 /* error */ 1855 if (gccb->gc_service == GDT_CACHESERVICE) { 1856 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR | CAM_AUTOSNS_VALID; 1857 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1858 bzero(&ccb->csio.sense_data, ccb->csio.sense_len); 1859 ccb->csio.sense_data.error_code = 1860 SSD_CURRENT_ERROR | SSD_ERRCODE_VALID; 1861 ccb->csio.sense_data.flags = SSD_KEY_NOT_READY; 1862 1863 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.sync); 1864 gdt->sc_dvr.eu.sync.ionode = gdt->sc_hanum; 1865 gdt->sc_dvr.eu.sync.service = service; 1866 gdt->sc_dvr.eu.sync.status = gdt->sc_status; 1867 gdt->sc_dvr.eu.sync.info = gdt->sc_info; 1868 gdt->sc_dvr.eu.sync.hostdrive = ccb->ccb_h.target_id; 1869 if (gdt->sc_status >= 0x8000) 1870 gdt_store_event(GDT_ES_SYNC, 0, &gdt->sc_dvr); 1871 else 1872 gdt_store_event(GDT_ES_SYNC, service, &gdt->sc_dvr); 1873 } else { 1874 /* raw service */ 1875 if (gdt->sc_status != GDT_S_RAW_SCSI || gdt->sc_info >= 0x100) { 1876 ccb->ccb_h.status = CAM_SEL_TIMEOUT; 1877 } else { 1878 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR|CAM_AUTOSNS_VALID; 1879 ccb->csio.scsi_status = gdt->sc_info; 1880 bcopy(gccb->gc_scratch, &ccb->csio.sense_data, 1881 ccb->csio.sense_len); 1882 } 1883 } 1884 } 1885 --gdt_stat.io_count_act; 1886 xpt_done(ccb); 1887 } 1888 return (0); 1889 } 1890 1891 /* Controller event handling functions */ 1892 gdt_evt_str *gdt_store_event(u_int16_t source, u_int16_t idx, 1893 gdt_evt_data *evt) 1894 { 1895 gdt_evt_str *e; 1896 struct timeval tv; 1897 1898 GDT_DPRINTF(GDT_D_MISC, ("gdt_store_event(%d, %d)\n", source, idx)); 1899 if (source == 0) /* no source -> no event */ 1900 return 0; 1901 1902 if (ebuffer[elastidx].event_source == source && 1903 ebuffer[elastidx].event_idx == idx && 1904 ((evt->size != 0 && ebuffer[elastidx].event_data.size != 0 && 1905 !memcmp((char *)&ebuffer[elastidx].event_data.eu, 1906 (char *)&evt->eu, evt->size)) || 1907 (evt->size == 0 && ebuffer[elastidx].event_data.size == 0 && 1908 !strcmp((char *)&ebuffer[elastidx].event_data.event_string, 1909 (char *)&evt->event_string)))) { 1910 e = &ebuffer[elastidx]; 1911 getmicrotime(&tv); 1912 e->last_stamp = tv.tv_sec; 1913 ++e->same_count; 1914 } else { 1915 if (ebuffer[elastidx].event_source != 0) { /* entry not free ? */ 1916 ++elastidx; 1917 if (elastidx == GDT_MAX_EVENTS) 1918 elastidx = 0; 1919 if (elastidx == eoldidx) { /* reached mark ? */ 1920 ++eoldidx; 1921 if (eoldidx == GDT_MAX_EVENTS) 1922 eoldidx = 0; 1923 } 1924 } 1925 e = &ebuffer[elastidx]; 1926 e->event_source = source; 1927 e->event_idx = idx; 1928 getmicrotime(&tv); 1929 e->first_stamp = e->last_stamp = tv.tv_sec; 1930 e->same_count = 1; 1931 e->event_data = *evt; 1932 e->application = 0; 1933 } 1934 return e; 1935 } 1936 1937 int gdt_read_event(int handle, gdt_evt_str *estr) 1938 { 1939 gdt_evt_str *e; 1940 int eindex; 1941 1942 GDT_DPRINTF(GDT_D_MISC, ("gdt_read_event(%d)\n", handle)); 1943 crit_enter(); 1944 if (handle == -1) 1945 eindex = eoldidx; 1946 else 1947 eindex = handle; 1948 estr->event_source = 0; 1949 1950 if (eindex >= GDT_MAX_EVENTS) { 1951 crit_exit(); 1952 return eindex; 1953 } 1954 e = &ebuffer[eindex]; 1955 if (e->event_source != 0) { 1956 if (eindex != elastidx) { 1957 if (++eindex == GDT_MAX_EVENTS) 1958 eindex = 0; 1959 } else { 1960 eindex = -1; 1961 } 1962 memcpy(estr, e, sizeof(gdt_evt_str)); 1963 } 1964 crit_exit(); 1965 return eindex; 1966 } 1967 1968 void gdt_readapp_event(u_int8_t application, gdt_evt_str *estr) 1969 { 1970 gdt_evt_str *e; 1971 int found = FALSE; 1972 int eindex; 1973 1974 GDT_DPRINTF(GDT_D_MISC, ("gdt_readapp_event(%d)\n", application)); 1975 crit_enter(); 1976 eindex = eoldidx; 1977 for (;;) { 1978 e = &ebuffer[eindex]; 1979 if (e->event_source == 0) 1980 break; 1981 if ((e->application & application) == 0) { 1982 e->application |= application; 1983 found = TRUE; 1984 break; 1985 } 1986 if (eindex == elastidx) 1987 break; 1988 if (++eindex == GDT_MAX_EVENTS) 1989 eindex = 0; 1990 } 1991 if (found) 1992 memcpy(estr, e, sizeof(gdt_evt_str)); 1993 else 1994 estr->event_source = 0; 1995 crit_exit(); 1996 } 1997 1998 void gdt_clear_events() 1999 { 2000 GDT_DPRINTF(GDT_D_MISC, ("gdt_clear_events\n")); 2001 2002 eoldidx = elastidx = 0; 2003 ebuffer[0].event_source = 0; 2004 } 2005