1 /*- 2 * Copyright (c) 2000, 2001 Michael Smith 3 * Copyright (c) 2000 BSDi 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD: src/sys/dev/mly/mlyvar.h,v 1.1.2.2 2001/03/05 20:17:24 msmith Exp $ 28 * $DragonFly: src/sys/dev/raid/mly/mlyvar.h,v 1.6 2005/06/10 17:10:26 swildner Exp $ 29 */ 30 31 #include <sys/thread2.h> 32 33 /******************************************************************************** 34 ******************************************************************************** 35 Driver Parameter Definitions 36 ******************************************************************************** 37 ********************************************************************************/ 38 39 /* 40 * The firmware interface allows for a 16-bit command identifier. A lookup 41 * table this size (256k) would be too expensive, so we cap ourselves at a 42 * reasonable limit. 43 */ 44 #define MLY_MAXCOMMANDS 256 /* max commands per controller */ 45 46 /* 47 * The firmware interface allows for a 16-bit s/g list length. We limit 48 * ourselves to a reasonable maximum and ensure alignment. 49 */ 50 #define MLY_MAXSGENTRIES 64 /* max S/G entries, limit 65535 */ 51 52 /******************************************************************************** 53 ******************************************************************************** 54 Cross-version Compatibility 55 ******************************************************************************** 56 ********************************************************************************/ 57 58 #if defined(__FreeBSD__) && __FreeBSD_version >= 500005 59 # include <sys/taskqueue.h> 60 #endif 61 62 #if defined(__DragonFly__) || __FreeBSD_version <= 500014 63 # include <machine/clock.h> 64 # undef offsetof 65 # define offsetof(type, field) ((size_t)(&((type *)0)->field)) 66 #endif 67 68 /******************************************************************************** 69 ******************************************************************************** 70 Driver Variable Definitions 71 ******************************************************************************** 72 ********************************************************************************/ 73 74 /* 75 * Debugging levels: 76 * 0 - quiet, only emit warnings 77 * 1 - noisy, emit major function points and things done 78 * 2 - extremely noisy, emit trace items in loops, etc. 79 */ 80 #ifdef MLY_DEBUG 81 # define debug(level, fmt, args...) do { if (level <= MLY_DEBUG) printf("%s: " fmt "\n", __func__ , ##args); } while(0) 82 # define debug_called(level) do { if (level <= MLY_DEBUG) printf(__func__ ": called\n"); } while(0) 83 # define debug_struct(s) printf(" SIZE %s: %d\n", #s, sizeof(struct s)) 84 # define debug_union(s) printf(" SIZE %s: %d\n", #s, sizeof(union s)) 85 # define debug_field(s, f) printf(" OFFSET %s.%s: %d\n", #s, #f, ((int)&(((struct s *)0)->f))) 86 extern void mly_printstate0(void); 87 extern struct mly_softc *mly_softc0; 88 #else 89 # define debug(level, fmt, args...) 90 # define debug_called(level) 91 # define debug_struct(s) 92 #endif 93 94 #define mly_printf(sc, fmt, args...) device_printf(sc->mly_dev, fmt , ##args) 95 96 /* 97 * Per-device structure, used to save persistent state on devices. 98 * 99 * Note that this isn't really Bus/Target/Lun since we don't support 100 * lun != 0 at this time. 101 */ 102 struct mly_btl { 103 int mb_flags; 104 #define MLY_BTL_PHYSICAL (1<<0) /* physical device */ 105 #define MLY_BTL_LOGICAL (1<<1) /* logical device */ 106 #define MLY_BTL_PROTECTED (1<<2) /* device is protected - I/O not allowed */ 107 #define MLY_BTL_RESCAN (1<<3) /* device needs to be rescanned */ 108 char mb_name[16]; /* peripheral attached to this device */ 109 int mb_state; /* see 8.1 */ 110 int mb_type; /* see 8.2 */ 111 112 /* physical devices only */ 113 int mb_speed; /* interface transfer rate */ 114 int mb_width; /* interface width */ 115 }; 116 117 /* 118 * Per-command control structure. 119 */ 120 struct mly_command { 121 TAILQ_ENTRY(mly_command) mc_link; /* list linkage */ 122 123 struct mly_softc *mc_sc; /* controller that owns us */ 124 u_int16_t mc_slot; /* command slot we occupy */ 125 int mc_flags; 126 #define MLY_CMD_BUSY (1<<0) /* command is being run, or ready to run, or not completed */ 127 #define MLY_CMD_COMPLETE (1<<1) /* command has been completed */ 128 #define MLY_CMD_MAPPED (1<<3) /* command has had its data mapped */ 129 #define MLY_CMD_DATAIN (1<<4) /* data moves controller->system */ 130 #define MLY_CMD_DATAOUT (1<<5) /* data moves system->controller */ 131 u_int16_t mc_status; /* command completion status */ 132 u_int8_t mc_sense; /* sense data length */ 133 int32_t mc_resid; /* I/O residual count */ 134 135 union mly_command_packet *mc_packet; /* our controller command */ 136 u_int64_t mc_packetphys; /* physical address of the mapped packet */ 137 138 void *mc_data; /* data buffer */ 139 size_t mc_length; /* data length */ 140 bus_dmamap_t mc_datamap; /* DMA map for data */ 141 142 void (* mc_complete)(struct mly_command *mc); /* completion handler */ 143 void *mc_private; /* caller-private data */ 144 145 }; 146 147 /* 148 * Command slot regulation. 149 * 150 * We can't use slot 0 due to the memory mailbox implementation. 151 */ 152 #define MLY_SLOT_START 1 153 #define MLY_SLOT_MAX (MLY_SLOT_START + MLY_MAXCOMMANDS) 154 155 /* 156 * Per-controller structure. 157 */ 158 struct mly_softc { 159 /* bus connections */ 160 device_t mly_dev; 161 dev_t mly_dev_t; 162 struct resource *mly_regs_resource; /* register interface window */ 163 int mly_regs_rid; /* resource ID */ 164 bus_space_handle_t mly_bhandle; /* bus space handle */ 165 bus_space_tag_t mly_btag; /* bus space tag */ 166 bus_dma_tag_t mly_parent_dmat; /* parent DMA tag */ 167 bus_dma_tag_t mly_buffer_dmat; /* data buffer/command DMA tag */ 168 struct resource *mly_irq; /* interrupt */ 169 int mly_irq_rid; 170 void *mly_intr; /* interrupt handle */ 171 172 /* scatter/gather lists and their controller-visible mappings */ 173 struct mly_sg_entry *mly_sg_table; /* s/g lists */ 174 u_int32_t mly_sg_busaddr; /* s/g table base address in bus space */ 175 bus_dma_tag_t mly_sg_dmat; /* s/g buffer DMA tag */ 176 bus_dmamap_t mly_sg_dmamap; /* map for s/g buffers */ 177 178 /* controller hardware interface */ 179 int mly_hwif; 180 #define MLY_HWIF_I960RX 0 181 #define MLY_HWIF_STRONGARM 1 182 u_int8_t mly_doorbell_true; /* xor map to make hardware doorbell 'true' bits into 1s */ 183 u_int8_t mly_command_mailbox; /* register offsets */ 184 u_int8_t mly_status_mailbox; 185 u_int8_t mly_idbr; 186 u_int8_t mly_odbr; 187 u_int8_t mly_error_status; 188 u_int8_t mly_interrupt_status; 189 u_int8_t mly_interrupt_mask; 190 struct mly_mmbox *mly_mmbox; /* kernel-space address of memory mailbox */ 191 u_int64_t mly_mmbox_busaddr; /* bus-space address of memory mailbox */ 192 bus_dma_tag_t mly_mmbox_dmat; /* memory mailbox DMA tag */ 193 bus_dmamap_t mly_mmbox_dmamap; /* memory mailbox DMA map */ 194 u_int32_t mly_mmbox_command_index; /* next index to use */ 195 u_int32_t mly_mmbox_status_index; /* index we next expect status at */ 196 197 /* controller features, limits and status */ 198 int mly_state; 199 #define MLY_STATE_SUSPEND (1<<0) 200 #define MLY_STATE_OPEN (1<<1) 201 #define MLY_STATE_INTERRUPTS_ON (1<<2) 202 #define MLY_STATE_MMBOX_ACTIVE (1<<3) 203 struct mly_ioctl_getcontrollerinfo *mly_controllerinfo; 204 struct mly_param_controller *mly_controllerparam; 205 struct mly_btl mly_btl[MLY_MAX_CHANNELS][MLY_MAX_TARGETS]; 206 207 /* command management */ 208 struct mly_command mly_command[MLY_MAXCOMMANDS]; /* commands */ 209 union mly_command_packet *mly_packet; /* command packets */ 210 bus_dma_tag_t mly_packet_dmat; /* packet DMA tag */ 211 bus_dmamap_t mly_packetmap; /* packet DMA map */ 212 u_int64_t mly_packetphys; /* packet array base address */ 213 TAILQ_HEAD(,mly_command) mly_free; /* commands available for reuse */ 214 TAILQ_HEAD(,mly_command) mly_ready; /* commands ready to be submitted */ 215 TAILQ_HEAD(,mly_command) mly_busy; 216 TAILQ_HEAD(,mly_command) mly_complete; /* commands which have been returned by the controller */ 217 struct mly_qstat mly_qstat[MLYQ_COUNT]; /* queue statistics */ 218 219 /* health monitoring */ 220 u_int32_t mly_event_change; /* event status change indicator */ 221 u_int32_t mly_event_counter; /* next event for which we anticpiate status */ 222 u_int32_t mly_event_waiting; /* next event the controller will post status for */ 223 struct callout mly_periodic; /* periodic event handling */ 224 225 /* CAM connection */ 226 TAILQ_HEAD(,ccb_hdr) mly_cam_ccbq; /* outstanding I/O from CAM */ 227 struct cam_sim *mly_cam_sim[MLY_MAX_CHANNELS]; 228 int mly_cam_lowbus; 229 230 #if defined(__FreeBSD__) && __FreeBSD_version >= 500005 231 /* command-completion task */ 232 struct task mly_task_complete; /* deferred-completion task */ 233 #endif 234 }; 235 236 /* 237 * Register access helpers. 238 */ 239 #define MLY_SET_REG(sc, reg, val) bus_space_write_1(sc->mly_btag, sc->mly_bhandle, reg, val) 240 #define MLY_GET_REG(sc, reg) bus_space_read_1 (sc->mly_btag, sc->mly_bhandle, reg) 241 #define MLY_GET_REG2(sc, reg) bus_space_read_2 (sc->mly_btag, sc->mly_bhandle, reg) 242 #define MLY_GET_REG4(sc, reg) bus_space_read_4 (sc->mly_btag, sc->mly_bhandle, reg) 243 244 #define MLY_SET_MBOX(sc, mbox, ptr) \ 245 do { \ 246 bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox, *((u_int32_t *)ptr)); \ 247 bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox + 4, *((u_int32_t *)ptr + 1)); \ 248 bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox + 8, *((u_int32_t *)ptr + 2)); \ 249 bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox + 12, *((u_int32_t *)ptr + 3)); \ 250 } while(0); 251 #define MLY_GET_MBOX(sc, mbox, ptr) \ 252 do { \ 253 *((u_int32_t *)ptr) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox); \ 254 *((u_int32_t *)ptr + 1) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 4); \ 255 *((u_int32_t *)ptr + 2) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 8); \ 256 *((u_int32_t *)ptr + 3) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 12); \ 257 } while(0); 258 259 #define MLY_IDBR_TRUE(sc, mask) \ 260 ((((MLY_GET_REG((sc), (sc)->mly_idbr)) ^ (sc)->mly_doorbell_true) & (mask)) == (mask)) 261 #define MLY_ODBR_TRUE(sc, mask) \ 262 ((MLY_GET_REG((sc), (sc)->mly_odbr) & (mask)) == (mask)) 263 #define MLY_ERROR_VALID(sc) \ 264 ((((MLY_GET_REG((sc), (sc)->mly_error_status)) ^ (sc)->mly_doorbell_true) & (MLY_MSG_EMPTY)) == 0) 265 266 #define MLY_MASK_INTERRUPTS(sc) \ 267 do { \ 268 MLY_SET_REG((sc), (sc)->mly_interrupt_mask, MLY_INTERRUPT_MASK_DISABLE); \ 269 sc->mly_state &= ~MLY_STATE_INTERRUPTS_ON; \ 270 } while(0); 271 #define MLY_UNMASK_INTERRUPTS(sc) \ 272 do { \ 273 MLY_SET_REG((sc), (sc)->mly_interrupt_mask, MLY_INTERRUPT_MASK_ENABLE); \ 274 sc->mly_state |= MLY_STATE_INTERRUPTS_ON; \ 275 } while(0); 276 277 /* 278 * Logical device number -> bus/target translation 279 */ 280 #define MLY_LOGDEV_BUS(sc, x) (((x) / MLY_MAX_TARGETS) + (sc)->mly_controllerinfo->physical_channels_present) 281 #define MLY_LOGDEV_TARGET(x) ((x) % MLY_MAX_TARGETS) 282 283 /* 284 * Public functions/variables 285 */ 286 /* mly.c */ 287 extern int mly_attach(struct mly_softc *sc); 288 extern void mly_detach(struct mly_softc *sc); 289 extern void mly_free(struct mly_softc *sc); 290 extern void mly_startio(struct mly_softc *sc); 291 extern void mly_done(struct mly_softc *sc); 292 extern int mly_alloc_command(struct mly_softc *sc, struct mly_command **mcp); 293 extern void mly_release_command(struct mly_command *mc); 294 295 /* mly_cam.c */ 296 extern int mly_cam_attach(struct mly_softc *sc); 297 extern void mly_cam_detach(struct mly_softc *sc); 298 extern int mly_cam_command(struct mly_softc *sc, struct mly_command **mcp); 299 extern int mly_name_device(struct mly_softc *sc, int bus, int target); 300 301 /******************************************************************************** 302 * Queue primitives 303 */ 304 305 #define MLYQ_ADD(sc, qname) \ 306 do { \ 307 struct mly_qstat *qs = &(sc)->mly_qstat[qname]; \ 308 \ 309 qs->q_length++; \ 310 if (qs->q_length > qs->q_max) \ 311 qs->q_max = qs->q_length; \ 312 } while(0) 313 314 #define MLYQ_REMOVE(sc, qname) (sc)->mly_qstat[qname].q_length-- 315 #define MLYQ_INIT(sc, qname) \ 316 do { \ 317 sc->mly_qstat[qname].q_length = 0; \ 318 sc->mly_qstat[qname].q_max = 0; \ 319 } while(0) 320 321 322 #define MLYQ_COMMAND_QUEUE(name, index) \ 323 static __inline void \ 324 mly_initq_ ## name (struct mly_softc *sc) \ 325 { \ 326 TAILQ_INIT(&sc->mly_ ## name); \ 327 MLYQ_INIT(sc, index); \ 328 } \ 329 static __inline void \ 330 mly_enqueue_ ## name (struct mly_command *mc) \ 331 { \ 332 crit_enter(); \ 333 TAILQ_INSERT_TAIL(&mc->mc_sc->mly_ ## name, mc, mc_link); \ 334 MLYQ_ADD(mc->mc_sc, index); \ 335 crit_exit(); \ 336 } \ 337 static __inline void \ 338 mly_requeue_ ## name (struct mly_command *mc) \ 339 { \ 340 crit_enter(); \ 341 TAILQ_INSERT_HEAD(&mc->mc_sc->mly_ ## name, mc, mc_link); \ 342 MLYQ_ADD(mc->mc_sc, index); \ 343 crit_exit(); \ 344 } \ 345 static __inline struct mly_command * \ 346 mly_dequeue_ ## name (struct mly_softc *sc) \ 347 { \ 348 struct mly_command *mc; \ 349 \ 350 crit_enter(); \ 351 if ((mc = TAILQ_FIRST(&sc->mly_ ## name)) != NULL) { \ 352 TAILQ_REMOVE(&sc->mly_ ## name, mc, mc_link); \ 353 MLYQ_REMOVE(sc, index); \ 354 } \ 355 crit_exit(); \ 356 return(mc); \ 357 } \ 358 static __inline void \ 359 mly_remove_ ## name (struct mly_command *mc) \ 360 { \ 361 crit_enter(); \ 362 TAILQ_REMOVE(&mc->mc_sc->mly_ ## name, mc, mc_link); \ 363 MLYQ_REMOVE(mc->mc_sc, index); \ 364 crit_exit(); \ 365 } \ 366 struct hack 367 368 MLYQ_COMMAND_QUEUE(free, MLYQ_FREE); 369 MLYQ_COMMAND_QUEUE(ready, MLYQ_READY); 370 MLYQ_COMMAND_QUEUE(busy, MLYQ_BUSY); 371 MLYQ_COMMAND_QUEUE(complete, MLYQ_COMPLETE); 372 373