1 /*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by the University of 16 * California, Berkeley and its contributors. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * $FreeBSD: src/sys/isa/sio.c,v 1.291.2.35 2003/05/18 08:51:15 murray Exp $ 34 * $DragonFly: src/sys/dev/serial/sio/sio.c,v 1.12 2004/01/24 08:00:45 dillon Exp $ 35 * from: @(#)com.c 7.5 (Berkeley) 5/16/91 36 * from: i386/isa sio.c,v 1.234 37 */ 38 39 #include "opt_comconsole.h" 40 #include "opt_compat.h" 41 #include "opt_ddb.h" 42 #include "opt_sio.h" 43 #include "use_pci.h" 44 #ifdef __i386__ 45 #include "use_puc.h" 46 #endif 47 #include "use_sio.h" 48 49 /* 50 * Serial driver, based on 386BSD-0.1 com driver. 51 * Mostly rewritten to use pseudo-DMA. 52 * Works for National Semiconductor NS8250-NS16550AF UARTs. 53 * COM driver, based on HP dca driver. 54 * 55 * Changes for PC-Card integration: 56 * - Added PC-Card driver table and handlers 57 */ 58 #include <sys/param.h> 59 #include <sys/systm.h> 60 #include <sys/reboot.h> 61 #include <sys/malloc.h> 62 #include <sys/tty.h> 63 #include <sys/proc.h> 64 #include <sys/module.h> 65 #include <sys/conf.h> 66 #include <sys/dkstat.h> 67 #include <sys/fcntl.h> 68 #include <sys/interrupt.h> 69 #include <sys/kernel.h> 70 #include <sys/syslog.h> 71 #include <sys/sysctl.h> 72 #include <sys/bus.h> 73 #include <machine/bus_pio.h> 74 #include <machine/bus.h> 75 #include <sys/rman.h> 76 #include <sys/timepps.h> 77 78 #include <machine/limits.h> 79 80 #include <bus/isa/isareg.h> 81 #include <bus/isa/isavar.h> 82 #if NPCI > 0 83 #include <bus/pci/pcireg.h> 84 #include <bus/pci/pcivar.h> 85 #endif 86 #if NPUC > 0 87 #include <dev/misc/puc/pucvar.h> 88 #endif 89 #include <machine/lock.h> 90 91 #include <machine/clock.h> 92 #include <machine/ipl.h> 93 #ifndef SMP 94 #include <machine/lock.h> 95 #endif 96 #include <machine/resource.h> 97 98 #include "sioreg.h" 99 #include "sio_private.h" 100 101 #ifdef COM_ESP 102 #include "../ic_layer/esp.h" 103 #endif 104 105 #define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */ 106 107 #define CALLOUT_MASK 0x80 108 #define CONTROL_MASK 0x60 109 #define CONTROL_INIT_STATE 0x20 110 #define CONTROL_LOCK_STATE 0x40 111 #define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev))) 112 #define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \ 113 | ((mynor) & 0x1f)) 114 #define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \ 115 | ((unit) & 0x1f)) 116 117 #define com_scr 7 /* scratch register for 16450-16550 (R/W) */ 118 119 #define sio_getreg(com, off) \ 120 (bus_space_read_1((com)->bst, (com)->bsh, (off))) 121 #define sio_setreg(com, off, value) \ 122 (bus_space_write_1((com)->bst, (com)->bsh, (off), (value))) 123 124 /* 125 * com state bits. 126 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher 127 * than the other bits so that they can be tested as a group without masking 128 * off the low bits. 129 * 130 * The following com and tty flags correspond closely: 131 * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and 132 * comstop()) 133 * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart()) 134 * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam()) 135 * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam()) 136 * TS_FLUSH is not used. 137 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON. 138 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state). 139 */ 140 #define CS_BUSY 0x80 /* output in progress */ 141 #define CS_TTGO 0x40 /* output not stopped by XOFF */ 142 #define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */ 143 #define CS_CHECKMSR 1 /* check of MSR scheduled */ 144 #define CS_CTS_OFLOW 2 /* use CTS output flow control */ 145 #define CS_DTR_OFF 0x10 /* DTR held off */ 146 #define CS_ODONE 4 /* output completed */ 147 #define CS_RTS_IFLOW 8 /* use RTS input flow control */ 148 #define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */ 149 150 static char const * const error_desc[] = { 151 #define CE_OVERRUN 0 152 "silo overflow", 153 #define CE_INTERRUPT_BUF_OVERFLOW 1 154 "interrupt-level buffer overflow", 155 #define CE_TTY_BUF_OVERFLOW 2 156 "tty-level buffer overflow", 157 }; 158 159 #ifdef COM_ESP 160 static int espattach (struct com_s *com, Port_t esp_port); 161 #endif 162 static int sio_isa_attach (device_t dev); 163 164 static timeout_t siobusycheck; 165 static u_int siodivisor (u_long rclk, speed_t speed); 166 static timeout_t siodtrwakeup; 167 static void comhardclose (struct com_s *com); 168 static void sioinput (struct com_s *com); 169 static void siointr1 (struct com_s *com); 170 static void siointr (void *arg); 171 static int commctl (struct com_s *com, int bits, int how); 172 static int comparam (struct tty *tp, struct termios *t); 173 static inthand2_t siopoll; 174 static int sio_isa_probe (device_t dev); 175 static void siosettimeout (void); 176 static int siosetwater (struct com_s *com, speed_t speed); 177 static void comstart (struct tty *tp); 178 static void comstop (struct tty *tp, int rw); 179 static timeout_t comwakeup; 180 static void disc_optim (struct tty *tp, struct termios *t, 181 struct com_s *com); 182 183 #if NPCI > 0 184 static int sio_pci_attach (device_t dev); 185 static void sio_pci_kludge_unit (device_t dev); 186 static int sio_pci_probe (device_t dev); 187 #endif /* NPCI > 0 */ 188 189 #if NPUC > 0 190 static int sio_puc_attach (device_t dev); 191 static int sio_puc_probe (device_t dev); 192 #endif /* NPUC > 0 */ 193 194 static char driver_name[] = "sio"; 195 196 /* table and macro for fast conversion from a unit number to its com struct */ 197 devclass_t sio_devclass; 198 #define com_addr(unit) ((struct com_s *) \ 199 devclass_get_softc(sio_devclass, unit)) 200 201 static device_method_t sio_isa_methods[] = { 202 /* Device interface */ 203 DEVMETHOD(device_probe, sio_isa_probe), 204 DEVMETHOD(device_attach, sio_isa_attach), 205 206 { 0, 0 } 207 }; 208 209 static driver_t sio_isa_driver = { 210 driver_name, 211 sio_isa_methods, 212 sizeof(struct com_s), 213 }; 214 215 #if NPCI > 0 216 static device_method_t sio_pci_methods[] = { 217 /* Device interface */ 218 DEVMETHOD(device_probe, sio_pci_probe), 219 DEVMETHOD(device_attach, sio_pci_attach), 220 221 { 0, 0 } 222 }; 223 224 static driver_t sio_pci_driver = { 225 driver_name, 226 sio_pci_methods, 227 sizeof(struct com_s), 228 }; 229 #endif /* NPCI > 0 */ 230 231 #if NPUC > 0 232 static device_method_t sio_puc_methods[] = { 233 /* Device interface */ 234 DEVMETHOD(device_probe, sio_puc_probe), 235 DEVMETHOD(device_attach, sio_puc_attach), 236 237 { 0, 0 } 238 }; 239 240 static driver_t sio_puc_driver = { 241 driver_name, 242 sio_puc_methods, 243 sizeof(struct com_s), 244 }; 245 #endif /* NPUC > 0 */ 246 247 static d_open_t sioopen; 248 static d_close_t sioclose; 249 static d_read_t sioread; 250 static d_write_t siowrite; 251 static d_ioctl_t sioioctl; 252 253 #define CDEV_MAJOR 28 254 static struct cdevsw sio_cdevsw = { 255 /* name */ driver_name, 256 /* maj */ CDEV_MAJOR, 257 /* flags */ D_TTY | D_KQFILTER, 258 /* port */ NULL, 259 /* autoq */ 0, 260 261 /* open */ sioopen, 262 /* close */ sioclose, 263 /* read */ sioread, 264 /* write */ siowrite, 265 /* ioctl */ sioioctl, 266 /* poll */ ttypoll, 267 /* mmap */ nommap, 268 /* strategy */ nostrategy, 269 /* dump */ nodump, 270 /* psize */ nopsize, 271 /* kqfilter */ ttykqfilter 272 }; 273 274 int comconsole = -1; 275 static volatile speed_t comdefaultrate = CONSPEED; 276 static u_long comdefaultrclk = DEFAULT_RCLK; 277 SYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, ""); 278 #ifdef __alpha__ 279 static volatile speed_t gdbdefaultrate = CONSPEED; 280 #endif 281 static u_int com_events; /* input chars + weighted output completions */ 282 static Port_t siocniobase; 283 static int siocnunit; 284 static Port_t siogdbiobase; 285 static int siogdbunit = -1; 286 static bool_t sio_registered; 287 static int sio_timeout; 288 static int sio_timeouts_until_log; 289 static struct callout_handle sio_timeout_handle 290 = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle); 291 static int sio_numunits; 292 293 #ifdef COM_ESP 294 /* XXX configure this properly. */ 295 static Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, }; 296 static Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 }; 297 #endif 298 299 /* 300 * handle sysctl read/write requests for console speed 301 * 302 * In addition to setting comdefaultrate for I/O through /dev/console, 303 * also set the initial and lock values for the /dev/ttyXX device 304 * if there is one associated with the console. Finally, if the /dev/tty 305 * device has already been open, change the speed on the open running port 306 * itself. 307 */ 308 309 static int 310 sysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS) 311 { 312 int error, s; 313 speed_t newspeed; 314 struct com_s *com; 315 struct tty *tp; 316 317 newspeed = comdefaultrate; 318 319 error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req); 320 if (error || !req->newptr) 321 return (error); 322 323 comdefaultrate = newspeed; 324 325 if (comconsole < 0) /* serial console not selected? */ 326 return (0); 327 328 com = com_addr(comconsole); 329 if (com == NULL) 330 return (ENXIO); 331 332 /* 333 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX 334 * (note, the lock rates really are boolean -- if non-zero, disallow 335 * speed changes) 336 */ 337 com->it_in.c_ispeed = com->it_in.c_ospeed = 338 com->lt_in.c_ispeed = com->lt_in.c_ospeed = 339 com->it_out.c_ispeed = com->it_out.c_ospeed = 340 com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate; 341 342 /* 343 * if we're open, change the running rate too 344 */ 345 tp = com->tp; 346 if (tp && (tp->t_state & TS_ISOPEN)) { 347 tp->t_termios.c_ispeed = 348 tp->t_termios.c_ospeed = comdefaultrate; 349 s = spltty(); 350 error = comparam(tp, &tp->t_termios); 351 splx(s); 352 } 353 return error; 354 } 355 356 SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW, 357 0, 0, sysctl_machdep_comdefaultrate, "I", ""); 358 359 #if NPCI > 0 360 struct pci_ids { 361 u_int32_t type; 362 const char *desc; 363 int rid; 364 }; 365 366 static struct pci_ids pci_ids[] = { 367 { 0x100812b9, "3COM PCI FaxModem", 0x10 }, 368 { 0x2000131f, "CyberSerial (1-port) 16550", 0x10 }, 369 { 0x01101407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 }, 370 { 0x01111407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 }, 371 { 0x048011c1, "Lucent kermit based PCI Modem", 0x14 }, 372 { 0x95211415, "Oxford Semiconductor PCI Dual Port Serial", 0x10 }, 373 { 0x7101135e, "SeaLevel Ultra 530.PCI Single Port Serial", 0x18 }, 374 { 0x0000151f, "SmartLink 5634PCV SurfRider", 0x10 }, 375 { 0x98459710, "Netmos Nm9845 PCI Bridge with Dual UART", 0x10 }, 376 { 0x00000000, NULL, 0 } 377 }; 378 379 static int 380 sio_pci_attach(dev) 381 device_t dev; 382 { 383 u_int32_t type; 384 struct pci_ids *id; 385 386 type = pci_get_devid(dev); 387 id = pci_ids; 388 while (id->type && id->type != type) 389 id++; 390 if (id->desc == NULL) 391 return (ENXIO); 392 sio_pci_kludge_unit(dev); 393 return (sioattach(dev, id->rid, 0UL)); 394 } 395 396 /* 397 * Don't cut and paste this to other drivers. It is a horrible kludge 398 * which will fail to work and also be unnecessary in future versions. 399 */ 400 static void 401 sio_pci_kludge_unit(dev) 402 device_t dev; 403 { 404 devclass_t dc; 405 int err; 406 int start; 407 int unit; 408 409 unit = 0; 410 start = 0; 411 while (resource_int_value("sio", unit, "port", &start) == 0 && 412 start > 0) 413 unit++; 414 if (device_get_unit(dev) < unit) { 415 dc = device_get_devclass(dev); 416 while (devclass_get_device(dc, unit)) 417 unit++; 418 device_printf(dev, "moving to sio%d\n", unit); 419 err = device_set_unit(dev, unit); /* EVIL DO NOT COPY */ 420 if (err) 421 device_printf(dev, "error moving device %d\n", err); 422 } 423 } 424 425 static int 426 sio_pci_probe(dev) 427 device_t dev; 428 { 429 u_int32_t type; 430 struct pci_ids *id; 431 432 type = pci_get_devid(dev); 433 id = pci_ids; 434 while (id->type && id->type != type) 435 id++; 436 if (id->desc == NULL) 437 return (ENXIO); 438 device_set_desc(dev, id->desc); 439 return (sioprobe(dev, id->rid, 0UL)); 440 } 441 #endif /* NPCI > 0 */ 442 443 #if NPUC > 0 444 static int 445 sio_puc_attach(dev) 446 device_t dev; 447 { 448 u_int rclk; 449 450 if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ, 451 &rclk) != 0) 452 rclk = DEFAULT_RCLK; 453 return (sioattach(dev, 0, rclk)); 454 } 455 456 static int 457 sio_puc_probe(dev) 458 device_t dev; 459 { 460 u_int rclk; 461 462 if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ, 463 &rclk) != 0) 464 rclk = DEFAULT_RCLK; 465 return (sioprobe(dev, 0, rclk)); 466 } 467 #endif /* NPUC */ 468 469 static struct isa_pnp_id sio_ids[] = { 470 {0x0005d041, "Standard PC COM port"}, /* PNP0500 */ 471 {0x0105d041, "16550A-compatible COM port"}, /* PNP0501 */ 472 {0x0205d041, "Multiport serial device (non-intelligent 16550)"}, /* PNP0502 */ 473 {0x1005d041, "Generic IRDA-compatible device"}, /* PNP0510 */ 474 {0x1105d041, "Generic IRDA-compatible device"}, /* PNP0511 */ 475 /* Devices that do not have a compatid */ 476 {0x12206804, NULL}, /* ACH2012 - 5634BTS 56K Video Ready Modem */ 477 {0x7602a904, NULL}, /* AEI0276 - 56K v.90 Fax Modem (LKT) */ 478 {0x00007905, NULL}, /* AKY0000 - 56K Plug&Play Modem */ 479 {0x21107905, NULL}, /* AKY1021 - 56K Plug&Play Modem */ 480 {0x01405407, NULL}, /* AZT4001 - AZT3000 PnP SOUND DEVICE, MODEM */ 481 {0x56039008, NULL}, /* BDP0356 - Best Data 56x2 */ 482 {0x56159008, NULL}, /* BDP1556 - B.D. Smart One 56SPS,Voice Modem*/ 483 {0x36339008, NULL}, /* BDP3336 - Best Data Prods. 336F */ 484 {0x0014490a, NULL}, /* BRI1400 - Boca 33.6 PnP */ 485 {0x0015490a, NULL}, /* BRI1500 - Internal Fax Data */ 486 {0x0034490a, NULL}, /* BRI3400 - Internal ACF Modem */ 487 {0x0094490a, NULL}, /* BRI9400 - Boca K56Flex PnP */ 488 {0x00b4490a, NULL}, /* BRIB400 - Boca 56k PnP */ 489 {0x0030320d, NULL}, /* CIR3000 - Cirrus Logic V43 */ 490 {0x0100440e, NULL}, /* CRD0001 - Cardinal MVP288IV ? */ 491 {0x01308c0e, NULL}, /* CTL3001 - Creative Labs Phoneblaster */ 492 {0x36033610, NULL}, /* DAV0336 - DAVICOM 336PNP MODEM */ 493 {0x01009416, NULL}, /* ETT0001 - E-Tech Bullet 33k6 PnP */ 494 {0x0000aa1a, NULL}, /* FUJ0000 - FUJITSU Modem 33600 PNP/I2 */ 495 {0x1200c31e, NULL}, /* GVC0012 - VF1128HV-R9 (win modem?) */ 496 {0x0303c31e, NULL}, /* GVC0303 - MaxTech 33.6 PnP D/F/V */ 497 {0x0505c31e, NULL}, /* GVC0505 - GVC 56k Faxmodem */ 498 {0x0116c31e, NULL}, /* GVC1601 - Rockwell V.34 Plug & Play Modem */ 499 {0x0050c31e, NULL}, /* GVC5000 - some GVC modem */ 500 {0x3800f91e, NULL}, /* GWY0038 - Telepath with v.90 */ 501 {0x9062f91e, NULL}, /* GWY6290 - Telepath with x2 Technology */ 502 {0x8100e425, NULL}, /* IOD0081 - I-O DATA DEVICE,INC. IFML-560 */ 503 {0x21002534, NULL}, /* MAE0021 - Jetstream Int V.90 56k Voice Series 2*/ 504 {0x0000f435, NULL}, /* MOT0000 - Motorola ModemSURFR 33.6 Intern */ 505 {0x5015f435, NULL}, /* MOT1550 - Motorola ModemSURFR 56K Modem */ 506 {0xf015f435, NULL}, /* MOT15F0 - Motorola VoiceSURFR 56K Modem */ 507 {0x6045f435, NULL}, /* MOT4560 - Motorola ? */ 508 {0x61e7a338, NULL}, /* NECE761 - 33.6Modem */ 509 {0x08804f3f, NULL}, /* OZO8008 - Zoom (33.6k Modem) */ 510 {0x0f804f3f, NULL}, /* OZO800f - Zoom 2812 (56k Modem) */ 511 {0x39804f3f, NULL}, /* OZO8039 - Zoom 56k flex */ 512 {0x00914f3f, NULL}, /* OZO9100 - Zoom 2919 (K56 Faxmodem) */ 513 {0x3024a341, NULL}, /* PMC2430 - Pace 56 Voice Internal Modem */ 514 {0x1000eb49, NULL}, /* ROK0010 - Rockwell ? */ 515 {0x1200b23d, NULL}, /* RSS0012 - OMRON ME5614ISA */ 516 {0x5002734a, NULL}, /* RSS0250 - 5614Jx3(G) Internal Modem */ 517 {0x6202734a, NULL}, /* RSS0262 - 5614Jx3[G] V90+K56Flex Modem */ 518 {0x1010104d, NULL}, /* SHP1010 - Rockwell 33600bps Modem */ 519 {0xc100ad4d, NULL}, /* SMM00C1 - Leopard 56k PnP */ 520 {0x9012b04e, NULL}, /* SUP1290 - Supra ? */ 521 {0x1013b04e, NULL}, /* SUP1310 - SupraExpress 336i PnP */ 522 {0x8013b04e, NULL}, /* SUP1380 - SupraExpress 288i PnP Voice */ 523 {0x8113b04e, NULL}, /* SUP1381 - SupraExpress 336i PnP Voice */ 524 {0x5016b04e, NULL}, /* SUP1650 - Supra 336i Sp Intl */ 525 {0x7016b04e, NULL}, /* SUP1670 - Supra 336i V+ Intl */ 526 {0x7420b04e, NULL}, /* SUP2070 - Supra ? */ 527 {0x8020b04e, NULL}, /* SUP2080 - Supra ? */ 528 {0x8420b04e, NULL}, /* SUP2084 - SupraExpress 56i PnP */ 529 {0x7121b04e, NULL}, /* SUP2171 - SupraExpress 56i Sp? */ 530 {0x8024b04e, NULL}, /* SUP2480 - Supra ? */ 531 {0x01007256, NULL}, /* USR0001 - U.S. Robotics Inc., Sportster W */ 532 {0x02007256, NULL}, /* USR0002 - U.S. Robotics Inc. Sportster 33. */ 533 {0x04007256, NULL}, /* USR0004 - USR Sportster 14.4k */ 534 {0x06007256, NULL}, /* USR0006 - USR Sportster 33.6k */ 535 {0x11007256, NULL}, /* USR0011 - USR ? */ 536 {0x01017256, NULL}, /* USR0101 - USR ? */ 537 {0x30207256, NULL}, /* USR2030 - U.S.Robotics Inc. Sportster 560 */ 538 {0x50207256, NULL}, /* USR2050 - U.S.Robotics Inc. Sportster 33. */ 539 {0x70207256, NULL}, /* USR2070 - U.S.Robotics Inc. Sportster 560 */ 540 {0x30307256, NULL}, /* USR3030 - U.S. Robotics 56K FAX INT */ 541 {0x31307256, NULL}, /* USR3031 - U.S. Robotics 56K FAX INT */ 542 {0x50307256, NULL}, /* USR3050 - U.S. Robotics 56K FAX INT */ 543 {0x70307256, NULL}, /* USR3070 - U.S. Robotics 56K Voice INT */ 544 {0x90307256, NULL}, /* USR3090 - USR ? */ 545 {0x70917256, NULL}, /* USR9170 - U.S. Robotics 56K FAX INT */ 546 {0x90917256, NULL}, /* USR9190 - USR 56k Voice INT */ 547 {0x0300695c, NULL}, /* WCI0003 - Fax/Voice/Modem/Speakphone/Asvd */ 548 {0x01a0896a, NULL}, /* ZTIA001 - Zoom Internal V90 Faxmodem */ 549 {0x61f7896a, NULL}, /* ZTIF761 - Zoom ComStar 33.6 */ 550 {0} 551 }; 552 553 554 555 static int 556 sio_isa_probe(dev) 557 device_t dev; 558 { 559 /* Check isapnp ids */ 560 if (ISA_PNP_PROBE(device_get_parent(dev), dev, sio_ids) == ENXIO) 561 return (ENXIO); 562 return (sioprobe(dev, 0, 0UL)); 563 } 564 565 int 566 sioprobe(dev, xrid, rclk) 567 device_t dev; 568 int xrid; 569 u_long rclk; 570 { 571 #if 0 572 static bool_t already_init; 573 device_t xdev; 574 #endif 575 struct com_s *com; 576 u_int divisor; 577 bool_t failures[10]; 578 int fn; 579 device_t idev; 580 Port_t iobase; 581 intrmask_t irqmap[4]; 582 intrmask_t irqs; 583 u_char mcr_image; 584 int result; 585 u_long xirq; 586 u_int flags = device_get_flags(dev); 587 int rid; 588 struct resource *port; 589 590 rid = xrid; 591 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 592 0, ~0, IO_COMSIZE, RF_ACTIVE); 593 if (!port) 594 return (ENXIO); 595 596 com = device_get_softc(dev); 597 com->bst = rman_get_bustag(port); 598 com->bsh = rman_get_bushandle(port); 599 if (rclk == 0) 600 rclk = DEFAULT_RCLK; 601 com->rclk = rclk; 602 603 #if 0 604 /* 605 * XXX this is broken - when we are first called, there are no 606 * previously configured IO ports. We could hard code 607 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse. 608 * This code has been doing nothing since the conversion since 609 * "count" is zero the first time around. 610 */ 611 if (!already_init) { 612 /* 613 * Turn off MCR_IENABLE for all likely serial ports. An unused 614 * port with its MCR_IENABLE gate open will inhibit interrupts 615 * from any used port that shares the interrupt vector. 616 * XXX the gate enable is elsewhere for some multiports. 617 */ 618 device_t *devs; 619 int count, i, xioport; 620 621 devclass_get_devices(sio_devclass, &devs, &count); 622 for (i = 0; i < count; i++) { 623 xdev = devs[i]; 624 if (device_is_enabled(xdev) && 625 bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport, 626 NULL) == 0) 627 outb(xioport + com_mcr, 0); 628 } 629 free(devs, M_TEMP); 630 already_init = TRUE; 631 } 632 #endif 633 634 if (COM_LLCONSOLE(flags)) { 635 printf("sio%d: reserved for low-level i/o\n", 636 device_get_unit(dev)); 637 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 638 return (ENXIO); 639 } 640 641 /* 642 * If the device is on a multiport card and has an AST/4 643 * compatible interrupt control register, initialize this 644 * register and prepare to leave MCR_IENABLE clear in the mcr. 645 * Otherwise, prepare to set MCR_IENABLE in the mcr. 646 * Point idev to the device struct giving the correct id_irq. 647 * This is the struct for the master device if there is one. 648 */ 649 idev = dev; 650 mcr_image = MCR_IENABLE; 651 #ifdef COM_MULTIPORT 652 if (COM_ISMULTIPORT(flags)) { 653 Port_t xiobase; 654 u_long io; 655 656 idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags)); 657 if (idev == NULL) { 658 printf("sio%d: master device %d not configured\n", 659 device_get_unit(dev), COM_MPMASTER(flags)); 660 idev = dev; 661 } 662 if (!COM_NOTAST4(flags)) { 663 if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io, 664 NULL) == 0) { 665 xiobase = io; 666 if (bus_get_resource(idev, SYS_RES_IRQ, 0, 667 NULL, NULL) == 0) 668 outb(xiobase + com_scr, 0x80); 669 else 670 outb(xiobase + com_scr, 0); 671 } 672 mcr_image = 0; 673 } 674 } 675 #endif /* COM_MULTIPORT */ 676 if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0) 677 mcr_image = 0; 678 679 bzero(failures, sizeof failures); 680 iobase = rman_get_start(port); 681 682 /* 683 * We don't want to get actual interrupts, just masked ones. 684 * Interrupts from this line should already be masked in the ICU, 685 * but mask them in the processor as well in case there are some 686 * (misconfigured) shared interrupts. 687 */ 688 com_lock(); 689 /* EXTRA DELAY? */ 690 691 /* 692 * For the TI16754 chips, set prescaler to 1 (4 is often the 693 * default after-reset value) as otherwise it's impossible to 694 * get highest baudrates. 695 */ 696 if (COM_TI16754(flags)) { 697 u_char cfcr, efr; 698 699 cfcr = sio_getreg(com, com_cfcr); 700 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 701 efr = sio_getreg(com, com_efr); 702 /* Unlock extended features to turn off prescaler. */ 703 sio_setreg(com, com_efr, efr | EFR_EFE); 704 /* Disable EFR. */ 705 sio_setreg(com, com_cfcr, (cfcr != CFCR_EFR_ENABLE) ? cfcr : 0); 706 /* Turn off prescaler. */ 707 sio_setreg(com, com_mcr, 708 sio_getreg(com, com_mcr) & ~MCR_PRESCALE); 709 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 710 sio_setreg(com, com_efr, efr); 711 sio_setreg(com, com_cfcr, cfcr); 712 } 713 714 /* 715 * Initialize the speed and the word size and wait long enough to 716 * drain the maximum of 16 bytes of junk in device output queues. 717 * The speed is undefined after a master reset and must be set 718 * before relying on anything related to output. There may be 719 * junk after a (very fast) soft reboot and (apparently) after 720 * master reset. 721 * XXX what about the UART bug avoided by waiting in comparam()? 722 * We don't want to to wait long enough to drain at 2 bps. 723 */ 724 if (iobase == siocniobase) 725 DELAY((16 + 1) * 1000000 / (comdefaultrate / 10)); 726 else { 727 sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS); 728 divisor = siodivisor(rclk, SIO_TEST_SPEED); 729 sio_setreg(com, com_dlbl, divisor & 0xff); 730 sio_setreg(com, com_dlbh, divisor >> 8); 731 sio_setreg(com, com_cfcr, CFCR_8BITS); 732 DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10)); 733 } 734 735 /* 736 * Enable the interrupt gate and disable device interupts. This 737 * should leave the device driving the interrupt line low and 738 * guarantee an edge trigger if an interrupt can be generated. 739 */ 740 /* EXTRA DELAY? */ 741 sio_setreg(com, com_mcr, mcr_image); 742 sio_setreg(com, com_ier, 0); 743 DELAY(1000); /* XXX */ 744 irqmap[0] = isa_irq_pending(); 745 746 /* 747 * Attempt to set loopback mode so that we can send a null byte 748 * without annoying any external device. 749 */ 750 /* EXTRA DELAY? */ 751 sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK); 752 753 /* 754 * Attempt to generate an output interrupt. On 8250's, setting 755 * IER_ETXRDY generates an interrupt independent of the current 756 * setting and independent of whether the THR is empty. On 16450's, 757 * setting IER_ETXRDY generates an interrupt independent of the 758 * current setting. On 16550A's, setting IER_ETXRDY only 759 * generates an interrupt when IER_ETXRDY is not already set. 760 */ 761 sio_setreg(com, com_ier, IER_ETXRDY); 762 763 /* 764 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate 765 * an interrupt. They'd better generate one for actually doing 766 * output. Loopback may be broken on the same incompatibles but 767 * it's unlikely to do more than allow the null byte out. 768 */ 769 sio_setreg(com, com_data, 0); 770 DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10)); 771 772 /* 773 * Turn off loopback mode so that the interrupt gate works again 774 * (MCR_IENABLE was hidden). This should leave the device driving 775 * an interrupt line high. It doesn't matter if the interrupt 776 * line oscillates while we are not looking at it, since interrupts 777 * are disabled. 778 */ 779 /* EXTRA DELAY? */ 780 sio_setreg(com, com_mcr, mcr_image); 781 782 /* 783 * Some pcmcia cards have the "TXRDY bug", so we check everyone 784 * for IIR_TXRDY implementation ( Palido 321s, DC-1S... ) 785 */ 786 if (COM_NOPROBE(flags)) { 787 /* Reading IIR register twice */ 788 for (fn = 0; fn < 2; fn ++) { 789 DELAY(10000); 790 failures[6] = sio_getreg(com, com_iir); 791 } 792 /* Check IIR_TXRDY clear ? */ 793 result = 0; 794 if (failures[6] & IIR_TXRDY) { 795 /* Nop, Double check with clearing IER */ 796 sio_setreg(com, com_ier, 0); 797 if (sio_getreg(com, com_iir) & IIR_NOPEND) { 798 /* Ok. we're familia this gang */ 799 SET_FLAG(dev, COM_C_IIR_TXRDYBUG); 800 } else { 801 /* Unknown, Just omit this chip.. XXX */ 802 result = ENXIO; 803 sio_setreg(com, com_mcr, 0); 804 } 805 } else { 806 /* OK. this is well-known guys */ 807 CLR_FLAG(dev, COM_C_IIR_TXRDYBUG); 808 } 809 sio_setreg(com, com_ier, 0); 810 sio_setreg(com, com_cfcr, CFCR_8BITS); 811 com_unlock(); 812 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 813 return (iobase == siocniobase ? 0 : result); 814 } 815 816 /* 817 * Check that 818 * o the CFCR, IER and MCR in UART hold the values written to them 819 * (the values happen to be all distinct - this is good for 820 * avoiding false positive tests from bus echoes). 821 * o an output interrupt is generated and its vector is correct. 822 * o the interrupt goes away when the IIR in the UART is read. 823 */ 824 /* EXTRA DELAY? */ 825 failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS; 826 failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY; 827 failures[2] = sio_getreg(com, com_mcr) - mcr_image; 828 DELAY(10000); /* Some internal modems need this time */ 829 irqmap[1] = isa_irq_pending(); 830 failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY; 831 DELAY(1000); /* XXX */ 832 irqmap[2] = isa_irq_pending(); 833 failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 834 835 /* 836 * Turn off all device interrupts and check that they go off properly. 837 * Leave MCR_IENABLE alone. For ports without a master port, it gates 838 * the OUT2 output of the UART to 839 * the ICU input. Closing the gate would give a floating ICU input 840 * (unless there is another device driving it) and spurious interrupts. 841 * (On the system that this was first tested on, the input floats high 842 * and gives a (masked) interrupt as soon as the gate is closed.) 843 */ 844 sio_setreg(com, com_ier, 0); 845 sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */ 846 failures[7] = sio_getreg(com, com_ier); 847 DELAY(1000); /* XXX */ 848 irqmap[3] = isa_irq_pending(); 849 failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 850 851 com_unlock(); 852 853 irqs = irqmap[1] & ~irqmap[0]; 854 if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 && 855 ((1 << xirq) & irqs) == 0) 856 printf( 857 "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n", 858 device_get_unit(dev), xirq, irqs); 859 if (bootverbose) 860 printf("sio%d: irq maps: %#x %#x %#x %#x\n", 861 device_get_unit(dev), 862 irqmap[0], irqmap[1], irqmap[2], irqmap[3]); 863 864 result = 0; 865 for (fn = 0; fn < sizeof failures; ++fn) 866 if (failures[fn]) { 867 sio_setreg(com, com_mcr, 0); 868 result = ENXIO; 869 if (bootverbose) { 870 printf("sio%d: probe failed test(s):", 871 device_get_unit(dev)); 872 for (fn = 0; fn < sizeof failures; ++fn) 873 if (failures[fn]) 874 printf(" %d", fn); 875 printf("\n"); 876 } 877 break; 878 } 879 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 880 return (iobase == siocniobase ? 0 : result); 881 } 882 883 #ifdef COM_ESP 884 static int 885 espattach(com, esp_port) 886 struct com_s *com; 887 Port_t esp_port; 888 { 889 u_char dips; 890 u_char val; 891 892 /* 893 * Check the ESP-specific I/O port to see if we're an ESP 894 * card. If not, return failure immediately. 895 */ 896 if ((inb(esp_port) & 0xf3) == 0) { 897 printf(" port 0x%x is not an ESP board?\n", esp_port); 898 return (0); 899 } 900 901 /* 902 * We've got something that claims to be a Hayes ESP card. 903 * Let's hope so. 904 */ 905 906 /* Get the dip-switch configuration */ 907 outb(esp_port + ESP_CMD1, ESP_GETDIPS); 908 dips = inb(esp_port + ESP_STATUS1); 909 910 /* 911 * Bits 0,1 of dips say which COM port we are. 912 */ 913 if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03]) 914 printf(" : ESP"); 915 else { 916 printf(" esp_port has com %d\n", dips & 0x03); 917 return (0); 918 } 919 920 /* 921 * Check for ESP version 2.0 or later: bits 4,5,6 = 010. 922 */ 923 outb(esp_port + ESP_CMD1, ESP_GETTEST); 924 val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */ 925 val = inb(esp_port + ESP_STATUS2); 926 if ((val & 0x70) < 0x20) { 927 printf("-old (%o)", val & 0x70); 928 return (0); 929 } 930 931 /* 932 * Check for ability to emulate 16550: bit 7 == 1 933 */ 934 if ((dips & 0x80) == 0) { 935 printf(" slave"); 936 return (0); 937 } 938 939 /* 940 * Okay, we seem to be a Hayes ESP card. Whee. 941 */ 942 com->esp = TRUE; 943 com->esp_port = esp_port; 944 return (1); 945 } 946 #endif /* COM_ESP */ 947 948 static int 949 sio_isa_attach(dev) 950 device_t dev; 951 { 952 return (sioattach(dev, 0, 0UL)); 953 } 954 955 int 956 sioattach(dev, xrid, rclk) 957 device_t dev; 958 int xrid; 959 u_long rclk; 960 { 961 struct com_s *com; 962 #ifdef COM_ESP 963 Port_t *espp; 964 #endif 965 Port_t iobase; 966 int minorbase; 967 int unit; 968 u_int flags; 969 int rid; 970 struct resource *port; 971 int ret; 972 973 rid = xrid; 974 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 975 0, ~0, IO_COMSIZE, RF_ACTIVE); 976 if (!port) 977 return (ENXIO); 978 979 iobase = rman_get_start(port); 980 unit = device_get_unit(dev); 981 com = device_get_softc(dev); 982 flags = device_get_flags(dev); 983 984 if (unit >= sio_numunits) 985 sio_numunits = unit + 1; 986 /* 987 * sioprobe() has initialized the device registers as follows: 988 * o cfcr = CFCR_8BITS. 989 * It is most important that CFCR_DLAB is off, so that the 990 * data port is not hidden when we enable interrupts. 991 * o ier = 0. 992 * Interrupts are only enabled when the line is open. 993 * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible 994 * interrupt control register or the config specifies no irq. 995 * Keeping MCR_DTR and MCR_RTS off might stop the external 996 * device from sending before we are ready. 997 */ 998 bzero(com, sizeof *com); 999 com->unit = unit; 1000 com->ioportres = port; 1001 com->bst = rman_get_bustag(port); 1002 com->bsh = rman_get_bushandle(port); 1003 com->cfcr_image = CFCR_8BITS; 1004 com->dtr_wait = 3 * hz; 1005 com->loses_outints = COM_LOSESOUTINTS(flags) != 0; 1006 com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0; 1007 com->tx_fifo_size = 1; 1008 com->obufs[0].l_head = com->obuf1; 1009 com->obufs[1].l_head = com->obuf2; 1010 1011 com->data_port = iobase + com_data; 1012 com->int_id_port = iobase + com_iir; 1013 com->modem_ctl_port = iobase + com_mcr; 1014 com->mcr_image = inb(com->modem_ctl_port); 1015 com->line_status_port = iobase + com_lsr; 1016 com->modem_status_port = iobase + com_msr; 1017 com->intr_ctl_port = iobase + com_ier; 1018 1019 if (rclk == 0) 1020 rclk = DEFAULT_RCLK; 1021 com->rclk = rclk; 1022 1023 /* 1024 * We don't use all the flags from <sys/ttydefaults.h> since they 1025 * are only relevant for logins. It's important to have echo off 1026 * initially so that the line doesn't start blathering before the 1027 * echo flag can be turned off. 1028 */ 1029 com->it_in.c_iflag = 0; 1030 com->it_in.c_oflag = 0; 1031 com->it_in.c_cflag = TTYDEF_CFLAG; 1032 com->it_in.c_lflag = 0; 1033 if (unit == comconsole) { 1034 com->it_in.c_iflag = TTYDEF_IFLAG; 1035 com->it_in.c_oflag = TTYDEF_OFLAG; 1036 com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL; 1037 com->it_in.c_lflag = TTYDEF_LFLAG; 1038 com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL; 1039 com->lt_out.c_ispeed = com->lt_out.c_ospeed = 1040 com->lt_in.c_ispeed = com->lt_in.c_ospeed = 1041 com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate; 1042 } else 1043 com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED; 1044 if (siosetwater(com, com->it_in.c_ispeed) != 0) { 1045 com_unlock(); 1046 /* 1047 * Leave i/o resources allocated if this is a `cn'-level 1048 * console, so that other devices can't snarf them. 1049 */ 1050 if (iobase != siocniobase) 1051 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 1052 return (ENOMEM); 1053 } 1054 com_unlock(); 1055 termioschars(&com->it_in); 1056 com->it_out = com->it_in; 1057 1058 /* attempt to determine UART type */ 1059 printf("sio%d: type", unit); 1060 1061 1062 #ifdef COM_MULTIPORT 1063 if (!COM_ISMULTIPORT(flags) && !COM_IIR_TXRDYBUG(flags)) 1064 #else 1065 if (!COM_IIR_TXRDYBUG(flags)) 1066 #endif 1067 { 1068 u_char scr; 1069 u_char scr1; 1070 u_char scr2; 1071 1072 scr = sio_getreg(com, com_scr); 1073 sio_setreg(com, com_scr, 0xa5); 1074 scr1 = sio_getreg(com, com_scr); 1075 sio_setreg(com, com_scr, 0x5a); 1076 scr2 = sio_getreg(com, com_scr); 1077 sio_setreg(com, com_scr, scr); 1078 if (scr1 != 0xa5 || scr2 != 0x5a) { 1079 printf(" 8250"); 1080 goto determined_type; 1081 } 1082 } 1083 sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH); 1084 DELAY(100); 1085 com->st16650a = 0; 1086 switch (inb(com->int_id_port) & IIR_FIFO_MASK) { 1087 case FIFO_RX_LOW: 1088 printf(" 16450"); 1089 break; 1090 case FIFO_RX_MEDL: 1091 printf(" 16450?"); 1092 break; 1093 case FIFO_RX_MEDH: 1094 printf(" 16550?"); 1095 break; 1096 case FIFO_RX_HIGH: 1097 if (COM_NOFIFO(flags)) { 1098 printf(" 16550A fifo disabled"); 1099 } else { 1100 com->hasfifo = TRUE; 1101 if (COM_ST16650A(flags)) { 1102 com->st16650a = 1; 1103 com->tx_fifo_size = 32; 1104 printf(" ST16650A"); 1105 } else if (COM_TI16754(flags)) { 1106 com->tx_fifo_size = 64; 1107 printf(" TI16754"); 1108 } else { 1109 com->tx_fifo_size = COM_FIFOSIZE(flags); 1110 printf(" 16550A"); 1111 } 1112 } 1113 #ifdef COM_ESP 1114 for (espp = likely_esp_ports; *espp != 0; espp++) 1115 if (espattach(com, *espp)) { 1116 com->tx_fifo_size = 1024; 1117 break; 1118 } 1119 #endif 1120 if (!com->st16650a && !COM_TI16754(flags)) { 1121 if (!com->tx_fifo_size) 1122 com->tx_fifo_size = 16; 1123 else 1124 printf(" lookalike with %d bytes FIFO", 1125 com->tx_fifo_size); 1126 } 1127 1128 break; 1129 } 1130 1131 #ifdef COM_ESP 1132 if (com->esp) { 1133 /* 1134 * Set 16550 compatibility mode. 1135 * We don't use the ESP_MODE_SCALE bit to increase the 1136 * fifo trigger levels because we can't handle large 1137 * bursts of input. 1138 * XXX flow control should be set in comparam(), not here. 1139 */ 1140 outb(com->esp_port + ESP_CMD1, ESP_SETMODE); 1141 outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO); 1142 1143 /* Set RTS/CTS flow control. */ 1144 outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE); 1145 outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS); 1146 outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS); 1147 1148 /* Set flow-control levels. */ 1149 outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW); 1150 outb(com->esp_port + ESP_CMD2, HIBYTE(768)); 1151 outb(com->esp_port + ESP_CMD2, LOBYTE(768)); 1152 outb(com->esp_port + ESP_CMD2, HIBYTE(512)); 1153 outb(com->esp_port + ESP_CMD2, LOBYTE(512)); 1154 } 1155 #endif /* COM_ESP */ 1156 sio_setreg(com, com_fifo, 0); 1157 determined_type: ; 1158 1159 #ifdef COM_MULTIPORT 1160 if (COM_ISMULTIPORT(flags)) { 1161 device_t masterdev; 1162 1163 com->multiport = TRUE; 1164 printf(" (multiport"); 1165 if (unit == COM_MPMASTER(flags)) 1166 printf(" master"); 1167 printf(")"); 1168 masterdev = devclass_get_device(sio_devclass, 1169 COM_MPMASTER(flags)); 1170 com->no_irq = (masterdev == NULL || bus_get_resource(masterdev, 1171 SYS_RES_IRQ, 0, NULL, NULL) != 0); 1172 } 1173 #endif /* COM_MULTIPORT */ 1174 if (unit == comconsole) 1175 printf(", console"); 1176 if (COM_IIR_TXRDYBUG(flags)) 1177 printf(" with a bogus IIR_TXRDY register"); 1178 printf("\n"); 1179 1180 if (!sio_registered) { 1181 register_swi(SWI_TTY, siopoll, NULL ,"swi_siopoll"); 1182 sio_registered = TRUE; 1183 } 1184 minorbase = UNIT_TO_MINOR(unit); 1185 make_dev(&sio_cdevsw, minorbase, 1186 UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit); 1187 make_dev(&sio_cdevsw, minorbase | CONTROL_INIT_STATE, 1188 UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit); 1189 make_dev(&sio_cdevsw, minorbase | CONTROL_LOCK_STATE, 1190 UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit); 1191 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK, 1192 UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit); 1193 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK | CONTROL_INIT_STATE, 1194 UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit); 1195 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE, 1196 UID_UUCP, GID_DIALER, 0660, "cuala%r", unit); 1197 com->flags = flags; 1198 com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 1199 pps_init(&com->pps); 1200 1201 rid = 0; 1202 com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1, 1203 RF_ACTIVE); 1204 if (com->irqres) { 1205 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres, 1206 INTR_TYPE_TTY | INTR_TYPE_FAST, 1207 siointr, com, &com->cookie); 1208 if (ret) { 1209 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, 1210 com->irqres, INTR_TYPE_TTY, 1211 siointr, com, &com->cookie); 1212 if (ret == 0) 1213 device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n"); 1214 } 1215 if (ret) 1216 device_printf(dev, "could not activate interrupt\n"); 1217 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 1218 defined(ALT_BREAK_TO_DEBUGGER)) 1219 /* 1220 * Enable interrupts for early break-to-debugger support 1221 * on the console. 1222 */ 1223 if (ret == 0 && unit == comconsole) 1224 outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS | 1225 IER_EMSC); 1226 #endif 1227 } 1228 1229 return (0); 1230 } 1231 1232 static int 1233 sioopen(dev_t dev, int flag, int mode, struct thread *td) 1234 { 1235 struct com_s *com; 1236 int error; 1237 int mynor; 1238 int s; 1239 struct tty *tp; 1240 int unit; 1241 1242 mynor = minor(dev); 1243 unit = MINOR_TO_UNIT(mynor); 1244 com = com_addr(unit); 1245 if (com == NULL) 1246 return (ENXIO); 1247 if (com->gone) 1248 return (ENXIO); 1249 if (mynor & CONTROL_MASK) 1250 return (0); 1251 tp = dev->si_tty = com->tp = ttymalloc(com->tp); 1252 s = spltty(); 1253 /* 1254 * We jump to this label after all non-interrupted sleeps to pick 1255 * up any changes of the device state. 1256 */ 1257 open_top: 1258 while (com->state & CS_DTR_OFF) { 1259 error = tsleep(&com->dtr_wait, PCATCH, "siodtr", 0); 1260 if (com_addr(unit) == NULL) 1261 return (ENXIO); 1262 if (error != 0 || com->gone) 1263 goto out; 1264 } 1265 if (tp->t_state & TS_ISOPEN) { 1266 /* 1267 * The device is open, so everything has been initialized. 1268 * Handle conflicts. 1269 */ 1270 if (mynor & CALLOUT_MASK) { 1271 if (!com->active_out) { 1272 error = EBUSY; 1273 goto out; 1274 } 1275 } else { 1276 if (com->active_out) { 1277 if (flag & O_NONBLOCK) { 1278 error = EBUSY; 1279 goto out; 1280 } 1281 error = tsleep(&com->active_out, 1282 PCATCH, "siobi", 0); 1283 if (com_addr(unit) == NULL) 1284 return (ENXIO); 1285 if (error != 0 || com->gone) 1286 goto out; 1287 goto open_top; 1288 } 1289 } 1290 if (tp->t_state & TS_XCLUDE && suser(td)) { 1291 error = EBUSY; 1292 goto out; 1293 } 1294 } else { 1295 /* 1296 * The device isn't open, so there are no conflicts. 1297 * Initialize it. Initialization is done twice in many 1298 * cases: to preempt sleeping callin opens if we are 1299 * callout, and to complete a callin open after DCD rises. 1300 */ 1301 tp->t_oproc = comstart; 1302 tp->t_param = comparam; 1303 tp->t_stop = comstop; 1304 tp->t_dev = dev; 1305 tp->t_termios = mynor & CALLOUT_MASK 1306 ? com->it_out : com->it_in; 1307 (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET); 1308 com->poll = com->no_irq; 1309 com->poll_output = com->loses_outints; 1310 ++com->wopeners; 1311 error = comparam(tp, &tp->t_termios); 1312 --com->wopeners; 1313 if (error != 0) 1314 goto out; 1315 /* 1316 * XXX we should goto open_top if comparam() slept. 1317 */ 1318 if (com->hasfifo) { 1319 /* 1320 * (Re)enable and drain fifos. 1321 * 1322 * Certain SMC chips cause problems if the fifos 1323 * are enabled while input is ready. Turn off the 1324 * fifo if necessary to clear the input. We test 1325 * the input ready bit after enabling the fifos 1326 * since we've already enabled them in comparam() 1327 * and to handle races between enabling and fresh 1328 * input. 1329 */ 1330 while (TRUE) { 1331 sio_setreg(com, com_fifo, 1332 FIFO_RCV_RST | FIFO_XMT_RST 1333 | com->fifo_image); 1334 /* 1335 * XXX the delays are for superstitious 1336 * historical reasons. It must be less than 1337 * the character time at the maximum 1338 * supported speed (87 usec at 115200 bps 1339 * 8N1). Otherwise we might loop endlessly 1340 * if data is streaming in. We used to use 1341 * delays of 100. That usually worked 1342 * because DELAY(100) used to usually delay 1343 * for about 85 usec instead of 100. 1344 */ 1345 DELAY(50); 1346 if (!(inb(com->line_status_port) & LSR_RXRDY)) 1347 break; 1348 sio_setreg(com, com_fifo, 0); 1349 DELAY(50); 1350 (void) inb(com->data_port); 1351 } 1352 } 1353 1354 com_lock(); 1355 (void) inb(com->line_status_port); 1356 (void) inb(com->data_port); 1357 com->prev_modem_status = com->last_modem_status 1358 = inb(com->modem_status_port); 1359 if (COM_IIR_TXRDYBUG(com->flags)) { 1360 outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS 1361 | IER_EMSC); 1362 } else { 1363 outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY 1364 | IER_ERLS | IER_EMSC); 1365 } 1366 com_unlock(); 1367 /* 1368 * Handle initial DCD. Callout devices get a fake initial 1369 * DCD (trapdoor DCD). If we are callout, then any sleeping 1370 * callin opens get woken up and resume sleeping on "siobi" 1371 * instead of "siodcd". 1372 */ 1373 /* 1374 * XXX `mynor & CALLOUT_MASK' should be 1375 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where 1376 * TRAPDOOR_CARRIER is the default initial state for callout 1377 * devices and SOFT_CARRIER is like CLOCAL except it hides 1378 * the true carrier. 1379 */ 1380 if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK) 1381 (*linesw[tp->t_line].l_modem)(tp, 1); 1382 } 1383 /* 1384 * Wait for DCD if necessary. 1385 */ 1386 if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK) 1387 && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) { 1388 ++com->wopeners; 1389 error = tsleep(TSA_CARR_ON(tp), PCATCH, "siodcd", 0); 1390 if (com_addr(unit) == NULL) 1391 return (ENXIO); 1392 --com->wopeners; 1393 if (error != 0 || com->gone) 1394 goto out; 1395 goto open_top; 1396 } 1397 error = (*linesw[tp->t_line].l_open)(dev, tp); 1398 disc_optim(tp, &tp->t_termios, com); 1399 if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK) 1400 com->active_out = TRUE; 1401 siosettimeout(); 1402 out: 1403 splx(s); 1404 if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0) 1405 comhardclose(com); 1406 return (error); 1407 } 1408 1409 static int 1410 sioclose(dev_t dev, int flag, int mode, struct thread *td) 1411 { 1412 struct com_s *com; 1413 int mynor; 1414 int s; 1415 struct tty *tp; 1416 1417 mynor = minor(dev); 1418 if (mynor & CONTROL_MASK) 1419 return (0); 1420 com = com_addr(MINOR_TO_UNIT(mynor)); 1421 if (com == NULL) 1422 return (ENODEV); 1423 tp = com->tp; 1424 s = spltty(); 1425 (*linesw[tp->t_line].l_close)(tp, flag); 1426 disc_optim(tp, &tp->t_termios, com); 1427 comstop(tp, FREAD | FWRITE); 1428 comhardclose(com); 1429 ttyclose(tp); 1430 siosettimeout(); 1431 splx(s); 1432 if (com->gone) { 1433 printf("sio%d: gone\n", com->unit); 1434 s = spltty(); 1435 if (com->ibuf != NULL) 1436 free(com->ibuf, M_DEVBUF); 1437 bzero(tp, sizeof *tp); 1438 splx(s); 1439 } 1440 return (0); 1441 } 1442 1443 static void 1444 comhardclose(com) 1445 struct com_s *com; 1446 { 1447 int s; 1448 struct tty *tp; 1449 int unit; 1450 1451 unit = com->unit; 1452 s = spltty(); 1453 com->poll = FALSE; 1454 com->poll_output = FALSE; 1455 com->do_timestamp = FALSE; 1456 com->do_dcd_timestamp = FALSE; 1457 com->pps.ppsparam.mode = 0; 1458 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 1459 tp = com->tp; 1460 1461 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 1462 defined(ALT_BREAK_TO_DEBUGGER)) 1463 /* 1464 * Leave interrupts enabled and don't clear DTR if this is the 1465 * console. This allows us to detect break-to-debugger events 1466 * while the console device is closed. 1467 */ 1468 if (com->unit != comconsole) 1469 #endif 1470 { 1471 sio_setreg(com, com_ier, 0); 1472 if (tp->t_cflag & HUPCL 1473 /* 1474 * XXX we will miss any carrier drop between here and the 1475 * next open. Perhaps we should watch DCD even when the 1476 * port is closed; it is not sufficient to check it at 1477 * the next open because it might go up and down while 1478 * we're not watching. 1479 */ 1480 || (!com->active_out 1481 && !(com->prev_modem_status & MSR_DCD) 1482 && !(com->it_in.c_cflag & CLOCAL)) 1483 || !(tp->t_state & TS_ISOPEN)) { 1484 (void)commctl(com, TIOCM_DTR, DMBIC); 1485 if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) { 1486 timeout(siodtrwakeup, com, com->dtr_wait); 1487 com->state |= CS_DTR_OFF; 1488 } 1489 } 1490 } 1491 if (com->hasfifo) { 1492 /* 1493 * Disable fifos so that they are off after controlled 1494 * reboots. Some BIOSes fail to detect 16550s when the 1495 * fifos are enabled. 1496 */ 1497 sio_setreg(com, com_fifo, 0); 1498 } 1499 com->active_out = FALSE; 1500 wakeup(&com->active_out); 1501 wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */ 1502 splx(s); 1503 } 1504 1505 static int 1506 sioread(dev, uio, flag) 1507 dev_t dev; 1508 struct uio *uio; 1509 int flag; 1510 { 1511 int mynor; 1512 struct com_s *com; 1513 1514 mynor = minor(dev); 1515 if (mynor & CONTROL_MASK) 1516 return (ENODEV); 1517 com = com_addr(MINOR_TO_UNIT(mynor)); 1518 if (com == NULL || com->gone) 1519 return (ENODEV); 1520 return ((*linesw[com->tp->t_line].l_read)(com->tp, uio, flag)); 1521 } 1522 1523 static int 1524 siowrite(dev, uio, flag) 1525 dev_t dev; 1526 struct uio *uio; 1527 int flag; 1528 { 1529 int mynor; 1530 struct com_s *com; 1531 int unit; 1532 1533 mynor = minor(dev); 1534 if (mynor & CONTROL_MASK) 1535 return (ENODEV); 1536 1537 unit = MINOR_TO_UNIT(mynor); 1538 com = com_addr(unit); 1539 if (com == NULL || com->gone) 1540 return (ENODEV); 1541 /* 1542 * (XXX) We disallow virtual consoles if the physical console is 1543 * a serial port. This is in case there is a display attached that 1544 * is not the console. In that situation we don't need/want the X 1545 * server taking over the console. 1546 */ 1547 if (constty != NULL && unit == comconsole) 1548 constty = NULL; 1549 return ((*linesw[com->tp->t_line].l_write)(com->tp, uio, flag)); 1550 } 1551 1552 static void 1553 siobusycheck(chan) 1554 void *chan; 1555 { 1556 struct com_s *com; 1557 int s; 1558 1559 com = (struct com_s *)chan; 1560 1561 /* 1562 * Clear TS_BUSY if low-level output is complete. 1563 * spl locking is sufficient because siointr1() does not set CS_BUSY. 1564 * If siointr1() clears CS_BUSY after we look at it, then we'll get 1565 * called again. Reading the line status port outside of siointr1() 1566 * is safe because CS_BUSY is clear so there are no output interrupts 1567 * to lose. 1568 */ 1569 s = spltty(); 1570 if (com->state & CS_BUSY) 1571 com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */ 1572 else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY)) 1573 == (LSR_TSRE | LSR_TXRDY)) { 1574 com->tp->t_state &= ~TS_BUSY; 1575 ttwwakeup(com->tp); 1576 com->extra_state &= ~CSE_BUSYCHECK; 1577 } else 1578 timeout(siobusycheck, com, hz / 100); 1579 splx(s); 1580 } 1581 1582 static u_int 1583 siodivisor(rclk, speed) 1584 u_long rclk; 1585 speed_t speed; 1586 { 1587 long actual_speed; 1588 u_int divisor; 1589 int error; 1590 1591 if (speed == 0 || speed > (ULONG_MAX - 1) / 8) 1592 return (0); 1593 divisor = (rclk / (8UL * speed) + 1) / 2; 1594 if (divisor == 0 || divisor >= 65536) 1595 return (0); 1596 actual_speed = rclk / (16UL * divisor); 1597 1598 /* 10 times error in percent: */ 1599 error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2; 1600 1601 /* 3.0% maximum error tolerance: */ 1602 if (error < -30 || error > 30) 1603 return (0); 1604 1605 return (divisor); 1606 } 1607 1608 static void 1609 siodtrwakeup(chan) 1610 void *chan; 1611 { 1612 struct com_s *com; 1613 1614 com = (struct com_s *)chan; 1615 com->state &= ~CS_DTR_OFF; 1616 wakeup(&com->dtr_wait); 1617 } 1618 1619 static void 1620 sioinput(com) 1621 struct com_s *com; 1622 { 1623 u_char *buf; 1624 int incc; 1625 u_char line_status; 1626 int recv_data; 1627 struct tty *tp; 1628 1629 buf = com->ibuf; 1630 tp = com->tp; 1631 if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) { 1632 com_events -= (com->iptr - com->ibuf); 1633 com->iptr = com->ibuf; 1634 return; 1635 } 1636 if (tp->t_state & TS_CAN_BYPASS_L_RINT) { 1637 /* 1638 * Avoid the grotesquely inefficient lineswitch routine 1639 * (ttyinput) in "raw" mode. It usually takes about 450 1640 * instructions (that's without canonical processing or echo!). 1641 * slinput is reasonably fast (usually 40 instructions plus 1642 * call overhead). 1643 */ 1644 do { 1645 com_unlock(); 1646 incc = com->iptr - buf; 1647 if (tp->t_rawq.c_cc + incc > tp->t_ihiwat 1648 && (com->state & CS_RTS_IFLOW 1649 || tp->t_iflag & IXOFF) 1650 && !(tp->t_state & TS_TBLOCK)) 1651 ttyblock(tp); 1652 com->delta_error_counts[CE_TTY_BUF_OVERFLOW] 1653 += b_to_q((char *)buf, incc, &tp->t_rawq); 1654 buf += incc; 1655 tk_nin += incc; 1656 tk_rawcc += incc; 1657 tp->t_rawcc += incc; 1658 ttwakeup(tp); 1659 if (tp->t_state & TS_TTSTOP 1660 && (tp->t_iflag & IXANY 1661 || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) { 1662 tp->t_state &= ~TS_TTSTOP; 1663 tp->t_lflag &= ~FLUSHO; 1664 comstart(tp); 1665 } 1666 com_lock(); 1667 } while (buf < com->iptr); 1668 } else { 1669 do { 1670 com_unlock(); 1671 line_status = buf[com->ierroff]; 1672 recv_data = *buf++; 1673 if (line_status 1674 & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) { 1675 if (line_status & LSR_BI) 1676 recv_data |= TTY_BI; 1677 if (line_status & LSR_FE) 1678 recv_data |= TTY_FE; 1679 if (line_status & LSR_OE) 1680 recv_data |= TTY_OE; 1681 if (line_status & LSR_PE) 1682 recv_data |= TTY_PE; 1683 } 1684 (*linesw[tp->t_line].l_rint)(recv_data, tp); 1685 com_lock(); 1686 } while (buf < com->iptr); 1687 } 1688 com_events -= (com->iptr - com->ibuf); 1689 com->iptr = com->ibuf; 1690 1691 /* 1692 * There is now room for another low-level buffer full of input, 1693 * so enable RTS if it is now disabled and there is room in the 1694 * high-level buffer. 1695 */ 1696 if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) && 1697 !(tp->t_state & TS_TBLOCK)) 1698 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 1699 } 1700 1701 void 1702 siointr(arg) 1703 void *arg; 1704 { 1705 #ifndef COM_MULTIPORT 1706 com_lock(); 1707 siointr1((struct com_s *) arg); 1708 com_unlock(); 1709 #else /* COM_MULTIPORT */ 1710 bool_t possibly_more_intrs; 1711 int unit; 1712 struct com_s *com; 1713 1714 /* 1715 * Loop until there is no activity on any port. This is necessary 1716 * to get an interrupt edge more than to avoid another interrupt. 1717 * If the IRQ signal is just an OR of the IRQ signals from several 1718 * devices, then the edge from one may be lost because another is 1719 * on. 1720 */ 1721 com_lock(); 1722 do { 1723 possibly_more_intrs = FALSE; 1724 for (unit = 0; unit < sio_numunits; ++unit) { 1725 com = com_addr(unit); 1726 /* 1727 * XXX com_lock(); 1728 * would it work here, or be counter-productive? 1729 */ 1730 if (com != NULL 1731 && !com->gone 1732 && (inb(com->int_id_port) & IIR_IMASK) 1733 != IIR_NOPEND) { 1734 siointr1(com); 1735 possibly_more_intrs = TRUE; 1736 } 1737 /* XXX com_unlock(); */ 1738 } 1739 } while (possibly_more_intrs); 1740 com_unlock(); 1741 #endif /* COM_MULTIPORT */ 1742 } 1743 1744 static void 1745 siointr1(com) 1746 struct com_s *com; 1747 { 1748 u_char line_status; 1749 u_char modem_status; 1750 u_char *ioptr; 1751 u_char recv_data; 1752 u_char int_ctl; 1753 u_char int_ctl_new; 1754 struct timecounter *tc; 1755 u_int count; 1756 1757 int_ctl = inb(com->intr_ctl_port); 1758 int_ctl_new = int_ctl; 1759 1760 while (!com->gone) { 1761 if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) { 1762 modem_status = inb(com->modem_status_port); 1763 if ((modem_status ^ com->last_modem_status) & MSR_DCD) { 1764 tc = timecounter; 1765 count = tc->tc_get_timecount(tc); 1766 pps_event(&com->pps, tc, count, 1767 (modem_status & MSR_DCD) ? 1768 PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 1769 } 1770 } 1771 line_status = inb(com->line_status_port); 1772 1773 /* input event? (check first to help avoid overruns) */ 1774 while (line_status & LSR_RCV_MASK) { 1775 /* break/unnattached error bits or real input? */ 1776 if (!(line_status & LSR_RXRDY)) 1777 recv_data = 0; 1778 else 1779 recv_data = inb(com->data_port); 1780 #if defined(DDB) && defined(ALT_BREAK_TO_DEBUGGER) 1781 /* 1782 * Solaris implements a new BREAK which is initiated 1783 * by a character sequence CR ~ ^b which is similar 1784 * to a familiar pattern used on Sun servers by the 1785 * Remote Console. 1786 */ 1787 #define KEY_CRTLB 2 /* ^B */ 1788 #define KEY_CR 13 /* CR '\r' */ 1789 #define KEY_TILDE 126 /* ~ */ 1790 1791 if (com->unit == comconsole) { 1792 static int brk_state1 = 0, brk_state2 = 0; 1793 if (recv_data == KEY_CR) { 1794 brk_state1 = recv_data; 1795 brk_state2 = 0; 1796 } else if (brk_state1 == KEY_CR && (recv_data == KEY_TILDE || recv_data == KEY_CRTLB)) { 1797 if (recv_data == KEY_TILDE) 1798 brk_state2 = recv_data; 1799 else if (brk_state2 == KEY_TILDE && recv_data == KEY_CRTLB) { 1800 breakpoint(); 1801 brk_state1 = brk_state2 = 0; 1802 goto cont; 1803 } else 1804 brk_state2 = 0; 1805 } else 1806 brk_state1 = 0; 1807 } 1808 #endif 1809 if (line_status & (LSR_BI | LSR_FE | LSR_PE)) { 1810 /* 1811 * Don't store BI if IGNBRK or FE/PE if IGNPAR. 1812 * Otherwise, push the work to a higher level 1813 * (to handle PARMRK) if we're bypassing. 1814 * Otherwise, convert BI/FE and PE+INPCK to 0. 1815 * 1816 * This makes bypassing work right in the 1817 * usual "raw" case (IGNBRK set, and IGNPAR 1818 * and INPCK clear). 1819 * 1820 * Note: BI together with FE/PE means just BI. 1821 */ 1822 if (line_status & LSR_BI) { 1823 #if defined(DDB) && defined(BREAK_TO_DEBUGGER) 1824 if (com->unit == comconsole) { 1825 breakpoint(); 1826 goto cont; 1827 } 1828 #endif 1829 if (com->tp == NULL 1830 || com->tp->t_iflag & IGNBRK) 1831 goto cont; 1832 } else { 1833 if (com->tp == NULL 1834 || com->tp->t_iflag & IGNPAR) 1835 goto cont; 1836 } 1837 if (com->tp->t_state & TS_CAN_BYPASS_L_RINT 1838 && (line_status & (LSR_BI | LSR_FE) 1839 || com->tp->t_iflag & INPCK)) 1840 recv_data = 0; 1841 } 1842 ++com->bytes_in; 1843 if (com->hotchar != 0 && recv_data == com->hotchar) 1844 setsofttty(); 1845 ioptr = com->iptr; 1846 if (ioptr >= com->ibufend) 1847 CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW); 1848 else { 1849 if (com->do_timestamp) 1850 microtime(&com->timestamp); 1851 ++com_events; 1852 schedsofttty(); 1853 #if 0 /* for testing input latency vs efficiency */ 1854 if (com->iptr - com->ibuf == 8) 1855 setsofttty(); 1856 #endif 1857 ioptr[0] = recv_data; 1858 ioptr[com->ierroff] = line_status; 1859 com->iptr = ++ioptr; 1860 if (ioptr == com->ihighwater 1861 && com->state & CS_RTS_IFLOW) 1862 outb(com->modem_ctl_port, 1863 com->mcr_image &= ~MCR_RTS); 1864 if (line_status & LSR_OE) 1865 CE_RECORD(com, CE_OVERRUN); 1866 } 1867 cont: 1868 /* 1869 * "& 0x7F" is to avoid the gcc-1.40 generating a slow 1870 * jump from the top of the loop to here 1871 */ 1872 line_status = inb(com->line_status_port) & 0x7F; 1873 } 1874 1875 /* modem status change? (always check before doing output) */ 1876 modem_status = inb(com->modem_status_port); 1877 if (modem_status != com->last_modem_status) { 1878 if (com->do_dcd_timestamp 1879 && !(com->last_modem_status & MSR_DCD) 1880 && modem_status & MSR_DCD) 1881 microtime(&com->dcd_timestamp); 1882 1883 /* 1884 * Schedule high level to handle DCD changes. Note 1885 * that we don't use the delta bits anywhere. Some 1886 * UARTs mess them up, and it's easy to remember the 1887 * previous bits and calculate the delta. 1888 */ 1889 com->last_modem_status = modem_status; 1890 if (!(com->state & CS_CHECKMSR)) { 1891 com_events += LOTS_OF_EVENTS; 1892 com->state |= CS_CHECKMSR; 1893 setsofttty(); 1894 } 1895 1896 /* handle CTS change immediately for crisp flow ctl */ 1897 if (com->state & CS_CTS_OFLOW) { 1898 if (modem_status & MSR_CTS) 1899 com->state |= CS_ODEVREADY; 1900 else 1901 com->state &= ~CS_ODEVREADY; 1902 } 1903 } 1904 1905 /* output queued and everything ready? */ 1906 if (line_status & LSR_TXRDY 1907 && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) { 1908 ioptr = com->obufq.l_head; 1909 if (com->tx_fifo_size > 1) { 1910 u_int ocount; 1911 1912 ocount = com->obufq.l_tail - ioptr; 1913 if (ocount > com->tx_fifo_size) 1914 ocount = com->tx_fifo_size; 1915 com->bytes_out += ocount; 1916 do 1917 outb(com->data_port, *ioptr++); 1918 while (--ocount != 0); 1919 } else { 1920 outb(com->data_port, *ioptr++); 1921 ++com->bytes_out; 1922 } 1923 com->obufq.l_head = ioptr; 1924 if (COM_IIR_TXRDYBUG(com->flags)) { 1925 int_ctl_new = int_ctl | IER_ETXRDY; 1926 } 1927 if (ioptr >= com->obufq.l_tail) { 1928 struct lbq *qp; 1929 1930 qp = com->obufq.l_next; 1931 qp->l_queued = FALSE; 1932 qp = qp->l_next; 1933 if (qp != NULL) { 1934 com->obufq.l_head = qp->l_head; 1935 com->obufq.l_tail = qp->l_tail; 1936 com->obufq.l_next = qp; 1937 } else { 1938 /* output just completed */ 1939 if (COM_IIR_TXRDYBUG(com->flags)) { 1940 int_ctl_new = int_ctl & ~IER_ETXRDY; 1941 } 1942 com->state &= ~CS_BUSY; 1943 } 1944 if (!(com->state & CS_ODONE)) { 1945 com_events += LOTS_OF_EVENTS; 1946 com->state |= CS_ODONE; 1947 setsofttty(); /* handle at high level ASAP */ 1948 } 1949 } 1950 if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) { 1951 outb(com->intr_ctl_port, int_ctl_new); 1952 } 1953 } 1954 1955 /* finished? */ 1956 #ifndef COM_MULTIPORT 1957 if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND) 1958 #endif /* COM_MULTIPORT */ 1959 return; 1960 } 1961 } 1962 1963 static int 1964 sioioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct thread *td) 1965 { 1966 struct com_s *com; 1967 int error; 1968 int mynor; 1969 int s; 1970 struct tty *tp; 1971 #if defined(COMPAT_43) || defined(COMPAT_SUNOS) 1972 u_long oldcmd; 1973 struct termios term; 1974 #endif 1975 1976 mynor = minor(dev); 1977 com = com_addr(MINOR_TO_UNIT(mynor)); 1978 if (com == NULL || com->gone) 1979 return (ENODEV); 1980 if (mynor & CONTROL_MASK) { 1981 struct termios *ct; 1982 1983 switch (mynor & CONTROL_MASK) { 1984 case CONTROL_INIT_STATE: 1985 ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in; 1986 break; 1987 case CONTROL_LOCK_STATE: 1988 ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in; 1989 break; 1990 default: 1991 return (ENODEV); /* /dev/nodev */ 1992 } 1993 switch (cmd) { 1994 case TIOCSETA: 1995 error = suser(td); 1996 if (error != 0) 1997 return (error); 1998 *ct = *(struct termios *)data; 1999 return (0); 2000 case TIOCGETA: 2001 *(struct termios *)data = *ct; 2002 return (0); 2003 case TIOCGETD: 2004 *(int *)data = TTYDISC; 2005 return (0); 2006 case TIOCGWINSZ: 2007 bzero(data, sizeof(struct winsize)); 2008 return (0); 2009 default: 2010 return (ENOTTY); 2011 } 2012 } 2013 tp = com->tp; 2014 #if defined(COMPAT_43) || defined(COMPAT_SUNOS) 2015 term = tp->t_termios; 2016 oldcmd = cmd; 2017 error = ttsetcompat(tp, &cmd, data, &term); 2018 if (error != 0) 2019 return (error); 2020 if (cmd != oldcmd) 2021 data = (caddr_t)&term; 2022 #endif 2023 if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) { 2024 int cc; 2025 struct termios *dt = (struct termios *)data; 2026 struct termios *lt = mynor & CALLOUT_MASK 2027 ? &com->lt_out : &com->lt_in; 2028 2029 dt->c_iflag = (tp->t_iflag & lt->c_iflag) 2030 | (dt->c_iflag & ~lt->c_iflag); 2031 dt->c_oflag = (tp->t_oflag & lt->c_oflag) 2032 | (dt->c_oflag & ~lt->c_oflag); 2033 dt->c_cflag = (tp->t_cflag & lt->c_cflag) 2034 | (dt->c_cflag & ~lt->c_cflag); 2035 dt->c_lflag = (tp->t_lflag & lt->c_lflag) 2036 | (dt->c_lflag & ~lt->c_lflag); 2037 for (cc = 0; cc < NCCS; ++cc) 2038 if (lt->c_cc[cc] != 0) 2039 dt->c_cc[cc] = tp->t_cc[cc]; 2040 if (lt->c_ispeed != 0) 2041 dt->c_ispeed = tp->t_ispeed; 2042 if (lt->c_ospeed != 0) 2043 dt->c_ospeed = tp->t_ospeed; 2044 } 2045 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, td); 2046 if (error != ENOIOCTL) 2047 return (error); 2048 s = spltty(); 2049 error = ttioctl(tp, cmd, data, flag); 2050 disc_optim(tp, &tp->t_termios, com); 2051 if (error != ENOIOCTL) { 2052 splx(s); 2053 return (error); 2054 } 2055 switch (cmd) { 2056 case TIOCSBRK: 2057 sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK); 2058 break; 2059 case TIOCCBRK: 2060 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 2061 break; 2062 case TIOCSDTR: 2063 (void)commctl(com, TIOCM_DTR, DMBIS); 2064 break; 2065 case TIOCCDTR: 2066 (void)commctl(com, TIOCM_DTR, DMBIC); 2067 break; 2068 /* 2069 * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The 2070 * changes get undone on the next call to comparam(). 2071 */ 2072 case TIOCMSET: 2073 (void)commctl(com, *(int *)data, DMSET); 2074 break; 2075 case TIOCMBIS: 2076 (void)commctl(com, *(int *)data, DMBIS); 2077 break; 2078 case TIOCMBIC: 2079 (void)commctl(com, *(int *)data, DMBIC); 2080 break; 2081 case TIOCMGET: 2082 *(int *)data = commctl(com, 0, DMGET); 2083 break; 2084 case TIOCMSDTRWAIT: 2085 /* must be root since the wait applies to following logins */ 2086 error = suser(td); 2087 if (error != 0) { 2088 splx(s); 2089 return (error); 2090 } 2091 com->dtr_wait = *(int *)data * hz / 100; 2092 break; 2093 case TIOCMGDTRWAIT: 2094 *(int *)data = com->dtr_wait * 100 / hz; 2095 break; 2096 case TIOCTIMESTAMP: 2097 com->do_timestamp = TRUE; 2098 *(struct timeval *)data = com->timestamp; 2099 break; 2100 case TIOCDCDTIMESTAMP: 2101 com->do_dcd_timestamp = TRUE; 2102 *(struct timeval *)data = com->dcd_timestamp; 2103 break; 2104 default: 2105 splx(s); 2106 error = pps_ioctl(cmd, data, &com->pps); 2107 if (error == ENODEV) 2108 error = ENOTTY; 2109 return (error); 2110 } 2111 splx(s); 2112 return (0); 2113 } 2114 2115 static void 2116 siopoll(void *dummy) 2117 { 2118 int unit; 2119 2120 if (com_events == 0) 2121 return; 2122 repeat: 2123 for (unit = 0; unit < sio_numunits; ++unit) { 2124 struct com_s *com; 2125 int incc; 2126 struct tty *tp; 2127 2128 com = com_addr(unit); 2129 if (com == NULL) 2130 continue; 2131 tp = com->tp; 2132 if (tp == NULL || com->gone) { 2133 /* 2134 * Discard any events related to never-opened or 2135 * going-away devices. 2136 */ 2137 com_lock(); 2138 incc = com->iptr - com->ibuf; 2139 com->iptr = com->ibuf; 2140 if (com->state & CS_CHECKMSR) { 2141 incc += LOTS_OF_EVENTS; 2142 com->state &= ~CS_CHECKMSR; 2143 } 2144 com_events -= incc; 2145 com_unlock(); 2146 continue; 2147 } 2148 if (com->iptr != com->ibuf) { 2149 com_lock(); 2150 sioinput(com); 2151 com_unlock(); 2152 } 2153 if (com->state & CS_CHECKMSR) { 2154 u_char delta_modem_status; 2155 2156 com_lock(); 2157 delta_modem_status = com->last_modem_status 2158 ^ com->prev_modem_status; 2159 com->prev_modem_status = com->last_modem_status; 2160 com_events -= LOTS_OF_EVENTS; 2161 com->state &= ~CS_CHECKMSR; 2162 com_unlock(); 2163 if (delta_modem_status & MSR_DCD) 2164 (*linesw[tp->t_line].l_modem) 2165 (tp, com->prev_modem_status & MSR_DCD); 2166 } 2167 if (com->state & CS_ODONE) { 2168 com_lock(); 2169 com_events -= LOTS_OF_EVENTS; 2170 com->state &= ~CS_ODONE; 2171 com_unlock(); 2172 if (!(com->state & CS_BUSY) 2173 && !(com->extra_state & CSE_BUSYCHECK)) { 2174 timeout(siobusycheck, com, hz / 100); 2175 com->extra_state |= CSE_BUSYCHECK; 2176 } 2177 (*linesw[tp->t_line].l_start)(tp); 2178 } 2179 if (com_events == 0) 2180 break; 2181 } 2182 if (com_events >= LOTS_OF_EVENTS) 2183 goto repeat; 2184 } 2185 2186 static int 2187 comparam(tp, t) 2188 struct tty *tp; 2189 struct termios *t; 2190 { 2191 u_int cfcr; 2192 int cflag; 2193 struct com_s *com; 2194 u_int divisor; 2195 u_char dlbh; 2196 u_char dlbl; 2197 int s; 2198 int unit; 2199 2200 unit = DEV_TO_UNIT(tp->t_dev); 2201 com = com_addr(unit); 2202 if (com == NULL) 2203 return (ENODEV); 2204 2205 /* do historical conversions */ 2206 if (t->c_ispeed == 0) 2207 t->c_ispeed = t->c_ospeed; 2208 2209 /* check requested parameters */ 2210 if (t->c_ospeed == 0) 2211 divisor = 0; 2212 else { 2213 if (t->c_ispeed != t->c_ospeed) 2214 return (EINVAL); 2215 divisor = siodivisor(com->rclk, t->c_ispeed); 2216 if (divisor == 0) 2217 return (EINVAL); 2218 } 2219 2220 /* parameters are OK, convert them to the com struct and the device */ 2221 s = spltty(); 2222 if (divisor == 0) 2223 (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */ 2224 else 2225 (void)commctl(com, TIOCM_DTR, DMBIS); 2226 cflag = t->c_cflag; 2227 switch (cflag & CSIZE) { 2228 case CS5: 2229 cfcr = CFCR_5BITS; 2230 break; 2231 case CS6: 2232 cfcr = CFCR_6BITS; 2233 break; 2234 case CS7: 2235 cfcr = CFCR_7BITS; 2236 break; 2237 default: 2238 cfcr = CFCR_8BITS; 2239 break; 2240 } 2241 if (cflag & PARENB) { 2242 cfcr |= CFCR_PENAB; 2243 if (!(cflag & PARODD)) 2244 cfcr |= CFCR_PEVEN; 2245 } 2246 if (cflag & CSTOPB) 2247 cfcr |= CFCR_STOPB; 2248 2249 if (com->hasfifo && divisor != 0) { 2250 /* 2251 * Use a fifo trigger level low enough so that the input 2252 * latency from the fifo is less than about 16 msec and 2253 * the total latency is less than about 30 msec. These 2254 * latencies are reasonable for humans. Serial comms 2255 * protocols shouldn't expect anything better since modem 2256 * latencies are larger. 2257 * 2258 * Interrupts can be held up for long periods of time 2259 * due to inefficiencies in other parts of the kernel, 2260 * certain video cards, etc. Setting the FIFO trigger 2261 * point to MEDH instead of HIGH gives us 694uS of slop 2262 * (8 character times) instead of 173uS (2 character times) 2263 * @ 115200 bps. 2264 */ 2265 com->fifo_image = t->c_ospeed <= 4800 2266 ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH; 2267 #ifdef COM_ESP 2268 /* 2269 * The Hayes ESP card needs the fifo DMA mode bit set 2270 * in compatibility mode. If not, it will interrupt 2271 * for each character received. 2272 */ 2273 if (com->esp) 2274 com->fifo_image |= FIFO_DMA_MODE; 2275 #endif 2276 sio_setreg(com, com_fifo, com->fifo_image); 2277 } 2278 2279 /* 2280 * This returns with interrupts disabled so that we can complete 2281 * the speed change atomically. Keeping interrupts disabled is 2282 * especially important while com_data is hidden. 2283 */ 2284 (void) siosetwater(com, t->c_ispeed); 2285 2286 if (divisor != 0) { 2287 sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB); 2288 /* 2289 * Only set the divisor registers if they would change, 2290 * since on some 16550 incompatibles (UMC8669F), setting 2291 * them while input is arriving them loses sync until 2292 * data stops arriving. 2293 */ 2294 dlbl = divisor & 0xFF; 2295 if (sio_getreg(com, com_dlbl) != dlbl) 2296 sio_setreg(com, com_dlbl, dlbl); 2297 dlbh = divisor >> 8; 2298 if (sio_getreg(com, com_dlbh) != dlbh) 2299 sio_setreg(com, com_dlbh, dlbh); 2300 } 2301 2302 sio_setreg(com, com_cfcr, com->cfcr_image = cfcr); 2303 2304 if (!(tp->t_state & TS_TTSTOP)) 2305 com->state |= CS_TTGO; 2306 2307 if (cflag & CRTS_IFLOW) { 2308 if (com->st16650a) { 2309 sio_setreg(com, com_cfcr, 0xbf); 2310 sio_setreg(com, com_fifo, 2311 sio_getreg(com, com_fifo) | 0x40); 2312 } 2313 com->state |= CS_RTS_IFLOW; 2314 /* 2315 * If CS_RTS_IFLOW just changed from off to on, the change 2316 * needs to be propagated to MCR_RTS. This isn't urgent, 2317 * so do it later by calling comstart() instead of repeating 2318 * a lot of code from comstart() here. 2319 */ 2320 } else if (com->state & CS_RTS_IFLOW) { 2321 com->state &= ~CS_RTS_IFLOW; 2322 /* 2323 * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS 2324 * on here, since comstart() won't do it later. 2325 */ 2326 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 2327 if (com->st16650a) { 2328 sio_setreg(com, com_cfcr, 0xbf); 2329 sio_setreg(com, com_fifo, 2330 sio_getreg(com, com_fifo) & ~0x40); 2331 } 2332 } 2333 2334 2335 /* 2336 * Set up state to handle output flow control. 2337 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level? 2338 * Now has 10+ msec latency, while CTS flow has 50- usec latency. 2339 */ 2340 com->state |= CS_ODEVREADY; 2341 com->state &= ~CS_CTS_OFLOW; 2342 if (cflag & CCTS_OFLOW) { 2343 com->state |= CS_CTS_OFLOW; 2344 if (!(com->last_modem_status & MSR_CTS)) 2345 com->state &= ~CS_ODEVREADY; 2346 if (com->st16650a) { 2347 sio_setreg(com, com_cfcr, 0xbf); 2348 sio_setreg(com, com_fifo, 2349 sio_getreg(com, com_fifo) | 0x80); 2350 } 2351 } else { 2352 if (com->st16650a) { 2353 sio_setreg(com, com_cfcr, 0xbf); 2354 sio_setreg(com, com_fifo, 2355 sio_getreg(com, com_fifo) & ~0x80); 2356 } 2357 } 2358 2359 sio_setreg(com, com_cfcr, com->cfcr_image); 2360 2361 /* XXX shouldn't call functions while intrs are disabled. */ 2362 disc_optim(tp, t, com); 2363 /* 2364 * Recover from fiddling with CS_TTGO. We used to call siointr1() 2365 * unconditionally, but that defeated the careful discarding of 2366 * stale input in sioopen(). 2367 */ 2368 if (com->state >= (CS_BUSY | CS_TTGO)) 2369 siointr1(com); 2370 2371 com_unlock(); 2372 splx(s); 2373 comstart(tp); 2374 if (com->ibufold != NULL) { 2375 free(com->ibufold, M_DEVBUF); 2376 com->ibufold = NULL; 2377 } 2378 return (0); 2379 } 2380 2381 static int 2382 siosetwater(com, speed) 2383 struct com_s *com; 2384 speed_t speed; 2385 { 2386 int cp4ticks; 2387 u_char *ibuf; 2388 int ibufsize; 2389 struct tty *tp; 2390 2391 /* 2392 * Make the buffer size large enough to handle a softtty interrupt 2393 * latency of about 2 ticks without loss of throughput or data 2394 * (about 3 ticks if input flow control is not used or not honoured, 2395 * but a bit less for CS5-CS7 modes). 2396 */ 2397 cp4ticks = speed / 10 / hz * 4; 2398 for (ibufsize = 128; ibufsize < cp4ticks;) 2399 ibufsize <<= 1; 2400 if (ibufsize == com->ibufsize) { 2401 com_lock(); 2402 return (0); 2403 } 2404 2405 /* 2406 * Allocate input buffer. The extra factor of 2 in the size is 2407 * to allow for an error byte for each input byte. 2408 */ 2409 ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT); 2410 if (ibuf == NULL) { 2411 com_lock(); 2412 return (ENOMEM); 2413 } 2414 2415 /* Initialize non-critical variables. */ 2416 com->ibufold = com->ibuf; 2417 com->ibufsize = ibufsize; 2418 tp = com->tp; 2419 if (tp != NULL) { 2420 tp->t_ififosize = 2 * ibufsize; 2421 tp->t_ispeedwat = (speed_t)-1; 2422 tp->t_ospeedwat = (speed_t)-1; 2423 } 2424 2425 /* 2426 * Read current input buffer, if any. Continue with interrupts 2427 * disabled. 2428 */ 2429 com_lock(); 2430 if (com->iptr != com->ibuf) 2431 sioinput(com); 2432 2433 /*- 2434 * Initialize critical variables, including input buffer watermarks. 2435 * The external device is asked to stop sending when the buffer 2436 * exactly reaches high water, or when the high level requests it. 2437 * The high level is notified immediately (rather than at a later 2438 * clock tick) when this watermark is reached. 2439 * The buffer size is chosen so the watermark should almost never 2440 * be reached. 2441 * The low watermark is invisibly 0 since the buffer is always 2442 * emptied all at once. 2443 */ 2444 com->iptr = com->ibuf = ibuf; 2445 com->ibufend = ibuf + ibufsize; 2446 com->ierroff = ibufsize; 2447 com->ihighwater = ibuf + 3 * ibufsize / 4; 2448 return (0); 2449 } 2450 2451 static void 2452 comstart(tp) 2453 struct tty *tp; 2454 { 2455 struct com_s *com; 2456 int s; 2457 int unit; 2458 2459 unit = DEV_TO_UNIT(tp->t_dev); 2460 com = com_addr(unit); 2461 if (com == NULL) 2462 return; 2463 s = spltty(); 2464 com_lock(); 2465 if (tp->t_state & TS_TTSTOP) 2466 com->state &= ~CS_TTGO; 2467 else 2468 com->state |= CS_TTGO; 2469 if (tp->t_state & TS_TBLOCK) { 2470 if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW) 2471 outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS); 2472 } else { 2473 if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater 2474 && com->state & CS_RTS_IFLOW) 2475 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 2476 } 2477 com_unlock(); 2478 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) { 2479 ttwwakeup(tp); 2480 splx(s); 2481 return; 2482 } 2483 if (tp->t_outq.c_cc != 0) { 2484 struct lbq *qp; 2485 struct lbq *next; 2486 2487 if (!com->obufs[0].l_queued) { 2488 com->obufs[0].l_tail 2489 = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1, 2490 sizeof com->obuf1); 2491 com->obufs[0].l_next = NULL; 2492 com->obufs[0].l_queued = TRUE; 2493 com_lock(); 2494 if (com->state & CS_BUSY) { 2495 qp = com->obufq.l_next; 2496 while ((next = qp->l_next) != NULL) 2497 qp = next; 2498 qp->l_next = &com->obufs[0]; 2499 } else { 2500 com->obufq.l_head = com->obufs[0].l_head; 2501 com->obufq.l_tail = com->obufs[0].l_tail; 2502 com->obufq.l_next = &com->obufs[0]; 2503 com->state |= CS_BUSY; 2504 } 2505 com_unlock(); 2506 } 2507 if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) { 2508 com->obufs[1].l_tail 2509 = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2, 2510 sizeof com->obuf2); 2511 com->obufs[1].l_next = NULL; 2512 com->obufs[1].l_queued = TRUE; 2513 com_lock(); 2514 if (com->state & CS_BUSY) { 2515 qp = com->obufq.l_next; 2516 while ((next = qp->l_next) != NULL) 2517 qp = next; 2518 qp->l_next = &com->obufs[1]; 2519 } else { 2520 com->obufq.l_head = com->obufs[1].l_head; 2521 com->obufq.l_tail = com->obufs[1].l_tail; 2522 com->obufq.l_next = &com->obufs[1]; 2523 com->state |= CS_BUSY; 2524 } 2525 com_unlock(); 2526 } 2527 tp->t_state |= TS_BUSY; 2528 } 2529 com_lock(); 2530 if (com->state >= (CS_BUSY | CS_TTGO)) 2531 siointr1(com); /* fake interrupt to start output */ 2532 com_unlock(); 2533 ttwwakeup(tp); 2534 splx(s); 2535 } 2536 2537 static void 2538 comstop(tp, rw) 2539 struct tty *tp; 2540 int rw; 2541 { 2542 struct com_s *com; 2543 2544 com = com_addr(DEV_TO_UNIT(tp->t_dev)); 2545 if (com == NULL || com->gone) 2546 return; 2547 com_lock(); 2548 if (rw & FWRITE) { 2549 if (com->hasfifo) 2550 #ifdef COM_ESP 2551 /* XXX avoid h/w bug. */ 2552 if (!com->esp) 2553 #endif 2554 sio_setreg(com, com_fifo, 2555 FIFO_XMT_RST | com->fifo_image); 2556 com->obufs[0].l_queued = FALSE; 2557 com->obufs[1].l_queued = FALSE; 2558 if (com->state & CS_ODONE) 2559 com_events -= LOTS_OF_EVENTS; 2560 com->state &= ~(CS_ODONE | CS_BUSY); 2561 com->tp->t_state &= ~TS_BUSY; 2562 } 2563 if (rw & FREAD) { 2564 if (com->hasfifo) 2565 #ifdef COM_ESP 2566 /* XXX avoid h/w bug. */ 2567 if (!com->esp) 2568 #endif 2569 sio_setreg(com, com_fifo, 2570 FIFO_RCV_RST | com->fifo_image); 2571 com_events -= (com->iptr - com->ibuf); 2572 com->iptr = com->ibuf; 2573 } 2574 com_unlock(); 2575 comstart(tp); 2576 } 2577 2578 static int 2579 commctl(com, bits, how) 2580 struct com_s *com; 2581 int bits; 2582 int how; 2583 { 2584 int mcr; 2585 int msr; 2586 2587 if (how == DMGET) { 2588 bits = TIOCM_LE; /* XXX - always enabled while open */ 2589 mcr = com->mcr_image; 2590 if (mcr & MCR_DTR) 2591 bits |= TIOCM_DTR; 2592 if (mcr & MCR_RTS) 2593 bits |= TIOCM_RTS; 2594 msr = com->prev_modem_status; 2595 if (msr & MSR_CTS) 2596 bits |= TIOCM_CTS; 2597 if (msr & MSR_DCD) 2598 bits |= TIOCM_CD; 2599 if (msr & MSR_DSR) 2600 bits |= TIOCM_DSR; 2601 /* 2602 * XXX - MSR_RI is naturally volatile, and we make MSR_TERI 2603 * more volatile by reading the modem status a lot. Perhaps 2604 * we should latch both bits until the status is read here. 2605 */ 2606 if (msr & (MSR_RI | MSR_TERI)) 2607 bits |= TIOCM_RI; 2608 return (bits); 2609 } 2610 mcr = 0; 2611 if (bits & TIOCM_DTR) 2612 mcr |= MCR_DTR; 2613 if (bits & TIOCM_RTS) 2614 mcr |= MCR_RTS; 2615 if (com->gone) 2616 return(0); 2617 com_lock(); 2618 switch (how) { 2619 case DMSET: 2620 outb(com->modem_ctl_port, 2621 com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE)); 2622 break; 2623 case DMBIS: 2624 outb(com->modem_ctl_port, com->mcr_image |= mcr); 2625 break; 2626 case DMBIC: 2627 outb(com->modem_ctl_port, com->mcr_image &= ~mcr); 2628 break; 2629 } 2630 com_unlock(); 2631 return (0); 2632 } 2633 2634 static void 2635 siosettimeout() 2636 { 2637 struct com_s *com; 2638 bool_t someopen; 2639 int unit; 2640 2641 /* 2642 * Set our timeout period to 1 second if no polled devices are open. 2643 * Otherwise set it to max(1/200, 1/hz). 2644 * Enable timeouts iff some device is open. 2645 */ 2646 untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 2647 sio_timeout = hz; 2648 someopen = FALSE; 2649 for (unit = 0; unit < sio_numunits; ++unit) { 2650 com = com_addr(unit); 2651 if (com != NULL && com->tp != NULL 2652 && com->tp->t_state & TS_ISOPEN && !com->gone) { 2653 someopen = TRUE; 2654 if (com->poll || com->poll_output) { 2655 sio_timeout = hz > 200 ? hz / 200 : 1; 2656 break; 2657 } 2658 } 2659 } 2660 if (someopen) { 2661 sio_timeouts_until_log = hz / sio_timeout; 2662 sio_timeout_handle = timeout(comwakeup, (void *)NULL, 2663 sio_timeout); 2664 } else { 2665 /* Flush error messages, if any. */ 2666 sio_timeouts_until_log = 1; 2667 comwakeup((void *)NULL); 2668 untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 2669 } 2670 } 2671 2672 static void 2673 comwakeup(chan) 2674 void *chan; 2675 { 2676 struct com_s *com; 2677 int unit; 2678 2679 sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout); 2680 2681 /* 2682 * Recover from lost output interrupts. 2683 * Poll any lines that don't use interrupts. 2684 */ 2685 for (unit = 0; unit < sio_numunits; ++unit) { 2686 com = com_addr(unit); 2687 if (com != NULL && !com->gone 2688 && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) { 2689 com_lock(); 2690 siointr1(com); 2691 com_unlock(); 2692 } 2693 } 2694 2695 /* 2696 * Check for and log errors, but not too often. 2697 */ 2698 if (--sio_timeouts_until_log > 0) 2699 return; 2700 sio_timeouts_until_log = hz / sio_timeout; 2701 for (unit = 0; unit < sio_numunits; ++unit) { 2702 int errnum; 2703 2704 com = com_addr(unit); 2705 if (com == NULL) 2706 continue; 2707 if (com->gone) 2708 continue; 2709 for (errnum = 0; errnum < CE_NTYPES; ++errnum) { 2710 u_int delta; 2711 u_long total; 2712 2713 com_lock(); 2714 delta = com->delta_error_counts[errnum]; 2715 com->delta_error_counts[errnum] = 0; 2716 com_unlock(); 2717 if (delta == 0) 2718 continue; 2719 total = com->error_counts[errnum] += delta; 2720 log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n", 2721 unit, delta, error_desc[errnum], 2722 delta == 1 ? "" : "s", total); 2723 } 2724 } 2725 } 2726 2727 static void 2728 disc_optim(tp, t, com) 2729 struct tty *tp; 2730 struct termios *t; 2731 struct com_s *com; 2732 { 2733 if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON)) 2734 && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK)) 2735 && (!(t->c_iflag & PARMRK) 2736 || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) 2737 && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) 2738 && linesw[tp->t_line].l_rint == ttyinput) 2739 tp->t_state |= TS_CAN_BYPASS_L_RINT; 2740 else 2741 tp->t_state &= ~TS_CAN_BYPASS_L_RINT; 2742 com->hotchar = linesw[tp->t_line].l_hotchar; 2743 } 2744 2745 /* 2746 * Following are all routines needed for SIO to act as console 2747 */ 2748 #include <sys/cons.h> 2749 2750 struct siocnstate { 2751 u_char dlbl; 2752 u_char dlbh; 2753 u_char ier; 2754 u_char cfcr; 2755 u_char mcr; 2756 }; 2757 2758 static speed_t siocngetspeed (Port_t, u_long rclk); 2759 static void siocnclose (struct siocnstate *sp, Port_t iobase); 2760 static void siocnopen (struct siocnstate *sp, Port_t iobase, int speed); 2761 static void siocntxwait (Port_t iobase); 2762 2763 static cn_probe_t siocnprobe; 2764 static cn_init_t siocninit; 2765 static cn_checkc_t siocncheckc; 2766 static cn_getc_t siocngetc; 2767 static cn_putc_t siocnputc; 2768 2769 #ifdef __i386__ 2770 CONS_DRIVER(sio, siocnprobe, siocninit, NULL, siocngetc, siocncheckc, 2771 siocnputc, NULL); 2772 #endif 2773 2774 /* To get the GDB related variables */ 2775 #if DDB > 0 2776 #include <ddb/ddb.h> 2777 #endif 2778 2779 static void 2780 siocntxwait(iobase) 2781 Port_t iobase; 2782 { 2783 int timo; 2784 2785 /* 2786 * Wait for any pending transmission to finish. Required to avoid 2787 * the UART lockup bug when the speed is changed, and for normal 2788 * transmits. 2789 */ 2790 timo = 100000; 2791 while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY)) 2792 != (LSR_TSRE | LSR_TXRDY) && --timo != 0) 2793 ; 2794 } 2795 2796 /* 2797 * Read the serial port specified and try to figure out what speed 2798 * it's currently running at. We're assuming the serial port has 2799 * been initialized and is basicly idle. This routine is only intended 2800 * to be run at system startup. 2801 * 2802 * If the value read from the serial port doesn't make sense, return 0. 2803 */ 2804 2805 static speed_t 2806 siocngetspeed(iobase, rclk) 2807 Port_t iobase; 2808 u_long rclk; 2809 { 2810 u_int divisor; 2811 u_char dlbh; 2812 u_char dlbl; 2813 u_char cfcr; 2814 2815 cfcr = inb(iobase + com_cfcr); 2816 outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 2817 2818 dlbl = inb(iobase + com_dlbl); 2819 dlbh = inb(iobase + com_dlbh); 2820 2821 outb(iobase + com_cfcr, cfcr); 2822 2823 divisor = dlbh << 8 | dlbl; 2824 2825 /* XXX there should be more sanity checking. */ 2826 if (divisor == 0) 2827 return (CONSPEED); 2828 return (rclk / (16UL * divisor)); 2829 } 2830 2831 static void 2832 siocnopen(sp, iobase, speed) 2833 struct siocnstate *sp; 2834 Port_t iobase; 2835 int speed; 2836 { 2837 u_int divisor; 2838 u_char dlbh; 2839 u_char dlbl; 2840 2841 /* 2842 * Save all the device control registers except the fifo register 2843 * and set our default ones (cs8 -parenb speed=comdefaultrate). 2844 * We can't save the fifo register since it is read-only. 2845 */ 2846 sp->ier = inb(iobase + com_ier); 2847 outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */ 2848 siocntxwait(iobase); 2849 sp->cfcr = inb(iobase + com_cfcr); 2850 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 2851 sp->dlbl = inb(iobase + com_dlbl); 2852 sp->dlbh = inb(iobase + com_dlbh); 2853 /* 2854 * Only set the divisor registers if they would change, since on 2855 * some 16550 incompatibles (Startech), setting them clears the 2856 * data input register. This also reduces the effects of the 2857 * UMC8669F bug. 2858 */ 2859 divisor = siodivisor(comdefaultrclk, speed); 2860 dlbl = divisor & 0xFF; 2861 if (sp->dlbl != dlbl) 2862 outb(iobase + com_dlbl, dlbl); 2863 dlbh = divisor >> 8; 2864 if (sp->dlbh != dlbh) 2865 outb(iobase + com_dlbh, dlbh); 2866 outb(iobase + com_cfcr, CFCR_8BITS); 2867 sp->mcr = inb(iobase + com_mcr); 2868 /* 2869 * We don't want interrupts, but must be careful not to "disable" 2870 * them by clearing the MCR_IENABLE bit, since that might cause 2871 * an interrupt by floating the IRQ line. 2872 */ 2873 outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS); 2874 } 2875 2876 static void 2877 siocnclose(sp, iobase) 2878 struct siocnstate *sp; 2879 Port_t iobase; 2880 { 2881 /* 2882 * Restore the device control registers. 2883 */ 2884 siocntxwait(iobase); 2885 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 2886 if (sp->dlbl != inb(iobase + com_dlbl)) 2887 outb(iobase + com_dlbl, sp->dlbl); 2888 if (sp->dlbh != inb(iobase + com_dlbh)) 2889 outb(iobase + com_dlbh, sp->dlbh); 2890 outb(iobase + com_cfcr, sp->cfcr); 2891 /* 2892 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them. 2893 */ 2894 outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS); 2895 outb(iobase + com_ier, sp->ier); 2896 } 2897 2898 static void 2899 siocnprobe(cp) 2900 struct consdev *cp; 2901 { 2902 speed_t boot_speed; 2903 u_char cfcr; 2904 u_int divisor; 2905 int s, unit; 2906 struct siocnstate sp; 2907 2908 /* 2909 * Find our first enabled console, if any. If it is a high-level 2910 * console device, then initialize it and return successfully. 2911 * If it is a low-level console device, then initialize it and 2912 * return unsuccessfully. It must be initialized in both cases 2913 * for early use by console drivers and debuggers. Initializing 2914 * the hardware is not necessary in all cases, since the i/o 2915 * routines initialize it on the fly, but it is necessary if 2916 * input might arrive while the hardware is switched back to an 2917 * uninitialized state. We can't handle multiple console devices 2918 * yet because our low-level routines don't take a device arg. 2919 * We trust the user to set the console flags properly so that we 2920 * don't need to probe. 2921 */ 2922 cp->cn_pri = CN_DEAD; 2923 2924 for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */ 2925 int flags; 2926 int disabled; 2927 if (resource_int_value("sio", unit, "disabled", &disabled) == 0) { 2928 if (disabled) 2929 continue; 2930 } 2931 if (resource_int_value("sio", unit, "flags", &flags)) 2932 continue; 2933 if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) { 2934 int port; 2935 Port_t iobase; 2936 2937 if (resource_int_value("sio", unit, "port", &port)) 2938 continue; 2939 iobase = port; 2940 s = spltty(); 2941 if (boothowto & RB_SERIAL) { 2942 boot_speed = 2943 siocngetspeed(iobase, comdefaultrclk); 2944 if (boot_speed) 2945 comdefaultrate = boot_speed; 2946 } 2947 2948 /* 2949 * Initialize the divisor latch. We can't rely on 2950 * siocnopen() to do this the first time, since it 2951 * avoids writing to the latch if the latch appears 2952 * to have the correct value. Also, if we didn't 2953 * just read the speed from the hardware, then we 2954 * need to set the speed in hardware so that 2955 * switching it later is null. 2956 */ 2957 cfcr = inb(iobase + com_cfcr); 2958 outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 2959 divisor = siodivisor(comdefaultrclk, comdefaultrate); 2960 outb(iobase + com_dlbl, divisor & 0xff); 2961 outb(iobase + com_dlbh, divisor >> 8); 2962 outb(iobase + com_cfcr, cfcr); 2963 2964 siocnopen(&sp, iobase, comdefaultrate); 2965 2966 splx(s); 2967 if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) { 2968 cp->cn_dev = makedev(CDEV_MAJOR, unit); 2969 cp->cn_pri = COM_FORCECONSOLE(flags) 2970 || boothowto & RB_SERIAL 2971 ? CN_REMOTE : CN_NORMAL; 2972 siocniobase = iobase; 2973 siocnunit = unit; 2974 } 2975 if (COM_DEBUGGER(flags)) { 2976 printf("sio%d: gdb debugging port\n", unit); 2977 siogdbiobase = iobase; 2978 siogdbunit = unit; 2979 #if DDB > 0 2980 gdbdev = makedev(CDEV_MAJOR, unit); 2981 gdb_getc = siocngetc; 2982 gdb_putc = siocnputc; 2983 #endif 2984 } 2985 } 2986 } 2987 #ifdef __i386__ 2988 #if DDB > 0 2989 /* 2990 * XXX Ugly Compatability. 2991 * If no gdb port has been specified, set it to be the console 2992 * as some configuration files don't specify the gdb port. 2993 */ 2994 if (gdbdev == NODEV && (boothowto & RB_GDB)) { 2995 printf("Warning: no GDB port specified. Defaulting to sio%d.\n", 2996 siocnunit); 2997 printf("Set flag 0x80 on desired GDB port in your\n"); 2998 printf("configuration file (currently sio only).\n"); 2999 siogdbiobase = siocniobase; 3000 siogdbunit = siocnunit; 3001 gdbdev = makedev(CDEV_MAJOR, siocnunit); 3002 gdb_getc = siocngetc; 3003 gdb_putc = siocnputc; 3004 } 3005 #endif 3006 #endif 3007 } 3008 3009 #ifdef __alpha__ 3010 3011 CONS_DRIVER(sio, NULL, NULL, NULL, siocngetc, siocncheckc, siocnputc, NULL); 3012 3013 int 3014 siocnattach(port, speed) 3015 int port; 3016 int speed; 3017 { 3018 int s; 3019 u_char cfcr; 3020 u_int divisor; 3021 struct siocnstate sp; 3022 3023 siocniobase = port; 3024 comdefaultrate = speed; 3025 sio_consdev.cn_pri = CN_NORMAL; 3026 sio_consdev.cn_dev = makedev(CDEV_MAJOR, 0); 3027 3028 s = spltty(); 3029 3030 /* 3031 * Initialize the divisor latch. We can't rely on 3032 * siocnopen() to do this the first time, since it 3033 * avoids writing to the latch if the latch appears 3034 * to have the correct value. Also, if we didn't 3035 * just read the speed from the hardware, then we 3036 * need to set the speed in hardware so that 3037 * switching it later is null. 3038 */ 3039 cfcr = inb(siocniobase + com_cfcr); 3040 outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr); 3041 divisor = siodivisor(comdefaultrclk, comdefaultrate); 3042 outb(siocniobase + com_dlbl, divisor & 0xff); 3043 outb(siocniobase + com_dlbh, divisor >> 8); 3044 outb(siocniobase + com_cfcr, cfcr); 3045 3046 siocnopen(&sp, siocniobase, comdefaultrate); 3047 splx(s); 3048 3049 cn_tab = &sio_consdev; 3050 return (0); 3051 } 3052 3053 int 3054 siogdbattach(port, speed) 3055 int port; 3056 int speed; 3057 { 3058 int s; 3059 u_char cfcr; 3060 u_int divisor; 3061 struct siocnstate sp; 3062 3063 siogdbiobase = port; 3064 gdbdefaultrate = speed; 3065 3066 s = spltty(); 3067 3068 /* 3069 * Initialize the divisor latch. We can't rely on 3070 * siocnopen() to do this the first time, since it 3071 * avoids writing to the latch if the latch appears 3072 * to have the correct value. Also, if we didn't 3073 * just read the speed from the hardware, then we 3074 * need to set the speed in hardware so that 3075 * switching it later is null. 3076 */ 3077 cfcr = inb(siogdbiobase + com_cfcr); 3078 outb(siogdbiobase + com_cfcr, CFCR_DLAB | cfcr); 3079 divisor = siodivisor(comdefaultrclk, gdbdefaultrate); 3080 outb(siogdbiobase + com_dlbl, divisor & 0xff); 3081 outb(siogdbiobase + com_dlbh, divisor >> 8); 3082 outb(siogdbiobase + com_cfcr, cfcr); 3083 3084 siocnopen(&sp, siogdbiobase, gdbdefaultrate); 3085 splx(s); 3086 3087 return (0); 3088 } 3089 3090 #endif 3091 3092 static void 3093 siocninit(cp) 3094 struct consdev *cp; 3095 { 3096 comconsole = DEV_TO_UNIT(cp->cn_dev); 3097 } 3098 3099 static int 3100 siocncheckc(dev) 3101 dev_t dev; 3102 { 3103 int c; 3104 Port_t iobase; 3105 int s; 3106 struct siocnstate sp; 3107 3108 if (minor(dev) == siogdbunit) 3109 iobase = siogdbiobase; 3110 else 3111 iobase = siocniobase; 3112 s = spltty(); 3113 siocnopen(&sp, iobase, comdefaultrate); 3114 if (inb(iobase + com_lsr) & LSR_RXRDY) 3115 c = inb(iobase + com_data); 3116 else 3117 c = -1; 3118 siocnclose(&sp, iobase); 3119 splx(s); 3120 return (c); 3121 } 3122 3123 3124 int 3125 siocngetc(dev) 3126 dev_t dev; 3127 { 3128 int c; 3129 Port_t iobase; 3130 int s; 3131 struct siocnstate sp; 3132 3133 if (minor(dev) == siogdbunit) 3134 iobase = siogdbiobase; 3135 else 3136 iobase = siocniobase; 3137 s = spltty(); 3138 siocnopen(&sp, iobase, comdefaultrate); 3139 while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 3140 ; 3141 c = inb(iobase + com_data); 3142 siocnclose(&sp, iobase); 3143 splx(s); 3144 return (c); 3145 } 3146 3147 void 3148 siocnputc(dev, c) 3149 dev_t dev; 3150 int c; 3151 { 3152 int s; 3153 struct siocnstate sp; 3154 Port_t iobase; 3155 3156 if (minor(dev) == siogdbunit) 3157 iobase = siogdbiobase; 3158 else 3159 iobase = siocniobase; 3160 s = spltty(); 3161 siocnopen(&sp, iobase, comdefaultrate); 3162 siocntxwait(iobase); 3163 outb(iobase + com_data, c); 3164 siocnclose(&sp, iobase); 3165 splx(s); 3166 } 3167 3168 #ifdef __alpha__ 3169 int 3170 siogdbgetc() 3171 { 3172 int c; 3173 Port_t iobase; 3174 int s; 3175 struct siocnstate sp; 3176 3177 iobase = siogdbiobase; 3178 s = spltty(); 3179 siocnopen(&sp, iobase, gdbdefaultrate); 3180 while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 3181 ; 3182 c = inb(iobase + com_data); 3183 siocnclose(&sp, iobase); 3184 splx(s); 3185 return (c); 3186 } 3187 3188 void 3189 siogdbputc(c) 3190 int c; 3191 { 3192 int s; 3193 struct siocnstate sp; 3194 3195 s = spltty(); 3196 siocnopen(&sp, siogdbiobase, gdbdefaultrate); 3197 siocntxwait(siogdbiobase); 3198 outb(siogdbiobase + com_data, c); 3199 siocnclose(&sp, siogdbiobase); 3200 splx(s); 3201 } 3202 #endif 3203 3204 DRIVER_MODULE(sio, isa, sio_isa_driver, sio_devclass, 0, 0); 3205 #if NPCI > 0 3206 DRIVER_MODULE(sio, pci, sio_pci_driver, sio_devclass, 0, 0); 3207 #endif 3208 #if NPUC > 0 3209 DRIVER_MODULE(sio, puc, sio_puc_driver, sio_devclass, 0, 0); 3210 #endif 3211