1 /*- 2 * Copyright (c) 2004 David O'Brien <obrien@FreeBSD.org> 3 * Copyright (c) 2003 Orlando Bassotto <orlando.bassotto@ieo-research.it> 4 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: src/sys/dev/sound/pci/emu10k1.c,v 1.55.2.1 2005/12/30 19:55:53 netchild Exp $ 29 */ 30 31 #include <dev/sound/pcm/sound.h> 32 #include <dev/sound/pcm/ac97.h> 33 #include <gnu/dev/sound/pci/emu10k1.h> 34 #include "emu10k1-alsa%diked.h" 35 36 #include <bus/pci/pcireg.h> 37 #include <bus/pci/pcivar.h> 38 #include <sys/queue.h> 39 40 SND_DECLARE_FILE("$DragonFly: src/sys/dev/sound/pci/emu10k1.c,v 1.14 2008/01/06 16:55:51 swildner Exp $"); 41 42 /* -------------------------------------------------------------------- */ 43 44 #define NUM_G 64 /* use all channels */ 45 #define WAVEOUT_MAXBUFSIZE 32768 46 #define EMUPAGESIZE 4096 /* don't change */ 47 #define EMUMAXPAGES (WAVEOUT_MAXBUFSIZE * NUM_G / EMUPAGESIZE) 48 #define EMU10K1_PCI_ID 0x00021102 /* 1102 => Creative Labs Vendor ID */ 49 #define EMU10K2_PCI_ID 0x00041102 50 #define EMU10K3_PCI_ID 0x00081102 51 #define EMU_DEFAULT_BUFSZ 4096 52 #define EMU_MAX_CHANS 8 53 #define EMU_CHANS 4 54 55 #define MAXREQVOICES 8 56 #define RESERVED 0 57 #define NUM_MIDI 16 58 #define NUM_FXSENDS 4 59 60 #define TMEMSIZE 256*1024 61 #define TMEMSIZEREG 4 62 63 #define ENABLE 0xffffffff 64 #define DISABLE 0x00000000 65 #define ENV_ON DCYSUSV_CHANNELENABLE_MASK 66 #define ENV_OFF 0x00 /* XXX: should this be 1? */ 67 68 #define A_IOCFG_GPOUT_A 0x40 /* Analog Output */ 69 #define A_IOCFG_GPOUT_D 0x04 /* Digital Output */ 70 #define A_IOCFG_GPOUT_AD (A_IOCFG_GPOUT_A|A_IOCFG_GPOUT_D) /* A_IOCFG_GPOUT0 */ 71 72 struct emu_memblk { 73 SLIST_ENTRY(emu_memblk) link; 74 void *buf; 75 bus_addr_t buf_addr; 76 u_int32_t pte_start, pte_size; 77 }; 78 79 struct emu_mem { 80 u_int8_t bmap[EMUMAXPAGES / 8]; 81 u_int32_t *ptb_pages; 82 void *silent_page; 83 bus_addr_t silent_page_addr; 84 bus_addr_t ptb_pages_addr; 85 SLIST_HEAD(, emu_memblk) blocks; 86 }; 87 88 struct emu_voice { 89 int vnum; 90 int b16:1, stereo:1, busy:1, running:1, ismaster:1; 91 int speed; 92 int start, end, vol; 93 int fxrt1; /* FX routing */ 94 int fxrt2; /* FX routing (only for audigy) */ 95 u_int32_t buf; 96 struct emu_voice *slave; 97 struct pcm_channel *channel; 98 }; 99 100 struct sc_info; 101 102 /* channel registers */ 103 struct sc_pchinfo { 104 int spd, fmt, blksz, run; 105 struct emu_voice *master, *slave; 106 struct snd_dbuf *buffer; 107 struct pcm_channel *channel; 108 struct sc_info *parent; 109 }; 110 111 struct sc_rchinfo { 112 int spd, fmt, run, blksz, num; 113 u_int32_t idxreg, basereg, sizereg, setupreg, irqmask; 114 struct snd_dbuf *buffer; 115 struct pcm_channel *channel; 116 struct sc_info *parent; 117 }; 118 119 /* device private data */ 120 struct sc_info { 121 device_t dev; 122 u_int32_t type, rev; 123 u_int32_t tos_link:1, APS:1, audigy:1, audigy2:1; 124 u_int32_t addrmask; /* wider if audigy */ 125 126 bus_space_tag_t st; 127 bus_space_handle_t sh; 128 bus_dma_tag_t parent_dmat; 129 130 struct resource *reg, *irq; 131 void *ih; 132 sndlock_t lock; 133 134 unsigned int bufsz; 135 int timer, timerinterval; 136 int pnum, rnum; 137 int nchans; 138 struct emu_mem mem; 139 struct emu_voice voice[64]; 140 struct sc_pchinfo pch[EMU_MAX_CHANS]; 141 struct sc_rchinfo rch[3]; 142 }; 143 144 /* -------------------------------------------------------------------- */ 145 146 /* 147 * prototypes 148 */ 149 150 /* stuff */ 151 static int emu_init(struct sc_info *); 152 static void emu_intr(void *); 153 static void *emu_malloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr); 154 static void *emu_memalloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr); 155 static int emu_memfree(struct sc_info *sc, void *buf); 156 static int emu_memstart(struct sc_info *sc, void *buf); 157 #ifdef EMUDEBUG 158 static void emu_vdump(struct sc_info *sc, struct emu_voice *v); 159 #endif 160 161 /* talk to the card */ 162 static u_int32_t emu_rd(struct sc_info *, int, int); 163 static void emu_wr(struct sc_info *, int, u_int32_t, int); 164 165 /* -------------------------------------------------------------------- */ 166 167 static u_int32_t emu_rfmt_ac97[] = { 168 AFMT_S16_LE, 169 AFMT_STEREO | AFMT_S16_LE, 170 0 171 }; 172 173 static u_int32_t emu_rfmt_mic[] = { 174 AFMT_U8, 175 0 176 }; 177 178 static u_int32_t emu_rfmt_efx[] = { 179 AFMT_STEREO | AFMT_S16_LE, 180 0 181 }; 182 183 static struct pcmchan_caps emu_reccaps[3] = { 184 {8000, 48000, emu_rfmt_ac97, 0}, 185 {8000, 8000, emu_rfmt_mic, 0}, 186 {48000, 48000, emu_rfmt_efx, 0}, 187 }; 188 189 static u_int32_t emu_pfmt[] = { 190 AFMT_U8, 191 AFMT_STEREO | AFMT_U8, 192 AFMT_S16_LE, 193 AFMT_STEREO | AFMT_S16_LE, 194 0 195 }; 196 197 static struct pcmchan_caps emu_playcaps = {4000, 48000, emu_pfmt, 0}; 198 199 static int adcspeed[8] = {48000, 44100, 32000, 24000, 22050, 16000, 11025, 8000}; 200 /* audigy supports 12kHz. */ 201 static int audigy_adcspeed[9] = { 202 48000, 44100, 32000, 24000, 22050, 16000, 12000, 11025, 8000 203 }; 204 205 /* -------------------------------------------------------------------- */ 206 /* Hardware */ 207 static u_int32_t 208 emu_rd(struct sc_info *sc, int regno, int size) 209 { 210 switch (size) { 211 case 1: 212 return bus_space_read_1(sc->st, sc->sh, regno); 213 case 2: 214 return bus_space_read_2(sc->st, sc->sh, regno); 215 case 4: 216 return bus_space_read_4(sc->st, sc->sh, regno); 217 default: 218 return 0xffffffff; 219 } 220 } 221 222 static void 223 emu_wr(struct sc_info *sc, int regno, u_int32_t data, int size) 224 { 225 switch (size) { 226 case 1: 227 bus_space_write_1(sc->st, sc->sh, regno, data); 228 break; 229 case 2: 230 bus_space_write_2(sc->st, sc->sh, regno, data); 231 break; 232 case 4: 233 bus_space_write_4(sc->st, sc->sh, regno, data); 234 break; 235 } 236 } 237 238 static u_int32_t 239 emu_rdptr(struct sc_info *sc, int chn, int reg) 240 { 241 u_int32_t ptr, val, mask, size, offset; 242 243 ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK); 244 emu_wr(sc, PTR, ptr, 4); 245 val = emu_rd(sc, DATA, 4); 246 if (reg & 0xff000000) { 247 size = (reg >> 24) & 0x3f; 248 offset = (reg >> 16) & 0x1f; 249 mask = ((1 << size) - 1) << offset; 250 val &= mask; 251 val >>= offset; 252 } 253 return val; 254 } 255 256 static void 257 emu_wrptr(struct sc_info *sc, int chn, int reg, u_int32_t data) 258 { 259 u_int32_t ptr, mask, size, offset; 260 261 ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK); 262 emu_wr(sc, PTR, ptr, 4); 263 if (reg & 0xff000000) { 264 size = (reg >> 24) & 0x3f; 265 offset = (reg >> 16) & 0x1f; 266 mask = ((1 << size) - 1) << offset; 267 data <<= offset; 268 data &= mask; 269 data |= emu_rd(sc, DATA, 4) & ~mask; 270 } 271 emu_wr(sc, DATA, data, 4); 272 } 273 274 static void 275 emu_wrefx(struct sc_info *sc, unsigned int pc, unsigned int data) 276 { 277 pc += sc->audigy ? AUDIGY_CODEBASE : MICROCODEBASE; 278 emu_wrptr(sc, 0, pc, data); 279 } 280 281 /* -------------------------------------------------------------------- */ 282 /* ac97 codec */ 283 /* no locking needed */ 284 285 static int 286 emu_rdcd(kobj_t obj, void *devinfo, int regno) 287 { 288 struct sc_info *sc = (struct sc_info *)devinfo; 289 290 emu_wr(sc, AC97ADDRESS, regno, 1); 291 return emu_rd(sc, AC97DATA, 2); 292 } 293 294 static int 295 emu_wrcd(kobj_t obj, void *devinfo, int regno, u_int32_t data) 296 { 297 struct sc_info *sc = (struct sc_info *)devinfo; 298 299 emu_wr(sc, AC97ADDRESS, regno, 1); 300 emu_wr(sc, AC97DATA, data, 2); 301 return 0; 302 } 303 304 static kobj_method_t emu_ac97_methods[] = { 305 KOBJMETHOD(ac97_read, emu_rdcd), 306 KOBJMETHOD(ac97_write, emu_wrcd), 307 { 0, 0 } 308 }; 309 AC97_DECLARE(emu_ac97); 310 311 /* -------------------------------------------------------------------- */ 312 /* stuff */ 313 static int 314 emu_settimer(struct sc_info *sc) 315 { 316 struct sc_pchinfo *pch; 317 struct sc_rchinfo *rch; 318 int i, tmp, rate; 319 320 rate = 0; 321 for (i = 0; i < sc->nchans; i++) { 322 pch = &sc->pch[i]; 323 if (pch->buffer) { 324 tmp = (pch->spd * sndbuf_getbps(pch->buffer)) 325 / pch->blksz; 326 if (tmp > rate) 327 rate = tmp; 328 } 329 } 330 331 for (i = 0; i < 3; i++) { 332 rch = &sc->rch[i]; 333 if (rch->buffer) { 334 tmp = (rch->spd * sndbuf_getbps(rch->buffer)) 335 / rch->blksz; 336 if (tmp > rate) 337 rate = tmp; 338 } 339 } 340 RANGE(rate, 48, 9600); 341 sc->timerinterval = 48000 / rate; 342 emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2); 343 344 return sc->timerinterval; 345 } 346 347 static int 348 emu_enatimer(struct sc_info *sc, int go) 349 { 350 u_int32_t x; 351 if (go) { 352 if (sc->timer++ == 0) { 353 x = emu_rd(sc, INTE, 4); 354 x |= INTE_INTERVALTIMERENB; 355 emu_wr(sc, INTE, x, 4); 356 } 357 } else { 358 sc->timer = 0; 359 x = emu_rd(sc, INTE, 4); 360 x &= ~INTE_INTERVALTIMERENB; 361 emu_wr(sc, INTE, x, 4); 362 } 363 return 0; 364 } 365 366 static void 367 emu_enastop(struct sc_info *sc, char channel, int enable) 368 { 369 int reg = (channel & 0x20) ? SOLEH : SOLEL; 370 channel &= 0x1f; 371 reg |= 1 << 24; 372 reg |= channel << 16; 373 emu_wrptr(sc, 0, reg, enable); 374 } 375 376 static int 377 emu_recval(int speed) { 378 int val; 379 380 val = 0; 381 while (val < 7 && speed < adcspeed[val]) 382 val++; 383 return val; 384 } 385 386 static int 387 audigy_recval(int speed) { 388 int val; 389 390 val = 0; 391 while (val < 8 && speed < audigy_adcspeed[val]) 392 val++; 393 return val; 394 } 395 396 static u_int32_t 397 emu_rate_to_pitch(u_int32_t rate) 398 { 399 static u_int32_t logMagTable[128] = { 400 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2, 401 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5, 402 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081, 403 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191, 404 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7, 405 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829, 406 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e, 407 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26, 408 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d, 409 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885, 410 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899, 411 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c, 412 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3, 413 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3, 414 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83, 415 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df 416 }; 417 static char logSlopeTable[128] = { 418 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58, 419 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53, 420 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f, 421 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b, 422 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47, 423 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44, 424 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41, 425 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e, 426 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c, 427 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39, 428 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37, 429 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35, 430 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34, 431 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32, 432 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30, 433 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f 434 }; 435 int i; 436 437 if (rate == 0) 438 return 0; /* Bail out if no leading "1" */ 439 rate *= 11185; /* Scale 48000 to 0x20002380 */ 440 for (i = 31; i > 0; i--) { 441 if (rate & 0x80000000) { /* Detect leading "1" */ 442 return (((u_int32_t) (i - 15) << 20) + 443 logMagTable[0x7f & (rate >> 24)] + 444 (0x7f & (rate >> 17)) * 445 logSlopeTable[0x7f & (rate >> 24)]); 446 } 447 rate <<= 1; 448 } 449 450 return 0; /* Should never reach this point */ 451 } 452 453 static u_int32_t 454 emu_rate_to_linearpitch(u_int32_t rate) 455 { 456 rate = (rate << 8) / 375; 457 return (rate >> 1) + (rate & 1); 458 } 459 460 static struct emu_voice * 461 emu_valloc(struct sc_info *sc) 462 { 463 struct emu_voice *v; 464 int i; 465 466 v = NULL; 467 for (i = 0; i < 64 && sc->voice[i].busy; i++); 468 if (i < 64) { 469 v = &sc->voice[i]; 470 v->busy = 1; 471 } 472 return v; 473 } 474 475 static int 476 emu_vinit(struct sc_info *sc, struct emu_voice *m, struct emu_voice *s, 477 u_int32_t sz, struct snd_dbuf *b) 478 { 479 void *buf; 480 bus_addr_t tmp_addr; 481 482 buf = emu_memalloc(sc, sz, &tmp_addr); 483 if (buf == NULL) 484 return -1; 485 if (b != NULL) 486 sndbuf_setup(b, buf, sz); 487 m->start = emu_memstart(sc, buf) * EMUPAGESIZE; 488 m->end = m->start + sz; 489 m->channel = NULL; 490 m->speed = 0; 491 m->b16 = 0; 492 m->stereo = 0; 493 m->running = 0; 494 m->ismaster = 1; 495 m->vol = 0xff; 496 m->buf = tmp_addr; 497 m->slave = s; 498 if (sc->audigy) { 499 m->fxrt1 = FXBUS_MIDI_CHORUS | FXBUS_PCM_RIGHT << 8 | 500 FXBUS_PCM_LEFT << 16 | FXBUS_MIDI_REVERB << 24; 501 m->fxrt2 = 0x3f3f3f3f; /* No effects on second route */ 502 } else { 503 m->fxrt1 = FXBUS_MIDI_CHORUS | FXBUS_PCM_RIGHT << 4 | 504 FXBUS_PCM_LEFT << 8 | FXBUS_MIDI_REVERB << 12; 505 m->fxrt2 = 0; 506 } 507 508 if (s != NULL) { 509 s->start = m->start; 510 s->end = m->end; 511 s->channel = NULL; 512 s->speed = 0; 513 s->b16 = 0; 514 s->stereo = 0; 515 s->running = 0; 516 s->ismaster = 0; 517 s->vol = m->vol; 518 s->buf = m->buf; 519 s->fxrt1 = m->fxrt1; 520 s->fxrt2 = m->fxrt2; 521 s->slave = NULL; 522 } 523 return 0; 524 } 525 526 static void 527 emu_vsetup(struct sc_pchinfo *ch) 528 { 529 struct emu_voice *v = ch->master; 530 531 if (ch->fmt) { 532 v->b16 = (ch->fmt & AFMT_16BIT) ? 1 : 0; 533 v->stereo = (ch->fmt & AFMT_STEREO) ? 1 : 0; 534 if (v->slave != NULL) { 535 v->slave->b16 = v->b16; 536 v->slave->stereo = v->stereo; 537 } 538 } 539 if (ch->spd) { 540 v->speed = ch->spd; 541 if (v->slave != NULL) 542 v->slave->speed = v->speed; 543 } 544 } 545 546 static void 547 emu_vwrite(struct sc_info *sc, struct emu_voice *v) 548 { 549 int s; 550 int l, r, x, y; 551 u_int32_t sa, ea, start, val, silent_page; 552 553 s = (v->stereo ? 1 : 0) + (v->b16 ? 1 : 0); 554 555 sa = v->start >> s; 556 ea = v->end >> s; 557 558 l = r = x = y = v->vol; 559 if (v->stereo) { 560 l = v->ismaster ? l : 0; 561 r = v->ismaster ? 0 : r; 562 } 563 564 emu_wrptr(sc, v->vnum, CPF, v->stereo ? CPF_STEREO_MASK : 0); 565 val = v->stereo ? 28 : 30; 566 val *= v->b16 ? 1 : 2; 567 start = sa + val; 568 569 if (sc->audigy) { 570 emu_wrptr(sc, v->vnum, A_FXRT1, v->fxrt1); 571 emu_wrptr(sc, v->vnum, A_FXRT2, v->fxrt2); 572 emu_wrptr(sc, v->vnum, A_SENDAMOUNTS, 0); 573 } 574 else 575 emu_wrptr(sc, v->vnum, FXRT, v->fxrt1 << 16); 576 577 emu_wrptr(sc, v->vnum, PTRX, (x << 8) | r); 578 emu_wrptr(sc, v->vnum, DSL, ea | (y << 24)); 579 emu_wrptr(sc, v->vnum, PSST, sa | (l << 24)); 580 emu_wrptr(sc, v->vnum, CCCA, start | (v->b16 ? 0 : CCCA_8BITSELECT)); 581 582 emu_wrptr(sc, v->vnum, Z1, 0); 583 emu_wrptr(sc, v->vnum, Z2, 0); 584 585 silent_page = ((u_int32_t)(sc->mem.silent_page_addr) << 1) 586 | MAP_PTI_MASK; 587 emu_wrptr(sc, v->vnum, MAPA, silent_page); 588 emu_wrptr(sc, v->vnum, MAPB, silent_page); 589 590 emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK); 591 emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK); 592 emu_wrptr(sc, v->vnum, ATKHLDM, 0); 593 emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK); 594 emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000); 595 emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000); 596 emu_wrptr(sc, v->vnum, FMMOD, 0); 597 emu_wrptr(sc, v->vnum, TREMFRQ, 0); 598 emu_wrptr(sc, v->vnum, FM2FRQ2, 0); 599 emu_wrptr(sc, v->vnum, ENVVAL, 0x8000); 600 601 emu_wrptr(sc, v->vnum, ATKHLDV, 602 ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK); 603 emu_wrptr(sc, v->vnum, ENVVOL, 0x8000); 604 605 emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f); 606 emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0); 607 608 if (v->slave != NULL) 609 emu_vwrite(sc, v->slave); 610 } 611 612 static void 613 emu_vtrigger(struct sc_info *sc, struct emu_voice *v, int go) 614 { 615 u_int32_t pitch_target, initial_pitch; 616 u_int32_t cra, cs, ccis; 617 u_int32_t sample, i; 618 619 if (go) { 620 cra = 64; 621 cs = v->stereo ? 4 : 2; 622 ccis = v->stereo ? 28 : 30; 623 ccis *= v->b16 ? 1 : 2; 624 sample = v->b16 ? 0x00000000 : 0x80808080; 625 626 for (i = 0; i < cs; i++) 627 emu_wrptr(sc, v->vnum, CD0 + i, sample); 628 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0); 629 emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra); 630 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis); 631 632 emu_wrptr(sc, v->vnum, IFATN, 0xff00); 633 emu_wrptr(sc, v->vnum, VTFT, 0xffffffff); 634 emu_wrptr(sc, v->vnum, CVCF, 0xffffffff); 635 emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f); 636 emu_enastop(sc, v->vnum, 0); 637 638 pitch_target = emu_rate_to_linearpitch(v->speed); 639 initial_pitch = emu_rate_to_pitch(v->speed) >> 8; 640 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target); 641 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target); 642 emu_wrptr(sc, v->vnum, IP, initial_pitch); 643 } else { 644 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0); 645 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0); 646 emu_wrptr(sc, v->vnum, IFATN, 0xffff); 647 emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff); 648 emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff); 649 emu_wrptr(sc, v->vnum, IP, 0); 650 emu_enastop(sc, v->vnum, 1); 651 } 652 if (v->slave != NULL) 653 emu_vtrigger(sc, v->slave, go); 654 } 655 656 static int 657 emu_vpos(struct sc_info *sc, struct emu_voice *v) 658 { 659 int s, ptr; 660 661 s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0); 662 ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s; 663 return ptr & ~0x0000001f; 664 } 665 666 #ifdef EMUDEBUG 667 static void 668 emu_vdump(struct sc_info *sc, struct emu_voice *v) 669 { 670 char *regname[] = { 671 "cpf", "ptrx", "cvcf", "vtft", "z2", "z1", "psst", "dsl", 672 "ccca", "ccr", "clp", "fxrt", "mapa", "mapb", NULL, NULL, 673 "envvol", "atkhldv", "dcysusv", "lfoval1", 674 "envval", "atkhldm", "dcysusm", "lfoval2", 675 "ip", "ifatn", "pefe", "fmmod", "tremfrq", "fmfrq2", 676 "tempenv" 677 }; 678 char *regname2[] = { 679 "mudata1", "mustat1", "mudata2", "mustat2", 680 "fxwc1", "fxwc2", "spdrate", NULL, NULL, 681 NULL, NULL, NULL, "fxrt2", "sndamnt", "fxrt1", 682 NULL, NULL 683 }; 684 int i, x; 685 686 kprintf("voice number %d\n", v->vnum); 687 for (i = 0, x = 0; i <= 0x1e; i++) { 688 if (regname[i] == NULL) 689 continue; 690 kprintf("%s\t[%08x]", regname[i], emu_rdptr(sc, v->vnum, i)); 691 kprintf("%s", (x == 2) ? "\n" : "\t"); 692 x++; 693 if (x > 2) 694 x = 0; 695 } 696 697 /* Print out audigy extra registers */ 698 if (sc->audigy) { 699 for (i = 0; i <= 0xe; i++) { 700 if (regname2[i] == NULL) 701 continue; 702 kprintf("%s\t[%08x]", regname2[i], 703 emu_rdptr(sc, v->vnum, i + 0x70)); 704 kprintf("%s", (x == 2)? "\n" : "\t"); 705 x++; 706 if (x > 2) 707 x = 0; 708 } 709 } 710 kprintf("\n\n"); 711 } 712 #endif 713 714 /* channel interface */ 715 static void * 716 emupchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, 717 struct pcm_channel *c, int dir) 718 { 719 struct sc_info *sc = devinfo; 720 struct sc_pchinfo *ch; 721 void *r; 722 723 KASSERT(dir == PCMDIR_PLAY, ("emupchan_init: bad direction")); 724 ch = &sc->pch[sc->pnum++]; 725 ch->buffer = b; 726 ch->parent = sc; 727 ch->channel = c; 728 ch->blksz = sc->bufsz / 2; 729 ch->fmt = AFMT_U8; 730 ch->spd = 8000; 731 snd_mtxlock(sc->lock); 732 ch->master = emu_valloc(sc); 733 ch->slave = emu_valloc(sc); 734 snd_mtxunlock(sc->lock); 735 r = (emu_vinit(sc, ch->master, ch->slave, sc->bufsz, ch->buffer)) 736 ? NULL : ch; 737 738 return r; 739 } 740 741 static int 742 emupchan_free(kobj_t obj, void *data) 743 { 744 struct sc_pchinfo *ch = data; 745 struct sc_info *sc = ch->parent; 746 int r; 747 748 snd_mtxlock(sc->lock); 749 r = emu_memfree(sc, sndbuf_getbuf(ch->buffer)); 750 snd_mtxunlock(sc->lock); 751 752 return r; 753 } 754 755 static int 756 emupchan_setformat(kobj_t obj, void *data, u_int32_t format) 757 { 758 struct sc_pchinfo *ch = data; 759 760 ch->fmt = format; 761 return 0; 762 } 763 764 static int 765 emupchan_setspeed(kobj_t obj, void *data, u_int32_t speed) 766 { 767 struct sc_pchinfo *ch = data; 768 769 ch->spd = speed; 770 return ch->spd; 771 } 772 773 static int 774 emupchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 775 { 776 struct sc_pchinfo *ch = data; 777 struct sc_info *sc = ch->parent; 778 int irqrate, blksz; 779 780 ch->blksz = blocksize; 781 snd_mtxlock(sc->lock); 782 emu_settimer(sc); 783 irqrate = 48000 / sc->timerinterval; 784 snd_mtxunlock(sc->lock); 785 blksz = (ch->spd * sndbuf_getbps(ch->buffer)) / irqrate; 786 return blocksize; 787 } 788 789 static int 790 emupchan_trigger(kobj_t obj, void *data, int go) 791 { 792 struct sc_pchinfo *ch = data; 793 struct sc_info *sc = ch->parent; 794 795 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD) 796 return 0; 797 798 snd_mtxlock(sc->lock); 799 if (go == PCMTRIG_START) { 800 emu_vsetup(ch); 801 emu_vwrite(sc, ch->master); 802 emu_settimer(sc); 803 emu_enatimer(sc, 1); 804 #ifdef EMUDEBUG 805 kprintf("start [%d bit, %s, %d hz]\n", 806 ch->master->b16 ? 16 : 8, 807 ch->master->stereo ? "stereo" : "mono", 808 ch->master->speed); 809 emu_vdump(sc, ch->master); 810 emu_vdump(sc, ch->slave); 811 #endif 812 } 813 ch->run = (go == PCMTRIG_START) ? 1 : 0; 814 emu_vtrigger(sc, ch->master, ch->run); 815 snd_mtxunlock(sc->lock); 816 return 0; 817 } 818 819 static int 820 emupchan_getptr(kobj_t obj, void *data) 821 { 822 struct sc_pchinfo *ch = data; 823 struct sc_info *sc = ch->parent; 824 int r; 825 826 snd_mtxlock(sc->lock); 827 r = emu_vpos(sc, ch->master); 828 snd_mtxunlock(sc->lock); 829 830 return r; 831 } 832 833 static struct pcmchan_caps * 834 emupchan_getcaps(kobj_t obj, void *data) 835 { 836 return &emu_playcaps; 837 } 838 839 static kobj_method_t emupchan_methods[] = { 840 KOBJMETHOD(channel_init, emupchan_init), 841 KOBJMETHOD(channel_free, emupchan_free), 842 KOBJMETHOD(channel_setformat, emupchan_setformat), 843 KOBJMETHOD(channel_setspeed, emupchan_setspeed), 844 KOBJMETHOD(channel_setblocksize, emupchan_setblocksize), 845 KOBJMETHOD(channel_trigger, emupchan_trigger), 846 KOBJMETHOD(channel_getptr, emupchan_getptr), 847 KOBJMETHOD(channel_getcaps, emupchan_getcaps), 848 { 0, 0 } 849 }; 850 CHANNEL_DECLARE(emupchan); 851 852 /* channel interface */ 853 static void * 854 emurchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, 855 struct pcm_channel *c, int dir) 856 { 857 struct sc_info *sc = devinfo; 858 struct sc_rchinfo *ch; 859 860 KASSERT(dir == PCMDIR_REC, ("emurchan_init: bad direction")); 861 ch = &sc->rch[sc->rnum]; 862 ch->buffer = b; 863 ch->parent = sc; 864 ch->channel = c; 865 ch->blksz = sc->bufsz / 2; 866 ch->fmt = AFMT_U8; 867 ch->spd = 8000; 868 ch->num = sc->rnum; 869 switch(sc->rnum) { 870 case 0: 871 ch->idxreg = sc->audigy ? A_ADCIDX : ADCIDX; 872 ch->basereg = ADCBA; 873 ch->sizereg = ADCBS; 874 ch->setupreg = ADCCR; 875 ch->irqmask = INTE_ADCBUFENABLE; 876 break; 877 878 case 1: 879 ch->idxreg = FXIDX; 880 ch->basereg = FXBA; 881 ch->sizereg = FXBS; 882 ch->setupreg = FXWC; 883 ch->irqmask = INTE_EFXBUFENABLE; 884 break; 885 886 case 2: 887 ch->idxreg = MICIDX; 888 ch->basereg = MICBA; 889 ch->sizereg = MICBS; 890 ch->setupreg = 0; 891 ch->irqmask = INTE_MICBUFENABLE; 892 break; 893 } 894 sc->rnum++; 895 if (sndbuf_alloc(ch->buffer, sc->parent_dmat, sc->bufsz) != 0) 896 return NULL; 897 else { 898 snd_mtxlock(sc->lock); 899 emu_wrptr(sc, 0, ch->basereg, sndbuf_getbufaddr(ch->buffer)); 900 emu_wrptr(sc, 0, ch->sizereg, 0); /* off */ 901 snd_mtxunlock(sc->lock); 902 return ch; 903 } 904 } 905 906 static int 907 emurchan_setformat(kobj_t obj, void *data, u_int32_t format) 908 { 909 struct sc_rchinfo *ch = data; 910 911 ch->fmt = format; 912 return 0; 913 } 914 915 static int 916 emurchan_setspeed(kobj_t obj, void *data, u_int32_t speed) 917 { 918 struct sc_rchinfo *ch = data; 919 920 if (ch->num == 0) { 921 if (ch->parent->audigy) 922 speed = audigy_adcspeed[audigy_recval(speed)]; 923 else 924 speed = adcspeed[emu_recval(speed)]; 925 } 926 if (ch->num == 1) 927 speed = 48000; 928 if (ch->num == 2) 929 speed = 8000; 930 ch->spd = speed; 931 return ch->spd; 932 } 933 934 static int 935 emurchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 936 { 937 struct sc_rchinfo *ch = data; 938 struct sc_info *sc = ch->parent; 939 int irqrate, blksz; 940 941 ch->blksz = blocksize; 942 snd_mtxlock(sc->lock); 943 emu_settimer(sc); 944 irqrate = 48000 / sc->timerinterval; 945 snd_mtxunlock(sc->lock); 946 blksz = (ch->spd * sndbuf_getbps(ch->buffer)) / irqrate; 947 return blocksize; 948 } 949 950 /* semantic note: must start at beginning of buffer */ 951 static int 952 emurchan_trigger(kobj_t obj, void *data, int go) 953 { 954 struct sc_rchinfo *ch = data; 955 struct sc_info *sc = ch->parent; 956 u_int32_t val, sz; 957 958 switch(sc->bufsz) { 959 case 4096: 960 sz = ADCBS_BUFSIZE_4096; 961 break; 962 963 case 8192: 964 sz = ADCBS_BUFSIZE_8192; 965 break; 966 967 case 16384: 968 sz = ADCBS_BUFSIZE_16384; 969 break; 970 971 case 32768: 972 sz = ADCBS_BUFSIZE_32768; 973 break; 974 975 case 65536: 976 sz = ADCBS_BUFSIZE_65536; 977 break; 978 979 default: 980 sz = ADCBS_BUFSIZE_4096; 981 } 982 983 snd_mtxlock(sc->lock); 984 switch(go) { 985 case PCMTRIG_START: 986 ch->run = 1; 987 emu_wrptr(sc, 0, ch->sizereg, sz); 988 if (ch->num == 0) { 989 if (sc->audigy) { 990 val = A_ADCCR_LCHANENABLE; 991 if (ch->fmt & AFMT_STEREO) 992 val |= A_ADCCR_RCHANENABLE; 993 val |= audigy_recval(ch->spd); 994 } else { 995 val = ADCCR_LCHANENABLE; 996 if (ch->fmt & AFMT_STEREO) 997 val |= ADCCR_RCHANENABLE; 998 val |= emu_recval(ch->spd); 999 } 1000 1001 emu_wrptr(sc, 0, ch->setupreg, 0); 1002 emu_wrptr(sc, 0, ch->setupreg, val); 1003 } 1004 val = emu_rd(sc, INTE, 4); 1005 val |= ch->irqmask; 1006 emu_wr(sc, INTE, val, 4); 1007 break; 1008 1009 case PCMTRIG_STOP: 1010 case PCMTRIG_ABORT: 1011 ch->run = 0; 1012 emu_wrptr(sc, 0, ch->sizereg, 0); 1013 if (ch->setupreg) 1014 emu_wrptr(sc, 0, ch->setupreg, 0); 1015 val = emu_rd(sc, INTE, 4); 1016 val &= ~ch->irqmask; 1017 emu_wr(sc, INTE, val, 4); 1018 break; 1019 1020 case PCMTRIG_EMLDMAWR: 1021 case PCMTRIG_EMLDMARD: 1022 default: 1023 break; 1024 } 1025 snd_mtxunlock(sc->lock); 1026 1027 return 0; 1028 } 1029 1030 static int 1031 emurchan_getptr(kobj_t obj, void *data) 1032 { 1033 struct sc_rchinfo *ch = data; 1034 struct sc_info *sc = ch->parent; 1035 int r; 1036 1037 snd_mtxlock(sc->lock); 1038 r = emu_rdptr(sc, 0, ch->idxreg) & 0x0000ffff; 1039 snd_mtxunlock(sc->lock); 1040 1041 return r; 1042 } 1043 1044 static struct pcmchan_caps * 1045 emurchan_getcaps(kobj_t obj, void *data) 1046 { 1047 struct sc_rchinfo *ch = data; 1048 1049 return &emu_reccaps[ch->num]; 1050 } 1051 1052 static kobj_method_t emurchan_methods[] = { 1053 KOBJMETHOD(channel_init, emurchan_init), 1054 KOBJMETHOD(channel_setformat, emurchan_setformat), 1055 KOBJMETHOD(channel_setspeed, emurchan_setspeed), 1056 KOBJMETHOD(channel_setblocksize, emurchan_setblocksize), 1057 KOBJMETHOD(channel_trigger, emurchan_trigger), 1058 KOBJMETHOD(channel_getptr, emurchan_getptr), 1059 KOBJMETHOD(channel_getcaps, emurchan_getcaps), 1060 { 0, 0 } 1061 }; 1062 CHANNEL_DECLARE(emurchan); 1063 1064 /* -------------------------------------------------------------------- */ 1065 /* The interrupt handler */ 1066 static void 1067 emu_intr(void *data) 1068 { 1069 struct sc_info *sc = data; 1070 u_int32_t stat, ack, i, x; 1071 1072 snd_mtxlock(sc->lock); 1073 while (1) { 1074 stat = emu_rd(sc, IPR, 4); 1075 if (stat == 0) 1076 break; 1077 ack = 0; 1078 1079 /* process irq */ 1080 if (stat & IPR_INTERVALTIMER) 1081 ack |= IPR_INTERVALTIMER; 1082 1083 if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) 1084 ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL); 1085 1086 if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) 1087 ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL); 1088 1089 if (stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL)) 1090 ack |= stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL); 1091 1092 if (stat & IPR_PCIERROR) { 1093 ack |= IPR_PCIERROR; 1094 device_printf(sc->dev, "pci error\n"); 1095 /* we still get an nmi with ecc ram even if we ack this */ 1096 } 1097 if (stat & IPR_SAMPLERATETRACKER) { 1098 ack |= IPR_SAMPLERATETRACKER; 1099 #ifdef EMUDEBUG 1100 device_printf(sc->dev, 1101 "sample rate tracker lock status change\n"); 1102 #endif 1103 } 1104 1105 if (stat & ~ack) 1106 device_printf(sc->dev, "dodgy irq: %x (harmless)\n", 1107 stat & ~ack); 1108 1109 emu_wr(sc, IPR, stat, 4); 1110 1111 if (ack) { 1112 snd_mtxunlock(sc->lock); 1113 1114 if (ack & IPR_INTERVALTIMER) { 1115 x = 0; 1116 for (i = 0; i < sc->nchans; i++) { 1117 if (sc->pch[i].run) { 1118 x = 1; 1119 chn_intr(sc->pch[i].channel); 1120 } 1121 } 1122 if (x == 0) 1123 emu_enatimer(sc, 0); 1124 } 1125 1126 1127 if (ack & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) { 1128 if (sc->rch[0].channel) 1129 chn_intr(sc->rch[0].channel); 1130 } 1131 if (ack & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) { 1132 if (sc->rch[1].channel) 1133 chn_intr(sc->rch[1].channel); 1134 } 1135 if (ack & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL)) { 1136 if (sc->rch[2].channel) 1137 chn_intr(sc->rch[2].channel); 1138 } 1139 1140 snd_mtxlock(sc->lock); 1141 } 1142 } 1143 snd_mtxunlock(sc->lock); 1144 } 1145 1146 /* -------------------------------------------------------------------- */ 1147 1148 static void 1149 emu_setmap(void *arg, bus_dma_segment_t *segs, int nseg, int error) 1150 { 1151 bus_addr_t *phys = arg; 1152 1153 *phys = error ? 0 : (bus_addr_t)segs->ds_addr; 1154 1155 if (bootverbose) { 1156 kprintf("emu: setmap (%lx, %lx), nseg=%d, error=%d\n", 1157 (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len, 1158 nseg, error); 1159 } 1160 } 1161 1162 static void * 1163 emu_malloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr) 1164 { 1165 void *buf; 1166 bus_dmamap_t map; 1167 1168 *addr = 0; 1169 if (bus_dmamem_alloc(sc->parent_dmat, &buf, BUS_DMA_NOWAIT, &map)) 1170 return NULL; 1171 if (bus_dmamap_load(sc->parent_dmat, map, buf, sz, emu_setmap, addr, 0) 1172 || !*addr) 1173 return NULL; 1174 return buf; 1175 } 1176 1177 static void 1178 emu_free(struct sc_info *sc, void *buf) 1179 { 1180 bus_dmamem_free(sc->parent_dmat, buf, NULL); 1181 } 1182 1183 static void * 1184 emu_memalloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr) 1185 { 1186 u_int32_t blksz, start, idx, ofs, tmp, found; 1187 struct emu_mem *mem = &sc->mem; 1188 struct emu_memblk *blk; 1189 void *buf; 1190 1191 blksz = sz / EMUPAGESIZE; 1192 if (sz > (blksz * EMUPAGESIZE)) 1193 blksz++; 1194 /* find a kfree block in the bitmap */ 1195 found = 0; 1196 start = 1; 1197 while (!found && start + blksz < EMUMAXPAGES) { 1198 found = 1; 1199 for (idx = start; idx < start + blksz; idx++) 1200 if (mem->bmap[idx >> 3] & (1 << (idx & 7))) 1201 found = 0; 1202 if (!found) 1203 start++; 1204 } 1205 if (!found) 1206 return NULL; 1207 blk = kmalloc(sizeof(*blk), M_DEVBUF, M_WAITOK); 1208 buf = emu_malloc(sc, sz, &blk->buf_addr); 1209 *addr = blk->buf_addr; 1210 if (buf == NULL) { 1211 kfree(blk, M_DEVBUF); 1212 return NULL; 1213 } 1214 blk->buf = buf; 1215 blk->pte_start = start; 1216 blk->pte_size = blksz; 1217 #ifdef EMUDEBUG 1218 kprintf("buf %p, pte_start %d, pte_size %d\n", blk->buf, 1219 blk->pte_start, blk->pte_size); 1220 #endif 1221 ofs = 0; 1222 for (idx = start; idx < start + blksz; idx++) { 1223 mem->bmap[idx >> 3] |= 1 << (idx & 7); 1224 tmp = (u_int32_t)(u_long)((u_int8_t *)blk->buf_addr + ofs); 1225 #ifdef EMUDEBUG 1226 kprintf("pte[%d] -> %x phys, %x virt\n", idx, tmp, 1227 ((u_int32_t)buf) + ofs); 1228 #endif 1229 mem->ptb_pages[idx] = (tmp << 1) | idx; 1230 ofs += EMUPAGESIZE; 1231 } 1232 SLIST_INSERT_HEAD(&mem->blocks, blk, link); 1233 return buf; 1234 } 1235 1236 static int 1237 emu_memfree(struct sc_info *sc, void *buf) 1238 { 1239 u_int32_t idx, tmp; 1240 struct emu_mem *mem = &sc->mem; 1241 struct emu_memblk *blk, *i; 1242 1243 blk = NULL; 1244 SLIST_FOREACH(i, &mem->blocks, link) { 1245 if (i->buf == buf) 1246 blk = i; 1247 } 1248 if (blk == NULL) 1249 return EINVAL; 1250 SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link); 1251 emu_free(sc, buf); 1252 tmp = (u_int32_t)(sc->mem.silent_page_addr) << 1; 1253 for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) { 1254 mem->bmap[idx >> 3] &= ~(1 << (idx & 7)); 1255 mem->ptb_pages[idx] = tmp | idx; 1256 } 1257 kfree(blk, M_DEVBUF); 1258 return 0; 1259 } 1260 1261 static int 1262 emu_memstart(struct sc_info *sc, void *buf) 1263 { 1264 struct emu_mem *mem = &sc->mem; 1265 struct emu_memblk *blk, *i; 1266 1267 blk = NULL; 1268 SLIST_FOREACH(i, &mem->blocks, link) { 1269 if (i->buf == buf) 1270 blk = i; 1271 } 1272 if (blk == NULL) 1273 return -EINVAL; 1274 return blk->pte_start; 1275 } 1276 1277 static void 1278 emu_addefxop(struct sc_info *sc, int op, int z, int w, int x, int y, 1279 u_int32_t *pc) 1280 { 1281 emu_wrefx(sc, (*pc) * 2, (x << 10) | y); 1282 emu_wrefx(sc, (*pc) * 2 + 1, (op << 20) | (z << 10) | w); 1283 (*pc)++; 1284 } 1285 1286 static void 1287 audigy_addefxop(struct sc_info *sc, int op, int z, int w, int x, int y, 1288 u_int32_t *pc) 1289 { 1290 emu_wrefx(sc, (*pc) * 2, (x << 12) | y); 1291 emu_wrefx(sc, (*pc) * 2 + 1, (op << 24) | (z << 12) | w); 1292 (*pc)++; 1293 } 1294 1295 static void 1296 audigy_initefx(struct sc_info *sc) 1297 { 1298 int i; 1299 u_int32_t pc = 0; 1300 1301 /* skip 0, 0, -1, 0 - NOPs */ 1302 for (i = 0; i < 512; i++) 1303 audigy_addefxop(sc, 0x0f, 0x0c0, 0x0c0, 0x0cf, 0x0c0, &pc); 1304 1305 for (i = 0; i < 512; i++) 1306 emu_wrptr(sc, 0, A_FXGPREGBASE + i, 0x0); 1307 1308 pc = 16; 1309 1310 /* stop fx processor */ 1311 emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP); 1312 1313 /* Audigy 2 (EMU10K2) DSP Registers: 1314 FX Bus 1315 0x000-0x00f : 16 registers (???) 1316 Input 1317 0x040/0x041 : AC97 Codec (l/r) 1318 0x042/0x043 : ADC, S/PDIF (l/r) 1319 0x044/0x045 : Optical S/PDIF in (l/r) 1320 0x046/0x047 : ??? 1321 0x048/0x049 : Line/Mic 2 (l/r) 1322 0x04a/0x04b : RCA S/PDIF (l/r) 1323 0x04c/0x04d : Aux 2 (l/r) 1324 Output 1325 0x060/0x061 : Digital Front (l/r) 1326 0x062/0x063 : Digital Center/LFE 1327 0x064/0x065 : AudigyDrive Heaphone (l/r) 1328 0x066/0x067 : Digital Rear (l/r) 1329 0x068/0x069 : Analog Front (l/r) 1330 0x06a/0x06b : Analog Center/LFE 1331 0x06c/0x06d : ??? 1332 0x06e/0x06f : Analog Rear (l/r) 1333 0x070/0x071 : AC97 Output (l/r) 1334 0x072/0x073 : ??? 1335 0x074/0x075 : ??? 1336 0x076/0x077 : ADC Recording Buffer (l/r) 1337 Constants 1338 0x0c0 - 0x0c4 = 0 - 4 1339 0x0c5 = 0x8, 0x0c6 = 0x10, 0x0c7 = 0x20 1340 0x0c8 = 0x100, 0x0c9 = 0x10000, 0x0ca = 0x80000 1341 0x0cb = 0x10000000, 0x0cc = 0x20000000, 0x0cd = 0x40000000 1342 0x0ce = 0x80000000, 0x0cf = 0x7fffffff, 0x0d0 = 0xffffffff 1343 0x0d1 = 0xfffffffe, 0x0d2 = 0xc0000000, 0x0d3 = 0x41fbbcdc 1344 0x0d4 = 0x5a7ef9db, 0x0d5 = 0x00100000, 0x0dc = 0x00000001 (???) 1345 Temporary Values 1346 0x0d6 : Accumulator (???) 1347 0x0d7 : Condition Register 1348 0x0d8 : Noise source 1349 0x0d9 : Noise source 1350 Tank Memory Data Registers 1351 0x200 - 0x2ff 1352 Tank Memory Address Registers 1353 0x300 - 0x3ff 1354 General Purpose Registers 1355 0x400 - 0x5ff 1356 */ 1357 1358 /* AC97Output[l/r] = FXBus PCM[l/r] */ 1359 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AC97_L), A_C_00000000, 1360 A_C_00000000, A_FXBUS(FXBUS_PCM_LEFT), &pc); 1361 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AC97_R), A_C_00000000, 1362 A_C_00000000, A_FXBUS(FXBUS_PCM_RIGHT), &pc); 1363 1364 /* GPR[0/1] = RCA S/PDIF[l/r] -- Master volume */ 1365 audigy_addefxop(sc, iACC3, A_GPR(0), A_C_00000000, 1366 A_C_00000000, A_EXTIN(EXTIN_COAX_SPDIF_L), &pc); 1367 audigy_addefxop(sc, iACC3, A_GPR(1), A_C_00000000, 1368 A_C_00000000, A_EXTIN(EXTIN_COAX_SPDIF_R), &pc); 1369 1370 /* GPR[2] = GPR[0] (Left) / 2 + GPR[1] (Right) / 2 -- Central volume */ 1371 audigy_addefxop(sc, iINTERP, A_GPR(2), A_GPR(1), 1372 A_C_40000000, A_GPR(0), &pc); 1373 1374 /* Headphones[l/r] = GPR[0/1] */ 1375 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_HEADPHONE_L), 1376 A_C_00000000, A_C_00000000, A_GPR(0), &pc); 1377 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_HEADPHONE_R), 1378 A_C_00000000, A_C_00000000, A_GPR(1), &pc); 1379 1380 /* Analog Front[l/r] = GPR[0/1] */ 1381 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AFRONT_L), A_C_00000000, 1382 A_C_00000000, A_GPR(0), &pc); 1383 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AFRONT_R), A_C_00000000, 1384 A_C_00000000, A_GPR(1), &pc); 1385 1386 /* Digital Front[l/r] = GPR[0/1] */ 1387 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L), A_C_00000000, 1388 A_C_00000000, A_GPR(0), &pc); 1389 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_FRONT_R), A_C_00000000, 1390 A_C_00000000, A_GPR(1), &pc); 1391 1392 /* Center and Subwoofer configuration */ 1393 /* Analog Center = GPR[0] + GPR[2] */ 1394 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ACENTER), A_C_00000000, 1395 A_GPR(0), A_GPR(2), &pc); 1396 /* Analog Sub = GPR[1] + GPR[2] */ 1397 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ALFE), A_C_00000000, 1398 A_GPR(1), A_GPR(2), &pc); 1399 1400 /* Digital Center = GPR[0] + GPR[2] */ 1401 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_CENTER), A_C_00000000, 1402 A_GPR(0), A_GPR(2), &pc); 1403 /* Digital Sub = GPR[1] + GPR[2] */ 1404 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_LFE), A_C_00000000, 1405 A_GPR(1), A_GPR(2), &pc); 1406 1407 #if 0 1408 /* Analog Rear[l/r] = (GPR[0/1] * RearVolume[l/r]) >> 31 */ 1409 /* RearVolume = GPR[0x10/0x11] (Will this ever be implemented?) */ 1410 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_AREAR_L), A_C_00000000, 1411 A_GPR(16), A_GPR(0), &pc); 1412 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_AREAR_R), A_C_00000000, 1413 A_GPR(17), A_GPR(1), &pc); 1414 1415 /* Digital Rear[l/r] = (GPR[0/1] * RearVolume[l/r]) >> 31 */ 1416 /* RearVolume = GPR[0x10/0x11] (Will this ever be implemented?) */ 1417 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_REAR_L), A_C_00000000, 1418 A_GPR(16), A_GPR(0), &pc); 1419 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_REAR_R), A_C_00000000, 1420 A_GPR(17), A_GPR(1), &pc); 1421 #else 1422 /* XXX This is just a copy to the channel, since we do not have 1423 * a patch manager, it is useful for have another output enabled. 1424 */ 1425 1426 /* Analog Rear[l/r] = GPR[0/1] */ 1427 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AREAR_L), A_C_00000000, 1428 A_C_00000000, A_GPR(0), &pc); 1429 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AREAR_R), A_C_00000000, 1430 A_C_00000000, A_GPR(1), &pc); 1431 1432 /* Digital Rear[l/r] = GPR[0/1] */ 1433 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_REAR_L), A_C_00000000, 1434 A_C_00000000, A_GPR(0), &pc); 1435 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_REAR_R), A_C_00000000, 1436 A_C_00000000, A_GPR(1), &pc); 1437 #endif 1438 1439 /* ADC Recording buffer[l/r] = AC97Input[l/r] */ 1440 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ADC_CAP_L), A_C_00000000, 1441 A_C_00000000, A_EXTIN(A_EXTIN_AC97_L), &pc); 1442 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ADC_CAP_R), A_C_00000000, 1443 A_C_00000000, A_EXTIN(A_EXTIN_AC97_R), &pc); 1444 1445 /* resume normal operations */ 1446 emu_wrptr(sc, 0, A_DBG, 0); 1447 } 1448 1449 static void 1450 emu_initefx(struct sc_info *sc) 1451 { 1452 int i; 1453 u_int32_t pc = 16; 1454 1455 /* acc3 0,0,0,0 - NOPs */ 1456 for (i = 0; i < 512; i++) { 1457 emu_wrefx(sc, i * 2, 0x10040); 1458 emu_wrefx(sc, i * 2 + 1, 0x610040); 1459 } 1460 1461 for (i = 0; i < 256; i++) 1462 emu_wrptr(sc, 0, FXGPREGBASE + i, 0); 1463 1464 /* FX-8010 DSP Registers: 1465 FX Bus 1466 0x000-0x00f : 16 registers 1467 Input 1468 0x010/0x011 : AC97 Codec (l/r) 1469 0x012/0x013 : ADC, S/PDIF (l/r) 1470 0x014/0x015 : Mic(left), Zoom (l/r) 1471 0x016/0x017 : TOS link in (l/r) 1472 0x018/0x019 : Line/Mic 1 (l/r) 1473 0x01a/0x01b : COAX S/PDIF (l/r) 1474 0x01c/0x01d : Line/Mic 2 (l/r) 1475 Output 1476 0x020/0x021 : AC97 Output (l/r) 1477 0x022/0x023 : TOS link out (l/r) 1478 0x024/0x025 : Center/LFE 1479 0x026/0x027 : LiveDrive Headphone (l/r) 1480 0x028/0x029 : Rear Channel (l/r) 1481 0x02a/0x02b : ADC Recording Buffer (l/r) 1482 0x02c : Mic Recording Buffer 1483 0x031/0x032 : Analog Center/LFE 1484 Constants 1485 0x040 - 0x044 = 0 - 4 1486 0x045 = 0x8, 0x046 = 0x10, 0x047 = 0x20 1487 0x048 = 0x100, 0x049 = 0x10000, 0x04a = 0x80000 1488 0x04b = 0x10000000, 0x04c = 0x20000000, 0x04d = 0x40000000 1489 0x04e = 0x80000000, 0x04f = 0x7fffffff, 0x050 = 0xffffffff 1490 0x051 = 0xfffffffe, 0x052 = 0xc0000000, 0x053 = 0x41fbbcdc 1491 0x054 = 0x5a7ef9db, 0x055 = 0x00100000 1492 Temporary Values 1493 0x056 : Accumulator 1494 0x057 : Condition Register 1495 0x058 : Noise source 1496 0x059 : Noise source 1497 0x05a : IRQ Register 1498 0x05b : TRAM Delay Base Address Count 1499 General Purpose Registers 1500 0x100 - 0x1ff 1501 Tank Memory Data Registers 1502 0x200 - 0x2ff 1503 Tank Memory Address Registers 1504 0x300 - 0x3ff 1505 */ 1506 1507 /* Routing - this will be configurable in later version */ 1508 1509 /* GPR[0/1] = FX * 4 + SPDIF-in */ 1510 emu_addefxop(sc, iMACINT0, GPR(0), EXTIN(EXTIN_SPDIF_CD_L), 1511 FXBUS(FXBUS_PCM_LEFT), C_00000004, &pc); 1512 emu_addefxop(sc, iMACINT0, GPR(1), EXTIN(EXTIN_SPDIF_CD_R), 1513 FXBUS(FXBUS_PCM_RIGHT), C_00000004, &pc); 1514 1515 /* GPR[0/1] += APS-input */ 1516 emu_addefxop(sc, iACC3, GPR(0), GPR(0), C_00000000, 1517 sc->APS ? EXTIN(EXTIN_TOSLINK_L) : C_00000000, &pc); 1518 emu_addefxop(sc, iACC3, GPR(1), GPR(1), C_00000000, 1519 sc->APS ? EXTIN(EXTIN_TOSLINK_R) : C_00000000, &pc); 1520 1521 /* FrontOut (AC97) = GPR[0/1] */ 1522 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_L), C_00000000, 1523 C_00000000, GPR(0), &pc); 1524 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_R), C_00000000, 1525 C_00000001, GPR(1), &pc); 1526 1527 /* GPR[2] = GPR[0] (Left) / 2 + GPR[1] (Right) / 2 -- Central volume */ 1528 emu_addefxop(sc, iINTERP, GPR(2), GPR(1), C_40000000, GPR(0), &pc); 1529 1530 #if 0 1531 /* RearOut = (GPR[0/1] * RearVolume) >> 31 */ 1532 /* RearVolume = GPR[0x10/0x11] */ 1533 emu_addefxop(sc, iMAC0, EXTOUT(EXTOUT_REAR_L), C_00000000, 1534 GPR(16), GPR(0), &pc); 1535 emu_addefxop(sc, iMAC0, EXTOUT(EXTOUT_REAR_R), C_00000000, 1536 GPR(17), GPR(1), &pc); 1537 #else 1538 /* XXX This is just a copy to the channel, since we do not have 1539 * a patch manager, it is useful for have another output enabled. 1540 */ 1541 1542 /* Rear[l/r] = GPR[0/1] */ 1543 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_REAR_L), C_00000000, 1544 C_00000000, GPR(0), &pc); 1545 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_REAR_R), C_00000000, 1546 C_00000000, GPR(1), &pc); 1547 #endif 1548 1549 /* TOS out[l/r] = GPR[0/1] */ 1550 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_TOSLINK_L), C_00000000, 1551 C_00000000, GPR(0), &pc); 1552 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_TOSLINK_R), C_00000000, 1553 C_00000000, GPR(1), &pc); 1554 1555 /* Center and Subwoofer configuration */ 1556 /* Analog Center = GPR[0] + GPR[2] */ 1557 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ACENTER), C_00000000, 1558 GPR(0), GPR(2), &pc); 1559 /* Analog Sub = GPR[1] + GPR[2] */ 1560 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ALFE), C_00000000, 1561 GPR(1), GPR(2), &pc); 1562 /* Digital Center = GPR[0] + GPR[2] */ 1563 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_CENTER), C_00000000, 1564 GPR(0), GPR(2), &pc); 1565 /* Digital Sub = GPR[1] + GPR[2] */ 1566 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_LFE), C_00000000, 1567 GPR(1), GPR(2), &pc); 1568 1569 /* Headphones[l/r] = GPR[0/1] */ 1570 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_HEADPHONE_L), C_00000000, 1571 C_00000000, GPR(0), &pc); 1572 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_HEADPHONE_R), C_00000000, 1573 C_00000000, GPR(1), &pc); 1574 1575 /* ADC Recording buffer[l/r] = AC97Input[l/r] */ 1576 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ADC_CAP_L), C_00000000, 1577 C_00000000, EXTIN(EXTIN_AC97_L), &pc); 1578 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ADC_CAP_R), C_00000000, 1579 C_00000000, EXTIN(EXTIN_AC97_R), &pc); 1580 1581 /* resume normal operations */ 1582 emu_wrptr(sc, 0, DBG, 0); 1583 } 1584 1585 /* Probe and attach the card */ 1586 static int 1587 emu_init(struct sc_info *sc) 1588 { 1589 u_int32_t spcs, ch, tmp, i; 1590 1591 if (sc->audigy) { 1592 /* enable additional AC97 slots */ 1593 emu_wrptr(sc, 0, AC97SLOT, AC97SLOT_CNTR | AC97SLOT_LFE); 1594 } 1595 1596 /* disable audio and lock cache */ 1597 emu_wr(sc, HCFG, 1598 HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, 1599 4); 1600 1601 /* reset recording buffers */ 1602 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE); 1603 emu_wrptr(sc, 0, MICBA, 0); 1604 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE); 1605 emu_wrptr(sc, 0, FXBA, 0); 1606 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE); 1607 emu_wrptr(sc, 0, ADCBA, 0); 1608 1609 /* disable channel interrupt */ 1610 emu_wr(sc, INTE, 1611 INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE, 1612 4); 1613 emu_wrptr(sc, 0, CLIEL, 0); 1614 emu_wrptr(sc, 0, CLIEH, 0); 1615 emu_wrptr(sc, 0, SOLEL, 0); 1616 emu_wrptr(sc, 0, SOLEH, 0); 1617 1618 /* wonder what these do... */ 1619 if (sc->audigy) { 1620 emu_wrptr(sc, 0, SPBYPASS, 0xf00); 1621 emu_wrptr(sc, 0, AC97SLOT, 0x3); 1622 } 1623 1624 /* init envelope engine */ 1625 for (ch = 0; ch < NUM_G; ch++) { 1626 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF); 1627 emu_wrptr(sc, ch, IP, 0); 1628 emu_wrptr(sc, ch, VTFT, 0xffff); 1629 emu_wrptr(sc, ch, CVCF, 0xffff); 1630 emu_wrptr(sc, ch, PTRX, 0); 1631 emu_wrptr(sc, ch, CPF, 0); 1632 emu_wrptr(sc, ch, CCR, 0); 1633 1634 emu_wrptr(sc, ch, PSST, 0); 1635 emu_wrptr(sc, ch, DSL, 0x10); 1636 emu_wrptr(sc, ch, CCCA, 0); 1637 emu_wrptr(sc, ch, Z1, 0); 1638 emu_wrptr(sc, ch, Z2, 0); 1639 emu_wrptr(sc, ch, FXRT, 0xd01c0000); 1640 1641 emu_wrptr(sc, ch, ATKHLDM, 0); 1642 emu_wrptr(sc, ch, DCYSUSM, 0); 1643 emu_wrptr(sc, ch, IFATN, 0xffff); 1644 emu_wrptr(sc, ch, PEFE, 0); 1645 emu_wrptr(sc, ch, FMMOD, 0); 1646 emu_wrptr(sc, ch, TREMFRQ, 24); /* 1 Hz */ 1647 emu_wrptr(sc, ch, FM2FRQ2, 24); /* 1 Hz */ 1648 emu_wrptr(sc, ch, TEMPENV, 0); 1649 1650 /*** these are last so OFF prevents writing ***/ 1651 emu_wrptr(sc, ch, LFOVAL2, 0); 1652 emu_wrptr(sc, ch, LFOVAL1, 0); 1653 emu_wrptr(sc, ch, ATKHLDV, 0); 1654 emu_wrptr(sc, ch, ENVVOL, 0); 1655 emu_wrptr(sc, ch, ENVVAL, 0); 1656 1657 if (sc->audigy) { 1658 /* audigy cards need this to initialize correctly */ 1659 emu_wrptr(sc, ch, 0x4c, 0); 1660 emu_wrptr(sc, ch, 0x4d, 0); 1661 emu_wrptr(sc, ch, 0x4e, 0); 1662 emu_wrptr(sc, ch, 0x4f, 0); 1663 /* set default routing */ 1664 emu_wrptr(sc, ch, A_FXRT1, 0x03020100); 1665 emu_wrptr(sc, ch, A_FXRT2, 0x3f3f3f3f); 1666 emu_wrptr(sc, ch, A_SENDAMOUNTS, 0); 1667 } 1668 1669 sc->voice[ch].vnum = ch; 1670 sc->voice[ch].slave = NULL; 1671 sc->voice[ch].busy = 0; 1672 sc->voice[ch].ismaster = 0; 1673 sc->voice[ch].running = 0; 1674 sc->voice[ch].b16 = 0; 1675 sc->voice[ch].stereo = 0; 1676 sc->voice[ch].speed = 0; 1677 sc->voice[ch].start = 0; 1678 sc->voice[ch].end = 0; 1679 sc->voice[ch].channel = NULL; 1680 } 1681 sc->pnum = sc->rnum = 0; 1682 1683 /* 1684 * Init to 0x02109204 : 1685 * Clock accuracy = 0 (1000ppm) 1686 * Sample Rate = 2 (48kHz) 1687 * Audio Channel = 1 (Left of 2) 1688 * Source Number = 0 (Unspecified) 1689 * Generation Status = 1 (Original for Cat Code 12) 1690 * Cat Code = 12 (Digital Signal Mixer) 1691 * Mode = 0 (Mode 0) 1692 * Emphasis = 0 (None) 1693 * CP = 1 (Copyright unasserted) 1694 * AN = 0 (Audio data) 1695 * P = 0 (Consumer) 1696 */ 1697 spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 1698 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 1699 SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 | 1700 SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT; 1701 emu_wrptr(sc, 0, SPCS0, spcs); 1702 emu_wrptr(sc, 0, SPCS1, spcs); 1703 emu_wrptr(sc, 0, SPCS2, spcs); 1704 1705 if (!sc->audigy) 1706 emu_initefx(sc); 1707 else if (sc->audigy2) { /* Audigy 2 */ 1708 /* from ALSA initialization code: */ 1709 1710 /* Hack for Alice3 to work independent of haP16V driver */ 1711 u_int32_t tmp; 1712 1713 /* Setup SRCMulti_I2S SamplingRate */ 1714 tmp = emu_rdptr(sc, 0, A_SPDIF_SAMPLERATE) & 0xfffff1ff; 1715 emu_wrptr(sc, 0, A_SPDIF_SAMPLERATE, tmp | 0x400); 1716 1717 /* Setup SRCSel (Enable SPDIF, I2S SRCMulti) */ 1718 emu_wr(sc, 0x20, 0x00600000, 4); 1719 emu_wr(sc, 0x24, 0x00000014, 4); 1720 1721 /* Setup SRCMulti Input Audio Enable */ 1722 emu_wr(sc, 0x20, 0x006e0000, 4); 1723 emu_wr(sc, 0x24, 0xff00ff00, 4); 1724 } 1725 1726 SLIST_INIT(&sc->mem.blocks); 1727 sc->mem.ptb_pages = emu_malloc(sc, EMUMAXPAGES * sizeof(u_int32_t), 1728 &sc->mem.ptb_pages_addr); 1729 if (sc->mem.ptb_pages == NULL) 1730 return -1; 1731 1732 sc->mem.silent_page = emu_malloc(sc, EMUPAGESIZE, 1733 &sc->mem.silent_page_addr); 1734 if (sc->mem.silent_page == NULL) { 1735 emu_free(sc, sc->mem.ptb_pages); 1736 return -1; 1737 } 1738 /* Clear page with silence & setup all pointers to this page */ 1739 bzero(sc->mem.silent_page, EMUPAGESIZE); 1740 tmp = (u_int32_t)(sc->mem.silent_page_addr) << 1; 1741 for (i = 0; i < EMUMAXPAGES; i++) 1742 sc->mem.ptb_pages[i] = tmp | i; 1743 1744 emu_wrptr(sc, 0, PTB, (sc->mem.ptb_pages_addr)); 1745 emu_wrptr(sc, 0, TCB, 0); /* taken from original driver */ 1746 emu_wrptr(sc, 0, TCBS, 0); /* taken from original driver */ 1747 1748 for (ch = 0; ch < NUM_G; ch++) { 1749 emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK); 1750 emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK); 1751 } 1752 1753 /* emu_memalloc(sc, EMUPAGESIZE); */ 1754 /* 1755 * Hokay, now enable the AUD bit 1756 * 1757 * Audigy 1758 * Enable Audio = 0 (enabled after fx processor initialization) 1759 * Mute Disable Audio = 0 1760 * Joystick = 1 1761 * 1762 * Audigy 2 1763 * Enable Audio = 1 1764 * Mute Disable Audio = 0 1765 * Joystick = 1 1766 * GP S/PDIF AC3 Enable = 1 1767 * CD S/PDIF AC3 Enable = 1 1768 * 1769 * EMU10K1 1770 * Enable Audio = 1 1771 * Mute Disable Audio = 0 1772 * Lock Tank Memory = 1 1773 * Lock Sound Memory = 0 1774 * Auto Mute = 1 1775 */ 1776 1777 if (sc->audigy) { 1778 tmp = HCFG_AUTOMUTE | HCFG_JOYENABLE; 1779 if (sc->audigy2) /* Audigy 2 */ 1780 tmp = HCFG_AUDIOENABLE | HCFG_AC3ENABLE_CDSPDIF | 1781 HCFG_AC3ENABLE_GPSPDIF; 1782 emu_wr(sc, HCFG, tmp, 4); 1783 1784 audigy_initefx(sc); 1785 1786 /* from ALSA initialization code: */ 1787 1788 /* enable audio and disable both audio/digital outputs */ 1789 emu_wr(sc, HCFG, emu_rd(sc, HCFG, 4) | HCFG_AUDIOENABLE, 4); 1790 emu_wr(sc, A_IOCFG, emu_rd(sc, A_IOCFG, 4) & ~A_IOCFG_GPOUT_AD, 1791 4); 1792 if (sc->audigy2) { /* Audigy 2 */ 1793 /* Unmute Analog. 1794 * Set GPO6 to 1 for Apollo. This has to be done after 1795 * init Alice3 I2SOut beyond 48kHz. 1796 * So, sequence is important. 1797 */ 1798 emu_wr(sc, A_IOCFG, 1799 emu_rd(sc, A_IOCFG, 4) | A_IOCFG_GPOUT_A, 4); 1800 } 1801 } else { 1802 /* EMU10K1 initialization code */ 1803 tmp = HCFG_AUDIOENABLE | HCFG_LOCKTANKCACHE_MASK 1804 | HCFG_AUTOMUTE; 1805 if (sc->rev >= 6) 1806 tmp |= HCFG_JOYENABLE; 1807 1808 emu_wr(sc, HCFG, tmp, 4); 1809 1810 /* TOSLink detection */ 1811 sc->tos_link = 0; 1812 tmp = emu_rd(sc, HCFG, 4); 1813 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) { 1814 emu_wr(sc, HCFG, tmp | HCFG_GPOUT1, 4); 1815 DELAY(50); 1816 if (tmp != (emu_rd(sc, HCFG, 4) & ~HCFG_GPOUT1)) { 1817 sc->tos_link = 1; 1818 emu_wr(sc, HCFG, tmp, 4); 1819 } 1820 } 1821 } 1822 1823 return 0; 1824 } 1825 1826 static int 1827 emu_uninit(struct sc_info *sc) 1828 { 1829 u_int32_t ch; 1830 1831 emu_wr(sc, INTE, 0, 4); 1832 for (ch = 0; ch < NUM_G; ch++) 1833 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF); 1834 for (ch = 0; ch < NUM_G; ch++) { 1835 emu_wrptr(sc, ch, VTFT, 0); 1836 emu_wrptr(sc, ch, CVCF, 0); 1837 emu_wrptr(sc, ch, PTRX, 0); 1838 emu_wrptr(sc, ch, CPF, 0); 1839 } 1840 1841 if (sc->audigy) { /* stop fx processor */ 1842 emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP); 1843 } 1844 1845 /* disable audio and lock cache */ 1846 emu_wr(sc, HCFG, 1847 HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, 1848 4); 1849 1850 emu_wrptr(sc, 0, PTB, 0); 1851 /* reset recording buffers */ 1852 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE); 1853 emu_wrptr(sc, 0, MICBA, 0); 1854 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE); 1855 emu_wrptr(sc, 0, FXBA, 0); 1856 emu_wrptr(sc, 0, FXWC, 0); 1857 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE); 1858 emu_wrptr(sc, 0, ADCBA, 0); 1859 emu_wrptr(sc, 0, TCB, 0); 1860 emu_wrptr(sc, 0, TCBS, 0); 1861 1862 /* disable channel interrupt */ 1863 emu_wrptr(sc, 0, CLIEL, 0); 1864 emu_wrptr(sc, 0, CLIEH, 0); 1865 emu_wrptr(sc, 0, SOLEL, 0); 1866 emu_wrptr(sc, 0, SOLEH, 0); 1867 1868 /* init envelope engine */ 1869 if (!SLIST_EMPTY(&sc->mem.blocks)) 1870 device_printf(sc->dev, "warning: memblock list not empty\n"); 1871 emu_free(sc, sc->mem.ptb_pages); 1872 emu_free(sc, sc->mem.silent_page); 1873 1874 return 0; 1875 } 1876 1877 static int 1878 emu_pci_probe(device_t dev) 1879 { 1880 char *s = NULL; 1881 1882 switch (pci_get_devid(dev)) { 1883 case EMU10K1_PCI_ID: 1884 s = "Creative EMU10K1"; 1885 break; 1886 1887 case EMU10K2_PCI_ID: 1888 if (pci_get_revid(dev) == 0x04) 1889 s = "Creative Audigy 2 (EMU10K2)"; 1890 else 1891 s = "Creative Audigy (EMU10K2)"; 1892 break; 1893 1894 case EMU10K3_PCI_ID: 1895 s = "Creative Audigy 2 (EMU10K3)"; 1896 break; 1897 1898 default: 1899 return ENXIO; 1900 } 1901 1902 device_set_desc(dev, s); 1903 return BUS_PROBE_DEFAULT; 1904 } 1905 1906 static int 1907 emu_pci_attach(device_t dev) 1908 { 1909 struct ac97_info *codec = NULL; 1910 struct sc_info *sc; 1911 u_int32_t data; 1912 int i, gotmic; 1913 char status[SND_STATUSLEN]; 1914 1915 sc = kmalloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO); 1916 1917 sc->lock = snd_mtxcreate(device_get_nameunit(dev), "sound softc"); 1918 sc->dev = dev; 1919 sc->type = pci_get_devid(dev); 1920 sc->rev = pci_get_revid(dev); 1921 sc->audigy = sc->type == EMU10K2_PCI_ID || sc->type == EMU10K3_PCI_ID; 1922 sc->audigy2 = (sc->audigy && sc->rev == 0x04); 1923 sc->nchans = sc->audigy ? 8 : 4; 1924 sc->addrmask = sc->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK; 1925 1926 data = pci_read_config(dev, PCIR_COMMAND, 2); 1927 data |= (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN); 1928 pci_write_config(dev, PCIR_COMMAND, data, 2); 1929 data = pci_read_config(dev, PCIR_COMMAND, 2); 1930 1931 i = PCIR_BAR(0); 1932 sc->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE); 1933 if (sc->reg == NULL) { 1934 device_printf(dev, "unable to map register space\n"); 1935 goto bad; 1936 } 1937 sc->st = rman_get_bustag(sc->reg); 1938 sc->sh = rman_get_bushandle(sc->reg); 1939 1940 sc->bufsz = pcm_getbuffersize(dev, 4096, EMU_DEFAULT_BUFSZ, 65536); 1941 1942 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 1943 /*lowaddr*/1 << 31, /* can only access 0-2gb */ 1944 /*highaddr*/BUS_SPACE_MAXADDR, 1945 /*filter*/NULL, /*filterarg*/NULL, 1946 /*maxsize*/sc->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, 1947 /*flags*/0, 1948 &sc->parent_dmat) != 0) { 1949 device_printf(dev, "unable to create dma tag\n"); 1950 goto bad; 1951 } 1952 1953 if (emu_init(sc) == -1) { 1954 device_printf(dev, "unable to initialize the card\n"); 1955 goto bad; 1956 } 1957 1958 codec = AC97_CREATE(dev, sc, emu_ac97); 1959 if (codec == NULL) goto bad; 1960 gotmic = (ac97_getcaps(codec) & AC97_CAP_MICCHANNEL) ? 1 : 0; 1961 if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) goto bad; 1962 1963 i = 0; 1964 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, 1965 RF_ACTIVE | RF_SHAREABLE); 1966 if (!sc->irq || 1967 snd_setup_intr(dev, sc->irq, INTR_MPSAFE, emu_intr, sc, &sc->ih)) { 1968 device_printf(dev, "unable to map interrupt\n"); 1969 goto bad; 1970 } 1971 1972 ksnprintf(status, SND_STATUSLEN, "at io 0x%lx irq %ld %s", 1973 rman_get_start(sc->reg), rman_get_start(sc->irq), 1974 PCM_KLDSTRING(snd_emu10k1)); 1975 1976 if (pcm_register(dev, sc, sc->nchans, gotmic ? 3 : 2)) goto bad; 1977 for (i = 0; i < sc->nchans; i++) 1978 pcm_addchan(dev, PCMDIR_PLAY, &emupchan_class, sc); 1979 for (i = 0; i < (gotmic ? 3 : 2); i++) 1980 pcm_addchan(dev, PCMDIR_REC, &emurchan_class, sc); 1981 1982 pcm_setstatus(dev, status); 1983 1984 return 0; 1985 1986 bad: 1987 if (codec) ac97_destroy(codec); 1988 if (sc->reg) bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg); 1989 if (sc->ih) bus_teardown_intr(dev, sc->irq, sc->ih); 1990 if (sc->irq) bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 1991 if (sc->parent_dmat) bus_dma_tag_destroy(sc->parent_dmat); 1992 if (sc->lock) snd_mtxfree(sc->lock); 1993 kfree(sc, M_DEVBUF); 1994 return ENXIO; 1995 } 1996 1997 static int 1998 emu_pci_detach(device_t dev) 1999 { 2000 int r; 2001 struct sc_info *sc; 2002 2003 r = pcm_unregister(dev); 2004 if (r) 2005 return r; 2006 2007 sc = pcm_getdevinfo(dev); 2008 /* shutdown chip */ 2009 emu_uninit(sc); 2010 2011 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg); 2012 bus_teardown_intr(dev, sc->irq, sc->ih); 2013 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 2014 bus_dma_tag_destroy(sc->parent_dmat); 2015 snd_mtxfree(sc->lock); 2016 kfree(sc, M_DEVBUF); 2017 2018 return 0; 2019 } 2020 2021 /* add suspend, resume */ 2022 static device_method_t emu_methods[] = { 2023 /* Device interface */ 2024 DEVMETHOD(device_probe, emu_pci_probe), 2025 DEVMETHOD(device_attach, emu_pci_attach), 2026 DEVMETHOD(device_detach, emu_pci_detach), 2027 2028 { 0, 0 } 2029 }; 2030 2031 static driver_t emu_driver = { 2032 "pcm", 2033 emu_methods, 2034 PCM_SOFTC_SIZE, 2035 }; 2036 2037 DRIVER_MODULE(snd_emu10k1, pci, emu_driver, pcm_devclass, NULL, NULL); 2038 DRIVER_MODULE(snd_emu10k1, cardbus, emu_driver, pcm_devclass, NULL, NULL); 2039 MODULE_DEPEND(snd_emu10k1, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); 2040 MODULE_VERSION(snd_emu10k1, 1); 2041 2042 /* dummy driver to silence the joystick device */ 2043 static int 2044 emujoy_pci_probe(device_t dev) 2045 { 2046 char *s = NULL; 2047 2048 switch (pci_get_devid(dev)) { 2049 case 0x70021102: 2050 s = "Creative EMU10K1 Joystick"; 2051 device_quiet(dev); 2052 break; 2053 case 0x70031102: 2054 s = "Creative EMU10K2 Joystick"; 2055 device_quiet(dev); 2056 break; 2057 } 2058 2059 if (s) device_set_desc(dev, s); 2060 return s ? -1000 : ENXIO; 2061 } 2062 2063 static int 2064 emujoy_pci_attach(device_t dev) 2065 { 2066 return 0; 2067 } 2068 2069 static int 2070 emujoy_pci_detach(device_t dev) 2071 { 2072 return 0; 2073 } 2074 2075 static device_method_t emujoy_methods[] = { 2076 DEVMETHOD(device_probe, emujoy_pci_probe), 2077 DEVMETHOD(device_attach, emujoy_pci_attach), 2078 DEVMETHOD(device_detach, emujoy_pci_detach), 2079 2080 { 0, 0 } 2081 }; 2082 2083 static driver_t emujoy_driver = { 2084 "emujoy", 2085 emujoy_methods, 2086 8, 2087 }; 2088 2089 static devclass_t emujoy_devclass; 2090 2091 DRIVER_MODULE(emujoy, pci, emujoy_driver, emujoy_devclass, NULL, NULL); 2092 2093