1 /* 2 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <dev/sound/pcm/sound.h> 28 #include <dev/sound/pcm/ac97.h> 29 #include <gnu/dev/sound/pci/emu10k1.h> 30 31 #include <pci/pcireg.h> 32 #include <pci/pcivar.h> 33 #include <sys/queue.h> 34 35 SND_DECLARE_FILE("$FreeBSD: src/sys/dev/sound/pci/emu10k1.c,v 1.6.2.9 2002/04/22 15:49:32 cg Exp $"); 36 37 /* -------------------------------------------------------------------- */ 38 39 #define EMU10K1_PCI_ID 0x00021102 40 #define EMU10K2_PCI_ID 0x00041102 41 #define EMU_DEFAULT_BUFSZ 4096 42 #define EMU_CHANS 4 43 #undef EMUDEBUG 44 45 struct emu_memblk { 46 SLIST_ENTRY(emu_memblk) link; 47 void *buf; 48 u_int32_t pte_start, pte_size; 49 }; 50 51 struct emu_mem { 52 u_int8_t bmap[MAXPAGES / 8]; 53 u_int32_t *ptb_pages; 54 void *silent_page; 55 SLIST_HEAD(, emu_memblk) blocks; 56 }; 57 58 struct emu_voice { 59 int vnum; 60 int b16:1, stereo:1, busy:1, running:1, ismaster:1; 61 int speed; 62 int start, end, vol; 63 u_int32_t buf; 64 struct emu_voice *slave; 65 struct pcm_channel *channel; 66 }; 67 68 struct sc_info; 69 70 /* channel registers */ 71 struct sc_pchinfo { 72 int spd, fmt, blksz, run; 73 struct emu_voice *master, *slave; 74 struct snd_dbuf *buffer; 75 struct pcm_channel *channel; 76 struct sc_info *parent; 77 }; 78 79 struct sc_rchinfo { 80 int spd, fmt, run, blksz, num; 81 u_int32_t idxreg, basereg, sizereg, setupreg, irqmask; 82 struct snd_dbuf *buffer; 83 struct pcm_channel *channel; 84 struct sc_info *parent; 85 }; 86 87 /* device private data */ 88 struct sc_info { 89 device_t dev; 90 u_int32_t type, rev; 91 u_int32_t tos_link:1, APS:1; 92 93 bus_space_tag_t st; 94 bus_space_handle_t sh; 95 bus_dma_tag_t parent_dmat; 96 97 struct resource *reg, *irq; 98 void *ih; 99 void *lock; 100 101 unsigned int bufsz; 102 int timer, timerinterval; 103 int pnum, rnum; 104 struct emu_mem mem; 105 struct emu_voice voice[64]; 106 struct sc_pchinfo pch[EMU_CHANS]; 107 struct sc_rchinfo rch[3]; 108 }; 109 110 /* -------------------------------------------------------------------- */ 111 112 /* 113 * prototypes 114 */ 115 116 /* stuff */ 117 static int emu_init(struct sc_info *); 118 static void emu_intr(void *); 119 static void *emu_malloc(struct sc_info *sc, u_int32_t sz); 120 static void *emu_memalloc(struct sc_info *sc, u_int32_t sz); 121 static int emu_memfree(struct sc_info *sc, void *buf); 122 static int emu_memstart(struct sc_info *sc, void *buf); 123 #ifdef EMUDEBUG 124 static void emu_vdump(struct sc_info *sc, struct emu_voice *v); 125 #endif 126 127 /* talk to the card */ 128 static u_int32_t emu_rd(struct sc_info *, int, int); 129 static void emu_wr(struct sc_info *, int, u_int32_t, int); 130 131 /* -------------------------------------------------------------------- */ 132 133 static u_int32_t emu_rfmt_ac97[] = { 134 AFMT_S16_LE, 135 AFMT_STEREO | AFMT_S16_LE, 136 0 137 }; 138 139 static u_int32_t emu_rfmt_mic[] = { 140 AFMT_U8, 141 0 142 }; 143 144 static u_int32_t emu_rfmt_efx[] = { 145 AFMT_STEREO | AFMT_S16_LE, 146 0 147 }; 148 149 static struct pcmchan_caps emu_reccaps[3] = { 150 {8000, 48000, emu_rfmt_ac97, 0}, 151 {8000, 8000, emu_rfmt_mic, 0}, 152 {48000, 48000, emu_rfmt_efx, 0}, 153 }; 154 155 static u_int32_t emu_pfmt[] = { 156 AFMT_U8, 157 AFMT_STEREO | AFMT_U8, 158 AFMT_S16_LE, 159 AFMT_STEREO | AFMT_S16_LE, 160 0 161 }; 162 163 static struct pcmchan_caps emu_playcaps = {4000, 48000, emu_pfmt, 0}; 164 165 static int adcspeed[8] = {48000, 44100, 32000, 24000, 22050, 16000, 11025, 8000}; 166 167 /* -------------------------------------------------------------------- */ 168 /* Hardware */ 169 static u_int32_t 170 emu_rd(struct sc_info *sc, int regno, int size) 171 { 172 switch (size) { 173 case 1: 174 return bus_space_read_1(sc->st, sc->sh, regno); 175 case 2: 176 return bus_space_read_2(sc->st, sc->sh, regno); 177 case 4: 178 return bus_space_read_4(sc->st, sc->sh, regno); 179 default: 180 return 0xffffffff; 181 } 182 } 183 184 static void 185 emu_wr(struct sc_info *sc, int regno, u_int32_t data, int size) 186 { 187 switch (size) { 188 case 1: 189 bus_space_write_1(sc->st, sc->sh, regno, data); 190 break; 191 case 2: 192 bus_space_write_2(sc->st, sc->sh, regno, data); 193 break; 194 case 4: 195 bus_space_write_4(sc->st, sc->sh, regno, data); 196 break; 197 } 198 } 199 200 static u_int32_t 201 emu_rdptr(struct sc_info *sc, int chn, int reg) 202 { 203 u_int32_t ptr, val, mask, size, offset; 204 205 ptr = ((reg << 16) & PTR_ADDRESS_MASK) | (chn & PTR_CHANNELNUM_MASK); 206 emu_wr(sc, PTR, ptr, 4); 207 val = emu_rd(sc, DATA, 4); 208 if (reg & 0xff000000) { 209 size = (reg >> 24) & 0x3f; 210 offset = (reg >> 16) & 0x1f; 211 mask = ((1 << size) - 1) << offset; 212 val &= mask; 213 val >>= offset; 214 } 215 return val; 216 } 217 218 static void 219 emu_wrptr(struct sc_info *sc, int chn, int reg, u_int32_t data) 220 { 221 u_int32_t ptr, mask, size, offset; 222 223 ptr = ((reg << 16) & PTR_ADDRESS_MASK) | (chn & PTR_CHANNELNUM_MASK); 224 emu_wr(sc, PTR, ptr, 4); 225 if (reg & 0xff000000) { 226 size = (reg >> 24) & 0x3f; 227 offset = (reg >> 16) & 0x1f; 228 mask = ((1 << size) - 1) << offset; 229 data <<= offset; 230 data &= mask; 231 data |= emu_rd(sc, DATA, 4) & ~mask; 232 } 233 emu_wr(sc, DATA, data, 4); 234 } 235 236 static void 237 emu_wrefx(struct sc_info *sc, unsigned int pc, unsigned int data) 238 { 239 emu_wrptr(sc, 0, MICROCODEBASE + pc, data); 240 } 241 242 /* -------------------------------------------------------------------- */ 243 /* ac97 codec */ 244 /* no locking needed */ 245 246 static int 247 emu_rdcd(kobj_t obj, void *devinfo, int regno) 248 { 249 struct sc_info *sc = (struct sc_info *)devinfo; 250 251 emu_wr(sc, AC97ADDRESS, regno, 1); 252 return emu_rd(sc, AC97DATA, 2); 253 } 254 255 static int 256 emu_wrcd(kobj_t obj, void *devinfo, int regno, u_int32_t data) 257 { 258 struct sc_info *sc = (struct sc_info *)devinfo; 259 260 emu_wr(sc, AC97ADDRESS, regno, 1); 261 emu_wr(sc, AC97DATA, data, 2); 262 return 0; 263 } 264 265 static kobj_method_t emu_ac97_methods[] = { 266 KOBJMETHOD(ac97_read, emu_rdcd), 267 KOBJMETHOD(ac97_write, emu_wrcd), 268 { 0, 0 } 269 }; 270 AC97_DECLARE(emu_ac97); 271 272 /* -------------------------------------------------------------------- */ 273 /* stuff */ 274 static int 275 emu_settimer(struct sc_info *sc) 276 { 277 struct sc_pchinfo *pch; 278 struct sc_rchinfo *rch; 279 int i, tmp, rate; 280 281 rate = 0; 282 for (i = 0; i < EMU_CHANS; i++) { 283 pch = &sc->pch[i]; 284 if (pch->buffer) { 285 tmp = (pch->spd * sndbuf_getbps(pch->buffer)) / pch->blksz; 286 if (tmp > rate) 287 rate = tmp; 288 } 289 } 290 291 for (i = 0; i < 3; i++) { 292 rch = &sc->rch[i]; 293 if (rch->buffer) { 294 tmp = (rch->spd * sndbuf_getbps(rch->buffer)) / rch->blksz; 295 if (tmp > rate) 296 rate = tmp; 297 } 298 } 299 RANGE(rate, 48, 9600); 300 sc->timerinterval = 48000 / rate; 301 emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2); 302 303 return sc->timerinterval; 304 } 305 306 static int 307 emu_enatimer(struct sc_info *sc, int go) 308 { 309 u_int32_t x; 310 if (go) { 311 if (sc->timer++ == 0) { 312 x = emu_rd(sc, INTE, 4); 313 x |= INTE_INTERVALTIMERENB; 314 emu_wr(sc, INTE, x, 4); 315 } 316 } else { 317 sc->timer = 0; 318 x = emu_rd(sc, INTE, 4); 319 x &= ~INTE_INTERVALTIMERENB; 320 emu_wr(sc, INTE, x, 4); 321 } 322 return 0; 323 } 324 325 static void 326 emu_enastop(struct sc_info *sc, char channel, int enable) 327 { 328 int reg = (channel & 0x20)? SOLEH : SOLEL; 329 channel &= 0x1f; 330 reg |= 1 << 24; 331 reg |= channel << 16; 332 emu_wrptr(sc, 0, reg, enable); 333 } 334 335 static int 336 emu_recval(int speed) { 337 int val; 338 339 val = 0; 340 while (val < 7 && speed < adcspeed[val]) 341 val++; 342 return val; 343 } 344 345 static u_int32_t 346 emu_rate_to_pitch(u_int32_t rate) 347 { 348 static u_int32_t logMagTable[128] = { 349 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2, 350 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5, 351 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081, 352 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191, 353 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7, 354 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829, 355 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e, 356 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26, 357 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d, 358 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885, 359 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899, 360 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c, 361 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3, 362 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3, 363 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83, 364 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df 365 }; 366 static char logSlopeTable[128] = { 367 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58, 368 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53, 369 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f, 370 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b, 371 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47, 372 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44, 373 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41, 374 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e, 375 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c, 376 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39, 377 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37, 378 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35, 379 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34, 380 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32, 381 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30, 382 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f 383 }; 384 int i; 385 386 if (rate == 0) 387 return 0; /* Bail out if no leading "1" */ 388 rate *= 11185; /* Scale 48000 to 0x20002380 */ 389 for (i = 31; i > 0; i--) { 390 if (rate & 0x80000000) { /* Detect leading "1" */ 391 return (((u_int32_t) (i - 15) << 20) + 392 logMagTable[0x7f & (rate >> 24)] + 393 (0x7f & (rate >> 17)) * 394 logSlopeTable[0x7f & (rate >> 24)]); 395 } 396 rate <<= 1; 397 } 398 399 return 0; /* Should never reach this point */ 400 } 401 402 static u_int32_t 403 emu_rate_to_linearpitch(u_int32_t rate) 404 { 405 rate = (rate << 8) / 375; 406 return (rate >> 1) + (rate & 1); 407 } 408 409 static struct emu_voice * 410 emu_valloc(struct sc_info *sc) 411 { 412 struct emu_voice *v; 413 int i; 414 415 v = NULL; 416 for (i = 0; i < 64 && sc->voice[i].busy; i++); 417 if (i < 64) { 418 v = &sc->voice[i]; 419 v->busy = 1; 420 } 421 return v; 422 } 423 424 static int 425 emu_vinit(struct sc_info *sc, struct emu_voice *m, struct emu_voice *s, 426 u_int32_t sz, struct snd_dbuf *b) 427 { 428 void *buf; 429 430 buf = emu_memalloc(sc, sz); 431 if (buf == NULL) 432 return -1; 433 if (b != NULL) 434 sndbuf_setup(b, buf, sz); 435 m->start = emu_memstart(sc, buf) * EMUPAGESIZE; 436 m->end = m->start + sz; 437 m->channel = NULL; 438 m->speed = 0; 439 m->b16 = 0; 440 m->stereo = 0; 441 m->running = 0; 442 m->ismaster = 1; 443 m->vol = 0xff; 444 m->buf = vtophys(buf); 445 m->slave = s; 446 if (s != NULL) { 447 s->start = m->start; 448 s->end = m->end; 449 s->channel = NULL; 450 s->speed = 0; 451 s->b16 = 0; 452 s->stereo = 0; 453 s->running = 0; 454 s->ismaster = 0; 455 s->vol = m->vol; 456 s->buf = m->buf; 457 s->slave = NULL; 458 } 459 return 0; 460 } 461 462 static void 463 emu_vsetup(struct sc_pchinfo *ch) 464 { 465 struct emu_voice *v = ch->master; 466 467 if (ch->fmt) { 468 v->b16 = (ch->fmt & AFMT_16BIT)? 1 : 0; 469 v->stereo = (ch->fmt & AFMT_STEREO)? 1 : 0; 470 if (v->slave != NULL) { 471 v->slave->b16 = v->b16; 472 v->slave->stereo = v->stereo; 473 } 474 } 475 if (ch->spd) { 476 v->speed = ch->spd; 477 if (v->slave != NULL) 478 v->slave->speed = v->speed; 479 } 480 } 481 482 static void 483 emu_vwrite(struct sc_info *sc, struct emu_voice *v) 484 { 485 int s; 486 int l, r, x, y; 487 u_int32_t sa, ea, start, val, silent_page; 488 489 s = (v->stereo? 1 : 0) + (v->b16? 1 : 0); 490 491 sa = v->start >> s; 492 ea = v->end >> s; 493 494 l = r = x = y = v->vol; 495 if (v->stereo) { 496 l = v->ismaster? l : 0; 497 r = v->ismaster? 0 : r; 498 } 499 500 emu_wrptr(sc, v->vnum, CPF, v->stereo? CPF_STEREO_MASK : 0); 501 val = v->stereo? 28 : 30; 502 val *= v->b16? 1 : 2; 503 start = sa + val; 504 505 emu_wrptr(sc, v->vnum, FXRT, 0xd01c0000); 506 507 emu_wrptr(sc, v->vnum, PTRX, (x << 8) | r); 508 emu_wrptr(sc, v->vnum, DSL, ea | (y << 24)); 509 emu_wrptr(sc, v->vnum, PSST, sa | (l << 24)); 510 emu_wrptr(sc, v->vnum, CCCA, start | (v->b16? 0 : CCCA_8BITSELECT)); 511 512 emu_wrptr(sc, v->vnum, Z1, 0); 513 emu_wrptr(sc, v->vnum, Z2, 0); 514 515 silent_page = ((u_int32_t)vtophys(sc->mem.silent_page) << 1) | MAP_PTI_MASK; 516 emu_wrptr(sc, v->vnum, MAPA, silent_page); 517 emu_wrptr(sc, v->vnum, MAPB, silent_page); 518 519 emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK); 520 emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK); 521 emu_wrptr(sc, v->vnum, ATKHLDM, 0); 522 emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK); 523 emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000); 524 emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000); 525 emu_wrptr(sc, v->vnum, FMMOD, 0); 526 emu_wrptr(sc, v->vnum, TREMFRQ, 0); 527 emu_wrptr(sc, v->vnum, FM2FRQ2, 0); 528 emu_wrptr(sc, v->vnum, ENVVAL, 0x8000); 529 530 emu_wrptr(sc, v->vnum, ATKHLDV, ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK); 531 emu_wrptr(sc, v->vnum, ENVVOL, 0x8000); 532 533 emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f); 534 emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0); 535 536 if (v->slave != NULL) 537 emu_vwrite(sc, v->slave); 538 } 539 540 static void 541 emu_vtrigger(struct sc_info *sc, struct emu_voice *v, int go) 542 { 543 u_int32_t pitch_target, initial_pitch; 544 u_int32_t cra, cs, ccis; 545 u_int32_t sample, i; 546 547 if (go) { 548 cra = 64; 549 cs = v->stereo? 4 : 2; 550 ccis = v->stereo? 28 : 30; 551 ccis *= v->b16? 1 : 2; 552 sample = v->b16? 0x00000000 : 0x80808080; 553 554 for (i = 0; i < cs; i++) 555 emu_wrptr(sc, v->vnum, CD0 + i, sample); 556 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0); 557 emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra); 558 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis); 559 560 emu_wrptr(sc, v->vnum, IFATN, 0xff00); 561 emu_wrptr(sc, v->vnum, VTFT, 0xffffffff); 562 emu_wrptr(sc, v->vnum, CVCF, 0xffffffff); 563 emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f); 564 emu_enastop(sc, v->vnum, 0); 565 566 pitch_target = emu_rate_to_linearpitch(v->speed); 567 initial_pitch = emu_rate_to_pitch(v->speed) >> 8; 568 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target); 569 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target); 570 emu_wrptr(sc, v->vnum, IP, initial_pitch); 571 } else { 572 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0); 573 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0); 574 emu_wrptr(sc, v->vnum, IFATN, 0xffff); 575 emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff); 576 emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff); 577 emu_wrptr(sc, v->vnum, IP, 0); 578 emu_enastop(sc, v->vnum, 1); 579 } 580 if (v->slave != NULL) 581 emu_vtrigger(sc, v->slave, go); 582 } 583 584 static int 585 emu_vpos(struct sc_info *sc, struct emu_voice *v) 586 { 587 int s, ptr; 588 589 s = (v->b16? 1 : 0) + (v->stereo? 1 : 0); 590 ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s; 591 return ptr & ~0x0000001f; 592 } 593 594 #ifdef EMUDEBUG 595 static void 596 emu_vdump(struct sc_info *sc, struct emu_voice *v) 597 { 598 char *regname[] = { "cpf", "ptrx", "cvcf", "vtft", "z2", "z1", "psst", "dsl", 599 "ccca", "ccr", "clp", "fxrt", "mapa", "mapb", NULL, NULL, 600 "envvol", "atkhldv", "dcysusv", "lfoval1", 601 "envval", "atkhldm", "dcysusm", "lfoval2", 602 "ip", "ifatn", "pefe", "fmmod", "tremfrq", "fmfrq2", 603 "tempenv" }; 604 int i, x; 605 606 printf("voice number %d\n", v->vnum); 607 for (i = 0, x = 0; i <= 0x1e; i++) { 608 if (regname[i] == NULL) 609 continue; 610 printf("%s\t[%08x]", regname[i], emu_rdptr(sc, v->vnum, i)); 611 printf("%s", (x == 2)? "\n" : "\t"); 612 x++; 613 if (x > 2) 614 x = 0; 615 } 616 printf("\n\n"); 617 } 618 #endif 619 620 /* channel interface */ 621 static void * 622 emupchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) 623 { 624 struct sc_info *sc = devinfo; 625 struct sc_pchinfo *ch; 626 void *r; 627 628 KASSERT(dir == PCMDIR_PLAY, ("emupchan_init: bad direction")); 629 ch = &sc->pch[sc->pnum++]; 630 ch->buffer = b; 631 ch->parent = sc; 632 ch->channel = c; 633 ch->blksz = sc->bufsz / 2; 634 ch->fmt = AFMT_U8; 635 ch->spd = 8000; 636 snd_mtxlock(sc->lock); 637 ch->master = emu_valloc(sc); 638 ch->slave = emu_valloc(sc); 639 r = (emu_vinit(sc, ch->master, ch->slave, sc->bufsz, ch->buffer))? NULL : ch; 640 snd_mtxunlock(sc->lock); 641 642 return r; 643 } 644 645 static int 646 emupchan_free(kobj_t obj, void *data) 647 { 648 struct sc_pchinfo *ch = data; 649 struct sc_info *sc = ch->parent; 650 int r; 651 652 snd_mtxlock(sc->lock); 653 r = emu_memfree(sc, sndbuf_getbuf(ch->buffer)); 654 snd_mtxunlock(sc->lock); 655 656 return r; 657 } 658 659 static int 660 emupchan_setformat(kobj_t obj, void *data, u_int32_t format) 661 { 662 struct sc_pchinfo *ch = data; 663 664 ch->fmt = format; 665 return 0; 666 } 667 668 static int 669 emupchan_setspeed(kobj_t obj, void *data, u_int32_t speed) 670 { 671 struct sc_pchinfo *ch = data; 672 673 ch->spd = speed; 674 return ch->spd; 675 } 676 677 static int 678 emupchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 679 { 680 struct sc_pchinfo *ch = data; 681 struct sc_info *sc = ch->parent; 682 int irqrate, blksz; 683 684 ch->blksz = blocksize; 685 snd_mtxlock(sc->lock); 686 emu_settimer(sc); 687 irqrate = 48000 / sc->timerinterval; 688 snd_mtxunlock(sc->lock); 689 blksz = (ch->spd * sndbuf_getbps(ch->buffer)) / irqrate; 690 return blocksize; 691 } 692 693 static int 694 emupchan_trigger(kobj_t obj, void *data, int go) 695 { 696 struct sc_pchinfo *ch = data; 697 struct sc_info *sc = ch->parent; 698 699 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD) 700 return 0; 701 702 snd_mtxlock(sc->lock); 703 if (go == PCMTRIG_START) { 704 emu_vsetup(ch); 705 emu_vwrite(sc, ch->master); 706 emu_settimer(sc); 707 emu_enatimer(sc, 1); 708 #ifdef EMUDEBUG 709 printf("start [%d bit, %s, %d hz]\n", 710 ch->master->b16? 16 : 8, 711 ch->master->stereo? "stereo" : "mono", 712 ch->master->speed); 713 emu_vdump(sc, ch->master); 714 emu_vdump(sc, ch->slave); 715 #endif 716 } 717 ch->run = (go == PCMTRIG_START)? 1 : 0; 718 emu_vtrigger(sc, ch->master, ch->run); 719 snd_mtxunlock(sc->lock); 720 return 0; 721 } 722 723 static int 724 emupchan_getptr(kobj_t obj, void *data) 725 { 726 struct sc_pchinfo *ch = data; 727 struct sc_info *sc = ch->parent; 728 int r; 729 730 snd_mtxlock(sc->lock); 731 r = emu_vpos(sc, ch->master); 732 snd_mtxunlock(sc->lock); 733 734 return r; 735 } 736 737 static struct pcmchan_caps * 738 emupchan_getcaps(kobj_t obj, void *data) 739 { 740 return &emu_playcaps; 741 } 742 743 static kobj_method_t emupchan_methods[] = { 744 KOBJMETHOD(channel_init, emupchan_init), 745 KOBJMETHOD(channel_free, emupchan_free), 746 KOBJMETHOD(channel_setformat, emupchan_setformat), 747 KOBJMETHOD(channel_setspeed, emupchan_setspeed), 748 KOBJMETHOD(channel_setblocksize, emupchan_setblocksize), 749 KOBJMETHOD(channel_trigger, emupchan_trigger), 750 KOBJMETHOD(channel_getptr, emupchan_getptr), 751 KOBJMETHOD(channel_getcaps, emupchan_getcaps), 752 { 0, 0 } 753 }; 754 CHANNEL_DECLARE(emupchan); 755 756 /* channel interface */ 757 static void * 758 emurchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) 759 { 760 struct sc_info *sc = devinfo; 761 struct sc_rchinfo *ch; 762 763 KASSERT(dir == PCMDIR_REC, ("emurchan_init: bad direction")); 764 ch = &sc->rch[sc->rnum]; 765 ch->buffer = b; 766 ch->parent = sc; 767 ch->channel = c; 768 ch->blksz = sc->bufsz / 2; 769 ch->fmt = AFMT_U8; 770 ch->spd = 8000; 771 ch->num = sc->rnum; 772 switch(sc->rnum) { 773 case 0: 774 ch->idxreg = ADCIDX; 775 ch->basereg = ADCBA; 776 ch->sizereg = ADCBS; 777 ch->setupreg = ADCCR; 778 ch->irqmask = INTE_ADCBUFENABLE; 779 break; 780 781 case 1: 782 ch->idxreg = FXIDX; 783 ch->basereg = FXBA; 784 ch->sizereg = FXBS; 785 ch->setupreg = FXWC; 786 ch->irqmask = INTE_EFXBUFENABLE; 787 break; 788 789 case 2: 790 ch->idxreg = MICIDX; 791 ch->basereg = MICBA; 792 ch->sizereg = MICBS; 793 ch->setupreg = 0; 794 ch->irqmask = INTE_MICBUFENABLE; 795 break; 796 } 797 sc->rnum++; 798 if (sndbuf_alloc(ch->buffer, sc->parent_dmat, sc->bufsz) == -1) 799 return NULL; 800 else { 801 snd_mtxlock(sc->lock); 802 emu_wrptr(sc, 0, ch->basereg, vtophys(sndbuf_getbuf(ch->buffer))); 803 emu_wrptr(sc, 0, ch->sizereg, 0); /* off */ 804 snd_mtxunlock(sc->lock); 805 return ch; 806 } 807 } 808 809 static int 810 emurchan_setformat(kobj_t obj, void *data, u_int32_t format) 811 { 812 struct sc_rchinfo *ch = data; 813 814 ch->fmt = format; 815 return 0; 816 } 817 818 static int 819 emurchan_setspeed(kobj_t obj, void *data, u_int32_t speed) 820 { 821 struct sc_rchinfo *ch = data; 822 823 if (ch->num == 0) 824 speed = adcspeed[emu_recval(speed)]; 825 if (ch->num == 1) 826 speed = 48000; 827 if (ch->num == 2) 828 speed = 8000; 829 ch->spd = speed; 830 return ch->spd; 831 } 832 833 static int 834 emurchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 835 { 836 struct sc_rchinfo *ch = data; 837 struct sc_info *sc = ch->parent; 838 int irqrate, blksz; 839 840 ch->blksz = blocksize; 841 snd_mtxlock(sc->lock); 842 emu_settimer(sc); 843 irqrate = 48000 / sc->timerinterval; 844 snd_mtxunlock(sc->lock); 845 blksz = (ch->spd * sndbuf_getbps(ch->buffer)) / irqrate; 846 return blocksize; 847 } 848 849 /* semantic note: must start at beginning of buffer */ 850 static int 851 emurchan_trigger(kobj_t obj, void *data, int go) 852 { 853 struct sc_rchinfo *ch = data; 854 struct sc_info *sc = ch->parent; 855 u_int32_t val, sz; 856 857 switch(sc->bufsz) { 858 case 4096: 859 sz = ADCBS_BUFSIZE_4096; 860 break; 861 862 case 8192: 863 sz = ADCBS_BUFSIZE_8192; 864 break; 865 866 case 16384: 867 sz = ADCBS_BUFSIZE_16384; 868 break; 869 870 case 32768: 871 sz = ADCBS_BUFSIZE_32768; 872 break; 873 874 case 65536: 875 sz = ADCBS_BUFSIZE_65536; 876 break; 877 878 default: 879 sz = ADCBS_BUFSIZE_4096; 880 } 881 882 snd_mtxlock(sc->lock); 883 switch(go) { 884 case PCMTRIG_START: 885 ch->run = 1; 886 emu_wrptr(sc, 0, ch->sizereg, sz); 887 if (ch->num == 0) { 888 val = ADCCR_LCHANENABLE; 889 if (ch->fmt & AFMT_STEREO) 890 val |= ADCCR_RCHANENABLE; 891 val |= emu_recval(ch->spd); 892 emu_wrptr(sc, 0, ch->setupreg, 0); 893 emu_wrptr(sc, 0, ch->setupreg, val); 894 } 895 val = emu_rd(sc, INTE, 4); 896 val |= ch->irqmask; 897 emu_wr(sc, INTE, val, 4); 898 break; 899 900 case PCMTRIG_STOP: 901 case PCMTRIG_ABORT: 902 ch->run = 0; 903 emu_wrptr(sc, 0, ch->sizereg, 0); 904 if (ch->setupreg) 905 emu_wrptr(sc, 0, ch->setupreg, 0); 906 val = emu_rd(sc, INTE, 4); 907 val &= ~ch->irqmask; 908 emu_wr(sc, INTE, val, 4); 909 break; 910 911 case PCMTRIG_EMLDMAWR: 912 case PCMTRIG_EMLDMARD: 913 default: 914 break; 915 } 916 snd_mtxunlock(sc->lock); 917 918 return 0; 919 } 920 921 static int 922 emurchan_getptr(kobj_t obj, void *data) 923 { 924 struct sc_rchinfo *ch = data; 925 struct sc_info *sc = ch->parent; 926 int r; 927 928 snd_mtxlock(sc->lock); 929 r = emu_rdptr(sc, 0, ch->idxreg) & 0x0000ffff; 930 snd_mtxunlock(sc->lock); 931 932 return r; 933 } 934 935 static struct pcmchan_caps * 936 emurchan_getcaps(kobj_t obj, void *data) 937 { 938 struct sc_rchinfo *ch = data; 939 940 return &emu_reccaps[ch->num]; 941 } 942 943 static kobj_method_t emurchan_methods[] = { 944 KOBJMETHOD(channel_init, emurchan_init), 945 KOBJMETHOD(channel_setformat, emurchan_setformat), 946 KOBJMETHOD(channel_setspeed, emurchan_setspeed), 947 KOBJMETHOD(channel_setblocksize, emurchan_setblocksize), 948 KOBJMETHOD(channel_trigger, emurchan_trigger), 949 KOBJMETHOD(channel_getptr, emurchan_getptr), 950 KOBJMETHOD(channel_getcaps, emurchan_getcaps), 951 { 0, 0 } 952 }; 953 CHANNEL_DECLARE(emurchan); 954 955 /* -------------------------------------------------------------------- */ 956 /* The interrupt handler */ 957 static void 958 emu_intr(void *p) 959 { 960 struct sc_info *sc = (struct sc_info *)p; 961 u_int32_t stat, ack, i, x; 962 963 while (1) { 964 stat = emu_rd(sc, IPR, 4); 965 if (stat == 0) 966 break; 967 ack = 0; 968 969 /* process irq */ 970 if (stat & IPR_INTERVALTIMER) { 971 ack |= IPR_INTERVALTIMER; 972 x = 0; 973 for (i = 0; i < EMU_CHANS; i++) { 974 if (sc->pch[i].run) { 975 x = 1; 976 chn_intr(sc->pch[i].channel); 977 } 978 } 979 if (x == 0) 980 emu_enatimer(sc, 0); 981 } 982 983 984 if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) { 985 ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL); 986 if (sc->rch[0].channel) 987 chn_intr(sc->rch[0].channel); 988 } 989 if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) { 990 ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL); 991 if (sc->rch[1].channel) 992 chn_intr(sc->rch[1].channel); 993 } 994 if (stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL)) { 995 ack |= stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL); 996 if (sc->rch[2].channel) 997 chn_intr(sc->rch[2].channel); 998 } 999 if (stat & IPR_PCIERROR) { 1000 ack |= IPR_PCIERROR; 1001 device_printf(sc->dev, "pci error\n"); 1002 /* we still get an nmi with ecc ram even if we ack this */ 1003 } 1004 if (stat & IPR_SAMPLERATETRACKER) { 1005 ack |= IPR_SAMPLERATETRACKER; 1006 /* device_printf(sc->dev, "sample rate tracker lock status change\n"); */ 1007 } 1008 1009 if (stat & ~ack) 1010 device_printf(sc->dev, "dodgy irq: %x (harmless)\n", stat & ~ack); 1011 1012 emu_wr(sc, IPR, stat, 4); 1013 } 1014 } 1015 1016 /* -------------------------------------------------------------------- */ 1017 1018 static void 1019 emu_setmap(void *arg, bus_dma_segment_t *segs, int nseg, int error) 1020 { 1021 void **phys = arg; 1022 1023 *phys = error? 0 : (void *)segs->ds_addr; 1024 1025 if (bootverbose) { 1026 printf("emu: setmap (%lx, %lx), nseg=%d, error=%d\n", 1027 (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len, 1028 nseg, error); 1029 } 1030 } 1031 1032 static void * 1033 emu_malloc(struct sc_info *sc, u_int32_t sz) 1034 { 1035 void *buf, *phys = 0; 1036 bus_dmamap_t map; 1037 1038 if (bus_dmamem_alloc(sc->parent_dmat, &buf, BUS_DMA_NOWAIT, &map)) 1039 return NULL; 1040 if (bus_dmamap_load(sc->parent_dmat, map, buf, sz, emu_setmap, &phys, 0) 1041 || !phys) 1042 return NULL; 1043 return buf; 1044 } 1045 1046 static void 1047 emu_free(struct sc_info *sc, void *buf) 1048 { 1049 bus_dmamem_free(sc->parent_dmat, buf, NULL); 1050 } 1051 1052 static void * 1053 emu_memalloc(struct sc_info *sc, u_int32_t sz) 1054 { 1055 u_int32_t blksz, start, idx, ofs, tmp, found; 1056 struct emu_mem *mem = &sc->mem; 1057 struct emu_memblk *blk; 1058 void *buf; 1059 1060 blksz = sz / EMUPAGESIZE; 1061 if (sz > (blksz * EMUPAGESIZE)) 1062 blksz++; 1063 /* find a free block in the bitmap */ 1064 found = 0; 1065 start = 1; 1066 while (!found && start + blksz < MAXPAGES) { 1067 found = 1; 1068 for (idx = start; idx < start + blksz; idx++) 1069 if (mem->bmap[idx >> 3] & (1 << (idx & 7))) 1070 found = 0; 1071 if (!found) 1072 start++; 1073 } 1074 if (!found) 1075 return NULL; 1076 blk = malloc(sizeof(*blk), M_DEVBUF, M_NOWAIT); 1077 if (blk == NULL) 1078 return NULL; 1079 buf = emu_malloc(sc, sz); 1080 if (buf == NULL) { 1081 free(blk, M_DEVBUF); 1082 return NULL; 1083 } 1084 blk->buf = buf; 1085 blk->pte_start = start; 1086 blk->pte_size = blksz; 1087 /* printf("buf %p, pte_start %d, pte_size %d\n", blk->buf, blk->pte_start, blk->pte_size); */ 1088 ofs = 0; 1089 for (idx = start; idx < start + blksz; idx++) { 1090 mem->bmap[idx >> 3] |= 1 << (idx & 7); 1091 tmp = (u_int32_t)vtophys((u_int8_t *)buf + ofs); 1092 /* printf("pte[%d] -> %x phys, %x virt\n", idx, tmp, ((u_int32_t)buf) + ofs); */ 1093 mem->ptb_pages[idx] = (tmp << 1) | idx; 1094 ofs += EMUPAGESIZE; 1095 } 1096 SLIST_INSERT_HEAD(&mem->blocks, blk, link); 1097 return buf; 1098 } 1099 1100 static int 1101 emu_memfree(struct sc_info *sc, void *buf) 1102 { 1103 u_int32_t idx, tmp; 1104 struct emu_mem *mem = &sc->mem; 1105 struct emu_memblk *blk, *i; 1106 1107 blk = NULL; 1108 SLIST_FOREACH(i, &mem->blocks, link) { 1109 if (i->buf == buf) 1110 blk = i; 1111 } 1112 if (blk == NULL) 1113 return EINVAL; 1114 SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link); 1115 emu_free(sc, buf); 1116 tmp = (u_int32_t)vtophys(sc->mem.silent_page) << 1; 1117 for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) { 1118 mem->bmap[idx >> 3] &= ~(1 << (idx & 7)); 1119 mem->ptb_pages[idx] = tmp | idx; 1120 } 1121 free(blk, M_DEVBUF); 1122 return 0; 1123 } 1124 1125 static int 1126 emu_memstart(struct sc_info *sc, void *buf) 1127 { 1128 struct emu_mem *mem = &sc->mem; 1129 struct emu_memblk *blk, *i; 1130 1131 blk = NULL; 1132 SLIST_FOREACH(i, &mem->blocks, link) { 1133 if (i->buf == buf) 1134 blk = i; 1135 } 1136 if (blk == NULL) 1137 return -EINVAL; 1138 return blk->pte_start; 1139 } 1140 1141 static void 1142 emu_addefxop(struct sc_info *sc, int op, int z, int w, int x, int y, u_int32_t *pc) 1143 { 1144 emu_wrefx(sc, (*pc) * 2, (x << 10) | y); 1145 emu_wrefx(sc, (*pc) * 2 + 1, (op << 20) | (z << 10) | w); 1146 (*pc)++; 1147 } 1148 1149 static void 1150 emu_initefx(struct sc_info *sc) 1151 { 1152 int i; 1153 u_int32_t pc = 16; 1154 1155 for (i = 0; i < 512; i++) { 1156 emu_wrefx(sc, i * 2, 0x10040); 1157 emu_wrefx(sc, i * 2 + 1, 0x610040); 1158 } 1159 1160 for (i = 0; i < 256; i++) 1161 emu_wrptr(sc, 0, FXGPREGBASE + i, 0); 1162 1163 /* FX-8010 DSP Registers: 1164 FX Bus 1165 0x000-0x00f : 16 registers 1166 Input 1167 0x010/0x011 : AC97 Codec (l/r) 1168 0x012/0x013 : ADC, S/PDIF (l/r) 1169 0x014/0x015 : Mic(left), Zoom (l/r) 1170 0x016/0x017 : APS S/PDIF?? (l/r) 1171 Output 1172 0x020/0x021 : AC97 Output (l/r) 1173 0x022/0x023 : TOS link out (l/r) 1174 0x024/0x025 : ??? (l/r) 1175 0x026/0x027 : LiveDrive Headphone (l/r) 1176 0x028/0x029 : Rear Channel (l/r) 1177 0x02a/0x02b : ADC Recording Buffer (l/r) 1178 Constants 1179 0x040 - 0x044 = 0 - 4 1180 0x045 = 0x8, 0x046 = 0x10, 0x047 = 0x20 1181 0x048 = 0x100, 0x049 = 0x10000, 0x04a = 0x80000 1182 0x04b = 0x10000000, 0x04c = 0x20000000, 0x04d = 0x40000000 1183 0x04e = 0x80000000, 0x04f = 0x7fffffff 1184 Temporary Values 1185 0x056 : Accumulator 1186 0x058 : Noise source? 1187 0x059 : Noise source? 1188 General Purpose Registers 1189 0x100 - 0x1ff 1190 Tank Memory Data Registers 1191 0x200 - 0x2ff 1192 Tank Memory Address Registers 1193 0x300 - 0x3ff 1194 */ 1195 1196 /* Operators: 1197 0 : z := w + (x * y >> 31) 1198 4 : z := w + x * y 1199 6 : z := w + x + y 1200 */ 1201 1202 /* Routing - this will be configurable in later version */ 1203 1204 /* GPR[0/1] = FX * 4 + SPDIF-in */ 1205 emu_addefxop(sc, 4, 0x100, 0x12, 0, 0x44, &pc); 1206 emu_addefxop(sc, 4, 0x101, 0x13, 1, 0x44, &pc); 1207 /* GPR[0/1] += APS-input */ 1208 emu_addefxop(sc, 6, 0x100, 0x100, 0x40, sc->APS ? 0x16 : 0x40, &pc); 1209 emu_addefxop(sc, 6, 0x101, 0x101, 0x40, sc->APS ? 0x17 : 0x40, &pc); 1210 /* FrontOut (AC97) = GPR[0/1] */ 1211 emu_addefxop(sc, 6, 0x20, 0x40, 0x40, 0x100, &pc); 1212 emu_addefxop(sc, 6, 0x21, 0x40, 0x41, 0x101, &pc); 1213 /* RearOut = (GPR[0/1] * RearVolume) >> 31 */ 1214 /* RearVolume = GRP[0x10/0x11] */ 1215 emu_addefxop(sc, 0, 0x28, 0x40, 0x110, 0x100, &pc); 1216 emu_addefxop(sc, 0, 0x29, 0x40, 0x111, 0x101, &pc); 1217 /* TOS out = GPR[0/1] */ 1218 emu_addefxop(sc, 6, 0x22, 0x40, 0x40, 0x100, &pc); 1219 emu_addefxop(sc, 6, 0x23, 0x40, 0x40, 0x101, &pc); 1220 /* Mute Out2 */ 1221 emu_addefxop(sc, 6, 0x24, 0x40, 0x40, 0x40, &pc); 1222 emu_addefxop(sc, 6, 0x25, 0x40, 0x40, 0x40, &pc); 1223 /* Mute Out3 */ 1224 emu_addefxop(sc, 6, 0x26, 0x40, 0x40, 0x40, &pc); 1225 emu_addefxop(sc, 6, 0x27, 0x40, 0x40, 0x40, &pc); 1226 /* Input0 (AC97) -> Record */ 1227 emu_addefxop(sc, 6, 0x2a, 0x40, 0x40, 0x10, &pc); 1228 emu_addefxop(sc, 6, 0x2b, 0x40, 0x40, 0x11, &pc); 1229 1230 emu_wrptr(sc, 0, DBG, 0); 1231 } 1232 1233 /* Probe and attach the card */ 1234 static int 1235 emu_init(struct sc_info *sc) 1236 { 1237 u_int32_t spcs, ch, tmp, i; 1238 1239 /* disable audio and lock cache */ 1240 emu_wr(sc, HCFG, HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE | HCFG_MUTEBUTTONENABLE, 4); 1241 1242 /* reset recording buffers */ 1243 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE); 1244 emu_wrptr(sc, 0, MICBA, 0); 1245 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE); 1246 emu_wrptr(sc, 0, FXBA, 0); 1247 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE); 1248 emu_wrptr(sc, 0, ADCBA, 0); 1249 1250 /* disable channel interrupt */ 1251 emu_wr(sc, INTE, INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE, 4); 1252 emu_wrptr(sc, 0, CLIEL, 0); 1253 emu_wrptr(sc, 0, CLIEH, 0); 1254 emu_wrptr(sc, 0, SOLEL, 0); 1255 emu_wrptr(sc, 0, SOLEH, 0); 1256 1257 /* init envelope engine */ 1258 for (ch = 0; ch < NUM_G; ch++) { 1259 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF); 1260 emu_wrptr(sc, ch, IP, 0); 1261 emu_wrptr(sc, ch, VTFT, 0xffff); 1262 emu_wrptr(sc, ch, CVCF, 0xffff); 1263 emu_wrptr(sc, ch, PTRX, 0); 1264 emu_wrptr(sc, ch, CPF, 0); 1265 emu_wrptr(sc, ch, CCR, 0); 1266 1267 emu_wrptr(sc, ch, PSST, 0); 1268 emu_wrptr(sc, ch, DSL, 0x10); 1269 emu_wrptr(sc, ch, CCCA, 0); 1270 emu_wrptr(sc, ch, Z1, 0); 1271 emu_wrptr(sc, ch, Z2, 0); 1272 emu_wrptr(sc, ch, FXRT, 0xd01c0000); 1273 1274 emu_wrptr(sc, ch, ATKHLDM, 0); 1275 emu_wrptr(sc, ch, DCYSUSM, 0); 1276 emu_wrptr(sc, ch, IFATN, 0xffff); 1277 emu_wrptr(sc, ch, PEFE, 0); 1278 emu_wrptr(sc, ch, FMMOD, 0); 1279 emu_wrptr(sc, ch, TREMFRQ, 24); /* 1 Hz */ 1280 emu_wrptr(sc, ch, FM2FRQ2, 24); /* 1 Hz */ 1281 emu_wrptr(sc, ch, TEMPENV, 0); 1282 1283 /*** these are last so OFF prevents writing ***/ 1284 emu_wrptr(sc, ch, LFOVAL2, 0); 1285 emu_wrptr(sc, ch, LFOVAL1, 0); 1286 emu_wrptr(sc, ch, ATKHLDV, 0); 1287 emu_wrptr(sc, ch, ENVVOL, 0); 1288 emu_wrptr(sc, ch, ENVVAL, 0); 1289 1290 sc->voice[ch].vnum = ch; 1291 sc->voice[ch].slave = NULL; 1292 sc->voice[ch].busy = 0; 1293 sc->voice[ch].ismaster = 0; 1294 sc->voice[ch].running = 0; 1295 sc->voice[ch].b16 = 0; 1296 sc->voice[ch].stereo = 0; 1297 sc->voice[ch].speed = 0; 1298 sc->voice[ch].start = 0; 1299 sc->voice[ch].end = 0; 1300 sc->voice[ch].channel = NULL; 1301 } 1302 sc->pnum = sc->rnum = 0; 1303 1304 /* 1305 * Init to 0x02109204 : 1306 * Clock accuracy = 0 (1000ppm) 1307 * Sample Rate = 2 (48kHz) 1308 * Audio Channel = 1 (Left of 2) 1309 * Source Number = 0 (Unspecified) 1310 * Generation Status = 1 (Original for Cat Code 12) 1311 * Cat Code = 12 (Digital Signal Mixer) 1312 * Mode = 0 (Mode 0) 1313 * Emphasis = 0 (None) 1314 * CP = 1 (Copyright unasserted) 1315 * AN = 0 (Audio data) 1316 * P = 0 (Consumer) 1317 */ 1318 spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 1319 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 1320 SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 | 1321 SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT; 1322 emu_wrptr(sc, 0, SPCS0, spcs); 1323 emu_wrptr(sc, 0, SPCS1, spcs); 1324 emu_wrptr(sc, 0, SPCS2, spcs); 1325 1326 emu_initefx(sc); 1327 1328 SLIST_INIT(&sc->mem.blocks); 1329 sc->mem.ptb_pages = emu_malloc(sc, MAXPAGES * sizeof(u_int32_t)); 1330 if (sc->mem.ptb_pages == NULL) 1331 return -1; 1332 1333 sc->mem.silent_page = emu_malloc(sc, EMUPAGESIZE); 1334 if (sc->mem.silent_page == NULL) { 1335 emu_free(sc, sc->mem.ptb_pages); 1336 return -1; 1337 } 1338 /* Clear page with silence & setup all pointers to this page */ 1339 bzero(sc->mem.silent_page, EMUPAGESIZE); 1340 tmp = (u_int32_t)vtophys(sc->mem.silent_page) << 1; 1341 for (i = 0; i < MAXPAGES; i++) 1342 sc->mem.ptb_pages[i] = tmp | i; 1343 1344 emu_wrptr(sc, 0, PTB, vtophys(sc->mem.ptb_pages)); 1345 emu_wrptr(sc, 0, TCB, 0); /* taken from original driver */ 1346 emu_wrptr(sc, 0, TCBS, 0); /* taken from original driver */ 1347 1348 for (ch = 0; ch < NUM_G; ch++) { 1349 emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK); 1350 emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK); 1351 } 1352 1353 /* emu_memalloc(sc, EMUPAGESIZE); */ 1354 /* 1355 * Hokay, now enable the AUD bit 1356 * Enable Audio = 1 1357 * Mute Disable Audio = 0 1358 * Lock Tank Memory = 1 1359 * Lock Sound Memory = 0 1360 * Auto Mute = 1 1361 */ 1362 tmp = HCFG_AUDIOENABLE | HCFG_LOCKTANKCACHE | HCFG_AUTOMUTE; 1363 if (sc->rev >= 6) 1364 tmp |= HCFG_JOYENABLE; 1365 emu_wr(sc, HCFG, tmp, 4); 1366 1367 /* TOSLink detection */ 1368 sc->tos_link = 0; 1369 tmp = emu_rd(sc, HCFG, 4); 1370 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) { 1371 emu_wr(sc, HCFG, tmp | 0x800, 4); 1372 DELAY(50); 1373 if (tmp != (emu_rd(sc, HCFG, 4) & ~0x800)) { 1374 sc->tos_link = 1; 1375 emu_wr(sc, HCFG, tmp, 4); 1376 } 1377 } 1378 1379 return 0; 1380 } 1381 1382 static int 1383 emu_uninit(struct sc_info *sc) 1384 { 1385 u_int32_t ch; 1386 1387 emu_wr(sc, INTE, 0, 4); 1388 for (ch = 0; ch < NUM_G; ch++) 1389 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF); 1390 for (ch = 0; ch < NUM_G; ch++) { 1391 emu_wrptr(sc, ch, VTFT, 0); 1392 emu_wrptr(sc, ch, CVCF, 0); 1393 emu_wrptr(sc, ch, PTRX, 0); 1394 emu_wrptr(sc, ch, CPF, 0); 1395 } 1396 1397 /* disable audio and lock cache */ 1398 emu_wr(sc, HCFG, HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE | HCFG_MUTEBUTTONENABLE, 4); 1399 1400 emu_wrptr(sc, 0, PTB, 0); 1401 /* reset recording buffers */ 1402 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE); 1403 emu_wrptr(sc, 0, MICBA, 0); 1404 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE); 1405 emu_wrptr(sc, 0, FXBA, 0); 1406 emu_wrptr(sc, 0, FXWC, 0); 1407 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE); 1408 emu_wrptr(sc, 0, ADCBA, 0); 1409 emu_wrptr(sc, 0, TCB, 0); 1410 emu_wrptr(sc, 0, TCBS, 0); 1411 1412 /* disable channel interrupt */ 1413 emu_wrptr(sc, 0, CLIEL, 0); 1414 emu_wrptr(sc, 0, CLIEH, 0); 1415 emu_wrptr(sc, 0, SOLEL, 0); 1416 emu_wrptr(sc, 0, SOLEH, 0); 1417 1418 /* init envelope engine */ 1419 if (!SLIST_EMPTY(&sc->mem.blocks)) 1420 device_printf(sc->dev, "warning: memblock list not empty\n"); 1421 emu_free(sc, sc->mem.ptb_pages); 1422 emu_free(sc, sc->mem.silent_page); 1423 1424 return 0; 1425 } 1426 1427 static int 1428 emu_pci_probe(device_t dev) 1429 { 1430 char *s = NULL; 1431 1432 switch (pci_get_devid(dev)) { 1433 case EMU10K1_PCI_ID: 1434 s = "Creative EMU10K1"; 1435 break; 1436 /* 1437 case EMU10K2_PCI_ID: 1438 s = "Creative EMU10K2"; 1439 break; 1440 */ 1441 default: 1442 return ENXIO; 1443 } 1444 1445 device_set_desc(dev, s); 1446 return 0; 1447 } 1448 1449 static int 1450 emu_pci_attach(device_t dev) 1451 { 1452 struct ac97_info *codec = NULL; 1453 struct sc_info *sc; 1454 u_int32_t data; 1455 int i, gotmic; 1456 char status[SND_STATUSLEN]; 1457 1458 if ((sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO)) == NULL) { 1459 device_printf(dev, "cannot allocate softc\n"); 1460 return ENXIO; 1461 } 1462 1463 sc->lock = snd_mtxcreate(device_get_nameunit(dev), "sound softc"); 1464 sc->dev = dev; 1465 sc->type = pci_get_devid(dev); 1466 sc->rev = pci_get_revid(dev); 1467 1468 data = pci_read_config(dev, PCIR_COMMAND, 2); 1469 data |= (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN); 1470 pci_write_config(dev, PCIR_COMMAND, data, 2); 1471 data = pci_read_config(dev, PCIR_COMMAND, 2); 1472 1473 i = PCIR_MAPS; 1474 sc->reg = bus_alloc_resource(dev, SYS_RES_IOPORT, &i, 0, ~0, 1, RF_ACTIVE); 1475 if (sc->reg == NULL) { 1476 device_printf(dev, "unable to map register space\n"); 1477 goto bad; 1478 } 1479 sc->st = rman_get_bustag(sc->reg); 1480 sc->sh = rman_get_bushandle(sc->reg); 1481 1482 sc->bufsz = pcm_getbuffersize(dev, 4096, EMU_DEFAULT_BUFSZ, 65536); 1483 1484 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 1485 /*lowaddr*/1 << 31, /* can only access 0-2gb */ 1486 /*highaddr*/BUS_SPACE_MAXADDR, 1487 /*filter*/NULL, /*filterarg*/NULL, 1488 /*maxsize*/sc->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, 1489 /*flags*/0, &sc->parent_dmat) != 0) { 1490 device_printf(dev, "unable to create dma tag\n"); 1491 goto bad; 1492 } 1493 1494 if (emu_init(sc) == -1) { 1495 device_printf(dev, "unable to initialize the card\n"); 1496 goto bad; 1497 } 1498 1499 codec = AC97_CREATE(dev, sc, emu_ac97); 1500 if (codec == NULL) goto bad; 1501 gotmic = (ac97_getcaps(codec) & AC97_CAP_MICCHANNEL)? 1 : 0; 1502 if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) goto bad; 1503 1504 i = 0; 1505 sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &i, 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 1506 if (!sc->irq || snd_setup_intr(dev, sc->irq, INTR_MPSAFE, emu_intr, sc, &sc->ih)) { 1507 device_printf(dev, "unable to map interrupt\n"); 1508 goto bad; 1509 } 1510 1511 snprintf(status, SND_STATUSLEN, "at io 0x%lx irq %ld", rman_get_start(sc->reg), rman_get_start(sc->irq)); 1512 1513 if (pcm_register(dev, sc, EMU_CHANS, gotmic? 3 : 2)) goto bad; 1514 for (i = 0; i < EMU_CHANS; i++) 1515 pcm_addchan(dev, PCMDIR_PLAY, &emupchan_class, sc); 1516 for (i = 0; i < (gotmic? 3 : 2); i++) 1517 pcm_addchan(dev, PCMDIR_REC, &emurchan_class, sc); 1518 1519 pcm_setstatus(dev, status); 1520 1521 return 0; 1522 1523 bad: 1524 if (codec) ac97_destroy(codec); 1525 if (sc->reg) bus_release_resource(dev, SYS_RES_IOPORT, PCIR_MAPS, sc->reg); 1526 if (sc->ih) bus_teardown_intr(dev, sc->irq, sc->ih); 1527 if (sc->irq) bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 1528 if (sc->parent_dmat) bus_dma_tag_destroy(sc->parent_dmat); 1529 if (sc->lock) snd_mtxfree(sc->lock); 1530 free(sc, M_DEVBUF); 1531 return ENXIO; 1532 } 1533 1534 static int 1535 emu_pci_detach(device_t dev) 1536 { 1537 int r; 1538 struct sc_info *sc; 1539 1540 r = pcm_unregister(dev); 1541 if (r) 1542 return r; 1543 1544 sc = pcm_getdevinfo(dev); 1545 /* shutdown chip */ 1546 emu_uninit(sc); 1547 1548 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_MAPS, sc->reg); 1549 bus_teardown_intr(dev, sc->irq, sc->ih); 1550 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 1551 bus_dma_tag_destroy(sc->parent_dmat); 1552 snd_mtxfree(sc->lock); 1553 free(sc, M_DEVBUF); 1554 1555 return 0; 1556 } 1557 1558 /* add suspend, resume */ 1559 static device_method_t emu_methods[] = { 1560 /* Device interface */ 1561 DEVMETHOD(device_probe, emu_pci_probe), 1562 DEVMETHOD(device_attach, emu_pci_attach), 1563 DEVMETHOD(device_detach, emu_pci_detach), 1564 1565 { 0, 0 } 1566 }; 1567 1568 static driver_t emu_driver = { 1569 "pcm", 1570 emu_methods, 1571 PCM_SOFTC_SIZE, 1572 }; 1573 1574 DRIVER_MODULE(snd_emu10k1, pci, emu_driver, pcm_devclass, 0, 0); 1575 MODULE_DEPEND(snd_emu10k1, snd_pcm, PCM_MINVER, PCM_PREFVER, PCM_MAXVER); 1576 MODULE_VERSION(snd_emu10k1, 1); 1577 1578 /* dummy driver to silence the joystick device */ 1579 static int 1580 emujoy_pci_probe(device_t dev) 1581 { 1582 char *s = NULL; 1583 1584 switch (pci_get_devid(dev)) { 1585 case 0x70021102: 1586 s = "Creative EMU10K1 Joystick"; 1587 device_quiet(dev); 1588 break; 1589 case 0x70031102: 1590 s = "Creative EMU10K2 Joystick"; 1591 device_quiet(dev); 1592 break; 1593 } 1594 1595 if (s) device_set_desc(dev, s); 1596 return s? -1000 : ENXIO; 1597 } 1598 1599 static int 1600 emujoy_pci_attach(device_t dev) 1601 { 1602 return 0; 1603 } 1604 1605 static int 1606 emujoy_pci_detach(device_t dev) 1607 { 1608 return 0; 1609 } 1610 1611 static device_method_t emujoy_methods[] = { 1612 DEVMETHOD(device_probe, emujoy_pci_probe), 1613 DEVMETHOD(device_attach, emujoy_pci_attach), 1614 DEVMETHOD(device_detach, emujoy_pci_detach), 1615 1616 { 0, 0 } 1617 }; 1618 1619 static driver_t emujoy_driver = { 1620 "emujoy", 1621 emujoy_methods, 1622 8, 1623 }; 1624 1625 static devclass_t emujoy_devclass; 1626 1627 DRIVER_MODULE(emujoy, pci, emujoy_driver, emujoy_devclass, 0, 0); 1628 1629