1 /*- 2 * Copyright (c) 2004 David O'Brien <obrien@FreeBSD.org> 3 * Copyright (c) 2003 Orlando Bassotto <orlando.bassotto@ieo-research.it> 4 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: src/sys/dev/sound/pci/emu10k1.c,v 1.55.2.1 2005/12/30 19:55:53 netchild Exp $ 29 * $DragonFly: src/sys/dev/sound/pci/emu10k1.c,v 1.14 2008/01/06 16:55:51 swildner Exp $ 30 */ 31 32 #include <dev/sound/pcm/sound.h> 33 #include <dev/sound/pcm/ac97.h> 34 #include <dev/sound/pci/gnu/emu10k1.h> 35 #include "emu10k1-alsa%diked.h" 36 37 #include <bus/pci/pcireg.h> 38 #include <bus/pci/pcivar.h> 39 #include <sys/queue.h> 40 41 SND_DECLARE_FILE("$DragonFly: src/sys/dev/sound/pci/emu10k1.c,v 1.14 2008/01/06 16:55:51 swildner Exp $"); 42 43 /* -------------------------------------------------------------------- */ 44 45 #define NUM_G 64 /* use all channels */ 46 #define WAVEOUT_MAXBUFSIZE 32768 47 #define EMUPAGESIZE 4096 /* don't change */ 48 #define EMUMAXPAGES (WAVEOUT_MAXBUFSIZE * NUM_G / EMUPAGESIZE) 49 #define EMU10K1_PCI_ID 0x00021102 /* 1102 => Creative Labs Vendor ID */ 50 #define EMU10K2_PCI_ID 0x00041102 51 #define EMU10K3_PCI_ID 0x00081102 52 #define EMU_DEFAULT_BUFSZ 4096 53 #define EMU_MAX_CHANS 8 54 #define EMU_CHANS 4 55 56 #define MAXREQVOICES 8 57 #define RESERVED 0 58 #define NUM_MIDI 16 59 #define NUM_FXSENDS 4 60 61 #define TMEMSIZE 256*1024 62 #define TMEMSIZEREG 4 63 64 #define ENABLE 0xffffffff 65 #define DISABLE 0x00000000 66 #define ENV_ON DCYSUSV_CHANNELENABLE_MASK 67 #define ENV_OFF 0x00 /* XXX: should this be 1? */ 68 69 #define A_IOCFG_GPOUT_A 0x40 /* Analog Output */ 70 #define A_IOCFG_GPOUT_D 0x04 /* Digital Output */ 71 #define A_IOCFG_GPOUT_AD (A_IOCFG_GPOUT_A|A_IOCFG_GPOUT_D) /* A_IOCFG_GPOUT0 */ 72 73 struct emu_memblk { 74 SLIST_ENTRY(emu_memblk) link; 75 void *buf; 76 bus_addr_t buf_addr; 77 u_int32_t pte_start, pte_size; 78 }; 79 80 struct emu_mem { 81 u_int8_t bmap[EMUMAXPAGES / 8]; 82 u_int32_t *ptb_pages; 83 void *silent_page; 84 bus_addr_t silent_page_addr; 85 bus_addr_t ptb_pages_addr; 86 SLIST_HEAD(, emu_memblk) blocks; 87 }; 88 89 struct emu_voice { 90 int vnum; 91 int b16:1, stereo:1, busy:1, running:1, ismaster:1; 92 int speed; 93 int start, end, vol; 94 int fxrt1; /* FX routing */ 95 int fxrt2; /* FX routing (only for audigy) */ 96 u_int32_t buf; 97 struct emu_voice *slave; 98 struct pcm_channel *channel; 99 }; 100 101 struct sc_info; 102 103 /* channel registers */ 104 struct sc_pchinfo { 105 int spd, fmt, blksz, run; 106 struct emu_voice *master, *slave; 107 struct snd_dbuf *buffer; 108 struct pcm_channel *channel; 109 struct sc_info *parent; 110 }; 111 112 struct sc_rchinfo { 113 int spd, fmt, run, blksz, num; 114 u_int32_t idxreg, basereg, sizereg, setupreg, irqmask; 115 struct snd_dbuf *buffer; 116 struct pcm_channel *channel; 117 struct sc_info *parent; 118 }; 119 120 /* device private data */ 121 struct sc_info { 122 device_t dev; 123 u_int32_t type, rev; 124 u_int32_t tos_link:1, APS:1, audigy:1, audigy2:1; 125 u_int32_t addrmask; /* wider if audigy */ 126 127 bus_space_tag_t st; 128 bus_space_handle_t sh; 129 bus_dma_tag_t parent_dmat; 130 131 struct resource *reg, *irq; 132 void *ih; 133 sndlock_t lock; 134 135 unsigned int bufsz; 136 int timer, timerinterval; 137 int pnum, rnum; 138 int nchans; 139 struct emu_mem mem; 140 struct emu_voice voice[64]; 141 struct sc_pchinfo pch[EMU_MAX_CHANS]; 142 struct sc_rchinfo rch[3]; 143 }; 144 145 /* -------------------------------------------------------------------- */ 146 147 /* 148 * prototypes 149 */ 150 151 /* stuff */ 152 static int emu_init(struct sc_info *); 153 static void emu_intr(void *); 154 static void *emu_malloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr); 155 static void *emu_memalloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr); 156 static int emu_memfree(struct sc_info *sc, void *buf); 157 static int emu_memstart(struct sc_info *sc, void *buf); 158 #ifdef EMUDEBUG 159 static void emu_vdump(struct sc_info *sc, struct emu_voice *v); 160 #endif 161 162 /* talk to the card */ 163 static u_int32_t emu_rd(struct sc_info *, int, int); 164 static void emu_wr(struct sc_info *, int, u_int32_t, int); 165 166 /* -------------------------------------------------------------------- */ 167 168 static u_int32_t emu_rfmt_ac97[] = { 169 AFMT_S16_LE, 170 AFMT_STEREO | AFMT_S16_LE, 171 0 172 }; 173 174 static u_int32_t emu_rfmt_mic[] = { 175 AFMT_U8, 176 0 177 }; 178 179 static u_int32_t emu_rfmt_efx[] = { 180 AFMT_STEREO | AFMT_S16_LE, 181 0 182 }; 183 184 static struct pcmchan_caps emu_reccaps[3] = { 185 {8000, 48000, emu_rfmt_ac97, 0}, 186 {8000, 8000, emu_rfmt_mic, 0}, 187 {48000, 48000, emu_rfmt_efx, 0}, 188 }; 189 190 static u_int32_t emu_pfmt[] = { 191 AFMT_U8, 192 AFMT_STEREO | AFMT_U8, 193 AFMT_S16_LE, 194 AFMT_STEREO | AFMT_S16_LE, 195 0 196 }; 197 198 static struct pcmchan_caps emu_playcaps = {4000, 48000, emu_pfmt, 0}; 199 200 static int adcspeed[8] = {48000, 44100, 32000, 24000, 22050, 16000, 11025, 8000}; 201 /* audigy supports 12kHz. */ 202 static int audigy_adcspeed[9] = { 203 48000, 44100, 32000, 24000, 22050, 16000, 12000, 11025, 8000 204 }; 205 206 /* -------------------------------------------------------------------- */ 207 /* Hardware */ 208 static u_int32_t 209 emu_rd(struct sc_info *sc, int regno, int size) 210 { 211 switch (size) { 212 case 1: 213 return bus_space_read_1(sc->st, sc->sh, regno); 214 case 2: 215 return bus_space_read_2(sc->st, sc->sh, regno); 216 case 4: 217 return bus_space_read_4(sc->st, sc->sh, regno); 218 default: 219 return 0xffffffff; 220 } 221 } 222 223 static void 224 emu_wr(struct sc_info *sc, int regno, u_int32_t data, int size) 225 { 226 switch (size) { 227 case 1: 228 bus_space_write_1(sc->st, sc->sh, regno, data); 229 break; 230 case 2: 231 bus_space_write_2(sc->st, sc->sh, regno, data); 232 break; 233 case 4: 234 bus_space_write_4(sc->st, sc->sh, regno, data); 235 break; 236 } 237 } 238 239 static u_int32_t 240 emu_rdptr(struct sc_info *sc, int chn, int reg) 241 { 242 u_int32_t ptr, val, mask, size, offset; 243 244 ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK); 245 emu_wr(sc, PTR, ptr, 4); 246 val = emu_rd(sc, DATA, 4); 247 if (reg & 0xff000000) { 248 size = (reg >> 24) & 0x3f; 249 offset = (reg >> 16) & 0x1f; 250 mask = ((1 << size) - 1) << offset; 251 val &= mask; 252 val >>= offset; 253 } 254 return val; 255 } 256 257 static void 258 emu_wrptr(struct sc_info *sc, int chn, int reg, u_int32_t data) 259 { 260 u_int32_t ptr, mask, size, offset; 261 262 ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK); 263 emu_wr(sc, PTR, ptr, 4); 264 if (reg & 0xff000000) { 265 size = (reg >> 24) & 0x3f; 266 offset = (reg >> 16) & 0x1f; 267 mask = ((1 << size) - 1) << offset; 268 data <<= offset; 269 data &= mask; 270 data |= emu_rd(sc, DATA, 4) & ~mask; 271 } 272 emu_wr(sc, DATA, data, 4); 273 } 274 275 static void 276 emu_wrefx(struct sc_info *sc, unsigned int pc, unsigned int data) 277 { 278 pc += sc->audigy ? AUDIGY_CODEBASE : MICROCODEBASE; 279 emu_wrptr(sc, 0, pc, data); 280 } 281 282 /* -------------------------------------------------------------------- */ 283 /* ac97 codec */ 284 /* no locking needed */ 285 286 static int 287 emu_rdcd(kobj_t obj, void *devinfo, int regno) 288 { 289 struct sc_info *sc = (struct sc_info *)devinfo; 290 291 emu_wr(sc, AC97ADDRESS, regno, 1); 292 return emu_rd(sc, AC97DATA, 2); 293 } 294 295 static int 296 emu_wrcd(kobj_t obj, void *devinfo, int regno, u_int32_t data) 297 { 298 struct sc_info *sc = (struct sc_info *)devinfo; 299 300 emu_wr(sc, AC97ADDRESS, regno, 1); 301 emu_wr(sc, AC97DATA, data, 2); 302 return 0; 303 } 304 305 static kobj_method_t emu_ac97_methods[] = { 306 KOBJMETHOD(ac97_read, emu_rdcd), 307 KOBJMETHOD(ac97_write, emu_wrcd), 308 { 0, 0 } 309 }; 310 AC97_DECLARE(emu_ac97); 311 312 /* -------------------------------------------------------------------- */ 313 /* stuff */ 314 static int 315 emu_settimer(struct sc_info *sc) 316 { 317 struct sc_pchinfo *pch; 318 struct sc_rchinfo *rch; 319 int i, tmp, rate; 320 321 rate = 0; 322 for (i = 0; i < sc->nchans; i++) { 323 pch = &sc->pch[i]; 324 if (pch->buffer) { 325 tmp = (pch->spd * sndbuf_getbps(pch->buffer)) 326 / pch->blksz; 327 if (tmp > rate) 328 rate = tmp; 329 } 330 } 331 332 for (i = 0; i < 3; i++) { 333 rch = &sc->rch[i]; 334 if (rch->buffer) { 335 tmp = (rch->spd * sndbuf_getbps(rch->buffer)) 336 / rch->blksz; 337 if (tmp > rate) 338 rate = tmp; 339 } 340 } 341 RANGE(rate, 48, 9600); 342 sc->timerinterval = 48000 / rate; 343 emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2); 344 345 return sc->timerinterval; 346 } 347 348 static int 349 emu_enatimer(struct sc_info *sc, int go) 350 { 351 u_int32_t x; 352 if (go) { 353 if (sc->timer++ == 0) { 354 x = emu_rd(sc, INTE, 4); 355 x |= INTE_INTERVALTIMERENB; 356 emu_wr(sc, INTE, x, 4); 357 } 358 } else { 359 sc->timer = 0; 360 x = emu_rd(sc, INTE, 4); 361 x &= ~INTE_INTERVALTIMERENB; 362 emu_wr(sc, INTE, x, 4); 363 } 364 return 0; 365 } 366 367 static void 368 emu_enastop(struct sc_info *sc, char channel, int enable) 369 { 370 int reg = (channel & 0x20) ? SOLEH : SOLEL; 371 channel &= 0x1f; 372 reg |= 1 << 24; 373 reg |= channel << 16; 374 emu_wrptr(sc, 0, reg, enable); 375 } 376 377 static int 378 emu_recval(int speed) { 379 int val; 380 381 val = 0; 382 while (val < 7 && speed < adcspeed[val]) 383 val++; 384 return val; 385 } 386 387 static int 388 audigy_recval(int speed) { 389 int val; 390 391 val = 0; 392 while (val < 8 && speed < audigy_adcspeed[val]) 393 val++; 394 return val; 395 } 396 397 static u_int32_t 398 emu_rate_to_pitch(u_int32_t rate) 399 { 400 static u_int32_t logMagTable[128] = { 401 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2, 402 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5, 403 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081, 404 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191, 405 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7, 406 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829, 407 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e, 408 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26, 409 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d, 410 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885, 411 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899, 412 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c, 413 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3, 414 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3, 415 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83, 416 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df 417 }; 418 static char logSlopeTable[128] = { 419 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58, 420 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53, 421 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f, 422 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b, 423 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47, 424 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44, 425 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41, 426 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e, 427 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c, 428 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39, 429 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37, 430 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35, 431 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34, 432 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32, 433 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30, 434 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f 435 }; 436 int i; 437 438 if (rate == 0) 439 return 0; /* Bail out if no leading "1" */ 440 rate *= 11185; /* Scale 48000 to 0x20002380 */ 441 for (i = 31; i > 0; i--) { 442 if (rate & 0x80000000) { /* Detect leading "1" */ 443 return (((u_int32_t) (i - 15) << 20) + 444 logMagTable[0x7f & (rate >> 24)] + 445 (0x7f & (rate >> 17)) * 446 logSlopeTable[0x7f & (rate >> 24)]); 447 } 448 rate <<= 1; 449 } 450 451 return 0; /* Should never reach this point */ 452 } 453 454 static u_int32_t 455 emu_rate_to_linearpitch(u_int32_t rate) 456 { 457 rate = (rate << 8) / 375; 458 return (rate >> 1) + (rate & 1); 459 } 460 461 static struct emu_voice * 462 emu_valloc(struct sc_info *sc) 463 { 464 struct emu_voice *v; 465 int i; 466 467 v = NULL; 468 for (i = 0; i < 64 && sc->voice[i].busy; i++); 469 if (i < 64) { 470 v = &sc->voice[i]; 471 v->busy = 1; 472 } 473 return v; 474 } 475 476 static int 477 emu_vinit(struct sc_info *sc, struct emu_voice *m, struct emu_voice *s, 478 u_int32_t sz, struct snd_dbuf *b) 479 { 480 void *buf; 481 bus_addr_t tmp_addr; 482 483 buf = emu_memalloc(sc, sz, &tmp_addr); 484 if (buf == NULL) 485 return -1; 486 if (b != NULL) 487 sndbuf_setup(b, buf, sz); 488 m->start = emu_memstart(sc, buf) * EMUPAGESIZE; 489 m->end = m->start + sz; 490 m->channel = NULL; 491 m->speed = 0; 492 m->b16 = 0; 493 m->stereo = 0; 494 m->running = 0; 495 m->ismaster = 1; 496 m->vol = 0xff; 497 m->buf = tmp_addr; 498 m->slave = s; 499 if (sc->audigy) { 500 m->fxrt1 = FXBUS_MIDI_CHORUS | FXBUS_PCM_RIGHT << 8 | 501 FXBUS_PCM_LEFT << 16 | FXBUS_MIDI_REVERB << 24; 502 m->fxrt2 = 0x3f3f3f3f; /* No effects on second route */ 503 } else { 504 m->fxrt1 = FXBUS_MIDI_CHORUS | FXBUS_PCM_RIGHT << 4 | 505 FXBUS_PCM_LEFT << 8 | FXBUS_MIDI_REVERB << 12; 506 m->fxrt2 = 0; 507 } 508 509 if (s != NULL) { 510 s->start = m->start; 511 s->end = m->end; 512 s->channel = NULL; 513 s->speed = 0; 514 s->b16 = 0; 515 s->stereo = 0; 516 s->running = 0; 517 s->ismaster = 0; 518 s->vol = m->vol; 519 s->buf = m->buf; 520 s->fxrt1 = m->fxrt1; 521 s->fxrt2 = m->fxrt2; 522 s->slave = NULL; 523 } 524 return 0; 525 } 526 527 static void 528 emu_vsetup(struct sc_pchinfo *ch) 529 { 530 struct emu_voice *v = ch->master; 531 532 if (ch->fmt) { 533 v->b16 = (ch->fmt & AFMT_16BIT) ? 1 : 0; 534 v->stereo = (ch->fmt & AFMT_STEREO) ? 1 : 0; 535 if (v->slave != NULL) { 536 v->slave->b16 = v->b16; 537 v->slave->stereo = v->stereo; 538 } 539 } 540 if (ch->spd) { 541 v->speed = ch->spd; 542 if (v->slave != NULL) 543 v->slave->speed = v->speed; 544 } 545 } 546 547 static void 548 emu_vwrite(struct sc_info *sc, struct emu_voice *v) 549 { 550 int s; 551 int l, r, x, y; 552 u_int32_t sa, ea, start, val, silent_page; 553 554 s = (v->stereo ? 1 : 0) + (v->b16 ? 1 : 0); 555 556 sa = v->start >> s; 557 ea = v->end >> s; 558 559 l = r = x = y = v->vol; 560 if (v->stereo) { 561 l = v->ismaster ? l : 0; 562 r = v->ismaster ? 0 : r; 563 } 564 565 emu_wrptr(sc, v->vnum, CPF, v->stereo ? CPF_STEREO_MASK : 0); 566 val = v->stereo ? 28 : 30; 567 val *= v->b16 ? 1 : 2; 568 start = sa + val; 569 570 if (sc->audigy) { 571 emu_wrptr(sc, v->vnum, A_FXRT1, v->fxrt1); 572 emu_wrptr(sc, v->vnum, A_FXRT2, v->fxrt2); 573 emu_wrptr(sc, v->vnum, A_SENDAMOUNTS, 0); 574 } 575 else 576 emu_wrptr(sc, v->vnum, FXRT, v->fxrt1 << 16); 577 578 emu_wrptr(sc, v->vnum, PTRX, (x << 8) | r); 579 emu_wrptr(sc, v->vnum, DSL, ea | (y << 24)); 580 emu_wrptr(sc, v->vnum, PSST, sa | (l << 24)); 581 emu_wrptr(sc, v->vnum, CCCA, start | (v->b16 ? 0 : CCCA_8BITSELECT)); 582 583 emu_wrptr(sc, v->vnum, Z1, 0); 584 emu_wrptr(sc, v->vnum, Z2, 0); 585 586 silent_page = ((u_int32_t)(sc->mem.silent_page_addr) << 1) 587 | MAP_PTI_MASK; 588 emu_wrptr(sc, v->vnum, MAPA, silent_page); 589 emu_wrptr(sc, v->vnum, MAPB, silent_page); 590 591 emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK); 592 emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK); 593 emu_wrptr(sc, v->vnum, ATKHLDM, 0); 594 emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK); 595 emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000); 596 emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000); 597 emu_wrptr(sc, v->vnum, FMMOD, 0); 598 emu_wrptr(sc, v->vnum, TREMFRQ, 0); 599 emu_wrptr(sc, v->vnum, FM2FRQ2, 0); 600 emu_wrptr(sc, v->vnum, ENVVAL, 0x8000); 601 602 emu_wrptr(sc, v->vnum, ATKHLDV, 603 ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK); 604 emu_wrptr(sc, v->vnum, ENVVOL, 0x8000); 605 606 emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f); 607 emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0); 608 609 if (v->slave != NULL) 610 emu_vwrite(sc, v->slave); 611 } 612 613 static void 614 emu_vtrigger(struct sc_info *sc, struct emu_voice *v, int go) 615 { 616 u_int32_t pitch_target, initial_pitch; 617 u_int32_t cra, cs, ccis; 618 u_int32_t sample, i; 619 620 if (go) { 621 cra = 64; 622 cs = v->stereo ? 4 : 2; 623 ccis = v->stereo ? 28 : 30; 624 ccis *= v->b16 ? 1 : 2; 625 sample = v->b16 ? 0x00000000 : 0x80808080; 626 627 for (i = 0; i < cs; i++) 628 emu_wrptr(sc, v->vnum, CD0 + i, sample); 629 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0); 630 emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra); 631 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis); 632 633 emu_wrptr(sc, v->vnum, IFATN, 0xff00); 634 emu_wrptr(sc, v->vnum, VTFT, 0xffffffff); 635 emu_wrptr(sc, v->vnum, CVCF, 0xffffffff); 636 emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f); 637 emu_enastop(sc, v->vnum, 0); 638 639 pitch_target = emu_rate_to_linearpitch(v->speed); 640 initial_pitch = emu_rate_to_pitch(v->speed) >> 8; 641 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target); 642 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target); 643 emu_wrptr(sc, v->vnum, IP, initial_pitch); 644 } else { 645 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0); 646 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0); 647 emu_wrptr(sc, v->vnum, IFATN, 0xffff); 648 emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff); 649 emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff); 650 emu_wrptr(sc, v->vnum, IP, 0); 651 emu_enastop(sc, v->vnum, 1); 652 } 653 if (v->slave != NULL) 654 emu_vtrigger(sc, v->slave, go); 655 } 656 657 static int 658 emu_vpos(struct sc_info *sc, struct emu_voice *v) 659 { 660 int s, ptr; 661 662 s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0); 663 ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s; 664 return ptr & ~0x0000001f; 665 } 666 667 #ifdef EMUDEBUG 668 static void 669 emu_vdump(struct sc_info *sc, struct emu_voice *v) 670 { 671 char *regname[] = { 672 "cpf", "ptrx", "cvcf", "vtft", "z2", "z1", "psst", "dsl", 673 "ccca", "ccr", "clp", "fxrt", "mapa", "mapb", NULL, NULL, 674 "envvol", "atkhldv", "dcysusv", "lfoval1", 675 "envval", "atkhldm", "dcysusm", "lfoval2", 676 "ip", "ifatn", "pefe", "fmmod", "tremfrq", "fmfrq2", 677 "tempenv" 678 }; 679 char *regname2[] = { 680 "mudata1", "mustat1", "mudata2", "mustat2", 681 "fxwc1", "fxwc2", "spdrate", NULL, NULL, 682 NULL, NULL, NULL, "fxrt2", "sndamnt", "fxrt1", 683 NULL, NULL 684 }; 685 int i, x; 686 687 kprintf("voice number %d\n", v->vnum); 688 for (i = 0, x = 0; i <= 0x1e; i++) { 689 if (regname[i] == NULL) 690 continue; 691 kprintf("%s\t[%08x]", regname[i], emu_rdptr(sc, v->vnum, i)); 692 kprintf("%s", (x == 2) ? "\n" : "\t"); 693 x++; 694 if (x > 2) 695 x = 0; 696 } 697 698 /* Print out audigy extra registers */ 699 if (sc->audigy) { 700 for (i = 0; i <= 0xe; i++) { 701 if (regname2[i] == NULL) 702 continue; 703 kprintf("%s\t[%08x]", regname2[i], 704 emu_rdptr(sc, v->vnum, i + 0x70)); 705 kprintf("%s", (x == 2)? "\n" : "\t"); 706 x++; 707 if (x > 2) 708 x = 0; 709 } 710 } 711 kprintf("\n\n"); 712 } 713 #endif 714 715 /* channel interface */ 716 static void * 717 emupchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, 718 struct pcm_channel *c, int dir) 719 { 720 struct sc_info *sc = devinfo; 721 struct sc_pchinfo *ch; 722 void *r; 723 724 KASSERT(dir == PCMDIR_PLAY, ("emupchan_init: bad direction")); 725 ch = &sc->pch[sc->pnum++]; 726 ch->buffer = b; 727 ch->parent = sc; 728 ch->channel = c; 729 ch->blksz = sc->bufsz / 2; 730 ch->fmt = AFMT_U8; 731 ch->spd = 8000; 732 snd_mtxlock(sc->lock); 733 ch->master = emu_valloc(sc); 734 ch->slave = emu_valloc(sc); 735 snd_mtxunlock(sc->lock); 736 r = (emu_vinit(sc, ch->master, ch->slave, sc->bufsz, ch->buffer)) 737 ? NULL : ch; 738 739 return r; 740 } 741 742 static int 743 emupchan_free(kobj_t obj, void *data) 744 { 745 struct sc_pchinfo *ch = data; 746 struct sc_info *sc = ch->parent; 747 int r; 748 749 snd_mtxlock(sc->lock); 750 r = emu_memfree(sc, sndbuf_getbuf(ch->buffer)); 751 snd_mtxunlock(sc->lock); 752 753 return r; 754 } 755 756 static int 757 emupchan_setformat(kobj_t obj, void *data, u_int32_t format) 758 { 759 struct sc_pchinfo *ch = data; 760 761 ch->fmt = format; 762 return 0; 763 } 764 765 static int 766 emupchan_setspeed(kobj_t obj, void *data, u_int32_t speed) 767 { 768 struct sc_pchinfo *ch = data; 769 770 ch->spd = speed; 771 return ch->spd; 772 } 773 774 static int 775 emupchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 776 { 777 struct sc_pchinfo *ch = data; 778 struct sc_info *sc = ch->parent; 779 int irqrate, blksz; 780 781 ch->blksz = blocksize; 782 snd_mtxlock(sc->lock); 783 emu_settimer(sc); 784 irqrate = 48000 / sc->timerinterval; 785 snd_mtxunlock(sc->lock); 786 blksz = (ch->spd * sndbuf_getbps(ch->buffer)) / irqrate; 787 return blocksize; 788 } 789 790 static int 791 emupchan_trigger(kobj_t obj, void *data, int go) 792 { 793 struct sc_pchinfo *ch = data; 794 struct sc_info *sc = ch->parent; 795 796 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD) 797 return 0; 798 799 snd_mtxlock(sc->lock); 800 if (go == PCMTRIG_START) { 801 emu_vsetup(ch); 802 emu_vwrite(sc, ch->master); 803 emu_settimer(sc); 804 emu_enatimer(sc, 1); 805 #ifdef EMUDEBUG 806 kprintf("start [%d bit, %s, %d hz]\n", 807 ch->master->b16 ? 16 : 8, 808 ch->master->stereo ? "stereo" : "mono", 809 ch->master->speed); 810 emu_vdump(sc, ch->master); 811 emu_vdump(sc, ch->slave); 812 #endif 813 } 814 ch->run = (go == PCMTRIG_START) ? 1 : 0; 815 emu_vtrigger(sc, ch->master, ch->run); 816 snd_mtxunlock(sc->lock); 817 return 0; 818 } 819 820 static int 821 emupchan_getptr(kobj_t obj, void *data) 822 { 823 struct sc_pchinfo *ch = data; 824 struct sc_info *sc = ch->parent; 825 int r; 826 827 snd_mtxlock(sc->lock); 828 r = emu_vpos(sc, ch->master); 829 snd_mtxunlock(sc->lock); 830 831 return r; 832 } 833 834 static struct pcmchan_caps * 835 emupchan_getcaps(kobj_t obj, void *data) 836 { 837 return &emu_playcaps; 838 } 839 840 static kobj_method_t emupchan_methods[] = { 841 KOBJMETHOD(channel_init, emupchan_init), 842 KOBJMETHOD(channel_free, emupchan_free), 843 KOBJMETHOD(channel_setformat, emupchan_setformat), 844 KOBJMETHOD(channel_setspeed, emupchan_setspeed), 845 KOBJMETHOD(channel_setblocksize, emupchan_setblocksize), 846 KOBJMETHOD(channel_trigger, emupchan_trigger), 847 KOBJMETHOD(channel_getptr, emupchan_getptr), 848 KOBJMETHOD(channel_getcaps, emupchan_getcaps), 849 { 0, 0 } 850 }; 851 CHANNEL_DECLARE(emupchan); 852 853 /* channel interface */ 854 static void * 855 emurchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, 856 struct pcm_channel *c, int dir) 857 { 858 struct sc_info *sc = devinfo; 859 struct sc_rchinfo *ch; 860 861 KASSERT(dir == PCMDIR_REC, ("emurchan_init: bad direction")); 862 ch = &sc->rch[sc->rnum]; 863 ch->buffer = b; 864 ch->parent = sc; 865 ch->channel = c; 866 ch->blksz = sc->bufsz / 2; 867 ch->fmt = AFMT_U8; 868 ch->spd = 8000; 869 ch->num = sc->rnum; 870 switch(sc->rnum) { 871 case 0: 872 ch->idxreg = sc->audigy ? A_ADCIDX : ADCIDX; 873 ch->basereg = ADCBA; 874 ch->sizereg = ADCBS; 875 ch->setupreg = ADCCR; 876 ch->irqmask = INTE_ADCBUFENABLE; 877 break; 878 879 case 1: 880 ch->idxreg = FXIDX; 881 ch->basereg = FXBA; 882 ch->sizereg = FXBS; 883 ch->setupreg = FXWC; 884 ch->irqmask = INTE_EFXBUFENABLE; 885 break; 886 887 case 2: 888 ch->idxreg = MICIDX; 889 ch->basereg = MICBA; 890 ch->sizereg = MICBS; 891 ch->setupreg = 0; 892 ch->irqmask = INTE_MICBUFENABLE; 893 break; 894 } 895 sc->rnum++; 896 if (sndbuf_alloc(ch->buffer, sc->parent_dmat, sc->bufsz) != 0) 897 return NULL; 898 else { 899 snd_mtxlock(sc->lock); 900 emu_wrptr(sc, 0, ch->basereg, sndbuf_getbufaddr(ch->buffer)); 901 emu_wrptr(sc, 0, ch->sizereg, 0); /* off */ 902 snd_mtxunlock(sc->lock); 903 return ch; 904 } 905 } 906 907 static int 908 emurchan_setformat(kobj_t obj, void *data, u_int32_t format) 909 { 910 struct sc_rchinfo *ch = data; 911 912 ch->fmt = format; 913 return 0; 914 } 915 916 static int 917 emurchan_setspeed(kobj_t obj, void *data, u_int32_t speed) 918 { 919 struct sc_rchinfo *ch = data; 920 921 if (ch->num == 0) { 922 if (ch->parent->audigy) 923 speed = audigy_adcspeed[audigy_recval(speed)]; 924 else 925 speed = adcspeed[emu_recval(speed)]; 926 } 927 if (ch->num == 1) 928 speed = 48000; 929 if (ch->num == 2) 930 speed = 8000; 931 ch->spd = speed; 932 return ch->spd; 933 } 934 935 static int 936 emurchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 937 { 938 struct sc_rchinfo *ch = data; 939 struct sc_info *sc = ch->parent; 940 int irqrate, blksz; 941 942 ch->blksz = blocksize; 943 snd_mtxlock(sc->lock); 944 emu_settimer(sc); 945 irqrate = 48000 / sc->timerinterval; 946 snd_mtxunlock(sc->lock); 947 blksz = (ch->spd * sndbuf_getbps(ch->buffer)) / irqrate; 948 return blocksize; 949 } 950 951 /* semantic note: must start at beginning of buffer */ 952 static int 953 emurchan_trigger(kobj_t obj, void *data, int go) 954 { 955 struct sc_rchinfo *ch = data; 956 struct sc_info *sc = ch->parent; 957 u_int32_t val, sz; 958 959 switch(sc->bufsz) { 960 case 4096: 961 sz = ADCBS_BUFSIZE_4096; 962 break; 963 964 case 8192: 965 sz = ADCBS_BUFSIZE_8192; 966 break; 967 968 case 16384: 969 sz = ADCBS_BUFSIZE_16384; 970 break; 971 972 case 32768: 973 sz = ADCBS_BUFSIZE_32768; 974 break; 975 976 case 65536: 977 sz = ADCBS_BUFSIZE_65536; 978 break; 979 980 default: 981 sz = ADCBS_BUFSIZE_4096; 982 } 983 984 snd_mtxlock(sc->lock); 985 switch(go) { 986 case PCMTRIG_START: 987 ch->run = 1; 988 emu_wrptr(sc, 0, ch->sizereg, sz); 989 if (ch->num == 0) { 990 if (sc->audigy) { 991 val = A_ADCCR_LCHANENABLE; 992 if (ch->fmt & AFMT_STEREO) 993 val |= A_ADCCR_RCHANENABLE; 994 val |= audigy_recval(ch->spd); 995 } else { 996 val = ADCCR_LCHANENABLE; 997 if (ch->fmt & AFMT_STEREO) 998 val |= ADCCR_RCHANENABLE; 999 val |= emu_recval(ch->spd); 1000 } 1001 1002 emu_wrptr(sc, 0, ch->setupreg, 0); 1003 emu_wrptr(sc, 0, ch->setupreg, val); 1004 } 1005 val = emu_rd(sc, INTE, 4); 1006 val |= ch->irqmask; 1007 emu_wr(sc, INTE, val, 4); 1008 break; 1009 1010 case PCMTRIG_STOP: 1011 case PCMTRIG_ABORT: 1012 ch->run = 0; 1013 emu_wrptr(sc, 0, ch->sizereg, 0); 1014 if (ch->setupreg) 1015 emu_wrptr(sc, 0, ch->setupreg, 0); 1016 val = emu_rd(sc, INTE, 4); 1017 val &= ~ch->irqmask; 1018 emu_wr(sc, INTE, val, 4); 1019 break; 1020 1021 case PCMTRIG_EMLDMAWR: 1022 case PCMTRIG_EMLDMARD: 1023 default: 1024 break; 1025 } 1026 snd_mtxunlock(sc->lock); 1027 1028 return 0; 1029 } 1030 1031 static int 1032 emurchan_getptr(kobj_t obj, void *data) 1033 { 1034 struct sc_rchinfo *ch = data; 1035 struct sc_info *sc = ch->parent; 1036 int r; 1037 1038 snd_mtxlock(sc->lock); 1039 r = emu_rdptr(sc, 0, ch->idxreg) & 0x0000ffff; 1040 snd_mtxunlock(sc->lock); 1041 1042 return r; 1043 } 1044 1045 static struct pcmchan_caps * 1046 emurchan_getcaps(kobj_t obj, void *data) 1047 { 1048 struct sc_rchinfo *ch = data; 1049 1050 return &emu_reccaps[ch->num]; 1051 } 1052 1053 static kobj_method_t emurchan_methods[] = { 1054 KOBJMETHOD(channel_init, emurchan_init), 1055 KOBJMETHOD(channel_setformat, emurchan_setformat), 1056 KOBJMETHOD(channel_setspeed, emurchan_setspeed), 1057 KOBJMETHOD(channel_setblocksize, emurchan_setblocksize), 1058 KOBJMETHOD(channel_trigger, emurchan_trigger), 1059 KOBJMETHOD(channel_getptr, emurchan_getptr), 1060 KOBJMETHOD(channel_getcaps, emurchan_getcaps), 1061 { 0, 0 } 1062 }; 1063 CHANNEL_DECLARE(emurchan); 1064 1065 /* -------------------------------------------------------------------- */ 1066 /* The interrupt handler */ 1067 static void 1068 emu_intr(void *data) 1069 { 1070 struct sc_info *sc = data; 1071 u_int32_t stat, ack, i, x; 1072 1073 snd_mtxlock(sc->lock); 1074 while (1) { 1075 stat = emu_rd(sc, IPR, 4); 1076 if (stat == 0) 1077 break; 1078 ack = 0; 1079 1080 /* process irq */ 1081 if (stat & IPR_INTERVALTIMER) 1082 ack |= IPR_INTERVALTIMER; 1083 1084 if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) 1085 ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL); 1086 1087 if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) 1088 ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL); 1089 1090 if (stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL)) 1091 ack |= stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL); 1092 1093 if (stat & IPR_PCIERROR) { 1094 ack |= IPR_PCIERROR; 1095 device_printf(sc->dev, "pci error\n"); 1096 /* we still get an nmi with ecc ram even if we ack this */ 1097 } 1098 if (stat & IPR_SAMPLERATETRACKER) { 1099 ack |= IPR_SAMPLERATETRACKER; 1100 #ifdef EMUDEBUG 1101 device_printf(sc->dev, 1102 "sample rate tracker lock status change\n"); 1103 #endif 1104 } 1105 1106 if (stat & ~ack) 1107 device_printf(sc->dev, "dodgy irq: %x (harmless)\n", 1108 stat & ~ack); 1109 1110 emu_wr(sc, IPR, stat, 4); 1111 1112 if (ack) { 1113 snd_mtxunlock(sc->lock); 1114 1115 if (ack & IPR_INTERVALTIMER) { 1116 x = 0; 1117 for (i = 0; i < sc->nchans; i++) { 1118 if (sc->pch[i].run) { 1119 x = 1; 1120 chn_intr(sc->pch[i].channel); 1121 } 1122 } 1123 if (x == 0) 1124 emu_enatimer(sc, 0); 1125 } 1126 1127 1128 if (ack & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) { 1129 if (sc->rch[0].channel) 1130 chn_intr(sc->rch[0].channel); 1131 } 1132 if (ack & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) { 1133 if (sc->rch[1].channel) 1134 chn_intr(sc->rch[1].channel); 1135 } 1136 if (ack & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL)) { 1137 if (sc->rch[2].channel) 1138 chn_intr(sc->rch[2].channel); 1139 } 1140 1141 snd_mtxlock(sc->lock); 1142 } 1143 } 1144 snd_mtxunlock(sc->lock); 1145 } 1146 1147 /* -------------------------------------------------------------------- */ 1148 1149 static void 1150 emu_setmap(void *arg, bus_dma_segment_t *segs, int nseg, int error) 1151 { 1152 bus_addr_t *phys = arg; 1153 1154 *phys = error ? 0 : (bus_addr_t)segs->ds_addr; 1155 1156 if (bootverbose) { 1157 kprintf("emu: setmap (%lx, %lx), nseg=%d, error=%d\n", 1158 (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len, 1159 nseg, error); 1160 } 1161 } 1162 1163 static void * 1164 emu_malloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr) 1165 { 1166 void *buf; 1167 bus_dmamap_t map; 1168 1169 *addr = 0; 1170 if (bus_dmamem_alloc(sc->parent_dmat, &buf, BUS_DMA_NOWAIT, &map)) 1171 return NULL; 1172 if (bus_dmamap_load(sc->parent_dmat, map, buf, sz, emu_setmap, addr, 0) 1173 || !*addr) 1174 return NULL; 1175 return buf; 1176 } 1177 1178 static void 1179 emu_free(struct sc_info *sc, void *buf) 1180 { 1181 bus_dmamem_free(sc->parent_dmat, buf, NULL); 1182 } 1183 1184 static void * 1185 emu_memalloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr) 1186 { 1187 u_int32_t blksz, start, idx, ofs, tmp, found; 1188 struct emu_mem *mem = &sc->mem; 1189 struct emu_memblk *blk; 1190 void *buf; 1191 1192 blksz = sz / EMUPAGESIZE; 1193 if (sz > (blksz * EMUPAGESIZE)) 1194 blksz++; 1195 /* find a kfree block in the bitmap */ 1196 found = 0; 1197 start = 1; 1198 while (!found && start + blksz < EMUMAXPAGES) { 1199 found = 1; 1200 for (idx = start; idx < start + blksz; idx++) 1201 if (mem->bmap[idx >> 3] & (1 << (idx & 7))) 1202 found = 0; 1203 if (!found) 1204 start++; 1205 } 1206 if (!found) 1207 return NULL; 1208 blk = kmalloc(sizeof(*blk), M_DEVBUF, M_WAITOK); 1209 buf = emu_malloc(sc, sz, &blk->buf_addr); 1210 *addr = blk->buf_addr; 1211 if (buf == NULL) { 1212 kfree(blk, M_DEVBUF); 1213 return NULL; 1214 } 1215 blk->buf = buf; 1216 blk->pte_start = start; 1217 blk->pte_size = blksz; 1218 #ifdef EMUDEBUG 1219 kprintf("buf %p, pte_start %d, pte_size %d\n", blk->buf, 1220 blk->pte_start, blk->pte_size); 1221 #endif 1222 ofs = 0; 1223 for (idx = start; idx < start + blksz; idx++) { 1224 mem->bmap[idx >> 3] |= 1 << (idx & 7); 1225 tmp = (u_int32_t)(u_long)((u_int8_t *)blk->buf_addr + ofs); 1226 #ifdef EMUDEBUG 1227 kprintf("pte[%d] -> %x phys, %x virt\n", idx, tmp, 1228 ((u_int32_t)buf) + ofs); 1229 #endif 1230 mem->ptb_pages[idx] = (tmp << 1) | idx; 1231 ofs += EMUPAGESIZE; 1232 } 1233 SLIST_INSERT_HEAD(&mem->blocks, blk, link); 1234 return buf; 1235 } 1236 1237 static int 1238 emu_memfree(struct sc_info *sc, void *buf) 1239 { 1240 u_int32_t idx, tmp; 1241 struct emu_mem *mem = &sc->mem; 1242 struct emu_memblk *blk, *i; 1243 1244 blk = NULL; 1245 SLIST_FOREACH(i, &mem->blocks, link) { 1246 if (i->buf == buf) 1247 blk = i; 1248 } 1249 if (blk == NULL) 1250 return EINVAL; 1251 SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link); 1252 emu_free(sc, buf); 1253 tmp = (u_int32_t)(sc->mem.silent_page_addr) << 1; 1254 for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) { 1255 mem->bmap[idx >> 3] &= ~(1 << (idx & 7)); 1256 mem->ptb_pages[idx] = tmp | idx; 1257 } 1258 kfree(blk, M_DEVBUF); 1259 return 0; 1260 } 1261 1262 static int 1263 emu_memstart(struct sc_info *sc, void *buf) 1264 { 1265 struct emu_mem *mem = &sc->mem; 1266 struct emu_memblk *blk, *i; 1267 1268 blk = NULL; 1269 SLIST_FOREACH(i, &mem->blocks, link) { 1270 if (i->buf == buf) 1271 blk = i; 1272 } 1273 if (blk == NULL) 1274 return -EINVAL; 1275 return blk->pte_start; 1276 } 1277 1278 static void 1279 emu_addefxop(struct sc_info *sc, int op, int z, int w, int x, int y, 1280 u_int32_t *pc) 1281 { 1282 emu_wrefx(sc, (*pc) * 2, (x << 10) | y); 1283 emu_wrefx(sc, (*pc) * 2 + 1, (op << 20) | (z << 10) | w); 1284 (*pc)++; 1285 } 1286 1287 static void 1288 audigy_addefxop(struct sc_info *sc, int op, int z, int w, int x, int y, 1289 u_int32_t *pc) 1290 { 1291 emu_wrefx(sc, (*pc) * 2, (x << 12) | y); 1292 emu_wrefx(sc, (*pc) * 2 + 1, (op << 24) | (z << 12) | w); 1293 (*pc)++; 1294 } 1295 1296 static void 1297 audigy_initefx(struct sc_info *sc) 1298 { 1299 int i; 1300 u_int32_t pc = 0; 1301 1302 /* skip 0, 0, -1, 0 - NOPs */ 1303 for (i = 0; i < 512; i++) 1304 audigy_addefxop(sc, 0x0f, 0x0c0, 0x0c0, 0x0cf, 0x0c0, &pc); 1305 1306 for (i = 0; i < 512; i++) 1307 emu_wrptr(sc, 0, A_FXGPREGBASE + i, 0x0); 1308 1309 pc = 16; 1310 1311 /* stop fx processor */ 1312 emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP); 1313 1314 /* Audigy 2 (EMU10K2) DSP Registers: 1315 FX Bus 1316 0x000-0x00f : 16 registers (???) 1317 Input 1318 0x040/0x041 : AC97 Codec (l/r) 1319 0x042/0x043 : ADC, S/PDIF (l/r) 1320 0x044/0x045 : Optical S/PDIF in (l/r) 1321 0x046/0x047 : ??? 1322 0x048/0x049 : Line/Mic 2 (l/r) 1323 0x04a/0x04b : RCA S/PDIF (l/r) 1324 0x04c/0x04d : Aux 2 (l/r) 1325 Output 1326 0x060/0x061 : Digital Front (l/r) 1327 0x062/0x063 : Digital Center/LFE 1328 0x064/0x065 : AudigyDrive Heaphone (l/r) 1329 0x066/0x067 : Digital Rear (l/r) 1330 0x068/0x069 : Analog Front (l/r) 1331 0x06a/0x06b : Analog Center/LFE 1332 0x06c/0x06d : ??? 1333 0x06e/0x06f : Analog Rear (l/r) 1334 0x070/0x071 : AC97 Output (l/r) 1335 0x072/0x073 : ??? 1336 0x074/0x075 : ??? 1337 0x076/0x077 : ADC Recording Buffer (l/r) 1338 Constants 1339 0x0c0 - 0x0c4 = 0 - 4 1340 0x0c5 = 0x8, 0x0c6 = 0x10, 0x0c7 = 0x20 1341 0x0c8 = 0x100, 0x0c9 = 0x10000, 0x0ca = 0x80000 1342 0x0cb = 0x10000000, 0x0cc = 0x20000000, 0x0cd = 0x40000000 1343 0x0ce = 0x80000000, 0x0cf = 0x7fffffff, 0x0d0 = 0xffffffff 1344 0x0d1 = 0xfffffffe, 0x0d2 = 0xc0000000, 0x0d3 = 0x41fbbcdc 1345 0x0d4 = 0x5a7ef9db, 0x0d5 = 0x00100000, 0x0dc = 0x00000001 (???) 1346 Temporary Values 1347 0x0d6 : Accumulator (???) 1348 0x0d7 : Condition Register 1349 0x0d8 : Noise source 1350 0x0d9 : Noise source 1351 Tank Memory Data Registers 1352 0x200 - 0x2ff 1353 Tank Memory Address Registers 1354 0x300 - 0x3ff 1355 General Purpose Registers 1356 0x400 - 0x5ff 1357 */ 1358 1359 /* AC97Output[l/r] = FXBus PCM[l/r] */ 1360 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AC97_L), A_C_00000000, 1361 A_C_00000000, A_FXBUS(FXBUS_PCM_LEFT), &pc); 1362 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AC97_R), A_C_00000000, 1363 A_C_00000000, A_FXBUS(FXBUS_PCM_RIGHT), &pc); 1364 1365 /* GPR[0/1] = RCA S/PDIF[l/r] -- Master volume */ 1366 audigy_addefxop(sc, iACC3, A_GPR(0), A_C_00000000, 1367 A_C_00000000, A_EXTIN(EXTIN_COAX_SPDIF_L), &pc); 1368 audigy_addefxop(sc, iACC3, A_GPR(1), A_C_00000000, 1369 A_C_00000000, A_EXTIN(EXTIN_COAX_SPDIF_R), &pc); 1370 1371 /* GPR[2] = GPR[0] (Left) / 2 + GPR[1] (Right) / 2 -- Central volume */ 1372 audigy_addefxop(sc, iINTERP, A_GPR(2), A_GPR(1), 1373 A_C_40000000, A_GPR(0), &pc); 1374 1375 /* Headphones[l/r] = GPR[0/1] */ 1376 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_HEADPHONE_L), 1377 A_C_00000000, A_C_00000000, A_GPR(0), &pc); 1378 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_HEADPHONE_R), 1379 A_C_00000000, A_C_00000000, A_GPR(1), &pc); 1380 1381 /* Analog Front[l/r] = GPR[0/1] */ 1382 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AFRONT_L), A_C_00000000, 1383 A_C_00000000, A_GPR(0), &pc); 1384 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AFRONT_R), A_C_00000000, 1385 A_C_00000000, A_GPR(1), &pc); 1386 1387 /* Digital Front[l/r] = GPR[0/1] */ 1388 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L), A_C_00000000, 1389 A_C_00000000, A_GPR(0), &pc); 1390 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_FRONT_R), A_C_00000000, 1391 A_C_00000000, A_GPR(1), &pc); 1392 1393 /* Center and Subwoofer configuration */ 1394 /* Analog Center = GPR[0] + GPR[2] */ 1395 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ACENTER), A_C_00000000, 1396 A_GPR(0), A_GPR(2), &pc); 1397 /* Analog Sub = GPR[1] + GPR[2] */ 1398 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ALFE), A_C_00000000, 1399 A_GPR(1), A_GPR(2), &pc); 1400 1401 /* Digital Center = GPR[0] + GPR[2] */ 1402 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_CENTER), A_C_00000000, 1403 A_GPR(0), A_GPR(2), &pc); 1404 /* Digital Sub = GPR[1] + GPR[2] */ 1405 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_LFE), A_C_00000000, 1406 A_GPR(1), A_GPR(2), &pc); 1407 1408 #if 0 1409 /* Analog Rear[l/r] = (GPR[0/1] * RearVolume[l/r]) >> 31 */ 1410 /* RearVolume = GPR[0x10/0x11] (Will this ever be implemented?) */ 1411 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_AREAR_L), A_C_00000000, 1412 A_GPR(16), A_GPR(0), &pc); 1413 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_AREAR_R), A_C_00000000, 1414 A_GPR(17), A_GPR(1), &pc); 1415 1416 /* Digital Rear[l/r] = (GPR[0/1] * RearVolume[l/r]) >> 31 */ 1417 /* RearVolume = GPR[0x10/0x11] (Will this ever be implemented?) */ 1418 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_REAR_L), A_C_00000000, 1419 A_GPR(16), A_GPR(0), &pc); 1420 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_REAR_R), A_C_00000000, 1421 A_GPR(17), A_GPR(1), &pc); 1422 #else 1423 /* XXX This is just a copy to the channel, since we do not have 1424 * a patch manager, it is useful for have another output enabled. 1425 */ 1426 1427 /* Analog Rear[l/r] = GPR[0/1] */ 1428 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AREAR_L), A_C_00000000, 1429 A_C_00000000, A_GPR(0), &pc); 1430 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AREAR_R), A_C_00000000, 1431 A_C_00000000, A_GPR(1), &pc); 1432 1433 /* Digital Rear[l/r] = GPR[0/1] */ 1434 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_REAR_L), A_C_00000000, 1435 A_C_00000000, A_GPR(0), &pc); 1436 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_REAR_R), A_C_00000000, 1437 A_C_00000000, A_GPR(1), &pc); 1438 #endif 1439 1440 /* ADC Recording buffer[l/r] = AC97Input[l/r] */ 1441 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ADC_CAP_L), A_C_00000000, 1442 A_C_00000000, A_EXTIN(A_EXTIN_AC97_L), &pc); 1443 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ADC_CAP_R), A_C_00000000, 1444 A_C_00000000, A_EXTIN(A_EXTIN_AC97_R), &pc); 1445 1446 /* resume normal operations */ 1447 emu_wrptr(sc, 0, A_DBG, 0); 1448 } 1449 1450 static void 1451 emu_initefx(struct sc_info *sc) 1452 { 1453 int i; 1454 u_int32_t pc = 16; 1455 1456 /* acc3 0,0,0,0 - NOPs */ 1457 for (i = 0; i < 512; i++) { 1458 emu_wrefx(sc, i * 2, 0x10040); 1459 emu_wrefx(sc, i * 2 + 1, 0x610040); 1460 } 1461 1462 for (i = 0; i < 256; i++) 1463 emu_wrptr(sc, 0, FXGPREGBASE + i, 0); 1464 1465 /* FX-8010 DSP Registers: 1466 FX Bus 1467 0x000-0x00f : 16 registers 1468 Input 1469 0x010/0x011 : AC97 Codec (l/r) 1470 0x012/0x013 : ADC, S/PDIF (l/r) 1471 0x014/0x015 : Mic(left), Zoom (l/r) 1472 0x016/0x017 : TOS link in (l/r) 1473 0x018/0x019 : Line/Mic 1 (l/r) 1474 0x01a/0x01b : COAX S/PDIF (l/r) 1475 0x01c/0x01d : Line/Mic 2 (l/r) 1476 Output 1477 0x020/0x021 : AC97 Output (l/r) 1478 0x022/0x023 : TOS link out (l/r) 1479 0x024/0x025 : Center/LFE 1480 0x026/0x027 : LiveDrive Headphone (l/r) 1481 0x028/0x029 : Rear Channel (l/r) 1482 0x02a/0x02b : ADC Recording Buffer (l/r) 1483 0x02c : Mic Recording Buffer 1484 0x031/0x032 : Analog Center/LFE 1485 Constants 1486 0x040 - 0x044 = 0 - 4 1487 0x045 = 0x8, 0x046 = 0x10, 0x047 = 0x20 1488 0x048 = 0x100, 0x049 = 0x10000, 0x04a = 0x80000 1489 0x04b = 0x10000000, 0x04c = 0x20000000, 0x04d = 0x40000000 1490 0x04e = 0x80000000, 0x04f = 0x7fffffff, 0x050 = 0xffffffff 1491 0x051 = 0xfffffffe, 0x052 = 0xc0000000, 0x053 = 0x41fbbcdc 1492 0x054 = 0x5a7ef9db, 0x055 = 0x00100000 1493 Temporary Values 1494 0x056 : Accumulator 1495 0x057 : Condition Register 1496 0x058 : Noise source 1497 0x059 : Noise source 1498 0x05a : IRQ Register 1499 0x05b : TRAM Delay Base Address Count 1500 General Purpose Registers 1501 0x100 - 0x1ff 1502 Tank Memory Data Registers 1503 0x200 - 0x2ff 1504 Tank Memory Address Registers 1505 0x300 - 0x3ff 1506 */ 1507 1508 /* Routing - this will be configurable in later version */ 1509 1510 /* GPR[0/1] = FX * 4 + SPDIF-in */ 1511 emu_addefxop(sc, iMACINT0, GPR(0), EXTIN(EXTIN_SPDIF_CD_L), 1512 FXBUS(FXBUS_PCM_LEFT), C_00000004, &pc); 1513 emu_addefxop(sc, iMACINT0, GPR(1), EXTIN(EXTIN_SPDIF_CD_R), 1514 FXBUS(FXBUS_PCM_RIGHT), C_00000004, &pc); 1515 1516 /* GPR[0/1] += APS-input */ 1517 emu_addefxop(sc, iACC3, GPR(0), GPR(0), C_00000000, 1518 sc->APS ? EXTIN(EXTIN_TOSLINK_L) : C_00000000, &pc); 1519 emu_addefxop(sc, iACC3, GPR(1), GPR(1), C_00000000, 1520 sc->APS ? EXTIN(EXTIN_TOSLINK_R) : C_00000000, &pc); 1521 1522 /* FrontOut (AC97) = GPR[0/1] */ 1523 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_L), C_00000000, 1524 C_00000000, GPR(0), &pc); 1525 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_R), C_00000000, 1526 C_00000001, GPR(1), &pc); 1527 1528 /* GPR[2] = GPR[0] (Left) / 2 + GPR[1] (Right) / 2 -- Central volume */ 1529 emu_addefxop(sc, iINTERP, GPR(2), GPR(1), C_40000000, GPR(0), &pc); 1530 1531 #if 0 1532 /* RearOut = (GPR[0/1] * RearVolume) >> 31 */ 1533 /* RearVolume = GPR[0x10/0x11] */ 1534 emu_addefxop(sc, iMAC0, EXTOUT(EXTOUT_REAR_L), C_00000000, 1535 GPR(16), GPR(0), &pc); 1536 emu_addefxop(sc, iMAC0, EXTOUT(EXTOUT_REAR_R), C_00000000, 1537 GPR(17), GPR(1), &pc); 1538 #else 1539 /* XXX This is just a copy to the channel, since we do not have 1540 * a patch manager, it is useful for have another output enabled. 1541 */ 1542 1543 /* Rear[l/r] = GPR[0/1] */ 1544 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_REAR_L), C_00000000, 1545 C_00000000, GPR(0), &pc); 1546 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_REAR_R), C_00000000, 1547 C_00000000, GPR(1), &pc); 1548 #endif 1549 1550 /* TOS out[l/r] = GPR[0/1] */ 1551 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_TOSLINK_L), C_00000000, 1552 C_00000000, GPR(0), &pc); 1553 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_TOSLINK_R), C_00000000, 1554 C_00000000, GPR(1), &pc); 1555 1556 /* Center and Subwoofer configuration */ 1557 /* Analog Center = GPR[0] + GPR[2] */ 1558 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ACENTER), C_00000000, 1559 GPR(0), GPR(2), &pc); 1560 /* Analog Sub = GPR[1] + GPR[2] */ 1561 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ALFE), C_00000000, 1562 GPR(1), GPR(2), &pc); 1563 /* Digital Center = GPR[0] + GPR[2] */ 1564 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_CENTER), C_00000000, 1565 GPR(0), GPR(2), &pc); 1566 /* Digital Sub = GPR[1] + GPR[2] */ 1567 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_LFE), C_00000000, 1568 GPR(1), GPR(2), &pc); 1569 1570 /* Headphones[l/r] = GPR[0/1] */ 1571 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_HEADPHONE_L), C_00000000, 1572 C_00000000, GPR(0), &pc); 1573 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_HEADPHONE_R), C_00000000, 1574 C_00000000, GPR(1), &pc); 1575 1576 /* ADC Recording buffer[l/r] = AC97Input[l/r] */ 1577 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ADC_CAP_L), C_00000000, 1578 C_00000000, EXTIN(EXTIN_AC97_L), &pc); 1579 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ADC_CAP_R), C_00000000, 1580 C_00000000, EXTIN(EXTIN_AC97_R), &pc); 1581 1582 /* resume normal operations */ 1583 emu_wrptr(sc, 0, DBG, 0); 1584 } 1585 1586 /* Probe and attach the card */ 1587 static int 1588 emu_init(struct sc_info *sc) 1589 { 1590 u_int32_t spcs, ch, tmp, i; 1591 1592 if (sc->audigy) { 1593 /* enable additional AC97 slots */ 1594 emu_wrptr(sc, 0, AC97SLOT, AC97SLOT_CNTR | AC97SLOT_LFE); 1595 } 1596 1597 /* disable audio and lock cache */ 1598 emu_wr(sc, HCFG, 1599 HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, 1600 4); 1601 1602 /* reset recording buffers */ 1603 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE); 1604 emu_wrptr(sc, 0, MICBA, 0); 1605 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE); 1606 emu_wrptr(sc, 0, FXBA, 0); 1607 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE); 1608 emu_wrptr(sc, 0, ADCBA, 0); 1609 1610 /* disable channel interrupt */ 1611 emu_wr(sc, INTE, 1612 INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE, 1613 4); 1614 emu_wrptr(sc, 0, CLIEL, 0); 1615 emu_wrptr(sc, 0, CLIEH, 0); 1616 emu_wrptr(sc, 0, SOLEL, 0); 1617 emu_wrptr(sc, 0, SOLEH, 0); 1618 1619 /* wonder what these do... */ 1620 if (sc->audigy) { 1621 emu_wrptr(sc, 0, SPBYPASS, 0xf00); 1622 emu_wrptr(sc, 0, AC97SLOT, 0x3); 1623 } 1624 1625 /* init envelope engine */ 1626 for (ch = 0; ch < NUM_G; ch++) { 1627 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF); 1628 emu_wrptr(sc, ch, IP, 0); 1629 emu_wrptr(sc, ch, VTFT, 0xffff); 1630 emu_wrptr(sc, ch, CVCF, 0xffff); 1631 emu_wrptr(sc, ch, PTRX, 0); 1632 emu_wrptr(sc, ch, CPF, 0); 1633 emu_wrptr(sc, ch, CCR, 0); 1634 1635 emu_wrptr(sc, ch, PSST, 0); 1636 emu_wrptr(sc, ch, DSL, 0x10); 1637 emu_wrptr(sc, ch, CCCA, 0); 1638 emu_wrptr(sc, ch, Z1, 0); 1639 emu_wrptr(sc, ch, Z2, 0); 1640 emu_wrptr(sc, ch, FXRT, 0xd01c0000); 1641 1642 emu_wrptr(sc, ch, ATKHLDM, 0); 1643 emu_wrptr(sc, ch, DCYSUSM, 0); 1644 emu_wrptr(sc, ch, IFATN, 0xffff); 1645 emu_wrptr(sc, ch, PEFE, 0); 1646 emu_wrptr(sc, ch, FMMOD, 0); 1647 emu_wrptr(sc, ch, TREMFRQ, 24); /* 1 Hz */ 1648 emu_wrptr(sc, ch, FM2FRQ2, 24); /* 1 Hz */ 1649 emu_wrptr(sc, ch, TEMPENV, 0); 1650 1651 /*** these are last so OFF prevents writing ***/ 1652 emu_wrptr(sc, ch, LFOVAL2, 0); 1653 emu_wrptr(sc, ch, LFOVAL1, 0); 1654 emu_wrptr(sc, ch, ATKHLDV, 0); 1655 emu_wrptr(sc, ch, ENVVOL, 0); 1656 emu_wrptr(sc, ch, ENVVAL, 0); 1657 1658 if (sc->audigy) { 1659 /* audigy cards need this to initialize correctly */ 1660 emu_wrptr(sc, ch, 0x4c, 0); 1661 emu_wrptr(sc, ch, 0x4d, 0); 1662 emu_wrptr(sc, ch, 0x4e, 0); 1663 emu_wrptr(sc, ch, 0x4f, 0); 1664 /* set default routing */ 1665 emu_wrptr(sc, ch, A_FXRT1, 0x03020100); 1666 emu_wrptr(sc, ch, A_FXRT2, 0x3f3f3f3f); 1667 emu_wrptr(sc, ch, A_SENDAMOUNTS, 0); 1668 } 1669 1670 sc->voice[ch].vnum = ch; 1671 sc->voice[ch].slave = NULL; 1672 sc->voice[ch].busy = 0; 1673 sc->voice[ch].ismaster = 0; 1674 sc->voice[ch].running = 0; 1675 sc->voice[ch].b16 = 0; 1676 sc->voice[ch].stereo = 0; 1677 sc->voice[ch].speed = 0; 1678 sc->voice[ch].start = 0; 1679 sc->voice[ch].end = 0; 1680 sc->voice[ch].channel = NULL; 1681 } 1682 sc->pnum = sc->rnum = 0; 1683 1684 /* 1685 * Init to 0x02109204 : 1686 * Clock accuracy = 0 (1000ppm) 1687 * Sample Rate = 2 (48kHz) 1688 * Audio Channel = 1 (Left of 2) 1689 * Source Number = 0 (Unspecified) 1690 * Generation Status = 1 (Original for Cat Code 12) 1691 * Cat Code = 12 (Digital Signal Mixer) 1692 * Mode = 0 (Mode 0) 1693 * Emphasis = 0 (None) 1694 * CP = 1 (Copyright unasserted) 1695 * AN = 0 (Audio data) 1696 * P = 0 (Consumer) 1697 */ 1698 spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 1699 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 1700 SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 | 1701 SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT; 1702 emu_wrptr(sc, 0, SPCS0, spcs); 1703 emu_wrptr(sc, 0, SPCS1, spcs); 1704 emu_wrptr(sc, 0, SPCS2, spcs); 1705 1706 if (!sc->audigy) 1707 emu_initefx(sc); 1708 else if (sc->audigy2) { /* Audigy 2 */ 1709 /* from ALSA initialization code: */ 1710 1711 /* Hack for Alice3 to work independent of haP16V driver */ 1712 u_int32_t tmp; 1713 1714 /* Setup SRCMulti_I2S SamplingRate */ 1715 tmp = emu_rdptr(sc, 0, A_SPDIF_SAMPLERATE) & 0xfffff1ff; 1716 emu_wrptr(sc, 0, A_SPDIF_SAMPLERATE, tmp | 0x400); 1717 1718 /* Setup SRCSel (Enable SPDIF, I2S SRCMulti) */ 1719 emu_wr(sc, 0x20, 0x00600000, 4); 1720 emu_wr(sc, 0x24, 0x00000014, 4); 1721 1722 /* Setup SRCMulti Input Audio Enable */ 1723 emu_wr(sc, 0x20, 0x006e0000, 4); 1724 emu_wr(sc, 0x24, 0xff00ff00, 4); 1725 } 1726 1727 SLIST_INIT(&sc->mem.blocks); 1728 sc->mem.ptb_pages = emu_malloc(sc, EMUMAXPAGES * sizeof(u_int32_t), 1729 &sc->mem.ptb_pages_addr); 1730 if (sc->mem.ptb_pages == NULL) 1731 return -1; 1732 1733 sc->mem.silent_page = emu_malloc(sc, EMUPAGESIZE, 1734 &sc->mem.silent_page_addr); 1735 if (sc->mem.silent_page == NULL) { 1736 emu_free(sc, sc->mem.ptb_pages); 1737 return -1; 1738 } 1739 /* Clear page with silence & setup all pointers to this page */ 1740 bzero(sc->mem.silent_page, EMUPAGESIZE); 1741 tmp = (u_int32_t)(sc->mem.silent_page_addr) << 1; 1742 for (i = 0; i < EMUMAXPAGES; i++) 1743 sc->mem.ptb_pages[i] = tmp | i; 1744 1745 emu_wrptr(sc, 0, PTB, (sc->mem.ptb_pages_addr)); 1746 emu_wrptr(sc, 0, TCB, 0); /* taken from original driver */ 1747 emu_wrptr(sc, 0, TCBS, 0); /* taken from original driver */ 1748 1749 for (ch = 0; ch < NUM_G; ch++) { 1750 emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK); 1751 emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK); 1752 } 1753 1754 /* emu_memalloc(sc, EMUPAGESIZE); */ 1755 /* 1756 * Hokay, now enable the AUD bit 1757 * 1758 * Audigy 1759 * Enable Audio = 0 (enabled after fx processor initialization) 1760 * Mute Disable Audio = 0 1761 * Joystick = 1 1762 * 1763 * Audigy 2 1764 * Enable Audio = 1 1765 * Mute Disable Audio = 0 1766 * Joystick = 1 1767 * GP S/PDIF AC3 Enable = 1 1768 * CD S/PDIF AC3 Enable = 1 1769 * 1770 * EMU10K1 1771 * Enable Audio = 1 1772 * Mute Disable Audio = 0 1773 * Lock Tank Memory = 1 1774 * Lock Sound Memory = 0 1775 * Auto Mute = 1 1776 */ 1777 1778 if (sc->audigy) { 1779 tmp = HCFG_AUTOMUTE | HCFG_JOYENABLE; 1780 if (sc->audigy2) /* Audigy 2 */ 1781 tmp = HCFG_AUDIOENABLE | HCFG_AC3ENABLE_CDSPDIF | 1782 HCFG_AC3ENABLE_GPSPDIF; 1783 emu_wr(sc, HCFG, tmp, 4); 1784 1785 audigy_initefx(sc); 1786 1787 /* from ALSA initialization code: */ 1788 1789 /* enable audio and disable both audio/digital outputs */ 1790 emu_wr(sc, HCFG, emu_rd(sc, HCFG, 4) | HCFG_AUDIOENABLE, 4); 1791 emu_wr(sc, A_IOCFG, emu_rd(sc, A_IOCFG, 4) & ~A_IOCFG_GPOUT_AD, 1792 4); 1793 if (sc->audigy2) { /* Audigy 2 */ 1794 /* Unmute Analog. 1795 * Set GPO6 to 1 for Apollo. This has to be done after 1796 * init Alice3 I2SOut beyond 48kHz. 1797 * So, sequence is important. 1798 */ 1799 emu_wr(sc, A_IOCFG, 1800 emu_rd(sc, A_IOCFG, 4) | A_IOCFG_GPOUT_A, 4); 1801 } 1802 } else { 1803 /* EMU10K1 initialization code */ 1804 tmp = HCFG_AUDIOENABLE | HCFG_LOCKTANKCACHE_MASK 1805 | HCFG_AUTOMUTE; 1806 if (sc->rev >= 6) 1807 tmp |= HCFG_JOYENABLE; 1808 1809 emu_wr(sc, HCFG, tmp, 4); 1810 1811 /* TOSLink detection */ 1812 sc->tos_link = 0; 1813 tmp = emu_rd(sc, HCFG, 4); 1814 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) { 1815 emu_wr(sc, HCFG, tmp | HCFG_GPOUT1, 4); 1816 DELAY(50); 1817 if (tmp != (emu_rd(sc, HCFG, 4) & ~HCFG_GPOUT1)) { 1818 sc->tos_link = 1; 1819 emu_wr(sc, HCFG, tmp, 4); 1820 } 1821 } 1822 } 1823 1824 return 0; 1825 } 1826 1827 static int 1828 emu_uninit(struct sc_info *sc) 1829 { 1830 u_int32_t ch; 1831 1832 emu_wr(sc, INTE, 0, 4); 1833 for (ch = 0; ch < NUM_G; ch++) 1834 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF); 1835 for (ch = 0; ch < NUM_G; ch++) { 1836 emu_wrptr(sc, ch, VTFT, 0); 1837 emu_wrptr(sc, ch, CVCF, 0); 1838 emu_wrptr(sc, ch, PTRX, 0); 1839 emu_wrptr(sc, ch, CPF, 0); 1840 } 1841 1842 if (sc->audigy) { /* stop fx processor */ 1843 emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP); 1844 } 1845 1846 /* disable audio and lock cache */ 1847 emu_wr(sc, HCFG, 1848 HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, 1849 4); 1850 1851 emu_wrptr(sc, 0, PTB, 0); 1852 /* reset recording buffers */ 1853 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE); 1854 emu_wrptr(sc, 0, MICBA, 0); 1855 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE); 1856 emu_wrptr(sc, 0, FXBA, 0); 1857 emu_wrptr(sc, 0, FXWC, 0); 1858 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE); 1859 emu_wrptr(sc, 0, ADCBA, 0); 1860 emu_wrptr(sc, 0, TCB, 0); 1861 emu_wrptr(sc, 0, TCBS, 0); 1862 1863 /* disable channel interrupt */ 1864 emu_wrptr(sc, 0, CLIEL, 0); 1865 emu_wrptr(sc, 0, CLIEH, 0); 1866 emu_wrptr(sc, 0, SOLEL, 0); 1867 emu_wrptr(sc, 0, SOLEH, 0); 1868 1869 /* init envelope engine */ 1870 if (!SLIST_EMPTY(&sc->mem.blocks)) 1871 device_printf(sc->dev, "warning: memblock list not empty\n"); 1872 emu_free(sc, sc->mem.ptb_pages); 1873 emu_free(sc, sc->mem.silent_page); 1874 1875 return 0; 1876 } 1877 1878 static int 1879 emu_pci_probe(device_t dev) 1880 { 1881 char *s = NULL; 1882 1883 switch (pci_get_devid(dev)) { 1884 case EMU10K1_PCI_ID: 1885 s = "Creative EMU10K1"; 1886 break; 1887 1888 case EMU10K2_PCI_ID: 1889 if (pci_get_revid(dev) == 0x04) 1890 s = "Creative Audigy 2 (EMU10K2)"; 1891 else 1892 s = "Creative Audigy (EMU10K2)"; 1893 break; 1894 1895 case EMU10K3_PCI_ID: 1896 s = "Creative Audigy 2 (EMU10K3)"; 1897 break; 1898 1899 default: 1900 return ENXIO; 1901 } 1902 1903 device_set_desc(dev, s); 1904 return BUS_PROBE_DEFAULT; 1905 } 1906 1907 static int 1908 emu_pci_attach(device_t dev) 1909 { 1910 struct ac97_info *codec = NULL; 1911 struct sc_info *sc; 1912 u_int32_t data; 1913 int i, gotmic; 1914 char status[SND_STATUSLEN]; 1915 1916 sc = kmalloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO); 1917 1918 sc->lock = snd_mtxcreate(device_get_nameunit(dev), "sound softc"); 1919 sc->dev = dev; 1920 sc->type = pci_get_devid(dev); 1921 sc->rev = pci_get_revid(dev); 1922 sc->audigy = sc->type == EMU10K2_PCI_ID || sc->type == EMU10K3_PCI_ID; 1923 sc->audigy2 = (sc->audigy && sc->rev == 0x04); 1924 sc->nchans = sc->audigy ? 8 : 4; 1925 sc->addrmask = sc->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK; 1926 1927 data = pci_read_config(dev, PCIR_COMMAND, 2); 1928 data |= (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN); 1929 pci_write_config(dev, PCIR_COMMAND, data, 2); 1930 data = pci_read_config(dev, PCIR_COMMAND, 2); 1931 1932 i = PCIR_BAR(0); 1933 sc->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE); 1934 if (sc->reg == NULL) { 1935 device_printf(dev, "unable to map register space\n"); 1936 goto bad; 1937 } 1938 sc->st = rman_get_bustag(sc->reg); 1939 sc->sh = rman_get_bushandle(sc->reg); 1940 1941 sc->bufsz = pcm_getbuffersize(dev, 4096, EMU_DEFAULT_BUFSZ, 65536); 1942 1943 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 1944 /*lowaddr*/1 << 31, /* can only access 0-2gb */ 1945 /*highaddr*/BUS_SPACE_MAXADDR, 1946 /*filter*/NULL, /*filterarg*/NULL, 1947 /*maxsize*/sc->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, 1948 /*flags*/0, 1949 &sc->parent_dmat) != 0) { 1950 device_printf(dev, "unable to create dma tag\n"); 1951 goto bad; 1952 } 1953 1954 if (emu_init(sc) == -1) { 1955 device_printf(dev, "unable to initialize the card\n"); 1956 goto bad; 1957 } 1958 1959 codec = AC97_CREATE(dev, sc, emu_ac97); 1960 if (codec == NULL) goto bad; 1961 gotmic = (ac97_getcaps(codec) & AC97_CAP_MICCHANNEL) ? 1 : 0; 1962 if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) goto bad; 1963 1964 i = 0; 1965 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, 1966 RF_ACTIVE | RF_SHAREABLE); 1967 if (!sc->irq || 1968 snd_setup_intr(dev, sc->irq, INTR_MPSAFE, emu_intr, sc, &sc->ih)) { 1969 device_printf(dev, "unable to map interrupt\n"); 1970 goto bad; 1971 } 1972 1973 ksnprintf(status, SND_STATUSLEN, "at io 0x%lx irq %ld %s", 1974 rman_get_start(sc->reg), rman_get_start(sc->irq), 1975 PCM_KLDSTRING(snd_emu10k1)); 1976 1977 if (pcm_register(dev, sc, sc->nchans, gotmic ? 3 : 2)) goto bad; 1978 for (i = 0; i < sc->nchans; i++) 1979 pcm_addchan(dev, PCMDIR_PLAY, &emupchan_class, sc); 1980 for (i = 0; i < (gotmic ? 3 : 2); i++) 1981 pcm_addchan(dev, PCMDIR_REC, &emurchan_class, sc); 1982 1983 pcm_setstatus(dev, status); 1984 1985 return 0; 1986 1987 bad: 1988 if (codec) ac97_destroy(codec); 1989 if (sc->reg) bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg); 1990 if (sc->ih) bus_teardown_intr(dev, sc->irq, sc->ih); 1991 if (sc->irq) bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 1992 if (sc->parent_dmat) bus_dma_tag_destroy(sc->parent_dmat); 1993 if (sc->lock) snd_mtxfree(sc->lock); 1994 kfree(sc, M_DEVBUF); 1995 return ENXIO; 1996 } 1997 1998 static int 1999 emu_pci_detach(device_t dev) 2000 { 2001 int r; 2002 struct sc_info *sc; 2003 2004 r = pcm_unregister(dev); 2005 if (r) 2006 return r; 2007 2008 sc = pcm_getdevinfo(dev); 2009 /* shutdown chip */ 2010 emu_uninit(sc); 2011 2012 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg); 2013 bus_teardown_intr(dev, sc->irq, sc->ih); 2014 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 2015 bus_dma_tag_destroy(sc->parent_dmat); 2016 snd_mtxfree(sc->lock); 2017 kfree(sc, M_DEVBUF); 2018 2019 return 0; 2020 } 2021 2022 /* add suspend, resume */ 2023 static device_method_t emu_methods[] = { 2024 /* Device interface */ 2025 DEVMETHOD(device_probe, emu_pci_probe), 2026 DEVMETHOD(device_attach, emu_pci_attach), 2027 DEVMETHOD(device_detach, emu_pci_detach), 2028 2029 { 0, 0 } 2030 }; 2031 2032 static driver_t emu_driver = { 2033 "pcm", 2034 emu_methods, 2035 PCM_SOFTC_SIZE, 2036 }; 2037 2038 DRIVER_MODULE(snd_emu10k1, pci, emu_driver, pcm_devclass, 0, 0); 2039 DRIVER_MODULE(snd_emu10k1, cardbus, emu_driver, pcm_devclass, 0, 0); 2040 MODULE_DEPEND(snd_emu10k1, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); 2041 MODULE_VERSION(snd_emu10k1, 1); 2042 2043 /* dummy driver to silence the joystick device */ 2044 static int 2045 emujoy_pci_probe(device_t dev) 2046 { 2047 char *s = NULL; 2048 2049 switch (pci_get_devid(dev)) { 2050 case 0x70021102: 2051 s = "Creative EMU10K1 Joystick"; 2052 device_quiet(dev); 2053 break; 2054 case 0x70031102: 2055 s = "Creative EMU10K2 Joystick"; 2056 device_quiet(dev); 2057 break; 2058 } 2059 2060 if (s) device_set_desc(dev, s); 2061 return s ? -1000 : ENXIO; 2062 } 2063 2064 static int 2065 emujoy_pci_attach(device_t dev) 2066 { 2067 return 0; 2068 } 2069 2070 static int 2071 emujoy_pci_detach(device_t dev) 2072 { 2073 return 0; 2074 } 2075 2076 static device_method_t emujoy_methods[] = { 2077 DEVMETHOD(device_probe, emujoy_pci_probe), 2078 DEVMETHOD(device_attach, emujoy_pci_attach), 2079 DEVMETHOD(device_detach, emujoy_pci_detach), 2080 2081 { 0, 0 } 2082 }; 2083 2084 static driver_t emujoy_driver = { 2085 "emujoy", 2086 emujoy_methods, 2087 8, 2088 }; 2089 2090 static devclass_t emujoy_devclass; 2091 2092 DRIVER_MODULE(emujoy, pci, emujoy_driver, emujoy_devclass, 0, 0); 2093 2094