1 /*- 2 * Copyright (c) 1999 Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp> 3 * Copyright (c) 1992-1998 S�ren Schmidt 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer as 11 * the first lines of this file unmodified. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/dev/fb/vga.c,v 1.9.2.1 2001/08/11 02:58:44 yokota Exp $ 30 * $DragonFly: src/sys/dev/video/fb/vga.c,v 1.22 2007/08/15 19:31:11 swildner Exp $ 31 */ 32 33 #include "opt_vga.h" 34 #include "opt_fb.h" 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/kernel.h> 39 #include <sys/conf.h> 40 #include <sys/fcntl.h> 41 #include <sys/malloc.h> 42 #include <sys/fbio.h> 43 #include <sys/thread2.h> 44 45 #include <bus/isa/isareg.h> 46 47 #include <machine/clock.h> 48 #include <machine/md_var.h> 49 #include <machine/pc/bios.h> 50 #include <machine/pc/vesa.h> 51 52 #include <vm/vm.h> 53 #include <vm/vm_param.h> 54 #include <vm/pmap.h> 55 56 #include "fbreg.h" 57 #include "vgareg.h" 58 59 #ifndef VGA_DEBUG 60 #define VGA_DEBUG 0 61 #endif 62 63 int 64 vga_probe_unit(int unit, video_adapter_t *buf, int flags) 65 { 66 video_adapter_t *adp; 67 video_switch_t *sw; 68 int error; 69 70 sw = vid_get_switch(VGA_DRIVER_NAME); 71 if (sw == NULL) 72 return 0; 73 error = (*sw->probe)(unit, &adp, NULL, flags); 74 if (error) 75 return error; 76 bcopy(adp, buf, sizeof(*buf)); 77 return 0; 78 } 79 80 int 81 vga_attach_unit(int unit, vga_softc_t *sc, int flags) 82 { 83 video_switch_t *sw; 84 int error; 85 86 sw = vid_get_switch(VGA_DRIVER_NAME); 87 if (sw == NULL) 88 return ENXIO; 89 90 error = (*sw->probe)(unit, &sc->adp, NULL, flags); 91 if (error) 92 return error; 93 return (*sw->init)(unit, sc->adp, flags); 94 } 95 96 /* cdev driver functions */ 97 98 #ifdef FB_INSTALL_CDEV 99 100 struct ucred; 101 102 int 103 vga_open(cdev_t dev, vga_softc_t *sc, int flag, int mode, struct ucred *cred) 104 { 105 if (sc == NULL) 106 return ENXIO; 107 if (mode & (O_CREAT | O_APPEND | O_TRUNC)) 108 return ENODEV; 109 110 return genfbopen(&sc->gensc, sc->adp, flag, mode, cred); 111 } 112 113 int 114 vga_close(cdev_t dev, vga_softc_t *sc, int flag, int mode) 115 { 116 return genfbclose(&sc->gensc, sc->adp, flag, mode); 117 } 118 119 int 120 vga_read(cdev_t dev, vga_softc_t *sc, struct uio *uio, int flag) 121 { 122 return genfbread(&sc->gensc, sc->adp, uio, flag); 123 } 124 125 int 126 vga_write(cdev_t dev, vga_softc_t *sc, struct uio *uio, int flag) 127 { 128 return genfbread(&sc->gensc, sc->adp, uio, flag); 129 } 130 131 int 132 vga_ioctl(cdev_t dev, vga_softc_t *sc, u_long cmd, caddr_t arg, int flag, 133 struct ucred *cred) 134 { 135 return genfbioctl(&sc->gensc, sc->adp, cmd, arg, flag, cred); 136 } 137 138 int 139 vga_mmap(cdev_t dev, vga_softc_t *sc, vm_offset_t offset, int prot) 140 { 141 return genfbmmap(&sc->gensc, sc->adp, offset, prot); 142 } 143 144 #endif /* FB_INSTALL_CDEV */ 145 146 /* LOW-LEVEL */ 147 148 #define probe_done(adp) ((adp)->va_flags & V_ADP_PROBED) 149 #define init_done(adp) ((adp)->va_flags & V_ADP_INITIALIZED) 150 #define config_done(adp) ((adp)->va_flags & V_ADP_REGISTERED) 151 152 /* this should really be in `rtc.h' */ 153 #define RTC_EQUIPMENT 0x14 154 155 /* various sizes */ 156 #define V_MODE_MAP_SIZE (M_VGA_CG320 + 1) 157 #define V_MODE_PARAM_SIZE 64 158 159 /* video adapter state buffer */ 160 struct adp_state { 161 int sig; 162 #define V_STATE_SIG 0x736f6962 163 u_char regs[V_MODE_PARAM_SIZE]; 164 }; 165 typedef struct adp_state adp_state_t; 166 167 /* video adapter information */ 168 #define DCC_MONO 0 169 #define DCC_CGA40 1 170 #define DCC_CGA80 2 171 #define DCC_EGAMONO 3 172 #define DCC_EGA40 4 173 #define DCC_EGA80 5 174 175 /* 176 * NOTE: `va_window' should have a virtual address, but is initialized 177 * with a physical address in the following table, as verify_adapter() 178 * will perform address conversion at run-time. 179 */ 180 static video_adapter_t adapter_init_value[] = { 181 /* DCC_MONO */ 182 { 0, KD_MONO, "mda", 0, 0, 0, IO_MDA, IO_MDASIZE, MONO_CRTC, 183 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 184 0, 0, 0, 0, 7, 0, }, 185 /* DCC_CGA40 */ 186 { 0, KD_CGA, "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC, 187 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 188 0, 0, 0, 0, 3, 0, }, 189 /* DCC_CGA80 */ 190 { 0, KD_CGA, "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC, 191 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 192 0, 0, 0, 0, 3, 0, }, 193 /* DCC_EGAMONO */ 194 { 0, KD_EGA, "ega", 0, 0, 0, IO_MDA, 48, MONO_CRTC, 195 EGA_BUF_BASE, EGA_BUF_SIZE, MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 196 0, 0, 0, 0, 7, 0, }, 197 /* DCC_EGA40 */ 198 { 0, KD_EGA, "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48, COLOR_CRTC, 199 EGA_BUF_BASE, EGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 200 0, 0, 0, 0, 3, 0, }, 201 /* DCC_EGA80 */ 202 { 0, KD_EGA, "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48, COLOR_CRTC, 203 EGA_BUF_BASE, EGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 204 0, 0, 0, 0, 3, 0, }, 205 }; 206 207 static video_adapter_t biosadapter[2]; 208 static int biosadapters = 0; 209 210 /* video driver declarations */ 211 static int vga_configure(int flags); 212 int (*vga_sub_configure)(int flags); 213 #if 0 214 static int vga_nop(void); 215 #endif 216 static int vga_error(void); 217 static vi_probe_t vga_probe; 218 static vi_init_t vga_init; 219 static vi_get_info_t vga_get_info; 220 static vi_query_mode_t vga_query_mode; 221 static vi_set_mode_t vga_set_mode; 222 static vi_save_font_t vga_save_font; 223 static vi_load_font_t vga_load_font; 224 static vi_show_font_t vga_show_font; 225 static vi_save_palette_t vga_save_palette; 226 static vi_load_palette_t vga_load_palette; 227 static vi_set_border_t vga_set_border; 228 static vi_save_state_t vga_save_state; 229 static vi_load_state_t vga_load_state; 230 static vi_set_win_org_t vga_set_origin; 231 static vi_read_hw_cursor_t vga_read_hw_cursor; 232 static vi_set_hw_cursor_t vga_set_hw_cursor; 233 static vi_set_hw_cursor_shape_t vga_set_hw_cursor_shape; 234 static vi_blank_display_t vga_blank_display; 235 static vi_mmap_t vga_mmap_buf; 236 static vi_ioctl_t vga_dev_ioctl; 237 #ifndef VGA_NO_MODE_CHANGE 238 static vi_clear_t vga_clear; 239 static vi_fill_rect_t vga_fill_rect; 240 static vi_bitblt_t vga_bitblt; 241 #else /* VGA_NO_MODE_CHANGE */ 242 #define vga_clear (vi_clear_t *)vga_error 243 #define vga_fill_rect (vi_fill_rect_t *)vga_error 244 #define vga_bitblt (vi_bitblt_t *)vga_error 245 #endif 246 static vi_diag_t vga_diag; 247 248 static video_switch_t vgavidsw = { 249 vga_probe, 250 vga_init, 251 vga_get_info, 252 vga_query_mode, 253 vga_set_mode, 254 vga_save_font, 255 vga_load_font, 256 vga_show_font, 257 vga_save_palette, 258 vga_load_palette, 259 vga_set_border, 260 vga_save_state, 261 vga_load_state, 262 vga_set_origin, 263 vga_read_hw_cursor, 264 vga_set_hw_cursor, 265 vga_set_hw_cursor_shape, 266 vga_blank_display, 267 vga_mmap_buf, 268 vga_dev_ioctl, 269 vga_clear, 270 vga_fill_rect, 271 vga_bitblt, 272 vga_error, 273 vga_error, 274 vga_diag, 275 }; 276 277 VIDEO_DRIVER(mda, vgavidsw, NULL); 278 VIDEO_DRIVER(cga, vgavidsw, NULL); 279 VIDEO_DRIVER(ega, vgavidsw, NULL); 280 VIDEO_DRIVER(vga, vgavidsw, vga_configure); 281 282 /* VGA BIOS standard video modes */ 283 #define EOT (-1) 284 #define NA (-2) 285 286 static video_info_t bios_vmode[] = { 287 /* CGA */ 288 { M_B40x25, V_INFO_COLOR, 40, 25, 8, 8, 2, 1, 289 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 290 { M_C40x25, V_INFO_COLOR, 40, 25, 8, 8, 4, 1, 291 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 292 { M_B80x25, V_INFO_COLOR, 80, 25, 8, 8, 2, 1, 293 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 294 { M_C80x25, V_INFO_COLOR, 80, 25, 8, 8, 4, 1, 295 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 296 /* EGA */ 297 { M_ENH_B40x25, V_INFO_COLOR, 40, 25, 8, 14, 2, 1, 298 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 299 { M_ENH_C40x25, V_INFO_COLOR, 40, 25, 8, 14, 4, 1, 300 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 301 { M_ENH_B80x25, V_INFO_COLOR, 80, 25, 8, 14, 2, 1, 302 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 303 { M_ENH_C80x25, V_INFO_COLOR, 80, 25, 8, 14, 4, 1, 304 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 305 /* VGA */ 306 { M_VGA_C40x25, V_INFO_COLOR, 40, 25, 8, 16, 4, 1, 307 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 308 { M_VGA_M80x25, 0, 80, 25, 8, 16, 2, 1, 309 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 310 { M_VGA_C80x25, V_INFO_COLOR, 80, 25, 8, 16, 4, 1, 311 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 312 /* MDA */ 313 { M_EGAMONO80x25, 0, 80, 25, 8, 14, 2, 1, 314 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 315 /* EGA */ 316 { M_ENH_B80x43, 0, 80, 43, 8, 8, 2, 1, 317 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 318 { M_ENH_C80x43, V_INFO_COLOR, 80, 43, 8, 8, 4, 1, 319 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 320 /* VGA */ 321 { M_VGA_M80x30, 0, 80, 30, 8, 16, 2, 1, 322 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 323 { M_VGA_C80x30, V_INFO_COLOR, 80, 30, 8, 16, 4, 1, 324 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 325 { M_VGA_M80x50, 0, 80, 50, 8, 8, 2, 1, 326 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 327 { M_VGA_C80x50, V_INFO_COLOR, 80, 50, 8, 8, 4, 1, 328 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 329 { M_VGA_M80x60, 0, 80, 60, 8, 8, 2, 1, 330 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 331 { M_VGA_C80x60, V_INFO_COLOR, 80, 60, 8, 8, 4, 1, 332 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 333 334 #ifndef VGA_NO_MODE_CHANGE 335 336 #ifdef VGA_WIDTH90 337 { M_VGA_M90x25, 0, 90, 25, 8, 16, 2, 1, 338 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 339 { M_VGA_C90x25, V_INFO_COLOR, 90, 25, 8, 16, 4, 1, 340 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 341 { M_VGA_M90x30, 0, 90, 30, 8, 16, 2, 1, 342 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 343 { M_VGA_C90x30, V_INFO_COLOR, 90, 30, 8, 16, 4, 1, 344 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 345 { M_VGA_M90x43, 0, 90, 43, 8, 8, 2, 1, 346 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 347 { M_VGA_C90x43, V_INFO_COLOR, 90, 43, 8, 8, 4, 1, 348 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 349 { M_VGA_M90x50, 0, 90, 50, 8, 8, 2, 1, 350 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 351 { M_VGA_C90x50, V_INFO_COLOR, 90, 50, 8, 8, 4, 1, 352 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 353 { M_VGA_M90x60, 0, 90, 60, 8, 8, 2, 1, 354 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 355 { M_VGA_C90x60, V_INFO_COLOR, 90, 60, 8, 8, 4, 1, 356 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 357 #endif /* VGA_WIDTH90 */ 358 359 /* CGA */ 360 { M_BG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 2, 1, 361 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 362 { M_CG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 2, 1, 363 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 364 { M_BG640, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 200, 8, 8, 1, 1, 365 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 366 /* EGA */ 367 { M_CG320_D, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 4, 4, 368 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 369 V_INFO_MM_PLANAR }, 370 { M_CG640_E, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 200, 8, 8, 4, 4, 371 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 372 V_INFO_MM_PLANAR }, 373 { M_EGAMONOAPA, V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 374 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, 64*1024, 0, 0 , 375 V_INFO_MM_PLANAR }, 376 { M_ENHMONOAPA2,V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 377 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 378 V_INFO_MM_PLANAR }, 379 { M_CG640x350, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 350, 8, 14, 2, 2, 380 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 381 V_INFO_MM_PLANAR }, 382 { M_ENH_CG640, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 383 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 384 V_INFO_MM_PLANAR }, 385 /* VGA */ 386 { M_BG640x480, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 480, 8, 16, 4, 4, 387 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 388 V_INFO_MM_PLANAR }, 389 { M_CG640x480, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 480, 8, 16, 4, 4, 390 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 391 V_INFO_MM_PLANAR }, 392 { M_VGA_CG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 8, 1, 393 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 394 V_INFO_MM_PACKED, 1 }, 395 { M_VGA_MODEX, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 240, 8, 8, 8, 4, 396 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 397 V_INFO_MM_VGAX, 1 }, 398 #endif /* VGA_NO_MODE_CHANGE */ 399 400 { EOT }, 401 }; 402 403 static int vga_init_done = FALSE; 404 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 405 static u_char *video_mode_ptr = NULL; /* EGA/VGA */ 406 static u_char *video_mode_ptr2 = NULL; /* CGA/MDA */ 407 #endif 408 static u_char *mode_map[V_MODE_MAP_SIZE]; 409 static adp_state_t adpstate; 410 static adp_state_t adpstate2; 411 static int rows_offset = 1; 412 413 /* local macros and functions */ 414 #define BIOS_SADDRTOLADDR(p) ((((p) & 0xffff0000) >> 12) + ((p) & 0x0000ffff)) 415 416 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 417 static void map_mode_table(u_char **, u_char *, int); 418 #endif 419 static void clear_mode_map(video_adapter_t *, u_char **, int, int); 420 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 421 static int map_mode_num(int); 422 #endif 423 static int map_bios_mode_num(int, int, int); 424 static u_char *get_mode_param(int); 425 #ifndef VGA_NO_BIOS 426 static void fill_adapter_param(int, video_adapter_t *); 427 #endif 428 static int verify_adapter(video_adapter_t *); 429 static void update_adapter_info(video_adapter_t *, video_info_t *); 430 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 431 #define COMP_IDENTICAL 0 432 #define COMP_SIMILAR 1 433 #define COMP_DIFFERENT 2 434 static int comp_adpregs(u_char *, u_char *); 435 #endif 436 static int probe_adapters(void); 437 static int set_line_length(video_adapter_t *, int); 438 static int set_display_start(video_adapter_t *, int, int); 439 440 #ifndef VGA_NO_MODE_CHANGE 441 #ifdef VGA_WIDTH90 442 static void set_width90(adp_state_t *); 443 #endif 444 #endif /* !VGA_NO_MODE_CHANGE */ 445 446 #ifndef VGA_NO_FONT_LOADING 447 #define PARAM_BUFSIZE 6 448 static void set_font_mode(video_adapter_t *, u_char *); 449 static void set_normal_mode(video_adapter_t *, u_char *); 450 #endif 451 452 #ifndef VGA_NO_MODE_CHANGE 453 static void filll_io(int, vm_offset_t, size_t); 454 static void planar_fill(video_adapter_t *, int); 455 static void packed_fill(video_adapter_t *, int); 456 static void direct_fill(video_adapter_t *, int); 457 #ifdef notyet 458 static void planar_fill_rect(video_adapter_t *, int, int, int, int, int); 459 static void packed_fill_rect(video_adapter_t *, int, int, int, int, int); 460 static void direct_fill_rect16(video_adapter_t *, int, int, int, int, int); 461 static void direct_fill_rect24(video_adapter_t *, int, int, int, int, int); 462 static void direct_fill_rect32(video_adapter_t *, int, int, int, int, int); 463 #endif /* notyet */ 464 #endif /* !VGA_NO_MODE_CHANGE */ 465 466 static void dump_buffer(u_char *, size_t); 467 468 #define ISMAPPED(pa, width) \ 469 (((pa) <= (u_long)0x1000 - (width)) \ 470 || ((pa) >= ISA_HOLE_START && (pa) <= 0x100000 - (width))) 471 472 #define prologue(adp, flag, err) \ 473 if (!vga_init_done || !((adp)->va_flags & (flag))) \ 474 return (err) 475 476 /* a backdoor for the console driver */ 477 static int 478 vga_configure(int flags) 479 { 480 int i; 481 482 probe_adapters(); 483 for (i = 0; i < biosadapters; ++i) { 484 if (!probe_done(&biosadapter[i])) 485 continue; 486 biosadapter[i].va_flags |= V_ADP_INITIALIZED; 487 if (!config_done(&biosadapter[i])) { 488 if (vid_register(&biosadapter[i]) < 0) 489 continue; 490 biosadapter[i].va_flags |= V_ADP_REGISTERED; 491 } 492 } 493 if (vga_sub_configure != NULL) 494 (*vga_sub_configure)(flags); 495 496 return biosadapters; 497 } 498 499 /* local subroutines */ 500 501 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 502 /* construct the mode parameter map */ 503 static void 504 map_mode_table(u_char *map[], u_char *table, int max) 505 { 506 int i; 507 508 for(i = 0; i < max; ++i) 509 map[i] = table + i*V_MODE_PARAM_SIZE; 510 for(; i < V_MODE_MAP_SIZE; ++i) 511 map[i] = NULL; 512 } 513 #endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 514 515 static void 516 clear_mode_map(video_adapter_t *adp, u_char *map[], int max, int color) 517 { 518 video_info_t info; 519 int i; 520 521 /* 522 * NOTE: we don't touch `bios_vmode[]' because it is shared 523 * by all adapters. 524 */ 525 for(i = 0; i < max; ++i) { 526 if (vga_get_info(adp, i, &info)) 527 continue; 528 if ((info.vi_flags & V_INFO_COLOR) != color) 529 map[i] = NULL; 530 } 531 } 532 533 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 534 /* map the non-standard video mode to a known mode number */ 535 static int 536 map_mode_num(int mode) 537 { 538 static struct { 539 int from; 540 int to; 541 } mode_map[] = { 542 { M_ENH_B80x43, M_ENH_B80x25 }, 543 { M_ENH_C80x43, M_ENH_C80x25 }, 544 { M_VGA_M80x30, M_VGA_M80x25 }, 545 { M_VGA_C80x30, M_VGA_C80x25 }, 546 { M_VGA_M80x50, M_VGA_M80x25 }, 547 { M_VGA_C80x50, M_VGA_C80x25 }, 548 { M_VGA_M80x60, M_VGA_M80x25 }, 549 { M_VGA_C80x60, M_VGA_C80x25 }, 550 #ifdef VGA_WIDTH90 551 { M_VGA_M90x25, M_VGA_M80x25 }, 552 { M_VGA_C90x25, M_VGA_C80x25 }, 553 { M_VGA_M90x30, M_VGA_M80x25 }, 554 { M_VGA_C90x30, M_VGA_C80x25 }, 555 { M_VGA_M90x43, M_ENH_B80x25 }, 556 { M_VGA_C90x43, M_ENH_C80x25 }, 557 { M_VGA_M90x50, M_VGA_M80x25 }, 558 { M_VGA_C90x50, M_VGA_C80x25 }, 559 { M_VGA_M90x60, M_VGA_M80x25 }, 560 { M_VGA_C90x60, M_VGA_C80x25 }, 561 #endif 562 { M_VGA_MODEX, M_VGA_CG320 }, 563 }; 564 int i; 565 566 for (i = 0; i < sizeof(mode_map)/sizeof(mode_map[0]); ++i) { 567 if (mode_map[i].from == mode) 568 return mode_map[i].to; 569 } 570 return mode; 571 } 572 #endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 573 574 /* turn the BIOS video number into our video mode number */ 575 static int 576 map_bios_mode_num(int type, int color, int bios_mode) 577 { 578 static int cga_modes[7] = { 579 M_B40x25, M_C40x25, /* 0, 1 */ 580 M_B80x25, M_C80x25, /* 2, 3 */ 581 M_BG320, M_CG320, 582 M_BG640, 583 }; 584 static int ega_modes[17] = { 585 M_ENH_B40x25, M_ENH_C40x25, /* 0, 1 */ 586 M_ENH_B80x25, M_ENH_C80x25, /* 2, 3 */ 587 M_BG320, M_CG320, 588 M_BG640, 589 M_EGAMONO80x25, /* 7 */ 590 8, 9, 10, 11, 12, 591 M_CG320_D, 592 M_CG640_E, 593 M_ENHMONOAPA2, /* XXX: video momery > 64K */ 594 M_ENH_CG640, /* XXX: video momery > 64K */ 595 }; 596 static int vga_modes[20] = { 597 M_VGA_C40x25, M_VGA_C40x25, /* 0, 1 */ 598 M_VGA_C80x25, M_VGA_C80x25, /* 2, 3 */ 599 M_BG320, M_CG320, 600 M_BG640, 601 M_VGA_M80x25, /* 7 */ 602 8, 9, 10, 11, 12, 603 M_CG320_D, 604 M_CG640_E, 605 M_ENHMONOAPA2, 606 M_ENH_CG640, 607 M_BG640x480, M_CG640x480, 608 M_VGA_CG320, 609 }; 610 611 switch (type) { 612 613 case KD_VGA: 614 if (bios_mode < sizeof(vga_modes)/sizeof(vga_modes[0])) 615 return vga_modes[bios_mode]; 616 else if (color) 617 return M_VGA_C80x25; 618 else 619 return M_VGA_M80x25; 620 break; 621 622 case KD_EGA: 623 if (bios_mode < sizeof(ega_modes)/sizeof(ega_modes[0])) 624 return ega_modes[bios_mode]; 625 else if (color) 626 return M_ENH_C80x25; 627 else 628 return M_EGAMONO80x25; 629 break; 630 631 case KD_CGA: 632 if (bios_mode < sizeof(cga_modes)/sizeof(cga_modes[0])) 633 return cga_modes[bios_mode]; 634 else 635 return M_C80x25; 636 break; 637 638 case KD_MONO: 639 case KD_HERCULES: 640 return M_EGAMONO80x25; /* XXX: this name is confusing */ 641 642 default: 643 break; 644 } 645 return -1; 646 } 647 648 /* look up a parameter table entry */ 649 static u_char * 650 get_mode_param(int mode) 651 { 652 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 653 if (mode >= V_MODE_MAP_SIZE) 654 mode = map_mode_num(mode); 655 #endif 656 if ((mode >= 0) && (mode < V_MODE_MAP_SIZE)) 657 return mode_map[mode]; 658 else 659 return NULL; 660 } 661 662 #ifndef VGA_NO_BIOS 663 static void 664 fill_adapter_param(int code, video_adapter_t *adp) 665 { 666 static struct { 667 int primary; 668 int secondary; 669 } dcc[] = { 670 { DCC_MONO, DCC_EGA40 /* CGA monitor */ }, 671 { DCC_MONO, DCC_EGA80 /* CGA monitor */ }, 672 { DCC_MONO, DCC_EGA80 }, 673 { DCC_MONO, DCC_EGA80 }, 674 { DCC_CGA40, DCC_EGAMONO }, 675 { DCC_CGA80, DCC_EGAMONO }, 676 { DCC_EGA40 /* CGA monitor */, DCC_MONO}, 677 { DCC_EGA80 /* CGA monitor */, DCC_MONO}, 678 { DCC_EGA80, DCC_MONO }, 679 { DCC_EGA80, DCC_MONO }, 680 { DCC_EGAMONO, DCC_CGA40 }, 681 { DCC_EGAMONO, DCC_CGA80 }, 682 }; 683 684 if ((code < 0) || (code >= sizeof(dcc)/sizeof(dcc[0]))) { 685 adp[V_ADP_PRIMARY] = adapter_init_value[DCC_MONO]; 686 adp[V_ADP_SECONDARY] = adapter_init_value[DCC_CGA80]; 687 } else { 688 adp[V_ADP_PRIMARY] = adapter_init_value[dcc[code].primary]; 689 adp[V_ADP_SECONDARY] = adapter_init_value[dcc[code].secondary]; 690 } 691 } 692 #endif /* VGA_NO_BIOS */ 693 694 static int 695 verify_adapter(video_adapter_t *adp) 696 { 697 vm_offset_t buf; 698 u_int16_t v; 699 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 700 u_int32_t p; 701 #endif 702 703 buf = BIOS_PADDRTOVADDR(adp->va_window); 704 v = readw(buf); 705 writew(buf, 0xA55A); 706 if (readw(buf) != 0xA55A) 707 return ENXIO; 708 writew(buf, v); 709 710 switch (adp->va_type) { 711 712 case KD_EGA: 713 outb(adp->va_crtc_addr, 7); 714 if (inb(adp->va_crtc_addr) == 7) { 715 adp->va_type = KD_VGA; 716 adp->va_name = "vga"; 717 adp->va_flags |= V_ADP_STATESAVE | V_ADP_PALETTE; 718 } 719 adp->va_flags |= V_ADP_STATELOAD | V_ADP_BORDER; 720 /* the color adapter may be in the 40x25 mode... XXX */ 721 722 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 723 /* get the BIOS video mode pointer */ 724 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x4a8); 725 p = BIOS_SADDRTOLADDR(p); 726 if (ISMAPPED(p, sizeof(u_int32_t))) { 727 p = *(u_int32_t *)BIOS_PADDRTOVADDR(p); 728 p = BIOS_SADDRTOLADDR(p); 729 if (ISMAPPED(p, V_MODE_PARAM_SIZE)) 730 video_mode_ptr = (u_char *)BIOS_PADDRTOVADDR(p); 731 } 732 #endif 733 break; 734 735 case KD_CGA: 736 adp->va_flags |= V_ADP_COLOR | V_ADP_BORDER; 737 /* may be in the 40x25 mode... XXX */ 738 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 739 /* get the BIOS video mode pointer */ 740 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4); 741 p = BIOS_SADDRTOLADDR(p); 742 video_mode_ptr2 = (u_char *)BIOS_PADDRTOVADDR(p); 743 #endif 744 break; 745 746 case KD_MONO: 747 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 748 /* get the BIOS video mode pointer */ 749 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4); 750 p = BIOS_SADDRTOLADDR(p); 751 video_mode_ptr2 = (u_char *)BIOS_PADDRTOVADDR(p); 752 #endif 753 break; 754 } 755 756 return 0; 757 } 758 759 static void 760 update_adapter_info(video_adapter_t *adp, video_info_t *info) 761 { 762 adp->va_flags &= ~V_ADP_COLOR; 763 adp->va_flags |= 764 (info->vi_flags & V_INFO_COLOR) ? V_ADP_COLOR : 0; 765 adp->va_crtc_addr = 766 (adp->va_flags & V_ADP_COLOR) ? COLOR_CRTC : MONO_CRTC; 767 adp->va_window = BIOS_PADDRTOVADDR(info->vi_window); 768 adp->va_window_size = info->vi_window_size; 769 adp->va_window_gran = info->vi_window_gran; 770 adp->va_window_orig = 0; 771 /* XXX */ 772 adp->va_buffer = info->vi_buffer; 773 adp->va_buffer_size = info->vi_buffer_size; 774 if (info->vi_mem_model == V_INFO_MM_VGAX) { 775 adp->va_line_width = info->vi_width/2; 776 } else if (info->vi_flags & V_INFO_GRAPHICS) { 777 switch (info->vi_depth/info->vi_planes) { 778 case 1: 779 adp->va_line_width = info->vi_width/8; 780 break; 781 case 2: 782 adp->va_line_width = info->vi_width/4; 783 break; 784 case 4: 785 adp->va_line_width = info->vi_width/2; 786 break; 787 case 8: 788 default: /* shouldn't happen */ 789 adp->va_line_width = info->vi_width; 790 break; 791 } 792 } else { 793 adp->va_line_width = info->vi_width; 794 } 795 adp->va_disp_start.x = 0; 796 adp->va_disp_start.y = 0; 797 bcopy(info, &adp->va_info, sizeof(adp->va_info)); 798 } 799 800 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 801 /* compare two parameter table entries */ 802 static int 803 comp_adpregs(u_char *buf1, u_char *buf2) 804 { 805 static struct { 806 u_char mask; 807 } params[V_MODE_PARAM_SIZE] = { 808 {0xff}, {0x00}, {0xff}, /* COLS}, ROWS}, POINTS */ 809 {0x00}, {0x00}, /* page length */ 810 {0xfe}, {0xff}, {0xff}, {0xff}, /* sequencer registers */ 811 {0xf3}, /* misc register */ 812 {0xff}, {0xff}, {0xff}, {0x7f}, {0xff}, /* CRTC */ 813 {0xff}, {0xff}, {0xff}, {0x7f}, {0xff}, 814 {0x00}, {0x00}, {0x00}, {0x00}, {0x00}, 815 {0x00}, {0xff}, {0x7f}, {0xff}, {0xff}, 816 {0x7f}, {0xff}, {0xff}, {0xef}, {0xff}, 817 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, /* attribute controller regs */ 818 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, 819 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, 820 {0xff}, {0xff}, {0xff}, {0xff}, {0xf0}, 821 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, /* GDC register */ 822 {0xff}, {0xff}, {0xff}, {0xff}, 823 }; 824 int identical = TRUE; 825 int i; 826 827 if ((buf1 == NULL) || (buf2 == NULL)) 828 return COMP_DIFFERENT; 829 830 for (i = 0; i < sizeof(params)/sizeof(params[0]); ++i) { 831 if (params[i].mask == 0) /* don't care */ 832 continue; 833 if ((buf1[i] & params[i].mask) != (buf2[i] & params[i].mask)) 834 return COMP_DIFFERENT; 835 if (buf1[i] != buf2[i]) 836 identical = FALSE; 837 } 838 return (identical) ? COMP_IDENTICAL : COMP_SIMILAR; 839 } 840 #endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 841 842 /* probe video adapters and return the number of detected adapters */ 843 static int 844 probe_adapters(void) 845 { 846 video_adapter_t *adp; 847 video_info_t info; 848 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 849 u_char *mp; 850 #endif 851 int i; 852 853 /* do this test only once */ 854 if (vga_init_done) 855 return biosadapters; 856 vga_init_done = TRUE; 857 858 /* 859 * Locate display adapters. 860 * The AT architecture supports upto two adapters. `syscons' allows 861 * the following combinations of adapters: 862 * 1) MDA + CGA 863 * 2) MDA + EGA/VGA color 864 * 3) CGA + EGA/VGA mono 865 * Note that `syscons' doesn't bother with MCGA as it is only 866 * avaiable for low end PS/2 models which has 80286 or earlier CPUs, 867 * thus, they are not running FreeBSD! 868 * When there are two adapaters in the system, one becomes `primary' 869 * and the other `secondary'. The EGA adapter has a set of DIP 870 * switches on board for this information and the EGA BIOS copies 871 * it in the BIOS data area BIOSDATA_VIDEOSWITCH (40:88). 872 * The VGA BIOS has more sophisticated mechanism and has this 873 * information in BIOSDATA_DCCINDEX (40:8a), but it also maintains 874 * compatibility with the EGA BIOS by updating BIOSDATA_VIDEOSWITCH. 875 */ 876 877 /* 878 * Check rtc and BIOS data area. 879 * XXX: we don't use BIOSDATA_EQUIPMENT, since it is not a dead 880 * copy of RTC_EQUIPMENT. Bits 4 and 5 of ETC_EQUIPMENT are 881 * zeros for EGA and VGA. However, the EGA/VGA BIOS sets 882 * these bits in BIOSDATA_EQUIPMENT according to the monitor 883 * type detected. 884 */ 885 #ifndef VGA_NO_BIOS 886 if (*(u_int32_t *)BIOS_PADDRTOVADDR(0x4a8)) { 887 /* EGA/VGA BIOS is present */ 888 fill_adapter_param(readb(BIOS_PADDRTOVADDR(0x488)) & 0x0f, 889 biosadapter); 890 } else { 891 switch ((rtcin(RTC_EQUIPMENT) >> 4) & 3) { /* bit 4 and 5 */ 892 case 0: 893 /* EGA/VGA: shouldn't be happening */ 894 fill_adapter_param(readb(BIOS_PADDRTOVADDR(0x488)) & 0x0f, 895 biosadapter); 896 break; 897 case 1: 898 /* CGA 40x25 */ 899 /* FIXME: switch to the 80x25 mode? XXX */ 900 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_CGA40]; 901 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 902 break; 903 case 2: 904 /* CGA 80x25 */ 905 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_CGA80]; 906 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 907 break; 908 case 3: 909 /* MDA */ 910 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_MONO]; 911 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_CGA80]; 912 break; 913 } 914 } 915 #else 916 /* assume EGA/VGA? XXX */ 917 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_EGA80]; 918 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 919 #endif /* VGA_NO_BIOS */ 920 921 biosadapters = 0; 922 if (verify_adapter(&biosadapter[V_ADP_SECONDARY]) == 0) { 923 ++biosadapters; 924 biosadapter[V_ADP_SECONDARY].va_flags |= V_ADP_PROBED; 925 biosadapter[V_ADP_SECONDARY].va_mode = 926 biosadapter[V_ADP_SECONDARY].va_initial_mode = 927 map_bios_mode_num(biosadapter[V_ADP_SECONDARY].va_type, 928 biosadapter[V_ADP_SECONDARY].va_flags 929 & V_ADP_COLOR, 930 biosadapter[V_ADP_SECONDARY].va_initial_bios_mode); 931 } else { 932 biosadapter[V_ADP_SECONDARY].va_type = -1; 933 } 934 if (verify_adapter(&biosadapter[V_ADP_PRIMARY]) == 0) { 935 ++biosadapters; 936 biosadapter[V_ADP_PRIMARY].va_flags |= V_ADP_PROBED; 937 #ifndef VGA_NO_BIOS 938 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode = 939 readb(BIOS_PADDRTOVADDR(0x449)); 940 #else 941 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode = 3; /* XXX */ 942 #endif 943 biosadapter[V_ADP_PRIMARY].va_mode = 944 biosadapter[V_ADP_PRIMARY].va_initial_mode = 945 map_bios_mode_num(biosadapter[V_ADP_PRIMARY].va_type, 946 biosadapter[V_ADP_PRIMARY].va_flags & V_ADP_COLOR, 947 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode); 948 } else { 949 biosadapter[V_ADP_PRIMARY] = biosadapter[V_ADP_SECONDARY]; 950 biosadapter[V_ADP_SECONDARY].va_type = -1; 951 } 952 if (biosadapters == 0) 953 return biosadapters; 954 biosadapter[V_ADP_PRIMARY].va_unit = V_ADP_PRIMARY; 955 biosadapter[V_ADP_SECONDARY].va_unit = V_ADP_SECONDARY; 956 957 #if 0 /* we don't need these... */ 958 fb_init_struct(&biosadapter[V_ADP_PRIMARY], ...); 959 fb_init_struct(&biosadapter[V_ADP_SECONDARY], ...); 960 #endif 961 962 #if notyet 963 /* 964 * We cannot have two video adapter of the same type; there must be 965 * only one of color or mono adapter, or one each of them. 966 */ 967 if (biosadapters > 1) { 968 if (!((biosadapter[0].va_flags ^ biosadapter[1].va_flags) 969 & V_ADP_COLOR)) 970 /* we have two mono or color adapters!! */ 971 return (biosadapters = 0); 972 } 973 #endif 974 975 /* 976 * Ensure a zero start address. This is mainly to recover after 977 * switching from pcvt using userconfig(). The registers are w/o 978 * for old hardware so it's too hard to relocate the active screen 979 * memory. 980 * This must be done before vga_save_state() for VGA. 981 */ 982 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr, 12); 983 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0); 984 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr, 13); 985 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0); 986 987 /* the video mode parameter table in EGA/VGA BIOS */ 988 /* NOTE: there can be only one EGA/VGA, wheather color or mono, 989 * recognized by the video BIOS. 990 */ 991 if ((biosadapter[V_ADP_PRIMARY].va_type == KD_EGA) || 992 (biosadapter[V_ADP_PRIMARY].va_type == KD_VGA)) { 993 adp = &biosadapter[V_ADP_PRIMARY]; 994 } else if ((biosadapter[V_ADP_SECONDARY].va_type == KD_EGA) || 995 (biosadapter[V_ADP_SECONDARY].va_type == KD_VGA)) { 996 adp = &biosadapter[V_ADP_SECONDARY]; 997 } else { 998 adp = NULL; 999 } 1000 bzero(mode_map, sizeof(mode_map)); 1001 if (adp != NULL) { 1002 if (adp->va_type == KD_VGA) { 1003 vga_save_state(adp, &adpstate, sizeof(adpstate)); 1004 for(i = 0; i < 16; i++) 1005 adp->va_palette_regs[i] = adpstate.regs[35 + i]; 1006 #if defined(VGA_NO_BIOS) || defined(VGA_NO_MODE_CHANGE) 1007 mode_map[adp->va_initial_mode] = adpstate.regs; 1008 rows_offset = 1; 1009 #else /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1010 if (video_mode_ptr == NULL) { 1011 mode_map[adp->va_initial_mode] = adpstate.regs; 1012 rows_offset = 1; 1013 } else { 1014 /* discard the table if we are not familiar with it... */ 1015 map_mode_table(mode_map, video_mode_ptr, M_VGA_CG320 + 1); 1016 mp = get_mode_param(adp->va_initial_mode); 1017 if (mp != NULL) 1018 bcopy(mp, adpstate2.regs, sizeof(adpstate2.regs)); 1019 switch (comp_adpregs(adpstate.regs, mp)) { 1020 case COMP_IDENTICAL: 1021 /* 1022 * OK, this parameter table looks reasonably familiar 1023 * to us... 1024 */ 1025 /* 1026 * This is a kludge for Toshiba DynaBook SS433 1027 * whose BIOS video mode table entry has the actual # 1028 * of rows at the offset 1; BIOSes from other 1029 * manufacturers store the # of rows - 1 there. XXX 1030 */ 1031 rows_offset = adpstate.regs[1] + 1 - mp[1]; 1032 break; 1033 1034 case COMP_SIMILAR: 1035 /* 1036 * Not exactly the same, but similar enough to be 1037 * trusted. However, use the saved register values 1038 * for the initial mode and other modes which are 1039 * based on the initial mode. 1040 */ 1041 mode_map[adp->va_initial_mode] = adpstate.regs; 1042 rows_offset = adpstate.regs[1] + 1 - mp[1]; 1043 adpstate.regs[1] -= rows_offset - 1; 1044 break; 1045 1046 case COMP_DIFFERENT: 1047 default: 1048 /* 1049 * Don't use the paramter table in BIOS. It doesn't 1050 * look familiar to us. Video mode switching is allowed 1051 * only if the new mode is the same as or based on 1052 * the initial mode. 1053 */ 1054 video_mode_ptr = NULL; 1055 bzero(mode_map, sizeof(mode_map)); 1056 mode_map[adp->va_initial_mode] = adpstate.regs; 1057 rows_offset = 1; 1058 break; 1059 } 1060 } 1061 #endif /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1062 1063 #ifndef VGA_NO_MODE_CHANGE 1064 adp->va_flags |= V_ADP_MODECHANGE; 1065 #endif 1066 #ifndef VGA_NO_FONT_LOADING 1067 adp->va_flags |= V_ADP_FONT; 1068 #endif 1069 } else if (adp->va_type == KD_EGA) { 1070 #if defined(VGA_NO_BIOS) || defined(VGA_NO_MODE_CHANGE) 1071 rows_offset = 1; 1072 #else /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1073 if (video_mode_ptr == NULL) { 1074 rows_offset = 1; 1075 } else { 1076 map_mode_table(mode_map, video_mode_ptr, M_ENH_C80x25 + 1); 1077 /* XXX how can one validate the EGA table... */ 1078 mp = get_mode_param(adp->va_initial_mode); 1079 if (mp != NULL) { 1080 adp->va_flags |= V_ADP_MODECHANGE; 1081 #ifndef VGA_NO_FONT_LOADING 1082 adp->va_flags |= V_ADP_FONT; 1083 #endif 1084 rows_offset = 1; 1085 } else { 1086 /* 1087 * This is serious. We will not be able to switch video 1088 * modes at all... 1089 */ 1090 video_mode_ptr = NULL; 1091 bzero(mode_map, sizeof(mode_map)); 1092 rows_offset = 1; 1093 } 1094 } 1095 #endif /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1096 } 1097 } 1098 1099 /* remove conflicting modes if we have more than one adapter */ 1100 if (biosadapters > 0) { 1101 for (i = 0; i < biosadapters; ++i) { 1102 if (!(biosadapter[i].va_flags & V_ADP_MODECHANGE)) 1103 continue; 1104 clear_mode_map(&biosadapter[i], mode_map, M_VGA_CG320 + 1, 1105 (biosadapter[i].va_flags & V_ADP_COLOR) ? 1106 V_INFO_COLOR : 0); 1107 if ((biosadapter[i].va_type == KD_VGA) 1108 || (biosadapter[i].va_type == KD_EGA)) { 1109 biosadapter[i].va_io_base = 1110 (biosadapter[i].va_flags & V_ADP_COLOR) ? 1111 IO_VGA : IO_MDA; 1112 biosadapter[i].va_io_size = 32; 1113 } 1114 } 1115 } 1116 1117 /* buffer address */ 1118 vga_get_info(&biosadapter[V_ADP_PRIMARY], 1119 biosadapter[V_ADP_PRIMARY].va_initial_mode, &info); 1120 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1121 update_adapter_info(&biosadapter[V_ADP_PRIMARY], &info); 1122 1123 if (biosadapters > 1) { 1124 vga_get_info(&biosadapter[V_ADP_SECONDARY], 1125 biosadapter[V_ADP_SECONDARY].va_initial_mode, &info); 1126 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1127 update_adapter_info(&biosadapter[V_ADP_SECONDARY], &info); 1128 } 1129 1130 /* 1131 * XXX: we should verify the following values for the primary adapter... 1132 * crtc I/O port address: *(u_int16_t *)BIOS_PADDRTOVADDR(0x463); 1133 * color/mono display: (*(u_int8_t *)BIOS_PADDRTOVADDR(0x487) & 0x02) 1134 * ? 0 : V_ADP_COLOR; 1135 * columns: *(u_int8_t *)BIOS_PADDRTOVADDR(0x44a); 1136 * rows: *(u_int8_t *)BIOS_PADDRTOVADDR(0x484); 1137 * font size: *(u_int8_t *)BIOS_PADDRTOVADDR(0x485); 1138 * buffer size: *(u_int16_t *)BIOS_PADDRTOVADDR(0x44c); 1139 */ 1140 1141 return biosadapters; 1142 } 1143 1144 /* set the scan line length in pixel */ 1145 static int 1146 set_line_length(video_adapter_t *adp, int pixel) 1147 { 1148 u_char *mp; 1149 int ppw; /* pixels per word */ 1150 int bpl; /* bytes per line */ 1151 int count; 1152 1153 if ((adp->va_type != KD_VGA) && (adp->va_type != KD_EGA)) 1154 return ENODEV; 1155 mp = get_mode_param(adp->va_mode); 1156 if (mp == NULL) 1157 return EINVAL; 1158 1159 switch (adp->va_info.vi_mem_model) { 1160 case V_INFO_MM_PLANAR: 1161 ppw = 16/(adp->va_info.vi_depth/adp->va_info.vi_planes); 1162 count = (pixel + ppw - 1)/ppw/2; 1163 bpl = ((pixel + ppw - 1)/ppw/2)*4; 1164 break; 1165 case V_INFO_MM_PACKED: 1166 count = (pixel + 7)/8; 1167 bpl = ((pixel + 7)/8)*8; 1168 break; 1169 case V_INFO_MM_TEXT: 1170 count = (pixel + 7)/8; /* columns */ 1171 bpl = (pixel + 7)/8; /* columns */ 1172 break; 1173 default: 1174 return ENODEV; 1175 } 1176 1177 if (mp[10 + 0x17] & 0x40) /* CRTC mode control reg */ 1178 count *= 2; /* byte mode */ 1179 outb(adp->va_crtc_addr, 0x13); 1180 outb(adp->va_crtc_addr + 1, count); 1181 adp->va_line_width = bpl; 1182 1183 return 0; 1184 } 1185 1186 static int 1187 set_display_start(video_adapter_t *adp, int x, int y) 1188 { 1189 int off; /* byte offset (graphics mode)/word offset (text mode) */ 1190 int poff; /* pixel offset */ 1191 int roff; /* row offset */ 1192 int ppb; /* pixels per byte */ 1193 1194 if ((adp->va_type != KD_VGA) && (adp->va_type != KD_EGA)) 1195 x &= ~7; 1196 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) { 1197 ppb = 8/(adp->va_info.vi_depth/adp->va_info.vi_planes); 1198 off = y*adp->va_line_width + x/ppb; 1199 roff = 0; 1200 poff = x%ppb; 1201 } else { 1202 if ((adp->va_type == KD_VGA) || (adp->va_type == KD_EGA)) { 1203 outb(TSIDX, 1); 1204 if (inb(TSREG) & 1) 1205 ppb = 9; 1206 else 1207 ppb = 8; 1208 } else { 1209 ppb = 8; 1210 } 1211 off = y/adp->va_info.vi_cheight*adp->va_line_width + x/ppb; 1212 roff = y%adp->va_info.vi_cheight; 1213 /* FIXME: is this correct? XXX */ 1214 if (ppb == 8) 1215 poff = x%ppb; 1216 else 1217 poff = (x + 8)%ppb; 1218 } 1219 1220 /* start address */ 1221 outb(adp->va_crtc_addr, 0xc); /* high */ 1222 outb(adp->va_crtc_addr + 1, off >> 8); 1223 outb(adp->va_crtc_addr, 0xd); /* low */ 1224 outb(adp->va_crtc_addr + 1, off & 0xff); 1225 1226 /* horizontal pel pan */ 1227 if ((adp->va_type == KD_VGA) || (adp->va_type == KD_EGA)) { 1228 inb(adp->va_crtc_addr + 6); 1229 outb(ATC, 0x13 | 0x20); 1230 outb(ATC, poff); 1231 inb(adp->va_crtc_addr + 6); 1232 outb(ATC, 0x20); 1233 } 1234 1235 /* preset raw scan */ 1236 outb(adp->va_crtc_addr, 8); 1237 outb(adp->va_crtc_addr + 1, roff); 1238 1239 adp->va_disp_start.x = x; 1240 adp->va_disp_start.y = y; 1241 return 0; 1242 } 1243 1244 #ifndef VGA_NO_MODE_CHANGE 1245 #ifdef __i386__ /* XXX */ 1246 static void 1247 fill(int val, void *d, size_t size) 1248 { 1249 u_char *p = d; 1250 1251 while (size-- > 0) 1252 *p++ = val; 1253 } 1254 #endif /* __i386__ */ 1255 1256 static void 1257 filll_io(int val, vm_offset_t d, size_t size) 1258 { 1259 while (size-- > 0) { 1260 writel(d, val); 1261 d += sizeof(u_int32_t); 1262 } 1263 } 1264 #endif /* !VGA_NO_MODE_CHANGE */ 1265 1266 /* entry points */ 1267 1268 #if 0 1269 static int 1270 vga_nop(void) 1271 { 1272 return 0; 1273 } 1274 #endif 1275 1276 static int 1277 vga_error(void) 1278 { 1279 return ENODEV; 1280 } 1281 1282 static int 1283 vga_probe(int unit, video_adapter_t **adpp, void *arg, int flags) 1284 { 1285 probe_adapters(); 1286 if (unit >= biosadapters) 1287 return ENXIO; 1288 1289 *adpp = &biosadapter[unit]; 1290 1291 return 0; 1292 } 1293 1294 static int 1295 vga_init(int unit, video_adapter_t *adp, int flags) 1296 { 1297 if ((unit >= biosadapters) || (adp == NULL) || !probe_done(adp)) 1298 return ENXIO; 1299 1300 if (!init_done(adp)) { 1301 /* nothing to do really... */ 1302 adp->va_flags |= V_ADP_INITIALIZED; 1303 } 1304 1305 if (!config_done(adp)) { 1306 if (vid_register(adp) < 0) 1307 return ENXIO; 1308 adp->va_flags |= V_ADP_REGISTERED; 1309 } 1310 if (vga_sub_configure != NULL) 1311 (*vga_sub_configure)(0); 1312 1313 return 0; 1314 } 1315 1316 /* 1317 * get_info(): 1318 * Return the video_info structure of the requested video mode. 1319 * 1320 * all adapters 1321 */ 1322 static int 1323 vga_get_info(video_adapter_t *adp, int mode, video_info_t *info) 1324 { 1325 int i; 1326 1327 if (!vga_init_done) 1328 return ENXIO; 1329 1330 #ifndef VGA_NO_MODE_CHANGE 1331 if (adp->va_flags & V_ADP_MODECHANGE) { 1332 /* 1333 * If the parameter table entry for this mode is not found, 1334 * the mode is not supported... 1335 */ 1336 if (get_mode_param(mode) == NULL) 1337 return EINVAL; 1338 } else 1339 #endif /* VGA_NO_MODE_CHANGE */ 1340 { 1341 /* 1342 * Even if we don't support video mode switching on this adapter, 1343 * the information on the initial (thus current) video mode 1344 * should be made available. 1345 */ 1346 if (mode != adp->va_initial_mode) 1347 return EINVAL; 1348 } 1349 1350 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 1351 if (bios_vmode[i].vi_mode == NA) 1352 continue; 1353 if (mode == bios_vmode[i].vi_mode) { 1354 *info = bios_vmode[i]; 1355 /* XXX */ 1356 info->vi_buffer_size = info->vi_window_size*info->vi_planes; 1357 return 0; 1358 } 1359 } 1360 return EINVAL; 1361 } 1362 1363 /* 1364 * query_mode(): 1365 * Find a video mode matching the requested parameters. 1366 * Fields filled with 0 are considered "don't care" fields and 1367 * match any modes. 1368 * 1369 * all adapters 1370 */ 1371 static int 1372 vga_query_mode(video_adapter_t *adp, video_info_t *info) 1373 { 1374 int i; 1375 1376 if (!vga_init_done) 1377 return ENXIO; 1378 1379 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 1380 if (bios_vmode[i].vi_mode == NA) 1381 continue; 1382 1383 if ((info->vi_width != 0) 1384 && (info->vi_width != bios_vmode[i].vi_width)) 1385 continue; 1386 if ((info->vi_height != 0) 1387 && (info->vi_height != bios_vmode[i].vi_height)) 1388 continue; 1389 if ((info->vi_cwidth != 0) 1390 && (info->vi_cwidth != bios_vmode[i].vi_cwidth)) 1391 continue; 1392 if ((info->vi_cheight != 0) 1393 && (info->vi_cheight != bios_vmode[i].vi_cheight)) 1394 continue; 1395 if ((info->vi_depth != 0) 1396 && (info->vi_depth != bios_vmode[i].vi_depth)) 1397 continue; 1398 if ((info->vi_planes != 0) 1399 && (info->vi_planes != bios_vmode[i].vi_planes)) 1400 continue; 1401 /* XXX: should check pixel format, memory model */ 1402 if ((info->vi_flags != 0) 1403 && (info->vi_flags != bios_vmode[i].vi_flags)) 1404 continue; 1405 1406 /* verify if this mode is supported on this adapter */ 1407 if (vga_get_info(adp, bios_vmode[i].vi_mode, info)) 1408 continue; 1409 return 0; 1410 } 1411 return ENODEV; 1412 } 1413 1414 /* 1415 * set_mode(): 1416 * Change the video mode. 1417 * 1418 * EGA/VGA 1419 */ 1420 1421 #ifndef VGA_NO_MODE_CHANGE 1422 #ifdef VGA_WIDTH90 1423 static void 1424 set_width90(adp_state_t *params) 1425 { 1426 /* 1427 * Based on code submitted by Kelly Yancey (kbyanc@freedomnet.com) 1428 * and alexv@sui.gda.itesm.mx. 1429 */ 1430 params->regs[5] |= 1; /* toggle 8 pixel wide fonts */ 1431 params->regs[10+0x0] = 0x6b; 1432 params->regs[10+0x1] = 0x59; 1433 params->regs[10+0x2] = 0x5a; 1434 params->regs[10+0x3] = 0x8e; 1435 params->regs[10+0x4] = 0x5e; 1436 params->regs[10+0x5] = 0x8a; 1437 params->regs[10+0x13] = 45; 1438 params->regs[35+0x13] = 0; 1439 } 1440 #endif /* VGA_WIDTH90 */ 1441 #endif /* !VGA_NO_MODE_CHANGE */ 1442 1443 static int 1444 vga_set_mode(video_adapter_t *adp, int mode) 1445 { 1446 #ifndef VGA_NO_MODE_CHANGE 1447 video_info_t info; 1448 adp_state_t params; 1449 1450 prologue(adp, V_ADP_MODECHANGE, ENODEV); 1451 1452 if (vga_get_info(adp, mode, &info)) 1453 return EINVAL; 1454 1455 #if VGA_DEBUG > 1 1456 kprintf("vga_set_mode(): setting mode %d\n", mode); 1457 #endif 1458 1459 params.sig = V_STATE_SIG; 1460 bcopy(get_mode_param(mode), params.regs, sizeof(params.regs)); 1461 1462 switch (mode) { 1463 #ifdef VGA_WIDTH90 1464 case M_VGA_C90x60: case M_VGA_M90x60: 1465 set_width90(¶ms); 1466 /* FALLTHROUGH */ 1467 #endif 1468 case M_VGA_C80x60: case M_VGA_M80x60: 1469 params.regs[2] = 0x08; 1470 params.regs[19] = 0x47; 1471 goto special_480l; 1472 1473 #ifdef VGA_WIDTH90 1474 case M_VGA_C90x30: case M_VGA_M90x30: 1475 set_width90(¶ms); 1476 /* FALLTHROUGH */ 1477 #endif 1478 case M_VGA_C80x30: case M_VGA_M80x30: 1479 params.regs[19] = 0x4f; 1480 special_480l: 1481 params.regs[9] |= 0xc0; 1482 params.regs[16] = 0x08; 1483 params.regs[17] = 0x3e; 1484 params.regs[26] = 0xea; 1485 params.regs[28] = 0xdf; 1486 params.regs[31] = 0xe7; 1487 params.regs[32] = 0x04; 1488 goto setup_mode; 1489 1490 #ifdef VGA_WIDTH90 1491 case M_VGA_C90x43: case M_VGA_M90x43: 1492 set_width90(¶ms); 1493 /* FALLTHROUGH */ 1494 #endif 1495 case M_ENH_C80x43: case M_ENH_B80x43: 1496 params.regs[28] = 87; 1497 goto special_80x50; 1498 1499 #ifdef VGA_WIDTH90 1500 case M_VGA_C90x50: case M_VGA_M90x50: 1501 set_width90(¶ms); 1502 /* FALLTHROUGH */ 1503 #endif 1504 case M_VGA_C80x50: case M_VGA_M80x50: 1505 special_80x50: 1506 params.regs[2] = 8; 1507 params.regs[19] = 7; 1508 goto setup_mode; 1509 1510 #ifdef VGA_WIDTH90 1511 case M_VGA_C90x25: case M_VGA_M90x25: 1512 set_width90(¶ms); 1513 /* FALLTHROUGH */ 1514 #endif 1515 case M_VGA_C40x25: case M_VGA_C80x25: 1516 case M_VGA_M80x25: 1517 case M_B40x25: case M_C40x25: 1518 case M_B80x25: case M_C80x25: 1519 case M_ENH_B40x25: case M_ENH_C40x25: 1520 case M_ENH_B80x25: case M_ENH_C80x25: 1521 case M_EGAMONO80x25: 1522 1523 setup_mode: 1524 vga_load_state(adp, ¶ms); 1525 break; 1526 1527 case M_VGA_MODEX: 1528 /* "unchain" the VGA mode */ 1529 params.regs[5-1+0x04] &= 0xf7; 1530 params.regs[5-1+0x04] |= 0x04; 1531 /* turn off doubleword mode */ 1532 params.regs[10+0x14] &= 0xbf; 1533 /* turn off word addressing */ 1534 params.regs[10+0x17] |= 0x40; 1535 /* set logical screen width */ 1536 params.regs[10+0x13] = 80; 1537 /* set 240 lines */ 1538 params.regs[10+0x11] = 0x2c; 1539 params.regs[10+0x06] = 0x0d; 1540 params.regs[10+0x07] = 0x3e; 1541 params.regs[10+0x10] = 0xea; 1542 params.regs[10+0x11] = 0xac; 1543 params.regs[10+0x12] = 0xdf; 1544 params.regs[10+0x15] = 0xe7; 1545 params.regs[10+0x16] = 0x06; 1546 /* set vertical sync polarity to reflect aspect ratio */ 1547 params.regs[9] = 0xe3; 1548 goto setup_grmode; 1549 1550 case M_BG320: case M_CG320: case M_BG640: 1551 case M_CG320_D: case M_CG640_E: 1552 case M_CG640x350: case M_ENH_CG640: 1553 case M_BG640x480: case M_CG640x480: case M_VGA_CG320: 1554 1555 setup_grmode: 1556 vga_load_state(adp, ¶ms); 1557 break; 1558 1559 default: 1560 return EINVAL; 1561 } 1562 1563 adp->va_mode = mode; 1564 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1565 update_adapter_info(adp, &info); 1566 1567 /* move hardware cursor out of the way */ 1568 (*vidsw[adp->va_index]->set_hw_cursor)(adp, -1, -1); 1569 1570 return 0; 1571 #else /* VGA_NO_MODE_CHANGE */ 1572 return ENODEV; 1573 #endif /* VGA_NO_MODE_CHANGE */ 1574 } 1575 1576 #ifndef VGA_NO_FONT_LOADING 1577 1578 static void 1579 set_font_mode(video_adapter_t *adp, u_char *buf) 1580 { 1581 u_char *mp; 1582 1583 crit_enter(); 1584 1585 /* save register values */ 1586 if (adp->va_type == KD_VGA) { 1587 outb(TSIDX, 0x02); buf[0] = inb(TSREG); 1588 outb(TSIDX, 0x04); buf[1] = inb(TSREG); 1589 outb(GDCIDX, 0x04); buf[2] = inb(GDCREG); 1590 outb(GDCIDX, 0x05); buf[3] = inb(GDCREG); 1591 outb(GDCIDX, 0x06); buf[4] = inb(GDCREG); 1592 inb(adp->va_crtc_addr + 6); 1593 outb(ATC, 0x10); buf[5] = inb(ATC + 1); 1594 } else /* if (adp->va_type == KD_EGA) */ { 1595 /* 1596 * EGA cannot be read; copy parameters from the mode parameter 1597 * table. 1598 */ 1599 mp = get_mode_param(adp->va_mode); 1600 buf[0] = mp[5 + 0x02 - 1]; 1601 buf[1] = mp[5 + 0x04 - 1]; 1602 buf[2] = mp[55 + 0x04]; 1603 buf[3] = mp[55 + 0x05]; 1604 buf[4] = mp[55 + 0x06]; 1605 buf[5] = mp[35 + 0x10]; 1606 } 1607 1608 /* setup vga for loading fonts */ 1609 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1610 outb(ATC, 0x10); outb(ATC, buf[5] & ~0x01); 1611 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1612 outb(ATC, 0x20); /* enable palette */ 1613 1614 #if VGA_SLOW_IOACCESS 1615 #ifdef VGA_ALT_SEQACCESS 1616 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1617 #endif 1618 outb(TSIDX, 0x02); outb(TSREG, 0x04); 1619 outb(TSIDX, 0x04); outb(TSREG, 0x07); 1620 #ifdef VGA_ALT_SEQACCESS 1621 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1622 #endif 1623 outb(GDCIDX, 0x04); outb(GDCREG, 0x02); 1624 outb(GDCIDX, 0x05); outb(GDCREG, 0x00); 1625 outb(GDCIDX, 0x06); outb(GDCREG, 0x04); 1626 #else /* VGA_SLOW_IOACCESS */ 1627 #ifdef VGA_ALT_SEQACCESS 1628 outw(TSIDX, 0x0100); 1629 #endif 1630 outw(TSIDX, 0x0402); 1631 outw(TSIDX, 0x0704); 1632 #ifdef VGA_ALT_SEQACCESS 1633 outw(TSIDX, 0x0300); 1634 #endif 1635 outw(GDCIDX, 0x0204); 1636 outw(GDCIDX, 0x0005); 1637 outw(GDCIDX, 0x0406); /* addr = a0000, 64kb */ 1638 #endif /* VGA_SLOW_IOACCESS */ 1639 1640 crit_exit(); 1641 } 1642 1643 static void 1644 set_normal_mode(video_adapter_t *adp, u_char *buf) 1645 { 1646 crit_enter(); 1647 1648 /* setup vga for normal operation mode again */ 1649 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1650 outb(ATC, 0x10); outb(ATC, buf[5]); 1651 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1652 outb(ATC, 0x20); /* enable palette */ 1653 1654 #if VGA_SLOW_IOACCESS 1655 #ifdef VGA_ALT_SEQACCESS 1656 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1657 #endif 1658 outb(TSIDX, 0x02); outb(TSREG, buf[0]); 1659 outb(TSIDX, 0x04); outb(TSREG, buf[1]); 1660 #ifdef VGA_ALT_SEQACCESS 1661 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1662 #endif 1663 outb(GDCIDX, 0x04); outb(GDCREG, buf[2]); 1664 outb(GDCIDX, 0x05); outb(GDCREG, buf[3]); 1665 if (adp->va_crtc_addr == MONO_CRTC) { 1666 outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x08); 1667 } else { 1668 outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x0c); 1669 } 1670 #else /* VGA_SLOW_IOACCESS */ 1671 #ifdef VGA_ALT_SEQACCESS 1672 outw(TSIDX, 0x0100); 1673 #endif 1674 outw(TSIDX, 0x0002 | (buf[0] << 8)); 1675 outw(TSIDX, 0x0004 | (buf[1] << 8)); 1676 #ifdef VGA_ALT_SEQACCESS 1677 outw(TSIDX, 0x0300); 1678 #endif 1679 outw(GDCIDX, 0x0004 | (buf[2] << 8)); 1680 outw(GDCIDX, 0x0005 | (buf[3] << 8)); 1681 if (adp->va_crtc_addr == MONO_CRTC) 1682 outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x08)<<8)); 1683 else 1684 outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x0c)<<8)); 1685 #endif /* VGA_SLOW_IOACCESS */ 1686 1687 crit_exit(); 1688 } 1689 1690 #endif /* VGA_NO_FONT_LOADING */ 1691 1692 /* 1693 * save_font(): 1694 * Read the font data in the requested font page from the video adapter. 1695 * 1696 * EGA/VGA 1697 */ 1698 static int 1699 vga_save_font(video_adapter_t *adp, int page, int fontsize, u_char *data, 1700 int ch, int count) 1701 { 1702 #ifndef VGA_NO_FONT_LOADING 1703 u_char buf[PARAM_BUFSIZE]; 1704 u_int32_t segment; 1705 int c; 1706 #ifdef VGA_ALT_SEQACCESS 1707 u_char val = 0; 1708 #endif 1709 1710 prologue(adp, V_ADP_FONT, ENODEV); 1711 1712 if (fontsize < 14) { 1713 /* FONT_8 */ 1714 fontsize = 8; 1715 } else if (fontsize >= 32) { 1716 fontsize = 32; 1717 } else if (fontsize >= 16) { 1718 /* FONT_16 */ 1719 fontsize = 16; 1720 } else { 1721 /* FONT_14 */ 1722 fontsize = 14; 1723 } 1724 1725 if (page < 0 || page >= 8) 1726 return EINVAL; 1727 segment = FONT_BUF + 0x4000*page; 1728 if (page > 3) 1729 segment -= 0xe000; 1730 1731 #ifdef VGA_ALT_SEQACCESS 1732 if (adp->va_type == KD_VGA) { /* what about EGA? XXX */ 1733 crit_enter(); 1734 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1735 outb(TSIDX, 0x01); val = inb(TSREG); /* disable screen */ 1736 outb(TSIDX, 0x01); outb(TSREG, val | 0x20); 1737 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1738 crit_exit(); 1739 } 1740 #endif 1741 1742 set_font_mode(adp, buf); 1743 if (fontsize == 32) { 1744 bcopy_fromio(segment + ch*32, data, fontsize*count); 1745 } else { 1746 for (c = ch; count > 0; ++c, --count) { 1747 bcopy_fromio(segment + c*32, data, fontsize); 1748 data += fontsize; 1749 } 1750 } 1751 set_normal_mode(adp, buf); 1752 1753 #ifdef VGA_ALT_SEQACCESS 1754 if (adp->va_type == KD_VGA) { 1755 crit_enter(); 1756 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1757 outb(TSIDX, 0x01); outb(TSREG, val & 0xdf); /* enable screen */ 1758 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1759 crit_exit(); 1760 } 1761 #endif 1762 1763 return 0; 1764 #else /* VGA_NO_FONT_LOADING */ 1765 return ENODEV; 1766 #endif /* VGA_NO_FONT_LOADING */ 1767 } 1768 1769 /* 1770 * load_font(): 1771 * Set the font data in the requested font page. 1772 * NOTE: it appears that some recent video adapters do not support 1773 * the font page other than 0... XXX 1774 * 1775 * EGA/VGA 1776 */ 1777 static int 1778 vga_load_font(video_adapter_t *adp, int page, int fontsize, u_char *data, 1779 int ch, int count) 1780 { 1781 #ifndef VGA_NO_FONT_LOADING 1782 u_char buf[PARAM_BUFSIZE]; 1783 u_int32_t segment; 1784 int c; 1785 #ifdef VGA_ALT_SEQACCESS 1786 u_char val = 0; 1787 #endif 1788 1789 prologue(adp, V_ADP_FONT, ENODEV); 1790 1791 if (fontsize < 14) { 1792 /* FONT_8 */ 1793 fontsize = 8; 1794 } else if (fontsize >= 32) { 1795 fontsize = 32; 1796 } else if (fontsize >= 16) { 1797 /* FONT_16 */ 1798 fontsize = 16; 1799 } else { 1800 /* FONT_14 */ 1801 fontsize = 14; 1802 } 1803 1804 if (page < 0 || page >= 8) 1805 return EINVAL; 1806 segment = FONT_BUF + 0x4000*page; 1807 if (page > 3) 1808 segment -= 0xe000; 1809 1810 #ifdef VGA_ALT_SEQACCESS 1811 if (adp->va_type == KD_VGA) { /* what about EGA? XXX */ 1812 crit_enter(); 1813 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1814 outb(TSIDX, 0x01); val = inb(TSREG); /* disable screen */ 1815 outb(TSIDX, 0x01); outb(TSREG, val | 0x20); 1816 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1817 crit_exit(); 1818 } 1819 #endif 1820 1821 set_font_mode(adp, buf); 1822 if (fontsize == 32) { 1823 bcopy_toio(data, segment + ch*32, fontsize*count); 1824 } else { 1825 for (c = ch; count > 0; ++c, --count) { 1826 bcopy_toio(data, segment + c*32, fontsize); 1827 data += fontsize; 1828 } 1829 } 1830 set_normal_mode(adp, buf); 1831 1832 #ifdef VGA_ALT_SEQACCESS 1833 if (adp->va_type == KD_VGA) { 1834 crit_enter(); 1835 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1836 outb(TSIDX, 0x01); outb(TSREG, val & 0xdf); /* enable screen */ 1837 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1838 crit_exit(); 1839 } 1840 #endif 1841 1842 return 0; 1843 #else /* VGA_NO_FONT_LOADING */ 1844 return ENODEV; 1845 #endif /* VGA_NO_FONT_LOADING */ 1846 } 1847 1848 /* 1849 * show_font(): 1850 * Activate the requested font page. 1851 * NOTE: it appears that some recent video adapters do not support 1852 * the font page other than 0... XXX 1853 * 1854 * EGA/VGA 1855 */ 1856 static int 1857 vga_show_font(video_adapter_t *adp, int page) 1858 { 1859 #ifndef VGA_NO_FONT_LOADING 1860 static u_char cg[] = { 0x00, 0x05, 0x0a, 0x0f, 0x30, 0x35, 0x3a, 0x3f }; 1861 1862 prologue(adp, V_ADP_FONT, ENODEV); 1863 if (page < 0 || page >= 8) 1864 return EINVAL; 1865 1866 crit_enter(); 1867 outb(TSIDX, 0x03); outb(TSREG, cg[page]); 1868 crit_exit(); 1869 1870 return 0; 1871 #else /* VGA_NO_FONT_LOADING */ 1872 return ENODEV; 1873 #endif /* VGA_NO_FONT_LOADING */ 1874 } 1875 1876 /* 1877 * save_palette(): 1878 * Read DAC values. The values have expressed in 8 bits. 1879 * 1880 * VGA 1881 */ 1882 static int 1883 vga_save_palette(video_adapter_t *adp, u_char *palette) 1884 { 1885 int i; 1886 1887 prologue(adp, V_ADP_PALETTE, ENODEV); 1888 1889 /* 1890 * We store 8 bit values in the palette buffer, while the standard 1891 * VGA has 6 bit DAC . 1892 */ 1893 outb(PALRADR, 0x00); 1894 for (i = 0; i < 256*3; ++i) 1895 palette[i] = inb(PALDATA) << 2; 1896 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 1897 return 0; 1898 } 1899 1900 static int 1901 vga_save_palette2(video_adapter_t *adp, int base, int count, 1902 u_char *r, u_char *g, u_char *b) 1903 { 1904 int i; 1905 1906 prologue(adp, V_ADP_PALETTE, ENODEV); 1907 1908 outb(PALRADR, base); 1909 for (i = 0; i < count; ++i) { 1910 r[i] = inb(PALDATA) << 2; 1911 g[i] = inb(PALDATA) << 2; 1912 b[i] = inb(PALDATA) << 2; 1913 } 1914 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 1915 return 0; 1916 } 1917 1918 /* 1919 * load_palette(): 1920 * Set DAC values. 1921 * 1922 * VGA 1923 */ 1924 static int 1925 vga_load_palette(video_adapter_t *adp, const u_char *palette) 1926 { 1927 int i; 1928 1929 prologue(adp, V_ADP_PALETTE, ENODEV); 1930 1931 outb(PIXMASK, 0xff); /* no pixelmask */ 1932 outb(PALWADR, 0x00); 1933 for (i = 0; i < 256*3; ++i) 1934 outb(PALDATA, palette[i] >> 2); 1935 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 1936 outb(ATC, 0x20); /* enable palette */ 1937 return 0; 1938 } 1939 1940 static int 1941 vga_load_palette2(video_adapter_t *adp, int base, int count, 1942 u_char *r, u_char *g, u_char *b) 1943 { 1944 int i; 1945 1946 prologue(adp, V_ADP_PALETTE, ENODEV); 1947 1948 outb(PIXMASK, 0xff); /* no pixelmask */ 1949 outb(PALWADR, base); 1950 for (i = 0; i < count; ++i) { 1951 outb(PALDATA, r[i] >> 2); 1952 outb(PALDATA, g[i] >> 2); 1953 outb(PALDATA, b[i] >> 2); 1954 } 1955 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 1956 outb(ATC, 0x20); /* enable palette */ 1957 return 0; 1958 } 1959 1960 /* 1961 * set_border(): 1962 * Change the border color. 1963 * 1964 * CGA/EGA/VGA 1965 */ 1966 static int 1967 vga_set_border(video_adapter_t *adp, int color) 1968 { 1969 prologue(adp, V_ADP_BORDER, ENODEV); 1970 1971 switch (adp->va_type) { 1972 case KD_EGA: 1973 case KD_VGA: 1974 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1975 outb(ATC, 0x31); outb(ATC, color & 0xff); 1976 break; 1977 case KD_CGA: 1978 outb(adp->va_crtc_addr + 5, color & 0x0f); /* color select register */ 1979 break; 1980 case KD_MONO: 1981 case KD_HERCULES: 1982 default: 1983 break; 1984 } 1985 return 0; 1986 } 1987 1988 /* 1989 * save_state(): 1990 * Read video register values. 1991 * NOTE: this function only reads the standard EGA/VGA registers. 1992 * any extra/extended registers of SVGA adapters are not saved. 1993 * 1994 * VGA 1995 */ 1996 static int 1997 vga_save_state(video_adapter_t *adp, void *p, size_t size) 1998 { 1999 video_info_t info; 2000 u_char *buf; 2001 int crtc_addr; 2002 int i, j; 2003 2004 if (size == 0) { 2005 /* return the required buffer size */ 2006 prologue(adp, V_ADP_STATESAVE, 0); 2007 return sizeof(adp_state_t); 2008 } else { 2009 prologue(adp, V_ADP_STATESAVE, ENODEV); 2010 if (size < sizeof(adp_state_t)) 2011 return EINVAL; 2012 } 2013 2014 ((adp_state_t *)p)->sig = V_STATE_SIG; 2015 buf = ((adp_state_t *)p)->regs; 2016 bzero(buf, V_MODE_PARAM_SIZE); 2017 crtc_addr = adp->va_crtc_addr; 2018 2019 crit_enter(); 2020 2021 outb(TSIDX, 0x00); outb(TSREG, 0x01); /* stop sequencer */ 2022 for (i = 0, j = 5; i < 4; i++) { 2023 outb(TSIDX, i + 1); 2024 buf[j++] = inb(TSREG); 2025 } 2026 buf[9] = inb(MISC + 10); /* dot-clock */ 2027 outb(TSIDX, 0x00); outb(TSREG, 0x03); /* start sequencer */ 2028 2029 for (i = 0, j = 10; i < 25; i++) { /* crtc */ 2030 outb(crtc_addr, i); 2031 buf[j++] = inb(crtc_addr + 1); 2032 } 2033 for (i = 0, j = 35; i < 20; i++) { /* attribute ctrl */ 2034 inb(crtc_addr + 6); /* reset flip-flop */ 2035 outb(ATC, i); 2036 buf[j++] = inb(ATC + 1); 2037 } 2038 for (i = 0, j = 55; i < 9; i++) { /* graph data ctrl */ 2039 outb(GDCIDX, i); 2040 buf[j++] = inb(GDCREG); 2041 } 2042 inb(crtc_addr + 6); /* reset flip-flop */ 2043 outb(ATC, 0x20); /* enable palette */ 2044 2045 crit_exit(); 2046 2047 #if 1 2048 if (vga_get_info(adp, adp->va_mode, &info) == 0) { 2049 if (info.vi_flags & V_INFO_GRAPHICS) { 2050 buf[0] = info.vi_width/info.vi_cwidth; /* COLS */ 2051 buf[1] = info.vi_height/info.vi_cheight - 1; /* ROWS */ 2052 } else { 2053 buf[0] = info.vi_width; /* COLS */ 2054 buf[1] = info.vi_height - 1; /* ROWS */ 2055 } 2056 buf[2] = info.vi_cheight; /* POINTS */ 2057 } else { 2058 /* XXX: shouldn't be happening... */ 2059 kprintf("vga%d: %s: failed to obtain mode info. (vga_save_state())\n", 2060 adp->va_unit, adp->va_name); 2061 } 2062 #else 2063 buf[0] = readb(BIOS_PADDRTOVADDR(0x44a)); /* COLS */ 2064 buf[1] = readb(BIOS_PADDRTOVADDR(0x484)); /* ROWS */ 2065 buf[2] = readb(BIOS_PADDRTOVADDR(0x485)); /* POINTS */ 2066 buf[3] = readb(BIOS_PADDRTOVADDR(0x44c)); 2067 buf[4] = readb(BIOS_PADDRTOVADDR(0x44d)); 2068 #endif 2069 2070 return 0; 2071 } 2072 2073 /* 2074 * load_state(): 2075 * Set video registers at once. 2076 * NOTE: this function only updates the standard EGA/VGA registers. 2077 * any extra/extended registers of SVGA adapters are not changed. 2078 * 2079 * EGA/VGA 2080 */ 2081 static int 2082 vga_load_state(video_adapter_t *adp, void *p) 2083 { 2084 u_char *buf; 2085 int crtc_addr; 2086 int i; 2087 2088 prologue(adp, V_ADP_STATELOAD, ENODEV); 2089 if (((adp_state_t *)p)->sig != V_STATE_SIG) 2090 return EINVAL; 2091 2092 buf = ((adp_state_t *)p)->regs; 2093 crtc_addr = adp->va_crtc_addr; 2094 2095 #if VGA_DEBUG > 1 2096 dump_buffer(buf, V_MODE_PARAM_SIZE); 2097 #endif 2098 2099 crit_enter(); 2100 2101 outb(TSIDX, 0x00); outb(TSREG, 0x01); /* stop sequencer */ 2102 for (i = 0; i < 4; ++i) { /* program sequencer */ 2103 outb(TSIDX, i + 1); 2104 outb(TSREG, buf[i + 5]); 2105 } 2106 outb(MISC, buf[9]); /* set dot-clock */ 2107 outb(TSIDX, 0x00); outb(TSREG, 0x03); /* start sequencer */ 2108 outb(crtc_addr, 0x11); 2109 outb(crtc_addr + 1, inb(crtc_addr + 1) & 0x7F); 2110 for (i = 0; i < 25; ++i) { /* program crtc */ 2111 outb(crtc_addr, i); 2112 outb(crtc_addr + 1, buf[i + 10]); 2113 } 2114 inb(crtc_addr+6); /* reset flip-flop */ 2115 for (i = 0; i < 20; ++i) { /* program attribute ctrl */ 2116 outb(ATC, i); 2117 outb(ATC, buf[i + 35]); 2118 } 2119 for (i = 0; i < 9; ++i) { /* program graph data ctrl */ 2120 outb(GDCIDX, i); 2121 outb(GDCREG, buf[i + 55]); 2122 } 2123 inb(crtc_addr + 6); /* reset flip-flop */ 2124 outb(ATC, 0x20); /* enable palette */ 2125 2126 #if notyet /* a temporary workaround for kernel panic, XXX */ 2127 #ifndef VGA_NO_BIOS 2128 if (adp->va_unit == V_ADP_PRIMARY) { 2129 writeb(BIOS_PADDRTOVADDR(0x44a), buf[0]); /* COLS */ 2130 writeb(BIOS_PADDRTOVADDR(0x484), buf[1] + rows_offset - 1); /* ROWS */ 2131 writeb(BIOS_PADDRTOVADDR(0x485), buf[2]); /* POINTS */ 2132 #if 0 2133 writeb(BIOS_PADDRTOVADDR(0x44c), buf[3]); 2134 writeb(BIOS_PADDRTOVADDR(0x44d), buf[4]); 2135 #endif 2136 } 2137 #endif /* VGA_NO_BIOS */ 2138 #endif /* notyet */ 2139 2140 crit_exit(); 2141 return 0; 2142 } 2143 2144 /* 2145 * set_origin(): 2146 * Change the origin (window mapping) of the banked frame buffer. 2147 */ 2148 static int 2149 vga_set_origin(video_adapter_t *adp, off_t offset) 2150 { 2151 /* 2152 * The standard video modes do not require window mapping; 2153 * always return error. 2154 */ 2155 return ENODEV; 2156 } 2157 2158 /* 2159 * read_hw_cursor(): 2160 * Read the position of the hardware text cursor. 2161 * 2162 * all adapters 2163 */ 2164 static int 2165 vga_read_hw_cursor(video_adapter_t *adp, int *col, int *row) 2166 { 2167 u_int16_t off; 2168 2169 if (!vga_init_done) 2170 return ENXIO; 2171 2172 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) 2173 return ENODEV; 2174 2175 crit_enter(); 2176 outb(adp->va_crtc_addr, 14); 2177 off = inb(adp->va_crtc_addr + 1); 2178 outb(adp->va_crtc_addr, 15); 2179 off = (off << 8) | inb(adp->va_crtc_addr + 1); 2180 crit_exit(); 2181 2182 *row = off / adp->va_info.vi_width; 2183 *col = off % adp->va_info.vi_width; 2184 2185 return 0; 2186 } 2187 2188 /* 2189 * set_hw_cursor(): 2190 * Move the hardware text cursor. If col and row are both -1, 2191 * the cursor won't be shown. 2192 * 2193 * all adapters 2194 */ 2195 static int 2196 vga_set_hw_cursor(video_adapter_t *adp, int col, int row) 2197 { 2198 u_int16_t off; 2199 2200 if (!vga_init_done) 2201 return ENXIO; 2202 2203 if ((col == -1) && (row == -1)) { 2204 off = -1; 2205 } else { 2206 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) 2207 return ENODEV; 2208 off = row*adp->va_info.vi_width + col; 2209 } 2210 2211 crit_enter(); 2212 outb(adp->va_crtc_addr, 14); 2213 outb(adp->va_crtc_addr + 1, off >> 8); 2214 outb(adp->va_crtc_addr, 15); 2215 outb(adp->va_crtc_addr + 1, off & 0x00ff); 2216 crit_exit(); 2217 2218 return 0; 2219 } 2220 2221 /* 2222 * set_hw_cursor_shape(): 2223 * Change the shape of the hardware text cursor. If the height is 2224 * zero or negative, the cursor won't be shown. 2225 * 2226 * all adapters 2227 */ 2228 static int 2229 vga_set_hw_cursor_shape(video_adapter_t *adp, int base, int height, 2230 int celsize, int blink) 2231 { 2232 if (!vga_init_done) 2233 return ENXIO; 2234 2235 crit_enter(); 2236 switch (adp->va_type) { 2237 case KD_VGA: 2238 case KD_CGA: 2239 case KD_MONO: 2240 case KD_HERCULES: 2241 default: 2242 if (height <= 0) { 2243 /* make the cursor invisible */ 2244 outb(adp->va_crtc_addr, 10); 2245 outb(adp->va_crtc_addr + 1, 32); 2246 outb(adp->va_crtc_addr, 11); 2247 outb(adp->va_crtc_addr + 1, 0); 2248 } else { 2249 outb(adp->va_crtc_addr, 10); 2250 outb(adp->va_crtc_addr + 1, celsize - base - height); 2251 outb(adp->va_crtc_addr, 11); 2252 outb(adp->va_crtc_addr + 1, celsize - base - 1); 2253 } 2254 break; 2255 case KD_EGA: 2256 if (height <= 0) { 2257 /* make the cursor invisible */ 2258 outb(adp->va_crtc_addr, 10); 2259 outb(adp->va_crtc_addr + 1, celsize); 2260 outb(adp->va_crtc_addr, 11); 2261 outb(adp->va_crtc_addr + 1, 0); 2262 } else { 2263 outb(adp->va_crtc_addr, 10); 2264 outb(adp->va_crtc_addr + 1, celsize - base - height); 2265 outb(adp->va_crtc_addr, 11); 2266 outb(adp->va_crtc_addr + 1, celsize - base); 2267 } 2268 break; 2269 } 2270 crit_exit(); 2271 2272 return 0; 2273 } 2274 2275 /* 2276 * blank_display() 2277 * Put the display in power save/power off mode. 2278 * 2279 * all adapters 2280 */ 2281 static int 2282 vga_blank_display(video_adapter_t *adp, int mode) 2283 { 2284 u_char val; 2285 2286 crit_enter(); 2287 switch (adp->va_type) { 2288 case KD_VGA: 2289 switch (mode) { 2290 case V_DISPLAY_SUSPEND: 2291 case V_DISPLAY_STAND_BY: 2292 outb(TSIDX, 0x01); 2293 val = inb(TSREG); 2294 outb(TSIDX, 0x01); 2295 outb(TSREG, val | 0x20); 2296 outb(adp->va_crtc_addr, 0x17); 2297 val = inb(adp->va_crtc_addr + 1); 2298 outb(adp->va_crtc_addr + 1, val & ~0x80); 2299 break; 2300 case V_DISPLAY_OFF: 2301 outb(TSIDX, 0x01); 2302 val = inb(TSREG); 2303 outb(TSIDX, 0x01); 2304 outb(TSREG, val | 0x20); 2305 break; 2306 case V_DISPLAY_ON: 2307 outb(TSIDX, 0x01); 2308 val = inb(TSREG); 2309 outb(TSIDX, 0x01); 2310 outb(TSREG, val & 0xDF); 2311 outb(adp->va_crtc_addr, 0x17); 2312 val = inb(adp->va_crtc_addr + 1); 2313 outb(adp->va_crtc_addr + 1, val | 0x80); 2314 break; 2315 } 2316 break; 2317 2318 case KD_EGA: 2319 /* no support yet */ 2320 crit_exit(); 2321 return ENODEV; 2322 2323 case KD_CGA: 2324 switch (mode) { 2325 case V_DISPLAY_SUSPEND: 2326 case V_DISPLAY_STAND_BY: 2327 case V_DISPLAY_OFF: 2328 outb(adp->va_crtc_addr + 4, 0x25); 2329 break; 2330 case V_DISPLAY_ON: 2331 outb(adp->va_crtc_addr + 4, 0x2d); 2332 break; 2333 } 2334 break; 2335 2336 case KD_MONO: 2337 case KD_HERCULES: 2338 switch (mode) { 2339 case V_DISPLAY_SUSPEND: 2340 case V_DISPLAY_STAND_BY: 2341 case V_DISPLAY_OFF: 2342 outb(adp->va_crtc_addr + 4, 0x21); 2343 break; 2344 case V_DISPLAY_ON: 2345 outb(adp->va_crtc_addr + 4, 0x29); 2346 break; 2347 } 2348 break; 2349 default: 2350 break; 2351 } 2352 crit_exit(); 2353 2354 return 0; 2355 } 2356 2357 /* 2358 * mmap(): 2359 * Mmap frame buffer. 2360 * 2361 * all adapters 2362 */ 2363 static int 2364 vga_mmap_buf(video_adapter_t *adp, vm_offset_t offset, int prot) 2365 { 2366 if (adp->va_info.vi_flags & V_INFO_LINEAR) 2367 return -1; 2368 2369 #if VGA_DEBUG > 0 2370 kprintf("vga_mmap_buf(): window:0x%x, offset:0x%x\n", 2371 adp->va_info.vi_window, offset); 2372 #endif 2373 2374 /* XXX: is this correct? */ 2375 if (offset > adp->va_window_size - PAGE_SIZE) 2376 return -1; 2377 2378 #ifdef __i386__ 2379 return i386_btop(adp->va_info.vi_window + offset); 2380 #endif 2381 } 2382 2383 #ifndef VGA_NO_MODE_CHANGE 2384 2385 static void 2386 planar_fill(video_adapter_t *adp, int val) 2387 { 2388 int length; 2389 int at; /* position in the frame buffer */ 2390 int l; 2391 2392 outw(GDCIDX, 0x0005); /* read mode 0, write mode 0 */ 2393 outw(GDCIDX, 0x0003); /* data rotate/function select */ 2394 outw(GDCIDX, 0x0f01); /* set/reset enable */ 2395 outw(GDCIDX, 0xff08); /* bit mask */ 2396 outw(GDCIDX, (val << 8) | 0x00); /* set/reset */ 2397 at = 0; 2398 length = adp->va_line_width*adp->va_info.vi_height; 2399 while (length > 0) { 2400 l = imin(length, adp->va_window_size); 2401 (*vidsw[adp->va_index]->set_win_org)(adp, at); 2402 bzero_io(adp->va_window, l); 2403 length -= l; 2404 at += l; 2405 } 2406 outw(GDCIDX, 0x0000); /* set/reset */ 2407 outw(GDCIDX, 0x0001); /* set/reset enable */ 2408 } 2409 2410 static void 2411 packed_fill(video_adapter_t *adp, int val) 2412 { 2413 int length; 2414 int at; /* position in the frame buffer */ 2415 int l; 2416 2417 at = 0; 2418 length = adp->va_line_width*adp->va_info.vi_height; 2419 while (length > 0) { 2420 l = imin(length, adp->va_window_size); 2421 (*vidsw[adp->va_index]->set_win_org)(adp, at); 2422 fill_io(val, adp->va_window, l); 2423 length -= l; 2424 at += l; 2425 } 2426 } 2427 2428 static void 2429 direct_fill(video_adapter_t *adp, int val) 2430 { 2431 int length; 2432 int at; /* position in the frame buffer */ 2433 int l; 2434 2435 at = 0; 2436 length = adp->va_line_width*adp->va_info.vi_height; 2437 while (length > 0) { 2438 l = imin(length, adp->va_window_size); 2439 (*vidsw[adp->va_index]->set_win_org)(adp, at); 2440 switch (adp->va_info.vi_pixel_size) { 2441 case sizeof(u_int16_t): 2442 fillw_io(val, adp->va_window, l/sizeof(u_int16_t)); 2443 break; 2444 case 3: 2445 /* FIXME */ 2446 break; 2447 case sizeof(u_int32_t): 2448 filll_io(val, adp->va_window, l/sizeof(u_int32_t)); 2449 break; 2450 } 2451 length -= l; 2452 at += l; 2453 } 2454 } 2455 2456 static int 2457 vga_clear(video_adapter_t *adp) 2458 { 2459 switch (adp->va_info.vi_mem_model) { 2460 case V_INFO_MM_TEXT: 2461 /* do nothing? XXX */ 2462 break; 2463 case V_INFO_MM_PLANAR: 2464 planar_fill(adp, 0); 2465 break; 2466 case V_INFO_MM_PACKED: 2467 packed_fill(adp, 0); 2468 break; 2469 case V_INFO_MM_DIRECT: 2470 direct_fill(adp, 0); 2471 break; 2472 } 2473 return 0; 2474 } 2475 2476 #ifdef notyet 2477 static void 2478 planar_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2479 { 2480 int banksize; 2481 int bank; 2482 int pos; 2483 int offset; /* offset within window */ 2484 int bx; 2485 int l; 2486 2487 outw(GDCIDX, 0x0005); /* read mode 0, write mode 0 */ 2488 outw(GDCIDX, 0x0003); /* data rotate/function select */ 2489 outw(GDCIDX, 0x0f01); /* set/reset enable */ 2490 outw(GDCIDX, 0xff08); /* bit mask */ 2491 outw(GDCIDX, (val << 8) | 0x00); /* set/reset */ 2492 2493 banksize = adp->va_window_size; 2494 bank = -1; 2495 while (cy > 0) { 2496 pos = adp->va_line_width*y + x/8; 2497 if (bank != pos/banksize) { 2498 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2499 bank = pos/banksize; 2500 } 2501 offset = pos%banksize; 2502 bx = (x + cx)/8 - x/8; 2503 if (x % 8) { 2504 outw(GDCIDX, ((0xff00 >> (x % 8)) & 0xff00) | 0x08); 2505 writeb(adp->va_window + offset, 0); 2506 ++offset; 2507 --bx; 2508 if (offset >= banksize) { 2509 offset = 0; 2510 ++bank; /* next bank */ 2511 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2512 } 2513 outw(GDCIDX, 0xff08); /* bit mask */ 2514 } 2515 while (bx > 0) { 2516 l = imin(bx, banksize); 2517 bzero_io(adp->va_window + offset, l); 2518 offset += l; 2519 bx -= l; 2520 if (offset >= banksize) { 2521 offset = 0; 2522 ++bank; /* next bank */ 2523 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2524 } 2525 } 2526 if ((x + cx) % 8) { 2527 outw(GDCIDX, (~(0xff00 >> ((x + cx) % 8)) & 0xff00) | 0x08); 2528 writeb(adp->va_window + offset, 0); 2529 ++offset; 2530 if (offset >= banksize) { 2531 offset = 0; 2532 ++bank; /* next bank */ 2533 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2534 } 2535 outw(GDCIDX, 0xff08); /* bit mask */ 2536 } 2537 ++y; 2538 --cy; 2539 } 2540 2541 outw(GDCIDX, 0xff08); /* bit mask */ 2542 outw(GDCIDX, 0x0000); /* set/reset */ 2543 outw(GDCIDX, 0x0001); /* set/reset enable */ 2544 } 2545 2546 static void 2547 packed_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2548 { 2549 int banksize; 2550 int bank; 2551 int pos; 2552 int offset; /* offset within window */ 2553 int end; 2554 2555 banksize = adp->va_window_size; 2556 bank = -1; 2557 cx *= adp->va_info.vi_pixel_size; 2558 while (cy > 0) { 2559 pos = adp->va_line_width*y + x*adp->va_info.vi_pixel_size; 2560 if (bank != pos/banksize) { 2561 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2562 bank = pos/banksize; 2563 } 2564 offset = pos%banksize; 2565 end = imin(offset + cx, banksize); 2566 fill_io(val, adp->va_window + offset, 2567 (end - offset)/adp->va_info.vi_pixel_size); 2568 /* the line may cross the window boundary */ 2569 if (offset + cx > banksize) { 2570 ++bank; /* next bank */ 2571 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2572 end = offset + cx - banksize; 2573 fill_io(val, adp->va_window, end/adp->va_info.vi_pixel_size); 2574 } 2575 ++y; 2576 --cy; 2577 } 2578 } 2579 2580 static void 2581 direct_fill_rect16(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2582 { 2583 int banksize; 2584 int bank; 2585 int pos; 2586 int offset; /* offset within window */ 2587 int end; 2588 2589 /* 2590 * XXX: the function assumes that banksize is a muliple of 2591 * sizeof(u_int16_t). 2592 */ 2593 banksize = adp->va_window_size; 2594 bank = -1; 2595 cx *= sizeof(u_int16_t); 2596 while (cy > 0) { 2597 pos = adp->va_line_width*y + x*sizeof(u_int16_t); 2598 if (bank != pos/banksize) { 2599 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2600 bank = pos/banksize; 2601 } 2602 offset = pos%banksize; 2603 end = imin(offset + cx, banksize); 2604 fillw_io(val, adp->va_window + offset, 2605 (end - offset)/sizeof(u_int16_t)); 2606 /* the line may cross the window boundary */ 2607 if (offset + cx > banksize) { 2608 ++bank; /* next bank */ 2609 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2610 end = offset + cx - banksize; 2611 fillw_io(val, adp->va_window, end/sizeof(u_int16_t)); 2612 } 2613 ++y; 2614 --cy; 2615 } 2616 } 2617 2618 static void 2619 direct_fill_rect24(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2620 { 2621 int banksize; 2622 int bank; 2623 int pos; 2624 int offset; /* offset within window */ 2625 int end; 2626 int i; 2627 int j; 2628 u_int8_t b[3]; 2629 2630 b[0] = val & 0x0000ff; 2631 b[1] = (val >> 8) & 0x0000ff; 2632 b[2] = (val >> 16) & 0x0000ff; 2633 banksize = adp->va_window_size; 2634 bank = -1; 2635 cx *= 3; 2636 while (cy > 0) { 2637 pos = adp->va_line_width*y + x*3; 2638 if (bank != pos/banksize) { 2639 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2640 bank = pos/banksize; 2641 } 2642 offset = pos%banksize; 2643 end = imin(offset + cx, banksize); 2644 for (i = 0, j = offset; j < end; i = (++i)%3, ++j) { 2645 writeb(adp->va_window + j, b[i]); 2646 } 2647 /* the line may cross the window boundary */ 2648 if (offset + cx >= banksize) { 2649 ++bank; /* next bank */ 2650 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2651 j = 0; 2652 end = offset + cx - banksize; 2653 for (; j < end; i = (++i)%3, ++j) { 2654 writeb(adp->va_window + j, b[i]); 2655 } 2656 } 2657 ++y; 2658 --cy; 2659 } 2660 } 2661 2662 static void 2663 direct_fill_rect32(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2664 { 2665 int banksize; 2666 int bank; 2667 int pos; 2668 int offset; /* offset within window */ 2669 int end; 2670 2671 /* 2672 * XXX: the function assumes that banksize is a muliple of 2673 * sizeof(u_int32_t). 2674 */ 2675 banksize = adp->va_window_size; 2676 bank = -1; 2677 cx *= sizeof(u_int32_t); 2678 while (cy > 0) { 2679 pos = adp->va_line_width*y + x*sizeof(u_int32_t); 2680 if (bank != pos/banksize) { 2681 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2682 bank = pos/banksize; 2683 } 2684 offset = pos%banksize; 2685 end = imin(offset + cx, banksize); 2686 filll_io(val, adp->va_window + offset, 2687 (end - offset)/sizeof(u_int32_t)); 2688 /* the line may cross the window boundary */ 2689 if (offset + cx > banksize) { 2690 ++bank; /* next bank */ 2691 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2692 end = offset + cx - banksize; 2693 filll_io(val, adp->va_window, end/sizeof(u_int32_t)); 2694 } 2695 ++y; 2696 --cy; 2697 } 2698 } 2699 2700 static int 2701 vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2702 { 2703 switch (adp->va_info.vi_mem_model) { 2704 case V_INFO_MM_TEXT: 2705 /* do nothing? XXX */ 2706 break; 2707 case V_INFO_MM_PLANAR: 2708 planar_fill_rect(adp, val, x, y, cx, cy); 2709 break; 2710 case V_INFO_MM_PACKED: 2711 packed_fill_rect(adp, val, x, y, cx, cy); 2712 break; 2713 case V_INFO_MM_DIRECT: 2714 switch (adp->va_info.vi_pixel_size) { 2715 case sizeof(u_int16_t): 2716 direct_fill_rect16(adp, val, x, y, cx, cy); 2717 break; 2718 case 3: 2719 direct_fill_rect24(adp, val, x, y, cx, cy); 2720 break; 2721 case sizeof(u_int32_t): 2722 direct_fill_rect32(adp, val, x, y, cx, cy); 2723 break; 2724 } 2725 break; 2726 } 2727 return 0; 2728 } 2729 #else /* !notyet */ 2730 static int 2731 vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2732 { 2733 return ENODEV; 2734 } 2735 #endif /* notyet */ 2736 2737 static int 2738 vga_bitblt(video_adapter_t *adp,...) 2739 { 2740 /* FIXME */ 2741 return ENODEV; 2742 } 2743 2744 #endif /* !VGA_NO_MODE_CHANGE */ 2745 2746 static int 2747 get_palette(video_adapter_t *adp, int base, int count, 2748 u_char *red, u_char *green, u_char *blue, u_char *trans) 2749 { 2750 u_char *r; 2751 u_char *g; 2752 u_char *b; 2753 2754 if (count < 0 || base < 0 || count > 256 || base > 256 || 2755 base + count > 256) 2756 return EINVAL; 2757 2758 r = kmalloc(count*3, M_DEVBUF, M_WAITOK); 2759 g = r + count; 2760 b = g + count; 2761 if (vga_save_palette2(adp, base, count, r, g, b)) { 2762 kfree(r, M_DEVBUF); 2763 return ENODEV; 2764 } 2765 copyout(r, red, count); 2766 copyout(g, green, count); 2767 copyout(b, blue, count); 2768 if (trans != NULL) { 2769 bzero(r, count); 2770 copyout(r, trans, count); 2771 } 2772 kfree(r, M_DEVBUF); 2773 2774 return 0; 2775 } 2776 2777 static int 2778 set_palette(video_adapter_t *adp, int base, int count, 2779 u_char *red, u_char *green, u_char *blue, u_char *trans) 2780 { 2781 u_char *r; 2782 u_char *g; 2783 u_char *b; 2784 int err; 2785 2786 if (count < 0 || base < 0 || count > 256 || base > 256 || 2787 base + count > 256) 2788 return EINVAL; 2789 2790 r = kmalloc(count*3, M_DEVBUF, M_WAITOK); 2791 g = r + count; 2792 b = g + count; 2793 err = copyin(red, r, count); 2794 if (!err) 2795 err = copyin(green, g, count); 2796 if (!err) 2797 err = copyin(blue, b, count); 2798 if (!err) 2799 err = vga_load_palette2(adp, base, count, r, g, b); 2800 kfree(r, M_DEVBUF); 2801 2802 return (err ? ENODEV : 0); 2803 } 2804 2805 static int 2806 vga_dev_ioctl(video_adapter_t *adp, u_long cmd, caddr_t arg) 2807 { 2808 switch (cmd) { 2809 case FBIO_GETWINORG: /* get frame buffer window origin */ 2810 *(u_int *)arg = 0; 2811 return 0; 2812 2813 case FBIO_SETWINORG: /* set frame buffer window origin */ 2814 return ENODEV; 2815 2816 case FBIO_SETDISPSTART: /* set display start address */ 2817 return (set_display_start(adp, 2818 ((video_display_start_t *)arg)->x, 2819 ((video_display_start_t *)arg)->y) 2820 ? ENODEV : 0); 2821 2822 case FBIO_SETLINEWIDTH: /* set scan line length in pixel */ 2823 return (set_line_length(adp, *(u_int *)arg) ? ENODEV : 0); 2824 2825 case FBIO_GETPALETTE: /* get color palette */ 2826 return get_palette(adp, ((video_color_palette_t *)arg)->index, 2827 ((video_color_palette_t *)arg)->count, 2828 ((video_color_palette_t *)arg)->red, 2829 ((video_color_palette_t *)arg)->green, 2830 ((video_color_palette_t *)arg)->blue, 2831 ((video_color_palette_t *)arg)->transparent); 2832 2833 case FBIO_SETPALETTE: /* set color palette */ 2834 return set_palette(adp, ((video_color_palette_t *)arg)->index, 2835 ((video_color_palette_t *)arg)->count, 2836 ((video_color_palette_t *)arg)->red, 2837 ((video_color_palette_t *)arg)->green, 2838 ((video_color_palette_t *)arg)->blue, 2839 ((video_color_palette_t *)arg)->transparent); 2840 2841 case FBIOGTYPE: /* get frame buffer type info. */ 2842 ((struct fbtype *)arg)->fb_type = fb_type(adp->va_type); 2843 ((struct fbtype *)arg)->fb_height = adp->va_info.vi_height; 2844 ((struct fbtype *)arg)->fb_width = adp->va_info.vi_width; 2845 ((struct fbtype *)arg)->fb_depth = adp->va_info.vi_depth; 2846 if ((adp->va_info.vi_depth <= 1) || (adp->va_info.vi_depth > 8)) 2847 ((struct fbtype *)arg)->fb_cmsize = 0; 2848 else 2849 ((struct fbtype *)arg)->fb_cmsize = 1 << adp->va_info.vi_depth; 2850 ((struct fbtype *)arg)->fb_size = adp->va_buffer_size; 2851 return 0; 2852 2853 case FBIOGETCMAP: /* get color palette */ 2854 return get_palette(adp, ((struct fbcmap *)arg)->index, 2855 ((struct fbcmap *)arg)->count, 2856 ((struct fbcmap *)arg)->red, 2857 ((struct fbcmap *)arg)->green, 2858 ((struct fbcmap *)arg)->blue, NULL); 2859 2860 case FBIOPUTCMAP: /* set color palette */ 2861 return set_palette(adp, ((struct fbcmap *)arg)->index, 2862 ((struct fbcmap *)arg)->count, 2863 ((struct fbcmap *)arg)->red, 2864 ((struct fbcmap *)arg)->green, 2865 ((struct fbcmap *)arg)->blue, NULL); 2866 2867 default: 2868 return fb_commonioctl(adp, cmd, arg); 2869 } 2870 } 2871 2872 static void 2873 dump_buffer(u_char *buf, size_t len) 2874 { 2875 int i; 2876 2877 for(i = 0; i < len;) { 2878 kprintf("%02x ", buf[i]); 2879 if ((++i % 16) == 0) 2880 kprintf("\n"); 2881 } 2882 } 2883 2884 /* 2885 * diag(): 2886 * Print some information about the video adapter and video modes, 2887 * with requested level of details. 2888 * 2889 * all adapters 2890 */ 2891 static int 2892 vga_diag(video_adapter_t *adp, int level) 2893 { 2894 u_char *mp; 2895 #if FB_DEBUG > 1 2896 video_info_t info; 2897 int i; 2898 #endif 2899 2900 if (!vga_init_done) 2901 return ENXIO; 2902 2903 #if FB_DEBUG > 1 2904 #ifndef VGA_NO_BIOS 2905 kprintf("vga: RTC equip. code:0x%02x, DCC code:0x%02x\n", 2906 rtcin(RTC_EQUIPMENT), readb(BIOS_PADDRTOVADDR(0x488))); 2907 kprintf("vga: CRTC:0x%x, video option:0x%02x, ", 2908 readw(BIOS_PADDRTOVADDR(0x463)), 2909 readb(BIOS_PADDRTOVADDR(0x487))); 2910 kprintf("rows:%d, cols:%d, font height:%d\n", 2911 readb(BIOS_PADDRTOVADDR(0x44a)), 2912 readb(BIOS_PADDRTOVADDR(0x484)) + 1, 2913 readb(BIOS_PADDRTOVADDR(0x485))); 2914 #endif /* VGA_NO_BIOS */ 2915 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 2916 kprintf("vga: param table EGA/VGA:%p", video_mode_ptr); 2917 kprintf(", CGA/MDA:%p\n", video_mode_ptr2); 2918 kprintf("vga: rows_offset:%d\n", rows_offset); 2919 #endif 2920 #endif /* FB_DEBUG > 1 */ 2921 2922 fb_dump_adp_info(VGA_DRIVER_NAME, adp, level); 2923 2924 #if FB_DEBUG > 1 2925 if (adp->va_flags & V_ADP_MODECHANGE) { 2926 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 2927 if (bios_vmode[i].vi_mode == NA) 2928 continue; 2929 if (get_mode_param(bios_vmode[i].vi_mode) == NULL) 2930 continue; 2931 fb_dump_mode_info(VGA_DRIVER_NAME, adp, &bios_vmode[i], level); 2932 } 2933 } else { 2934 vga_get_info(adp, adp->va_initial_mode, &info); /* shouldn't fail */ 2935 fb_dump_mode_info(VGA_DRIVER_NAME, adp, &info, level); 2936 } 2937 #endif /* FB_DEBUG > 1 */ 2938 2939 if ((adp->va_type != KD_EGA) && (adp->va_type != KD_VGA)) 2940 return 0; 2941 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 2942 if (video_mode_ptr == NULL) 2943 kprintf("vga%d: %s: WARNING: video mode switching is not " 2944 "fully supported on this adapter\n", 2945 adp->va_unit, adp->va_name); 2946 #endif 2947 if (level <= 0) 2948 return 0; 2949 2950 if (adp->va_type == KD_VGA) { 2951 kprintf("VGA parameters upon power-up\n"); 2952 dump_buffer(adpstate.regs, sizeof(adpstate.regs)); 2953 kprintf("VGA parameters in BIOS for mode %d\n", adp->va_initial_mode); 2954 dump_buffer(adpstate2.regs, sizeof(adpstate2.regs)); 2955 } 2956 2957 mp = get_mode_param(adp->va_initial_mode); 2958 if (mp == NULL) /* this shouldn't be happening */ 2959 return 0; 2960 kprintf("EGA/VGA parameters to be used for mode %d\n", adp->va_initial_mode); 2961 dump_buffer(mp, V_MODE_PARAM_SIZE); 2962 2963 return 0; 2964 } 2965