1 /*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91 37 * $FreeBSD: src/sys/i386/isa/intr_machdep.c,v 1.29.2.5 2001/10/14 06:54:27 luigi Exp $ 38 * $DragonFly: src/sys/platform/pc32/isa/intr_machdep.c,v 1.48 2008/08/02 01:14:43 dillon Exp $ 39 */ 40 /* 41 * This file contains an aggregated module marked: 42 * Copyright (c) 1997, Stefan Esser <se@freebsd.org> 43 * All rights reserved. 44 * See the notice for details. 45 */ 46 47 #include "opt_auto_eoi.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/machintr.h> 52 #include <sys/interrupt.h> 53 #include <bus/isa/isareg.h> 54 #include <cpu/cpufunc.h> 55 #include <machine/smp.h> 56 #include <machine/intr_machdep.h> 57 #include <machine_base/icu/icu.h> 58 #include <machine_base/icu/icu_var.h> 59 60 static void icu_init(void); 61 62 static void 63 icu_init(void) 64 { 65 #ifdef AUTO_EOI_1 66 int auto_eoi = 2; /* auto EOI, 8086 mode */ 67 #else 68 int auto_eoi = 0; /* 8086 mode */ 69 #endif 70 71 #ifdef SMP 72 if (apic_io_enable) 73 auto_eoi = 2; /* auto EOI, 8086 mode */ 74 #endif 75 76 /* 77 * Program master 78 */ 79 outb(IO_ICU1, 0x11); /* reset; program device, four bytes */ 80 outb(IO_ICU1 + ICU_IMR_OFFSET, IDT_OFFSET); 81 /* starting at this vector index */ 82 outb(IO_ICU1 + ICU_IMR_OFFSET, 1 << ICU_IRQ_SLAVE); 83 /* slave on line 2 */ 84 outb(IO_ICU1 + ICU_IMR_OFFSET, auto_eoi | 1); /* 8086 mode */ 85 86 outb(IO_ICU1 + ICU_IMR_OFFSET, 0xff); /* leave interrupts masked */ 87 outb(IO_ICU1, 0x0a); /* default to IRR on read */ 88 outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */ 89 90 /* 91 * Program slave 92 */ 93 outb(IO_ICU2, 0x11); /* reset; program device, four bytes */ 94 outb(IO_ICU2 + ICU_IMR_OFFSET, IDT_OFFSET + 8); 95 /* staring at this vector index */ 96 outb(IO_ICU2 + ICU_IMR_OFFSET, ICU_IRQ_SLAVE); 97 #ifdef AUTO_EOI_2 98 outb(IO_ICU2 + ICU_IMR_OFFSET, 2 | 1); /* auto EOI, 8086 mode */ 99 #else 100 outb(IO_ICU2 + ICU_IMR_OFFSET, 1); /* 8086 mode */ 101 #endif 102 103 outb(IO_ICU2 + ICU_IMR_OFFSET, 0xff); /* leave interrupts masked */ 104 outb(IO_ICU2, 0x0a); /* default to IRR on read */ 105 } 106 107 void 108 icu_definit(void) 109 { 110 register_t ef; 111 112 KKASSERT(MachIntrABI.type == MACHINTR_ICU); 113 114 ef = read_rflags(); 115 cpu_disable_intr(); 116 117 /* Leave interrupts masked */ 118 outb(IO_ICU1 + ICU_IMR_OFFSET, 0xff); 119 outb(IO_ICU2 + ICU_IMR_OFFSET, 0xff); 120 121 MachIntrABI.setdefault(); 122 icu_init(); 123 124 write_rflags(ef); 125 } 126 127 /* 128 * ICU reinitialize when ICU configuration has lost. 129 */ 130 void 131 icu_reinit(void) 132 { 133 int i; 134 135 icu_init(); 136 for (i = 0; i < MAX_HARDINTS; ++i) { 137 if (count_registered_ints(i)) 138 machintr_intren(i); 139 } 140 } 141 142 /* 143 * Return a bitmap of the current interrupt requests. This is 8259-specific 144 * and is only suitable for use at probe time. 145 */ 146 intrmask_t 147 icu_irq_pending(void) 148 { 149 u_char irr1; 150 u_char irr2; 151 152 irr1 = inb(IO_ICU1); 153 irr2 = inb(IO_ICU2); 154 return ((irr2 << 8) | irr1); 155 } 156 157 int 158 icu_ioapic_extint(int irq, int vec) 159 { 160 uint8_t mask; 161 162 /* 163 * Only first 8 interrupt is supported. 164 * Don't allow setup for the slave link. 165 */ 166 if (irq >= 8 || irq == 2) 167 return EOPNOTSUPP; 168 169 mask = ~(1 << irq); 170 171 /* 172 * Re-initialize master 8259: 173 * reset; prog 4 bytes, single ICU, edge triggered 174 */ 175 outb(IO_ICU1, 0x13); 176 outb(IO_ICU1 + 1, vec); /* start vector (unused) */ 177 outb(IO_ICU1 + 1, 0x00); /* ignore slave */ 178 outb(IO_ICU1 + 1, 0x03); /* auto EOI, 8086 */ 179 outb(IO_ICU1 + 1, mask); 180 181 return 0; 182 } 183