1 /* 2 * Copyright (c) 2007 The DragonFly Project. All rights reserved. 3 * 4 * This code is derived from software contributed to The DragonFly Project 5 * by Matthew Dillon <dillon@backplane.com> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * 3. Neither the name of The DragonFly Project nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific, prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 36 #include <sys/interrupt.h> 37 #include <sys/kernel.h> 38 #include <sys/memrange.h> 39 #include <sys/tls.h> 40 #include <sys/types.h> 41 42 #include <vm/vm_extern.h> 43 #include <vm/vm_kern.h> 44 #include <vm/vm_object.h> 45 #include <vm/vm_page.h> 46 47 #include <sys/mplock2.h> 48 49 #include <machine/cpu.h> 50 #include <machine/cpufunc.h> 51 #include <machine/globaldata.h> 52 #include <machine/md_var.h> 53 #include <machine/pmap.h> 54 #include <machine/smp.h> 55 #include <machine/tls.h> 56 57 #include <unistd.h> 58 #include <pthread.h> 59 #include <signal.h> 60 #include <stdio.h> 61 62 extern pt_entry_t *KPTphys; 63 64 volatile u_int stopped_cpus; 65 cpumask_t smp_active_mask = 1; /* which cpus are ready for IPIs etc? */ 66 static int boot_address; 67 static cpumask_t smp_startup_mask = 1; /* which cpus have been started */ 68 int mp_naps; /* # of Applications processors */ 69 static int mp_finish; 70 71 /* function prototypes XXX these should go elsewhere */ 72 void bootstrap_idle(void); 73 void single_cpu_ipi(int, int, int); 74 void selected_cpu_ipi(u_int, int, int); 75 #if 0 76 void ipi_handler(int); 77 #endif 78 79 pt_entry_t *SMPpt; 80 81 /* AP uses this during bootstrap. Do not staticize. */ 82 char *bootSTK; 83 static int bootAP; 84 85 86 /* XXX these need to go into the appropriate header file */ 87 static int start_all_aps(u_int); 88 void init_secondary(void); 89 void *start_ap(void *); 90 91 /* 92 * Get SMP fully working before we start initializing devices. 93 */ 94 static 95 void 96 ap_finish(void) 97 { 98 int i; 99 cpumask_t ncpus_mask = 0; 100 101 for (i = 1; i <= ncpus; i++) 102 ncpus_mask |= (1 << i); 103 104 mp_finish = 1; 105 if (bootverbose) 106 kprintf("Finish MP startup\n"); 107 108 /* build our map of 'other' CPUs */ 109 mycpu->gd_other_cpus = smp_startup_mask & ~(1 << mycpu->gd_cpuid); 110 111 /* 112 * Let the other cpu's finish initializing and build their map 113 * of 'other' CPUs. 114 */ 115 rel_mplock(); 116 while (smp_active_mask != smp_startup_mask) { 117 DELAY(100000); 118 cpu_lfence(); 119 } 120 121 while (try_mplock() == 0) 122 DELAY(100000); 123 if (bootverbose) 124 kprintf("Active CPU Mask: %08x\n", smp_active_mask); 125 } 126 127 SYSINIT(finishsmp, SI_BOOT2_FINISH_SMP, SI_ORDER_FIRST, ap_finish, NULL) 128 129 130 void * 131 start_ap(void *arg __unused) 132 { 133 init_secondary(); 134 setrealcpu(); 135 bootstrap_idle(); 136 137 return(NULL); /* NOTREACHED */ 138 } 139 140 /* storage for AP thread IDs */ 141 pthread_t ap_tids[MAXCPU]; 142 143 void 144 mp_start(void) 145 { 146 int shift; 147 148 ncpus = optcpus; 149 150 mp_naps = ncpus - 1; 151 152 /* ncpus2 -- ncpus rounded down to the nearest power of 2 */ 153 for (shift = 0; (1 << shift) <= ncpus; ++shift) 154 ; 155 --shift; 156 ncpus2_shift = shift; 157 ncpus2 = 1 << shift; 158 ncpus2_mask = ncpus2 - 1; 159 160 /* ncpus_fit -- ncpus rounded up to the nearest power of 2 */ 161 if ((1 << shift) < ncpus) 162 ++shift; 163 ncpus_fit = 1 << shift; 164 ncpus_fit_mask = ncpus_fit - 1; 165 166 /* 167 * cpu0 initialization 168 */ 169 mycpu->gd_ipiq = (void *)kmem_alloc(&kernel_map, 170 sizeof(lwkt_ipiq) * ncpus); 171 bzero(mycpu->gd_ipiq, sizeof(lwkt_ipiq) * ncpus); 172 173 /* 174 * cpu 1-(n-1) 175 */ 176 start_all_aps(boot_address); 177 178 } 179 180 void 181 mp_announce(void) 182 { 183 int x; 184 185 kprintf("DragonFly/MP: Multiprocessor\n"); 186 kprintf(" cpu0 (BSP)\n"); 187 188 for (x = 1; x <= mp_naps; ++x) 189 kprintf(" cpu%d (AP)\n", x); 190 } 191 192 void 193 forward_fastint_remote(void *arg) 194 { 195 panic("XXX forward_fastint_remote()"); 196 } 197 198 void 199 cpu_send_ipiq(int dcpu) 200 { 201 if ((1 << dcpu) & smp_active_mask) 202 if (pthread_kill(ap_tids[dcpu], SIGUSR1) != 0) 203 panic("pthread_kill failed in cpu_send_ipiq"); 204 #if 0 205 panic("XXX cpu_send_ipiq()"); 206 #endif 207 } 208 209 void 210 smp_invltlb(void) 211 { 212 #ifdef SMP 213 #endif 214 } 215 216 void 217 single_cpu_ipi(int cpu, int vector, int delivery_mode) 218 { 219 kprintf("XXX single_cpu_ipi\n"); 220 } 221 222 void 223 selected_cpu_ipi(u_int target, int vector, int delivery_mode) 224 { 225 crit_enter(); 226 while (target) { 227 int n = bsfl(target); 228 target &= ~(1 << n); 229 single_cpu_ipi(n, vector, delivery_mode); 230 } 231 crit_exit(); 232 } 233 234 int 235 stop_cpus(u_int map) 236 { 237 map &= smp_active_mask; 238 239 crit_enter(); 240 while (map) { 241 int n = bsfl(map); 242 map &= ~(1 << n); 243 stopped_cpus |= 1 << n; 244 if (pthread_kill(ap_tids[n], SIGXCPU) != 0) 245 panic("stop_cpus: pthread_kill failed"); 246 } 247 crit_exit(); 248 #if 0 249 panic("XXX stop_cpus()"); 250 #endif 251 252 return(1); 253 } 254 255 int 256 restart_cpus(u_int map) 257 { 258 map &= smp_active_mask; 259 260 crit_enter(); 261 while (map) { 262 int n = bsfl(map); 263 map &= ~(1 << n); 264 stopped_cpus &= ~(1 << n); 265 if (pthread_kill(ap_tids[n], SIGXCPU) != 0) 266 panic("restart_cpus: pthread_kill failed"); 267 } 268 crit_exit(); 269 #if 0 270 panic("XXX restart_cpus()"); 271 #endif 272 273 return(1); 274 } 275 276 void 277 ap_init(void) 278 { 279 /* 280 * Adjust smp_startup_mask to signal the BSP that we have started 281 * up successfully. Note that we do not yet hold the BGL. The BSP 282 * is waiting for our signal. 283 * 284 * We can't set our bit in smp_active_mask yet because we are holding 285 * interrupts physically disabled and remote cpus could deadlock 286 * trying to send us an IPI. 287 */ 288 smp_startup_mask |= 1 << mycpu->gd_cpuid; 289 cpu_mfence(); 290 291 /* 292 * Interlock for finalization. Wait until mp_finish is non-zero, 293 * then get the MP lock. 294 * 295 * Note: We are in a critical section. 296 * 297 * Note: We have to synchronize td_mpcount to our desired MP state 298 * before calling cpu_try_mplock(). 299 * 300 * Note: we are the idle thread, we can only spin. 301 * 302 * Note: The load fence is memory volatile and prevents the compiler 303 * from improperly caching mp_finish, and the cpu from improperly 304 * caching it. 305 */ 306 307 while (mp_finish == 0) { 308 cpu_lfence(); 309 DELAY(500000); 310 } 311 ++curthread->td_mpcount; 312 while (cpu_try_mplock() == 0) 313 DELAY(100000); 314 315 /* BSP may have changed PTD while we're waiting for the lock */ 316 cpu_invltlb(); 317 318 /* Build our map of 'other' CPUs. */ 319 mycpu->gd_other_cpus = smp_startup_mask & ~(1 << mycpu->gd_cpuid); 320 321 kprintf("SMP: AP CPU #%d Launched!\n", mycpu->gd_cpuid); 322 323 324 /* Set memory range attributes for this CPU to match the BSP */ 325 mem_range_AP_init(); 326 /* 327 * Once we go active we must process any IPIQ messages that may 328 * have been queued, because no actual IPI will occur until we 329 * set our bit in the smp_active_mask. If we don't the IPI 330 * message interlock could be left set which would also prevent 331 * further IPIs. 332 * 333 * The idle loop doesn't expect the BGL to be held and while 334 * lwkt_switch() normally cleans things up this is a special case 335 * because we returning almost directly into the idle loop. 336 * 337 * The idle thread is never placed on the runq, make sure 338 * nothing we've done put it there. 339 */ 340 KKASSERT(curthread->td_mpcount == 1); 341 smp_active_mask |= 1 << mycpu->gd_cpuid; 342 343 mdcpu->gd_fpending = 0; 344 mdcpu->gd_ipending = 0; 345 initclocks_pcpu(); /* clock interrupts (via IPIs) */ 346 lwkt_process_ipiq(); 347 348 /* 349 * Releasing the mp lock lets the BSP finish up the SMP init 350 */ 351 rel_mplock(); 352 KKASSERT((curthread->td_flags & TDF_RUNQ) == 0); 353 } 354 355 void 356 init_secondary(void) 357 { 358 int myid = bootAP; 359 struct mdglobaldata *md; 360 struct privatespace *ps; 361 362 ps = &CPU_prvspace[myid]; 363 364 KKASSERT(ps->mdglobaldata.mi.gd_prvspace == ps); 365 366 /* 367 * Setup the %gs for cpu #n. The mycpu macro works after this 368 * point. Note that %fs is used by pthreads. 369 */ 370 tls_set_gs(&CPU_prvspace[myid], sizeof(struct privatespace)); 371 372 md = mdcpu; /* loaded through %gs:0 (mdglobaldata.mi.gd_prvspace)*/ 373 374 /* JG */ 375 md->gd_common_tss.tss_rsp0 = 0; /* not used until after switch */ 376 //md->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL); 377 //md->gd_common_tss.tss_ioopt = (sizeof md->gd_common_tss) << 16; 378 379 /* 380 * Set to a known state: 381 * Set by mpboot.s: CR0_PG, CR0_PE 382 * Set by cpu_setregs: CR0_NE, CR0_MP, CR0_TS, CR0_WP, CR0_AM 383 */ 384 } 385 386 static int 387 start_all_aps(u_int boot_addr) 388 { 389 int x, i; 390 struct mdglobaldata *gd; 391 struct privatespace *ps; 392 vm_page_t m; 393 vm_offset_t va; 394 #if 0 395 struct lwp_params params; 396 #endif 397 398 /* 399 * needed for ipis to initial thread 400 * FIXME: rename ap_tids? 401 */ 402 ap_tids[0] = pthread_self(); 403 404 for (x = 1; x <= mp_naps; x++) 405 { 406 /* Allocate space for the CPU's private space. */ 407 for (i = 0; i < sizeof(struct mdglobaldata); i += PAGE_SIZE) { 408 va =(vm_offset_t)&CPU_prvspace[x].mdglobaldata + i; 409 m = vm_page_alloc(&kernel_object, va, VM_ALLOC_SYSTEM); 410 pmap_kenter_quick(va, m->phys_addr); 411 } 412 413 for (i = 0; i < sizeof(CPU_prvspace[x].idlestack); i += PAGE_SIZE) { 414 va =(vm_offset_t)&CPU_prvspace[x].idlestack + i; 415 m = vm_page_alloc(&kernel_object, va, VM_ALLOC_SYSTEM); 416 pmap_kenter_quick(va, m->phys_addr); 417 } 418 419 gd = &CPU_prvspace[x].mdglobaldata; /* official location */ 420 bzero(gd, sizeof(*gd)); 421 gd->mi.gd_prvspace = ps = &CPU_prvspace[x]; 422 423 /* prime data page for it to use */ 424 mi_gdinit(&gd->mi, x); 425 cpu_gdinit(gd, x); 426 427 #if 0 428 gd->gd_CMAP1 = pmap_kpte((vm_offset_t)CPU_prvspace[x].CPAGE1); 429 gd->gd_CMAP2 = pmap_kpte((vm_offset_t)CPU_prvspace[x].CPAGE2); 430 gd->gd_CMAP3 = pmap_kpte((vm_offset_t)CPU_prvspace[x].CPAGE3); 431 gd->gd_PMAP1 = pmap_kpte((vm_offset_t)CPU_prvspace[x].PPAGE1); 432 gd->gd_CADDR1 = ps->CPAGE1; 433 gd->gd_CADDR2 = ps->CPAGE2; 434 gd->gd_CADDR3 = ps->CPAGE3; 435 gd->gd_PADDR1 = (vpte_t *)ps->PPAGE1; 436 #endif 437 438 gd->mi.gd_ipiq = (void *)kmem_alloc(&kernel_map, sizeof(lwkt_ipiq) * (mp_naps + 1)); 439 bzero(gd->mi.gd_ipiq, sizeof(lwkt_ipiq) * (mp_naps + 1)); 440 441 /* 442 * Setup the AP boot stack 443 */ 444 bootSTK = &ps->idlestack[UPAGES*PAGE_SIZE/2]; 445 bootAP = x; 446 447 /* 448 * Setup the AP's lwp, this is the 'cpu' 449 * 450 * We have to make sure our signals are masked or the new LWP 451 * may pick up a signal that it isn't ready for yet. SMP 452 * startup occurs after SI_BOOT2_LEAVE_CRIT so interrupts 453 * have already been enabled. 454 */ 455 cpu_disable_intr(); 456 pthread_create(&ap_tids[x], NULL, start_ap, NULL); 457 cpu_enable_intr(); 458 459 while((smp_startup_mask & (1 << x)) == 0) { 460 cpu_lfence(); /* XXX spin until the AP has started */ 461 DELAY(1000); 462 } 463 } 464 465 return(ncpus - 1); 466 } 467