10b57cec5SDimitry Andric //===--- PPC.cpp - Implement PPC target feature support -------------------===//
20b57cec5SDimitry Andric //
30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
60b57cec5SDimitry Andric //
70b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
80b57cec5SDimitry Andric //
90b57cec5SDimitry Andric // This file implements PPC TargetInfo objects.
100b57cec5SDimitry Andric //
110b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
120b57cec5SDimitry Andric
130b57cec5SDimitry Andric #include "PPC.h"
140b57cec5SDimitry Andric #include "clang/Basic/Diagnostic.h"
150b57cec5SDimitry Andric #include "clang/Basic/MacroBuilder.h"
160b57cec5SDimitry Andric #include "clang/Basic/TargetBuiltins.h"
170b57cec5SDimitry Andric
180b57cec5SDimitry Andric using namespace clang;
190b57cec5SDimitry Andric using namespace clang::targets;
200b57cec5SDimitry Andric
21bdd1243dSDimitry Andric static constexpr Builtin::Info BuiltinInfo[] = {
220b57cec5SDimitry Andric #define BUILTIN(ID, TYPE, ATTRS) \
23bdd1243dSDimitry Andric {#ID, TYPE, ATTRS, nullptr, HeaderDesc::NO_HEADER, ALL_LANGUAGES},
2406c3fb27SDimitry Andric #define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \
2506c3fb27SDimitry Andric {#ID, TYPE, ATTRS, FEATURE, HeaderDesc::NO_HEADER, ALL_LANGUAGES},
260b57cec5SDimitry Andric #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) \
27bdd1243dSDimitry Andric {#ID, TYPE, ATTRS, nullptr, HeaderDesc::HEADER, ALL_LANGUAGES},
280b57cec5SDimitry Andric #include "clang/Basic/BuiltinsPPC.def"
290b57cec5SDimitry Andric };
300b57cec5SDimitry Andric
310b57cec5SDimitry Andric /// handleTargetFeatures - Perform initialization based on the user
320b57cec5SDimitry Andric /// configured set of features.
handleTargetFeatures(std::vector<std::string> & Features,DiagnosticsEngine & Diags)330b57cec5SDimitry Andric bool PPCTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
340b57cec5SDimitry Andric DiagnosticsEngine &Diags) {
350b57cec5SDimitry Andric FloatABI = HardFloat;
360b57cec5SDimitry Andric for (const auto &Feature : Features) {
370b57cec5SDimitry Andric if (Feature == "+altivec") {
380b57cec5SDimitry Andric HasAltivec = true;
390b57cec5SDimitry Andric } else if (Feature == "+vsx") {
400b57cec5SDimitry Andric HasVSX = true;
4181ad6265SDimitry Andric } else if (Feature == "+crbits") {
4281ad6265SDimitry Andric UseCRBits = true;
430b57cec5SDimitry Andric } else if (Feature == "+bpermd") {
440b57cec5SDimitry Andric HasBPERMD = true;
450b57cec5SDimitry Andric } else if (Feature == "+extdiv") {
460b57cec5SDimitry Andric HasExtDiv = true;
470b57cec5SDimitry Andric } else if (Feature == "+power8-vector") {
480b57cec5SDimitry Andric HasP8Vector = true;
490b57cec5SDimitry Andric } else if (Feature == "+crypto") {
500b57cec5SDimitry Andric HasP8Crypto = true;
510b57cec5SDimitry Andric } else if (Feature == "+direct-move") {
520b57cec5SDimitry Andric HasDirectMove = true;
530b57cec5SDimitry Andric } else if (Feature == "+htm") {
540b57cec5SDimitry Andric HasHTM = true;
550b57cec5SDimitry Andric } else if (Feature == "+float128") {
565f757f3fSDimitry Andric HasFloat128 = !getTriple().isOSAIX();
570b57cec5SDimitry Andric } else if (Feature == "+power9-vector") {
580b57cec5SDimitry Andric HasP9Vector = true;
595ffd83dbSDimitry Andric } else if (Feature == "+power10-vector") {
605ffd83dbSDimitry Andric HasP10Vector = true;
615ffd83dbSDimitry Andric } else if (Feature == "+pcrelative-memops") {
625ffd83dbSDimitry Andric HasPCRelativeMemops = true;
63fe6060f1SDimitry Andric } else if (Feature == "+prefix-instrs") {
64fe6060f1SDimitry Andric HasPrefixInstrs = true;
65e8d8bef9SDimitry Andric } else if (Feature == "+spe" || Feature == "+efpu2") {
66715df83aSDimitry Andric HasStrictFP = false;
670b57cec5SDimitry Andric HasSPE = true;
680b57cec5SDimitry Andric LongDoubleWidth = LongDoubleAlign = 64;
690b57cec5SDimitry Andric LongDoubleFormat = &llvm::APFloat::IEEEdouble();
700b57cec5SDimitry Andric } else if (Feature == "-hard-float") {
710b57cec5SDimitry Andric FloatABI = SoftFloat;
72e8d8bef9SDimitry Andric } else if (Feature == "+paired-vector-memops") {
73e8d8bef9SDimitry Andric PairedVectorMemops = true;
74e8d8bef9SDimitry Andric } else if (Feature == "+mma") {
75e8d8bef9SDimitry Andric HasMMA = true;
76fe6060f1SDimitry Andric } else if (Feature == "+rop-protect") {
77fe6060f1SDimitry Andric HasROPProtect = true;
78fe6060f1SDimitry Andric } else if (Feature == "+privileged") {
79fe6060f1SDimitry Andric HasPrivileged = true;
805f757f3fSDimitry Andric } else if (Feature == "+aix-small-local-exec-tls") {
815f757f3fSDimitry Andric HasAIXSmallLocalExecTLS = true;
82349cc55cSDimitry Andric } else if (Feature == "+isa-v206-instructions") {
83349cc55cSDimitry Andric IsISA2_06 = true;
84fe6060f1SDimitry Andric } else if (Feature == "+isa-v207-instructions") {
85fe6060f1SDimitry Andric IsISA2_07 = true;
86fe6060f1SDimitry Andric } else if (Feature == "+isa-v30-instructions") {
87fe6060f1SDimitry Andric IsISA3_0 = true;
88fe6060f1SDimitry Andric } else if (Feature == "+isa-v31-instructions") {
89fe6060f1SDimitry Andric IsISA3_1 = true;
9081ad6265SDimitry Andric } else if (Feature == "+quadword-atomics") {
9181ad6265SDimitry Andric HasQuadwordAtomics = true;
920b57cec5SDimitry Andric }
930b57cec5SDimitry Andric // TODO: Finish this list and add an assert that we've handled them
940b57cec5SDimitry Andric // all.
950b57cec5SDimitry Andric }
960b57cec5SDimitry Andric
970b57cec5SDimitry Andric return true;
980b57cec5SDimitry Andric }
990b57cec5SDimitry Andric
defineXLCompatMacros(MacroBuilder & Builder)100fe6060f1SDimitry Andric static void defineXLCompatMacros(MacroBuilder &Builder) {
101fe6060f1SDimitry Andric Builder.defineMacro("__popcntb", "__builtin_ppc_popcntb");
102fe6060f1SDimitry Andric Builder.defineMacro("__poppar4", "__builtin_ppc_poppar4");
103fe6060f1SDimitry Andric Builder.defineMacro("__poppar8", "__builtin_ppc_poppar8");
104fe6060f1SDimitry Andric Builder.defineMacro("__eieio", "__builtin_ppc_eieio");
105fe6060f1SDimitry Andric Builder.defineMacro("__iospace_eieio", "__builtin_ppc_iospace_eieio");
106fe6060f1SDimitry Andric Builder.defineMacro("__isync", "__builtin_ppc_isync");
107fe6060f1SDimitry Andric Builder.defineMacro("__lwsync", "__builtin_ppc_lwsync");
108fe6060f1SDimitry Andric Builder.defineMacro("__iospace_lwsync", "__builtin_ppc_iospace_lwsync");
109fe6060f1SDimitry Andric Builder.defineMacro("__sync", "__builtin_ppc_sync");
110fe6060f1SDimitry Andric Builder.defineMacro("__iospace_sync", "__builtin_ppc_iospace_sync");
111fe6060f1SDimitry Andric Builder.defineMacro("__dcbfl", "__builtin_ppc_dcbfl");
112fe6060f1SDimitry Andric Builder.defineMacro("__dcbflp", "__builtin_ppc_dcbflp");
113fe6060f1SDimitry Andric Builder.defineMacro("__dcbst", "__builtin_ppc_dcbst");
114fe6060f1SDimitry Andric Builder.defineMacro("__dcbt", "__builtin_ppc_dcbt");
115fe6060f1SDimitry Andric Builder.defineMacro("__dcbtst", "__builtin_ppc_dcbtst");
116fe6060f1SDimitry Andric Builder.defineMacro("__dcbz", "__builtin_ppc_dcbz");
117fe6060f1SDimitry Andric Builder.defineMacro("__icbt", "__builtin_ppc_icbt");
118fe6060f1SDimitry Andric Builder.defineMacro("__compare_and_swap", "__builtin_ppc_compare_and_swap");
119fe6060f1SDimitry Andric Builder.defineMacro("__compare_and_swaplp",
120fe6060f1SDimitry Andric "__builtin_ppc_compare_and_swaplp");
121fe6060f1SDimitry Andric Builder.defineMacro("__fetch_and_add", "__builtin_ppc_fetch_and_add");
122fe6060f1SDimitry Andric Builder.defineMacro("__fetch_and_addlp", "__builtin_ppc_fetch_and_addlp");
123fe6060f1SDimitry Andric Builder.defineMacro("__fetch_and_and", "__builtin_ppc_fetch_and_and");
124fe6060f1SDimitry Andric Builder.defineMacro("__fetch_and_andlp", "__builtin_ppc_fetch_and_andlp");
125fe6060f1SDimitry Andric Builder.defineMacro("__fetch_and_or", "__builtin_ppc_fetch_and_or");
126fe6060f1SDimitry Andric Builder.defineMacro("__fetch_and_orlp", "__builtin_ppc_fetch_and_orlp");
127fe6060f1SDimitry Andric Builder.defineMacro("__fetch_and_swap", "__builtin_ppc_fetch_and_swap");
128fe6060f1SDimitry Andric Builder.defineMacro("__fetch_and_swaplp", "__builtin_ppc_fetch_and_swaplp");
129fe6060f1SDimitry Andric Builder.defineMacro("__ldarx", "__builtin_ppc_ldarx");
130fe6060f1SDimitry Andric Builder.defineMacro("__lwarx", "__builtin_ppc_lwarx");
131fe6060f1SDimitry Andric Builder.defineMacro("__lharx", "__builtin_ppc_lharx");
132fe6060f1SDimitry Andric Builder.defineMacro("__lbarx", "__builtin_ppc_lbarx");
133fe6060f1SDimitry Andric Builder.defineMacro("__stfiw", "__builtin_ppc_stfiw");
134fe6060f1SDimitry Andric Builder.defineMacro("__stdcx", "__builtin_ppc_stdcx");
135fe6060f1SDimitry Andric Builder.defineMacro("__stwcx", "__builtin_ppc_stwcx");
136fe6060f1SDimitry Andric Builder.defineMacro("__sthcx", "__builtin_ppc_sthcx");
137fe6060f1SDimitry Andric Builder.defineMacro("__stbcx", "__builtin_ppc_stbcx");
138fe6060f1SDimitry Andric Builder.defineMacro("__tdw", "__builtin_ppc_tdw");
139fe6060f1SDimitry Andric Builder.defineMacro("__tw", "__builtin_ppc_tw");
140fe6060f1SDimitry Andric Builder.defineMacro("__trap", "__builtin_ppc_trap");
141fe6060f1SDimitry Andric Builder.defineMacro("__trapd", "__builtin_ppc_trapd");
142fe6060f1SDimitry Andric Builder.defineMacro("__fcfid", "__builtin_ppc_fcfid");
143fe6060f1SDimitry Andric Builder.defineMacro("__fcfud", "__builtin_ppc_fcfud");
144fe6060f1SDimitry Andric Builder.defineMacro("__fctid", "__builtin_ppc_fctid");
145fe6060f1SDimitry Andric Builder.defineMacro("__fctidz", "__builtin_ppc_fctidz");
146fe6060f1SDimitry Andric Builder.defineMacro("__fctiw", "__builtin_ppc_fctiw");
147fe6060f1SDimitry Andric Builder.defineMacro("__fctiwz", "__builtin_ppc_fctiwz");
148fe6060f1SDimitry Andric Builder.defineMacro("__fctudz", "__builtin_ppc_fctudz");
149fe6060f1SDimitry Andric Builder.defineMacro("__fctuwz", "__builtin_ppc_fctuwz");
150fe6060f1SDimitry Andric Builder.defineMacro("__cmpeqb", "__builtin_ppc_cmpeqb");
151fe6060f1SDimitry Andric Builder.defineMacro("__cmprb", "__builtin_ppc_cmprb");
152fe6060f1SDimitry Andric Builder.defineMacro("__setb", "__builtin_ppc_setb");
153fe6060f1SDimitry Andric Builder.defineMacro("__cmpb", "__builtin_ppc_cmpb");
154fe6060f1SDimitry Andric Builder.defineMacro("__mulhd", "__builtin_ppc_mulhd");
155fe6060f1SDimitry Andric Builder.defineMacro("__mulhdu", "__builtin_ppc_mulhdu");
156fe6060f1SDimitry Andric Builder.defineMacro("__mulhw", "__builtin_ppc_mulhw");
157fe6060f1SDimitry Andric Builder.defineMacro("__mulhwu", "__builtin_ppc_mulhwu");
158fe6060f1SDimitry Andric Builder.defineMacro("__maddhd", "__builtin_ppc_maddhd");
159fe6060f1SDimitry Andric Builder.defineMacro("__maddhdu", "__builtin_ppc_maddhdu");
160fe6060f1SDimitry Andric Builder.defineMacro("__maddld", "__builtin_ppc_maddld");
161fe6060f1SDimitry Andric Builder.defineMacro("__rlwnm", "__builtin_ppc_rlwnm");
162fe6060f1SDimitry Andric Builder.defineMacro("__rlwimi", "__builtin_ppc_rlwimi");
163fe6060f1SDimitry Andric Builder.defineMacro("__rldimi", "__builtin_ppc_rldimi");
164fe6060f1SDimitry Andric Builder.defineMacro("__load2r", "__builtin_ppc_load2r");
165fe6060f1SDimitry Andric Builder.defineMacro("__load4r", "__builtin_ppc_load4r");
166fe6060f1SDimitry Andric Builder.defineMacro("__load8r", "__builtin_ppc_load8r");
167fe6060f1SDimitry Andric Builder.defineMacro("__store2r", "__builtin_ppc_store2r");
168fe6060f1SDimitry Andric Builder.defineMacro("__store4r", "__builtin_ppc_store4r");
169fe6060f1SDimitry Andric Builder.defineMacro("__store8r", "__builtin_ppc_store8r");
170fe6060f1SDimitry Andric Builder.defineMacro("__extract_exp", "__builtin_ppc_extract_exp");
171fe6060f1SDimitry Andric Builder.defineMacro("__extract_sig", "__builtin_ppc_extract_sig");
172fe6060f1SDimitry Andric Builder.defineMacro("__mtfsb0", "__builtin_ppc_mtfsb0");
173fe6060f1SDimitry Andric Builder.defineMacro("__mtfsb1", "__builtin_ppc_mtfsb1");
174fe6060f1SDimitry Andric Builder.defineMacro("__mtfsf", "__builtin_ppc_mtfsf");
175fe6060f1SDimitry Andric Builder.defineMacro("__mtfsfi", "__builtin_ppc_mtfsfi");
176fe6060f1SDimitry Andric Builder.defineMacro("__insert_exp", "__builtin_ppc_insert_exp");
177fe6060f1SDimitry Andric Builder.defineMacro("__fmsub", "__builtin_ppc_fmsub");
178fe6060f1SDimitry Andric Builder.defineMacro("__fmsubs", "__builtin_ppc_fmsubs");
179fe6060f1SDimitry Andric Builder.defineMacro("__fnmadd", "__builtin_ppc_fnmadd");
180fe6060f1SDimitry Andric Builder.defineMacro("__fnmadds", "__builtin_ppc_fnmadds");
181fe6060f1SDimitry Andric Builder.defineMacro("__fnmsub", "__builtin_ppc_fnmsub");
182fe6060f1SDimitry Andric Builder.defineMacro("__fnmsubs", "__builtin_ppc_fnmsubs");
183fe6060f1SDimitry Andric Builder.defineMacro("__fre", "__builtin_ppc_fre");
184fe6060f1SDimitry Andric Builder.defineMacro("__fres", "__builtin_ppc_fres");
185fe6060f1SDimitry Andric Builder.defineMacro("__swdiv_nochk", "__builtin_ppc_swdiv_nochk");
186fe6060f1SDimitry Andric Builder.defineMacro("__swdivs_nochk", "__builtin_ppc_swdivs_nochk");
187fe6060f1SDimitry Andric Builder.defineMacro("__alloca", "__builtin_alloca");
188fe6060f1SDimitry Andric Builder.defineMacro("__vcipher", "__builtin_altivec_crypto_vcipher");
189fe6060f1SDimitry Andric Builder.defineMacro("__vcipherlast", "__builtin_altivec_crypto_vcipherlast");
190fe6060f1SDimitry Andric Builder.defineMacro("__vncipher", "__builtin_altivec_crypto_vncipher");
191fe6060f1SDimitry Andric Builder.defineMacro("__vncipherlast",
192fe6060f1SDimitry Andric "__builtin_altivec_crypto_vncipherlast");
193fe6060f1SDimitry Andric Builder.defineMacro("__vpermxor", "__builtin_altivec_crypto_vpermxor");
194fe6060f1SDimitry Andric Builder.defineMacro("__vpmsumb", "__builtin_altivec_crypto_vpmsumb");
195fe6060f1SDimitry Andric Builder.defineMacro("__vpmsumd", "__builtin_altivec_crypto_vpmsumd");
196fe6060f1SDimitry Andric Builder.defineMacro("__vpmsumh", "__builtin_altivec_crypto_vpmsumh");
197fe6060f1SDimitry Andric Builder.defineMacro("__vpmsumw", "__builtin_altivec_crypto_vpmsumw");
198fe6060f1SDimitry Andric Builder.defineMacro("__divde", "__builtin_divde");
199fe6060f1SDimitry Andric Builder.defineMacro("__divwe", "__builtin_divwe");
200fe6060f1SDimitry Andric Builder.defineMacro("__divdeu", "__builtin_divdeu");
201fe6060f1SDimitry Andric Builder.defineMacro("__divweu", "__builtin_divweu");
202fe6060f1SDimitry Andric Builder.defineMacro("__alignx", "__builtin_ppc_alignx");
203fe6060f1SDimitry Andric Builder.defineMacro("__bcopy", "bcopy");
204fe6060f1SDimitry Andric Builder.defineMacro("__bpermd", "__builtin_bpermd");
205fe6060f1SDimitry Andric Builder.defineMacro("__cntlz4", "__builtin_clz");
206fe6060f1SDimitry Andric Builder.defineMacro("__cntlz8", "__builtin_clzll");
207fe6060f1SDimitry Andric Builder.defineMacro("__cmplx", "__builtin_complex");
208fe6060f1SDimitry Andric Builder.defineMacro("__cmplxf", "__builtin_complex");
209fe6060f1SDimitry Andric Builder.defineMacro("__cnttz4", "__builtin_ctz");
210fe6060f1SDimitry Andric Builder.defineMacro("__cnttz8", "__builtin_ctzll");
211fe6060f1SDimitry Andric Builder.defineMacro("__darn", "__builtin_darn");
212fe6060f1SDimitry Andric Builder.defineMacro("__darn_32", "__builtin_darn_32");
213fe6060f1SDimitry Andric Builder.defineMacro("__darn_raw", "__builtin_darn_raw");
214fe6060f1SDimitry Andric Builder.defineMacro("__dcbf", "__builtin_dcbf");
2157a6dacacSDimitry Andric Builder.defineMacro("__fence", "__builtin_ppc_fence");
216fe6060f1SDimitry Andric Builder.defineMacro("__fmadd", "__builtin_fma");
217fe6060f1SDimitry Andric Builder.defineMacro("__fmadds", "__builtin_fmaf");
21881ad6265SDimitry Andric Builder.defineMacro("__abs", "__builtin_abs");
219fe6060f1SDimitry Andric Builder.defineMacro("__labs", "__builtin_labs");
220fe6060f1SDimitry Andric Builder.defineMacro("__llabs", "__builtin_llabs");
221fe6060f1SDimitry Andric Builder.defineMacro("__popcnt4", "__builtin_popcount");
222fe6060f1SDimitry Andric Builder.defineMacro("__popcnt8", "__builtin_popcountll");
223fe6060f1SDimitry Andric Builder.defineMacro("__readflm", "__builtin_readflm");
224fe6060f1SDimitry Andric Builder.defineMacro("__rotatel4", "__builtin_rotateleft32");
225fe6060f1SDimitry Andric Builder.defineMacro("__rotatel8", "__builtin_rotateleft64");
226fe6060f1SDimitry Andric Builder.defineMacro("__rdlam", "__builtin_ppc_rdlam");
227fe6060f1SDimitry Andric Builder.defineMacro("__setflm", "__builtin_setflm");
228fe6060f1SDimitry Andric Builder.defineMacro("__setrnd", "__builtin_setrnd");
229fe6060f1SDimitry Andric Builder.defineMacro("__dcbtstt", "__builtin_ppc_dcbtstt");
230fe6060f1SDimitry Andric Builder.defineMacro("__dcbtt", "__builtin_ppc_dcbtt");
231fe6060f1SDimitry Andric Builder.defineMacro("__mftbu", "__builtin_ppc_mftbu");
232fe6060f1SDimitry Andric Builder.defineMacro("__mfmsr", "__builtin_ppc_mfmsr");
233fe6060f1SDimitry Andric Builder.defineMacro("__mtmsr", "__builtin_ppc_mtmsr");
234fe6060f1SDimitry Andric Builder.defineMacro("__mfspr", "__builtin_ppc_mfspr");
235fe6060f1SDimitry Andric Builder.defineMacro("__mtspr", "__builtin_ppc_mtspr");
236fe6060f1SDimitry Andric Builder.defineMacro("__fric", "__builtin_ppc_fric");
237fe6060f1SDimitry Andric Builder.defineMacro("__frim", "__builtin_ppc_frim");
238fe6060f1SDimitry Andric Builder.defineMacro("__frims", "__builtin_ppc_frims");
239fe6060f1SDimitry Andric Builder.defineMacro("__frin", "__builtin_ppc_frin");
240fe6060f1SDimitry Andric Builder.defineMacro("__frins", "__builtin_ppc_frins");
241fe6060f1SDimitry Andric Builder.defineMacro("__frip", "__builtin_ppc_frip");
242fe6060f1SDimitry Andric Builder.defineMacro("__frips", "__builtin_ppc_frips");
243fe6060f1SDimitry Andric Builder.defineMacro("__friz", "__builtin_ppc_friz");
244fe6060f1SDimitry Andric Builder.defineMacro("__frizs", "__builtin_ppc_frizs");
245fe6060f1SDimitry Andric Builder.defineMacro("__fsel", "__builtin_ppc_fsel");
246fe6060f1SDimitry Andric Builder.defineMacro("__fsels", "__builtin_ppc_fsels");
247fe6060f1SDimitry Andric Builder.defineMacro("__frsqrte", "__builtin_ppc_frsqrte");
248fe6060f1SDimitry Andric Builder.defineMacro("__frsqrtes", "__builtin_ppc_frsqrtes");
249fe6060f1SDimitry Andric Builder.defineMacro("__fsqrt", "__builtin_ppc_fsqrt");
250fe6060f1SDimitry Andric Builder.defineMacro("__fsqrts", "__builtin_ppc_fsqrts");
251349cc55cSDimitry Andric Builder.defineMacro("__addex", "__builtin_ppc_addex");
252349cc55cSDimitry Andric Builder.defineMacro("__cmplxl", "__builtin_complex");
253349cc55cSDimitry Andric Builder.defineMacro("__compare_exp_uo", "__builtin_ppc_compare_exp_uo");
254349cc55cSDimitry Andric Builder.defineMacro("__compare_exp_lt", "__builtin_ppc_compare_exp_lt");
255349cc55cSDimitry Andric Builder.defineMacro("__compare_exp_gt", "__builtin_ppc_compare_exp_gt");
256349cc55cSDimitry Andric Builder.defineMacro("__compare_exp_eq", "__builtin_ppc_compare_exp_eq");
257349cc55cSDimitry Andric Builder.defineMacro("__test_data_class", "__builtin_ppc_test_data_class");
258349cc55cSDimitry Andric Builder.defineMacro("__swdiv", "__builtin_ppc_swdiv");
259349cc55cSDimitry Andric Builder.defineMacro("__swdivs", "__builtin_ppc_swdivs");
26081ad6265SDimitry Andric Builder.defineMacro("__fnabs", "__builtin_ppc_fnabs");
26181ad6265SDimitry Andric Builder.defineMacro("__fnabss", "__builtin_ppc_fnabss");
26281ad6265SDimitry Andric Builder.defineMacro("__builtin_maxfe", "__builtin_ppc_maxfe");
26381ad6265SDimitry Andric Builder.defineMacro("__builtin_maxfl", "__builtin_ppc_maxfl");
26481ad6265SDimitry Andric Builder.defineMacro("__builtin_maxfs", "__builtin_ppc_maxfs");
26581ad6265SDimitry Andric Builder.defineMacro("__builtin_minfe", "__builtin_ppc_minfe");
26681ad6265SDimitry Andric Builder.defineMacro("__builtin_minfl", "__builtin_ppc_minfl");
26781ad6265SDimitry Andric Builder.defineMacro("__builtin_minfs", "__builtin_ppc_minfs");
2685f757f3fSDimitry Andric Builder.defineMacro("__builtin_mffs", "__builtin_ppc_mffs");
2695f757f3fSDimitry Andric Builder.defineMacro("__builtin_mffsl", "__builtin_ppc_mffsl");
2705f757f3fSDimitry Andric Builder.defineMacro("__builtin_mtfsf", "__builtin_ppc_mtfsf");
2715f757f3fSDimitry Andric Builder.defineMacro("__builtin_set_fpscr_rn", "__builtin_ppc_set_fpscr_rn");
272fe6060f1SDimitry Andric }
273fe6060f1SDimitry Andric
2740b57cec5SDimitry Andric /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
2750b57cec5SDimitry Andric /// #defines that are not tied to a specific subtarget.
getTargetDefines(const LangOptions & Opts,MacroBuilder & Builder) const2760b57cec5SDimitry Andric void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
2770b57cec5SDimitry Andric MacroBuilder &Builder) const {
278fe6060f1SDimitry Andric
27939dadd06SDimitry Andric // We define the XLC compatibility macros only on AIX and Linux since XLC
28039dadd06SDimitry Andric // was never available on any other platforms.
28139dadd06SDimitry Andric if (getTriple().isOSAIX() || getTriple().isOSLinux())
282fe6060f1SDimitry Andric defineXLCompatMacros(Builder);
283fe6060f1SDimitry Andric
2840b57cec5SDimitry Andric // Target identification.
2850b57cec5SDimitry Andric Builder.defineMacro("__ppc__");
2860b57cec5SDimitry Andric Builder.defineMacro("__PPC__");
2870b57cec5SDimitry Andric Builder.defineMacro("_ARCH_PPC");
2880b57cec5SDimitry Andric Builder.defineMacro("__powerpc__");
2890b57cec5SDimitry Andric Builder.defineMacro("__POWERPC__");
2900b57cec5SDimitry Andric if (PointerWidth == 64) {
2910b57cec5SDimitry Andric Builder.defineMacro("_ARCH_PPC64");
2920b57cec5SDimitry Andric Builder.defineMacro("__powerpc64__");
2930b57cec5SDimitry Andric Builder.defineMacro("__PPC64__");
294349cc55cSDimitry Andric } else if (getTriple().isOSAIX()) {
295349cc55cSDimitry Andric // The XL compilers on AIX define _ARCH_PPC64 for both 32 and 64-bit modes.
296349cc55cSDimitry Andric Builder.defineMacro("_ARCH_PPC64");
297349cc55cSDimitry Andric }
298349cc55cSDimitry Andric if (getTriple().isOSAIX()) {
299349cc55cSDimitry Andric Builder.defineMacro("__THW_PPC__");
300349cc55cSDimitry Andric // Define __PPC and __powerpc for AIX XL C/C++ compatibility
301349cc55cSDimitry Andric Builder.defineMacro("__PPC");
302349cc55cSDimitry Andric Builder.defineMacro("__powerpc");
3030b57cec5SDimitry Andric }
3040b57cec5SDimitry Andric
3050b57cec5SDimitry Andric // Target properties.
306e8d8bef9SDimitry Andric if (getTriple().getArch() == llvm::Triple::ppc64le ||
307e8d8bef9SDimitry Andric getTriple().getArch() == llvm::Triple::ppcle) {
3080b57cec5SDimitry Andric Builder.defineMacro("_LITTLE_ENDIAN");
3090b57cec5SDimitry Andric } else {
3100b57cec5SDimitry Andric if (!getTriple().isOSNetBSD() &&
3110b57cec5SDimitry Andric !getTriple().isOSOpenBSD())
3120b57cec5SDimitry Andric Builder.defineMacro("_BIG_ENDIAN");
3130b57cec5SDimitry Andric }
3140b57cec5SDimitry Andric
3150b57cec5SDimitry Andric // ABI options.
316e8d8bef9SDimitry Andric if (ABI == "elfv1")
3170b57cec5SDimitry Andric Builder.defineMacro("_CALL_ELF", "1");
3180b57cec5SDimitry Andric if (ABI == "elfv2")
3190b57cec5SDimitry Andric Builder.defineMacro("_CALL_ELF", "2");
3200b57cec5SDimitry Andric
3210b57cec5SDimitry Andric // This typically is only for a new enough linker (bfd >= 2.16.2 or gold), but
3220b57cec5SDimitry Andric // our support post-dates this and it should work on all 64-bit ppc linux
3230b57cec5SDimitry Andric // platforms. It is guaranteed to work on all elfv2 platforms.
3240b57cec5SDimitry Andric if (getTriple().getOS() == llvm::Triple::Linux && PointerWidth == 64)
3250b57cec5SDimitry Andric Builder.defineMacro("_CALL_LINUX", "1");
3260b57cec5SDimitry Andric
3270b57cec5SDimitry Andric // Subtarget options.
3280b57cec5SDimitry Andric if (!getTriple().isOSAIX()){
3290b57cec5SDimitry Andric Builder.defineMacro("__NATURAL_ALIGNMENT__");
3300b57cec5SDimitry Andric }
3310b57cec5SDimitry Andric Builder.defineMacro("__REGISTER_PREFIX__", "");
3320b57cec5SDimitry Andric
3330b57cec5SDimitry Andric // FIXME: Should be controlled by command line option.
3340b57cec5SDimitry Andric if (LongDoubleWidth == 128) {
3350b57cec5SDimitry Andric Builder.defineMacro("__LONG_DOUBLE_128__");
3360b57cec5SDimitry Andric Builder.defineMacro("__LONGDOUBLE128");
337e8d8bef9SDimitry Andric if (Opts.PPCIEEELongDouble)
338e8d8bef9SDimitry Andric Builder.defineMacro("__LONG_DOUBLE_IEEE128__");
339e8d8bef9SDimitry Andric else
340e8d8bef9SDimitry Andric Builder.defineMacro("__LONG_DOUBLE_IBM128__");
3410b57cec5SDimitry Andric }
3420b57cec5SDimitry Andric
343fe6060f1SDimitry Andric if (getTriple().isOSAIX() && Opts.LongDoubleSize == 64) {
344fe6060f1SDimitry Andric assert(LongDoubleWidth == 64);
345fe6060f1SDimitry Andric Builder.defineMacro("__LONGDOUBLE64");
346fe6060f1SDimitry Andric }
347fe6060f1SDimitry Andric
34806c3fb27SDimitry Andric // Define this for elfv2 (64-bit only).
34906c3fb27SDimitry Andric if (ABI == "elfv2")
3500b57cec5SDimitry Andric Builder.defineMacro("__STRUCT_PARM_ALIGN__", "16");
3510b57cec5SDimitry Andric
3520b57cec5SDimitry Andric if (ArchDefs & ArchDefineName)
3530b57cec5SDimitry Andric Builder.defineMacro(Twine("_ARCH_", StringRef(CPU).upper()));
3540b57cec5SDimitry Andric if (ArchDefs & ArchDefinePpcgr)
3550b57cec5SDimitry Andric Builder.defineMacro("_ARCH_PPCGR");
3560b57cec5SDimitry Andric if (ArchDefs & ArchDefinePpcsq)
3570b57cec5SDimitry Andric Builder.defineMacro("_ARCH_PPCSQ");
3580b57cec5SDimitry Andric if (ArchDefs & ArchDefine440)
3590b57cec5SDimitry Andric Builder.defineMacro("_ARCH_440");
3600b57cec5SDimitry Andric if (ArchDefs & ArchDefine603)
3610b57cec5SDimitry Andric Builder.defineMacro("_ARCH_603");
3620b57cec5SDimitry Andric if (ArchDefs & ArchDefine604)
3630b57cec5SDimitry Andric Builder.defineMacro("_ARCH_604");
3640b57cec5SDimitry Andric if (ArchDefs & ArchDefinePwr4)
3650b57cec5SDimitry Andric Builder.defineMacro("_ARCH_PWR4");
3660b57cec5SDimitry Andric if (ArchDefs & ArchDefinePwr5)
3670b57cec5SDimitry Andric Builder.defineMacro("_ARCH_PWR5");
3680b57cec5SDimitry Andric if (ArchDefs & ArchDefinePwr5x)
3690b57cec5SDimitry Andric Builder.defineMacro("_ARCH_PWR5X");
3700b57cec5SDimitry Andric if (ArchDefs & ArchDefinePwr6)
3710b57cec5SDimitry Andric Builder.defineMacro("_ARCH_PWR6");
3720b57cec5SDimitry Andric if (ArchDefs & ArchDefinePwr6x)
3730b57cec5SDimitry Andric Builder.defineMacro("_ARCH_PWR6X");
3740b57cec5SDimitry Andric if (ArchDefs & ArchDefinePwr7)
3750b57cec5SDimitry Andric Builder.defineMacro("_ARCH_PWR7");
3760b57cec5SDimitry Andric if (ArchDefs & ArchDefinePwr8)
3770b57cec5SDimitry Andric Builder.defineMacro("_ARCH_PWR8");
3780b57cec5SDimitry Andric if (ArchDefs & ArchDefinePwr9)
3790b57cec5SDimitry Andric Builder.defineMacro("_ARCH_PWR9");
3805ffd83dbSDimitry Andric if (ArchDefs & ArchDefinePwr10)
3815ffd83dbSDimitry Andric Builder.defineMacro("_ARCH_PWR10");
3820b57cec5SDimitry Andric if (ArchDefs & ArchDefineA2)
3830b57cec5SDimitry Andric Builder.defineMacro("_ARCH_A2");
384f8e1cfadSDimitry Andric if (ArchDefs & ArchDefineE500)
385f8e1cfadSDimitry Andric Builder.defineMacro("__NO_LWSYNC__");
386480093f4SDimitry Andric if (ArchDefs & ArchDefineFuture)
387480093f4SDimitry Andric Builder.defineMacro("_ARCH_PWR_FUTURE");
3880b57cec5SDimitry Andric
3890b57cec5SDimitry Andric if (HasAltivec) {
3900b57cec5SDimitry Andric Builder.defineMacro("__VEC__", "10206");
3910b57cec5SDimitry Andric Builder.defineMacro("__ALTIVEC__");
3920b57cec5SDimitry Andric }
3930b57cec5SDimitry Andric if (HasSPE) {
3940b57cec5SDimitry Andric Builder.defineMacro("__SPE__");
3950b57cec5SDimitry Andric Builder.defineMacro("__NO_FPRS__");
3960b57cec5SDimitry Andric }
3970b57cec5SDimitry Andric if (HasVSX)
3980b57cec5SDimitry Andric Builder.defineMacro("__VSX__");
3990b57cec5SDimitry Andric if (HasP8Vector)
4000b57cec5SDimitry Andric Builder.defineMacro("__POWER8_VECTOR__");
4010b57cec5SDimitry Andric if (HasP8Crypto)
4020b57cec5SDimitry Andric Builder.defineMacro("__CRYPTO__");
4030b57cec5SDimitry Andric if (HasHTM)
4040b57cec5SDimitry Andric Builder.defineMacro("__HTM__");
4050b57cec5SDimitry Andric if (HasFloat128)
4060b57cec5SDimitry Andric Builder.defineMacro("__FLOAT128__");
4070b57cec5SDimitry Andric if (HasP9Vector)
4080b57cec5SDimitry Andric Builder.defineMacro("__POWER9_VECTOR__");
409e8d8bef9SDimitry Andric if (HasMMA)
410e8d8bef9SDimitry Andric Builder.defineMacro("__MMA__");
411fe6060f1SDimitry Andric if (HasROPProtect)
412fe6060f1SDimitry Andric Builder.defineMacro("__ROP_PROTECT__");
4135ffd83dbSDimitry Andric if (HasP10Vector)
4145ffd83dbSDimitry Andric Builder.defineMacro("__POWER10_VECTOR__");
415fe6060f1SDimitry Andric if (HasPCRelativeMemops)
416fe6060f1SDimitry Andric Builder.defineMacro("__PCREL__");
4170b57cec5SDimitry Andric
4180b57cec5SDimitry Andric Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
4190b57cec5SDimitry Andric Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
4200b57cec5SDimitry Andric Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
4210b57cec5SDimitry Andric if (PointerWidth == 64)
4220b57cec5SDimitry Andric Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
4230b57cec5SDimitry Andric
4240b57cec5SDimitry Andric // We have support for the bswap intrinsics so we can define this.
4250b57cec5SDimitry Andric Builder.defineMacro("__HAVE_BSWAP__", "1");
4260b57cec5SDimitry Andric
4270b57cec5SDimitry Andric // FIXME: The following are not yet generated here by Clang, but are
4280b57cec5SDimitry Andric // generated by GCC:
4290b57cec5SDimitry Andric //
4300b57cec5SDimitry Andric // _SOFT_FLOAT_
4310b57cec5SDimitry Andric // __RECIP_PRECISION__
4320b57cec5SDimitry Andric // __APPLE_ALTIVEC__
4330b57cec5SDimitry Andric // __RECIP__
4340b57cec5SDimitry Andric // __RECIPF__
4350b57cec5SDimitry Andric // __RSQRTE__
4360b57cec5SDimitry Andric // __RSQRTEF__
4370b57cec5SDimitry Andric // _SOFT_DOUBLE_
4380b57cec5SDimitry Andric // __NO_LWSYNC__
4390b57cec5SDimitry Andric // __CMODEL_MEDIUM__
4400b57cec5SDimitry Andric // __CMODEL_LARGE__
4410b57cec5SDimitry Andric // _CALL_SYSV
4420b57cec5SDimitry Andric // _CALL_DARWIN
4430b57cec5SDimitry Andric }
4440b57cec5SDimitry Andric
4450b57cec5SDimitry Andric // Handle explicit options being passed to the compiler here: if we've
4460b57cec5SDimitry Andric // explicitly turned off vsx and turned on any of:
4470b57cec5SDimitry Andric // - power8-vector
4480b57cec5SDimitry Andric // - direct-move
4490b57cec5SDimitry Andric // - float128
4500b57cec5SDimitry Andric // - power9-vector
451e8d8bef9SDimitry Andric // - paired-vector-memops
452e8d8bef9SDimitry Andric // - mma
4535ffd83dbSDimitry Andric // - power10-vector
4540b57cec5SDimitry Andric // then go ahead and error since the customer has expressed an incompatible
4550b57cec5SDimitry Andric // set of options.
ppcUserFeaturesCheck(DiagnosticsEngine & Diags,const std::vector<std::string> & FeaturesVec)4560b57cec5SDimitry Andric static bool ppcUserFeaturesCheck(DiagnosticsEngine &Diags,
4570b57cec5SDimitry Andric const std::vector<std::string> &FeaturesVec) {
4580b57cec5SDimitry Andric
4595ffd83dbSDimitry Andric // vsx was not explicitly turned off.
460349cc55cSDimitry Andric if (!llvm::is_contained(FeaturesVec, "-vsx"))
4610b57cec5SDimitry Andric return true;
4625ffd83dbSDimitry Andric
4635ffd83dbSDimitry Andric auto FindVSXSubfeature = [&](StringRef Feature, StringRef Option) {
464349cc55cSDimitry Andric if (llvm::is_contained(FeaturesVec, Feature)) {
4655ffd83dbSDimitry Andric Diags.Report(diag::err_opt_not_valid_with_opt) << Option << "-mno-vsx";
4665ffd83dbSDimitry Andric return true;
4675ffd83dbSDimitry Andric }
4685ffd83dbSDimitry Andric return false;
4695ffd83dbSDimitry Andric };
4705ffd83dbSDimitry Andric
4715ffd83dbSDimitry Andric bool Found = FindVSXSubfeature("+power8-vector", "-mpower8-vector");
4725ffd83dbSDimitry Andric Found |= FindVSXSubfeature("+direct-move", "-mdirect-move");
4735ffd83dbSDimitry Andric Found |= FindVSXSubfeature("+float128", "-mfloat128");
4745ffd83dbSDimitry Andric Found |= FindVSXSubfeature("+power9-vector", "-mpower9-vector");
475e8d8bef9SDimitry Andric Found |= FindVSXSubfeature("+paired-vector-memops", "-mpaired-vector-memops");
476e8d8bef9SDimitry Andric Found |= FindVSXSubfeature("+mma", "-mmma");
4775ffd83dbSDimitry Andric Found |= FindVSXSubfeature("+power10-vector", "-mpower10-vector");
4785ffd83dbSDimitry Andric
4795ffd83dbSDimitry Andric // Return false if any vsx subfeatures was found.
4805ffd83dbSDimitry Andric return !Found;
4810b57cec5SDimitry Andric }
4820b57cec5SDimitry Andric
initFeatureMap(llvm::StringMap<bool> & Features,DiagnosticsEngine & Diags,StringRef CPU,const std::vector<std::string> & FeaturesVec) const4830b57cec5SDimitry Andric bool PPCTargetInfo::initFeatureMap(
4840b57cec5SDimitry Andric llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
4850b57cec5SDimitry Andric const std::vector<std::string> &FeaturesVec) const {
4860b57cec5SDimitry Andric Features["altivec"] = llvm::StringSwitch<bool>(CPU)
4870b57cec5SDimitry Andric .Case("7400", true)
4880b57cec5SDimitry Andric .Case("g4", true)
4890b57cec5SDimitry Andric .Case("7450", true)
4900b57cec5SDimitry Andric .Case("g4+", true)
4910b57cec5SDimitry Andric .Case("970", true)
4920b57cec5SDimitry Andric .Case("g5", true)
4930b57cec5SDimitry Andric .Case("pwr6", true)
4940b57cec5SDimitry Andric .Case("pwr7", true)
4950b57cec5SDimitry Andric .Case("pwr8", true)
4960b57cec5SDimitry Andric .Case("pwr9", true)
4970b57cec5SDimitry Andric .Case("ppc64", true)
4980b57cec5SDimitry Andric .Case("ppc64le", true)
4990b57cec5SDimitry Andric .Default(false);
5000b57cec5SDimitry Andric
5010b57cec5SDimitry Andric Features["power9-vector"] = (CPU == "pwr9");
5020b57cec5SDimitry Andric Features["crypto"] = llvm::StringSwitch<bool>(CPU)
5030b57cec5SDimitry Andric .Case("ppc64le", true)
5040b57cec5SDimitry Andric .Case("pwr9", true)
5050b57cec5SDimitry Andric .Case("pwr8", true)
5060b57cec5SDimitry Andric .Default(false);
5070b57cec5SDimitry Andric Features["power8-vector"] = llvm::StringSwitch<bool>(CPU)
5080b57cec5SDimitry Andric .Case("ppc64le", true)
5090b57cec5SDimitry Andric .Case("pwr9", true)
5100b57cec5SDimitry Andric .Case("pwr8", true)
5110b57cec5SDimitry Andric .Default(false);
5120b57cec5SDimitry Andric Features["bpermd"] = llvm::StringSwitch<bool>(CPU)
5130b57cec5SDimitry Andric .Case("ppc64le", true)
5140b57cec5SDimitry Andric .Case("pwr9", true)
5150b57cec5SDimitry Andric .Case("pwr8", true)
5160b57cec5SDimitry Andric .Case("pwr7", true)
5170b57cec5SDimitry Andric .Default(false);
5180b57cec5SDimitry Andric Features["extdiv"] = llvm::StringSwitch<bool>(CPU)
5190b57cec5SDimitry Andric .Case("ppc64le", true)
5200b57cec5SDimitry Andric .Case("pwr9", true)
5210b57cec5SDimitry Andric .Case("pwr8", true)
5220b57cec5SDimitry Andric .Case("pwr7", true)
5230b57cec5SDimitry Andric .Default(false);
5240b57cec5SDimitry Andric Features["direct-move"] = llvm::StringSwitch<bool>(CPU)
5250b57cec5SDimitry Andric .Case("ppc64le", true)
5260b57cec5SDimitry Andric .Case("pwr9", true)
5270b57cec5SDimitry Andric .Case("pwr8", true)
5280b57cec5SDimitry Andric .Default(false);
52981ad6265SDimitry Andric Features["crbits"] = llvm::StringSwitch<bool>(CPU)
53081ad6265SDimitry Andric .Case("ppc64le", true)
53181ad6265SDimitry Andric .Case("pwr9", true)
53281ad6265SDimitry Andric .Case("pwr8", true)
53381ad6265SDimitry Andric .Default(false);
5340b57cec5SDimitry Andric Features["vsx"] = llvm::StringSwitch<bool>(CPU)
5350b57cec5SDimitry Andric .Case("ppc64le", true)
5360b57cec5SDimitry Andric .Case("pwr9", true)
5370b57cec5SDimitry Andric .Case("pwr8", true)
5380b57cec5SDimitry Andric .Case("pwr7", true)
5390b57cec5SDimitry Andric .Default(false);
5400b57cec5SDimitry Andric Features["htm"] = llvm::StringSwitch<bool>(CPU)
5410b57cec5SDimitry Andric .Case("ppc64le", true)
5420b57cec5SDimitry Andric .Case("pwr9", true)
5430b57cec5SDimitry Andric .Case("pwr8", true)
5440b57cec5SDimitry Andric .Default(false);
5450b57cec5SDimitry Andric
546fe6060f1SDimitry Andric // ROP Protect is off by default.
547fe6060f1SDimitry Andric Features["rop-protect"] = false;
548fe6060f1SDimitry Andric // Privileged instructions are off by default.
549fe6060f1SDimitry Andric Features["privileged"] = false;
550fe6060f1SDimitry Andric
5515f757f3fSDimitry Andric // The code generated by the -maix-small-local-exec-tls option is turned
5525f757f3fSDimitry Andric // off by default.
5535f757f3fSDimitry Andric Features["aix-small-local-exec-tls"] = false;
5545f757f3fSDimitry Andric
555f8e1cfadSDimitry Andric Features["spe"] = llvm::StringSwitch<bool>(CPU)
556f8e1cfadSDimitry Andric .Case("8548", true)
557f8e1cfadSDimitry Andric .Case("e500", true)
558f8e1cfadSDimitry Andric .Default(false);
559f8e1cfadSDimitry Andric
560349cc55cSDimitry Andric Features["isa-v206-instructions"] = llvm::StringSwitch<bool>(CPU)
561349cc55cSDimitry Andric .Case("ppc64le", true)
562349cc55cSDimitry Andric .Case("pwr9", true)
563349cc55cSDimitry Andric .Case("pwr8", true)
564349cc55cSDimitry Andric .Case("pwr7", true)
56581ad6265SDimitry Andric .Case("a2", true)
566349cc55cSDimitry Andric .Default(false);
567349cc55cSDimitry Andric
568fe6060f1SDimitry Andric Features["isa-v207-instructions"] = llvm::StringSwitch<bool>(CPU)
569fe6060f1SDimitry Andric .Case("ppc64le", true)
570fe6060f1SDimitry Andric .Case("pwr9", true)
571fe6060f1SDimitry Andric .Case("pwr8", true)
572fe6060f1SDimitry Andric .Default(false);
573fe6060f1SDimitry Andric
574fe6060f1SDimitry Andric Features["isa-v30-instructions"] =
575fe6060f1SDimitry Andric llvm::StringSwitch<bool>(CPU).Case("pwr9", true).Default(false);
576fe6060f1SDimitry Andric
57781ad6265SDimitry Andric Features["quadword-atomics"] =
57881ad6265SDimitry Andric getTriple().isArch64Bit() && llvm::StringSwitch<bool>(CPU)
57981ad6265SDimitry Andric .Case("pwr9", true)
58081ad6265SDimitry Andric .Case("pwr8", true)
58181ad6265SDimitry Andric .Default(false);
58281ad6265SDimitry Andric
5835ffd83dbSDimitry Andric // Power10 includes all the same features as Power9 plus any features specific
5845ffd83dbSDimitry Andric // to the Power10 core.
5855ffd83dbSDimitry Andric if (CPU == "pwr10" || CPU == "power10") {
5865ffd83dbSDimitry Andric initFeatureMap(Features, Diags, "pwr9", FeaturesVec);
5875ffd83dbSDimitry Andric addP10SpecificFeatures(Features);
5885ffd83dbSDimitry Andric }
5895ffd83dbSDimitry Andric
5905ffd83dbSDimitry Andric // Future CPU should include all of the features of Power 10 as well as any
591480093f4SDimitry Andric // additional features (yet to be determined) specific to it.
592480093f4SDimitry Andric if (CPU == "future") {
5935ffd83dbSDimitry Andric initFeatureMap(Features, Diags, "pwr10", FeaturesVec);
594480093f4SDimitry Andric addFutureSpecificFeatures(Features);
595480093f4SDimitry Andric }
596480093f4SDimitry Andric
5970b57cec5SDimitry Andric if (!ppcUserFeaturesCheck(Diags, FeaturesVec))
5980b57cec5SDimitry Andric return false;
5990b57cec5SDimitry Andric
60004eeddc0SDimitry Andric if (!(ArchDefs & ArchDefinePwr7) && (ArchDefs & ArchDefinePpcgr) &&
601349cc55cSDimitry Andric llvm::is_contained(FeaturesVec, "+float128")) {
60204eeddc0SDimitry Andric // We have __float128 on PPC but not pre-VSX targets.
6030b57cec5SDimitry Andric Diags.Report(diag::err_opt_not_valid_with_opt) << "-mfloat128" << CPU;
6040b57cec5SDimitry Andric return false;
6050b57cec5SDimitry Andric }
6060b57cec5SDimitry Andric
607349cc55cSDimitry Andric if (!(ArchDefs & ArchDefinePwr10)) {
60881ad6265SDimitry Andric if (llvm::is_contained(FeaturesVec, "+mma")) {
609349cc55cSDimitry Andric // MMA operations are not available pre-Power10.
610e8d8bef9SDimitry Andric Diags.Report(diag::err_opt_not_valid_with_opt) << "-mmma" << CPU;
611e8d8bef9SDimitry Andric return false;
612e8d8bef9SDimitry Andric }
61381ad6265SDimitry Andric if (llvm::is_contained(FeaturesVec, "+pcrel")) {
614349cc55cSDimitry Andric // PC-Relative instructions are not available pre-Power10,
615349cc55cSDimitry Andric // and these instructions also require prefixed instructions support.
616349cc55cSDimitry Andric Diags.Report(diag::err_opt_not_valid_without_opt)
617349cc55cSDimitry Andric << "-mpcrel"
618349cc55cSDimitry Andric << "-mcpu=pwr10 -mprefixed";
619349cc55cSDimitry Andric return false;
620349cc55cSDimitry Andric }
62181ad6265SDimitry Andric if (llvm::is_contained(FeaturesVec, "+prefixed")) {
622349cc55cSDimitry Andric // Prefixed instructions are not available pre-Power10.
623349cc55cSDimitry Andric Diags.Report(diag::err_opt_not_valid_without_opt) << "-mprefixed"
624349cc55cSDimitry Andric << "-mcpu=pwr10";
625349cc55cSDimitry Andric return false;
626349cc55cSDimitry Andric }
62781ad6265SDimitry Andric if (llvm::is_contained(FeaturesVec, "+paired-vector-memops")) {
628349cc55cSDimitry Andric // Paired vector memops are not available pre-Power10.
629349cc55cSDimitry Andric Diags.Report(diag::err_opt_not_valid_without_opt)
630349cc55cSDimitry Andric << "-mpaired-vector-memops"
631349cc55cSDimitry Andric << "-mcpu=pwr10";
632349cc55cSDimitry Andric return false;
633349cc55cSDimitry Andric }
634349cc55cSDimitry Andric }
635e8d8bef9SDimitry Andric
636fe6060f1SDimitry Andric if (!(ArchDefs & ArchDefinePwr8) &&
637349cc55cSDimitry Andric llvm::is_contained(FeaturesVec, "+rop-protect")) {
638fe6060f1SDimitry Andric // We can turn on ROP Protect on Power 8 and above.
639fe6060f1SDimitry Andric Diags.Report(diag::err_opt_not_valid_with_opt) << "-mrop-protect" << CPU;
640fe6060f1SDimitry Andric return false;
641fe6060f1SDimitry Andric }
642fe6060f1SDimitry Andric
643fe6060f1SDimitry Andric if (!(ArchDefs & ArchDefinePwr8) &&
644349cc55cSDimitry Andric llvm::is_contained(FeaturesVec, "+privileged")) {
645fe6060f1SDimitry Andric Diags.Report(diag::err_opt_not_valid_with_opt) << "-mprivileged" << CPU;
646fe6060f1SDimitry Andric return false;
647fe6060f1SDimitry Andric }
648fe6060f1SDimitry Andric
6495f757f3fSDimitry Andric if (llvm::is_contained(FeaturesVec, "+aix-small-local-exec-tls")) {
6505f757f3fSDimitry Andric if (!getTriple().isOSAIX() || !getTriple().isArch64Bit()) {
6515f757f3fSDimitry Andric Diags.Report(diag::err_opt_not_valid_on_target)
6525f757f3fSDimitry Andric << "-maix-small-local-exec-tls";
6535f757f3fSDimitry Andric return false;
6545f757f3fSDimitry Andric }
6555f757f3fSDimitry Andric }
6565f757f3fSDimitry Andric
6570b57cec5SDimitry Andric return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
6580b57cec5SDimitry Andric }
6590b57cec5SDimitry Andric
6605ffd83dbSDimitry Andric // Add any Power10 specific features.
addP10SpecificFeatures(llvm::StringMap<bool> & Features) const6615ffd83dbSDimitry Andric void PPCTargetInfo::addP10SpecificFeatures(
6625ffd83dbSDimitry Andric llvm::StringMap<bool> &Features) const {
6635ffd83dbSDimitry Andric Features["htm"] = false; // HTM was removed for P10.
664e8d8bef9SDimitry Andric Features["paired-vector-memops"] = true;
665e8d8bef9SDimitry Andric Features["mma"] = true;
6665ffd83dbSDimitry Andric Features["power10-vector"] = true;
6675ffd83dbSDimitry Andric Features["pcrelative-memops"] = true;
668fe6060f1SDimitry Andric Features["prefix-instrs"] = true;
669fe6060f1SDimitry Andric Features["isa-v31-instructions"] = true;
6705ffd83dbSDimitry Andric }
6715ffd83dbSDimitry Andric
672480093f4SDimitry Andric // Add features specific to the "Future" CPU.
addFutureSpecificFeatures(llvm::StringMap<bool> & Features) const673480093f4SDimitry Andric void PPCTargetInfo::addFutureSpecificFeatures(
6740eae32dcSDimitry Andric llvm::StringMap<bool> &Features) const {}
675480093f4SDimitry Andric
hasFeature(StringRef Feature) const6760b57cec5SDimitry Andric bool PPCTargetInfo::hasFeature(StringRef Feature) const {
6770b57cec5SDimitry Andric return llvm::StringSwitch<bool>(Feature)
6780b57cec5SDimitry Andric .Case("powerpc", true)
6790b57cec5SDimitry Andric .Case("altivec", HasAltivec)
6800b57cec5SDimitry Andric .Case("vsx", HasVSX)
68181ad6265SDimitry Andric .Case("crbits", UseCRBits)
6820b57cec5SDimitry Andric .Case("power8-vector", HasP8Vector)
6830b57cec5SDimitry Andric .Case("crypto", HasP8Crypto)
6840b57cec5SDimitry Andric .Case("direct-move", HasDirectMove)
6850b57cec5SDimitry Andric .Case("htm", HasHTM)
6860b57cec5SDimitry Andric .Case("bpermd", HasBPERMD)
6870b57cec5SDimitry Andric .Case("extdiv", HasExtDiv)
6880b57cec5SDimitry Andric .Case("float128", HasFloat128)
6890b57cec5SDimitry Andric .Case("power9-vector", HasP9Vector)
690e8d8bef9SDimitry Andric .Case("paired-vector-memops", PairedVectorMemops)
6915ffd83dbSDimitry Andric .Case("power10-vector", HasP10Vector)
6925ffd83dbSDimitry Andric .Case("pcrelative-memops", HasPCRelativeMemops)
693fe6060f1SDimitry Andric .Case("prefix-instrs", HasPrefixInstrs)
6940b57cec5SDimitry Andric .Case("spe", HasSPE)
695e8d8bef9SDimitry Andric .Case("mma", HasMMA)
696fe6060f1SDimitry Andric .Case("rop-protect", HasROPProtect)
697fe6060f1SDimitry Andric .Case("privileged", HasPrivileged)
6985f757f3fSDimitry Andric .Case("aix-small-local-exec-tls", HasAIXSmallLocalExecTLS)
699349cc55cSDimitry Andric .Case("isa-v206-instructions", IsISA2_06)
700fe6060f1SDimitry Andric .Case("isa-v207-instructions", IsISA2_07)
701fe6060f1SDimitry Andric .Case("isa-v30-instructions", IsISA3_0)
702fe6060f1SDimitry Andric .Case("isa-v31-instructions", IsISA3_1)
70381ad6265SDimitry Andric .Case("quadword-atomics", HasQuadwordAtomics)
7040b57cec5SDimitry Andric .Default(false);
7050b57cec5SDimitry Andric }
7060b57cec5SDimitry Andric
setFeatureEnabled(llvm::StringMap<bool> & Features,StringRef Name,bool Enabled) const7070b57cec5SDimitry Andric void PPCTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
7080b57cec5SDimitry Andric StringRef Name, bool Enabled) const {
7090b57cec5SDimitry Andric if (Enabled) {
710e8d8bef9SDimitry Andric if (Name == "efpu2")
711e8d8bef9SDimitry Andric Features["spe"] = true;
7120b57cec5SDimitry Andric // If we're enabling any of the vsx based features then enable vsx and
7130b57cec5SDimitry Andric // altivec. We'll diagnose any problems later.
7140b57cec5SDimitry Andric bool FeatureHasVSX = llvm::StringSwitch<bool>(Name)
7150b57cec5SDimitry Andric .Case("vsx", true)
7160b57cec5SDimitry Andric .Case("direct-move", true)
7170b57cec5SDimitry Andric .Case("power8-vector", true)
7180b57cec5SDimitry Andric .Case("power9-vector", true)
719e8d8bef9SDimitry Andric .Case("paired-vector-memops", true)
7205ffd83dbSDimitry Andric .Case("power10-vector", true)
7210b57cec5SDimitry Andric .Case("float128", true)
722e8d8bef9SDimitry Andric .Case("mma", true)
7230b57cec5SDimitry Andric .Default(false);
7240b57cec5SDimitry Andric if (FeatureHasVSX)
7250b57cec5SDimitry Andric Features["vsx"] = Features["altivec"] = true;
7260b57cec5SDimitry Andric if (Name == "power9-vector")
7270b57cec5SDimitry Andric Features["power8-vector"] = true;
7285ffd83dbSDimitry Andric else if (Name == "power10-vector")
7295ffd83dbSDimitry Andric Features["power8-vector"] = Features["power9-vector"] = true;
7305ffd83dbSDimitry Andric if (Name == "pcrel")
7315ffd83dbSDimitry Andric Features["pcrelative-memops"] = true;
732fe6060f1SDimitry Andric else if (Name == "prefixed")
733fe6060f1SDimitry Andric Features["prefix-instrs"] = true;
7345ffd83dbSDimitry Andric else
7350b57cec5SDimitry Andric Features[Name] = true;
7360b57cec5SDimitry Andric } else {
737e8d8bef9SDimitry Andric if (Name == "spe")
738e8d8bef9SDimitry Andric Features["efpu2"] = false;
7390b57cec5SDimitry Andric // If we're disabling altivec or vsx go ahead and disable all of the vsx
7400b57cec5SDimitry Andric // features.
7410b57cec5SDimitry Andric if ((Name == "altivec") || (Name == "vsx"))
7420b57cec5SDimitry Andric Features["vsx"] = Features["direct-move"] = Features["power8-vector"] =
7435ffd83dbSDimitry Andric Features["float128"] = Features["power9-vector"] =
744e8d8bef9SDimitry Andric Features["paired-vector-memops"] = Features["mma"] =
7455ffd83dbSDimitry Andric Features["power10-vector"] = false;
7460b57cec5SDimitry Andric if (Name == "power8-vector")
747e8d8bef9SDimitry Andric Features["power9-vector"] = Features["paired-vector-memops"] =
748e8d8bef9SDimitry Andric Features["mma"] = Features["power10-vector"] = false;
7495ffd83dbSDimitry Andric else if (Name == "power9-vector")
750e8d8bef9SDimitry Andric Features["paired-vector-memops"] = Features["mma"] =
7515ffd83dbSDimitry Andric Features["power10-vector"] = false;
7525ffd83dbSDimitry Andric if (Name == "pcrel")
7535ffd83dbSDimitry Andric Features["pcrelative-memops"] = false;
754fe6060f1SDimitry Andric else if (Name == "prefixed")
755fe6060f1SDimitry Andric Features["prefix-instrs"] = false;
7565ffd83dbSDimitry Andric else
7570b57cec5SDimitry Andric Features[Name] = false;
7580b57cec5SDimitry Andric }
7590b57cec5SDimitry Andric }
7600b57cec5SDimitry Andric
7615f757f3fSDimitry Andric // Make sure that registers are added in the correct array index which should be
7625f757f3fSDimitry Andric // the DWARF number for PPC registers.
7630b57cec5SDimitry Andric const char *const PPCTargetInfo::GCCRegNames[] = {
7640b57cec5SDimitry Andric "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8",
7650b57cec5SDimitry Andric "r9", "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17",
7660b57cec5SDimitry Andric "r18", "r19", "r20", "r21", "r22", "r23", "r24", "r25", "r26",
7670b57cec5SDimitry Andric "r27", "r28", "r29", "r30", "r31", "f0", "f1", "f2", "f3",
7680b57cec5SDimitry Andric "f4", "f5", "f6", "f7", "f8", "f9", "f10", "f11", "f12",
7690b57cec5SDimitry Andric "f13", "f14", "f15", "f16", "f17", "f18", "f19", "f20", "f21",
7700b57cec5SDimitry Andric "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29", "f30",
7710b57cec5SDimitry Andric "f31", "mq", "lr", "ctr", "ap", "cr0", "cr1", "cr2", "cr3",
7720b57cec5SDimitry Andric "cr4", "cr5", "cr6", "cr7", "xer", "v0", "v1", "v2", "v3",
7730b57cec5SDimitry Andric "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12",
7740b57cec5SDimitry Andric "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21",
7750b57cec5SDimitry Andric "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30",
7760b57cec5SDimitry Andric "v31", "vrsave", "vscr", "spe_acc", "spefscr", "sfp"
7770b57cec5SDimitry Andric };
7780b57cec5SDimitry Andric
getGCCRegNames() const7790b57cec5SDimitry Andric ArrayRef<const char *> PPCTargetInfo::getGCCRegNames() const {
780bdd1243dSDimitry Andric return llvm::ArrayRef(GCCRegNames);
7810b57cec5SDimitry Andric }
7820b57cec5SDimitry Andric
7830b57cec5SDimitry Andric const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
7840b57cec5SDimitry Andric // While some of these aliases do map to different registers
7850b57cec5SDimitry Andric // they still share the same register name.
78604eeddc0SDimitry Andric {{"0"}, "r0"}, {{"1", "sp"}, "r1"}, {{"2"}, "r2"},
78704eeddc0SDimitry Andric {{"3"}, "r3"}, {{"4"}, "r4"}, {{"5"}, "r5"},
78804eeddc0SDimitry Andric {{"6"}, "r6"}, {{"7"}, "r7"}, {{"8"}, "r8"},
78904eeddc0SDimitry Andric {{"9"}, "r9"}, {{"10"}, "r10"}, {{"11"}, "r11"},
79004eeddc0SDimitry Andric {{"12"}, "r12"}, {{"13"}, "r13"}, {{"14"}, "r14"},
79104eeddc0SDimitry Andric {{"15"}, "r15"}, {{"16"}, "r16"}, {{"17"}, "r17"},
79204eeddc0SDimitry Andric {{"18"}, "r18"}, {{"19"}, "r19"}, {{"20"}, "r20"},
79304eeddc0SDimitry Andric {{"21"}, "r21"}, {{"22"}, "r22"}, {{"23"}, "r23"},
79404eeddc0SDimitry Andric {{"24"}, "r24"}, {{"25"}, "r25"}, {{"26"}, "r26"},
79504eeddc0SDimitry Andric {{"27"}, "r27"}, {{"28"}, "r28"}, {{"29"}, "r29"},
79604eeddc0SDimitry Andric {{"30"}, "r30"}, {{"31"}, "r31"}, {{"fr0"}, "f0"},
79704eeddc0SDimitry Andric {{"fr1"}, "f1"}, {{"fr2"}, "f2"}, {{"fr3"}, "f3"},
79804eeddc0SDimitry Andric {{"fr4"}, "f4"}, {{"fr5"}, "f5"}, {{"fr6"}, "f6"},
79904eeddc0SDimitry Andric {{"fr7"}, "f7"}, {{"fr8"}, "f8"}, {{"fr9"}, "f9"},
80004eeddc0SDimitry Andric {{"fr10"}, "f10"}, {{"fr11"}, "f11"}, {{"fr12"}, "f12"},
80104eeddc0SDimitry Andric {{"fr13"}, "f13"}, {{"fr14"}, "f14"}, {{"fr15"}, "f15"},
80204eeddc0SDimitry Andric {{"fr16"}, "f16"}, {{"fr17"}, "f17"}, {{"fr18"}, "f18"},
80304eeddc0SDimitry Andric {{"fr19"}, "f19"}, {{"fr20"}, "f20"}, {{"fr21"}, "f21"},
80404eeddc0SDimitry Andric {{"fr22"}, "f22"}, {{"fr23"}, "f23"}, {{"fr24"}, "f24"},
80504eeddc0SDimitry Andric {{"fr25"}, "f25"}, {{"fr26"}, "f26"}, {{"fr27"}, "f27"},
80604eeddc0SDimitry Andric {{"fr28"}, "f28"}, {{"fr29"}, "f29"}, {{"fr30"}, "f30"},
80704eeddc0SDimitry Andric {{"fr31"}, "f31"}, {{"cc"}, "cr0"},
8080b57cec5SDimitry Andric };
8090b57cec5SDimitry Andric
getGCCRegAliases() const8100b57cec5SDimitry Andric ArrayRef<TargetInfo::GCCRegAlias> PPCTargetInfo::getGCCRegAliases() const {
811bdd1243dSDimitry Andric return llvm::ArrayRef(GCCRegAliases);
8120b57cec5SDimitry Andric }
8130b57cec5SDimitry Andric
8145f757f3fSDimitry Andric // PPC ELFABIv2 DWARF Definition "Table 2.26. Mappings of Common Registers".
8150b57cec5SDimitry Andric // vs0 ~ vs31 is mapping to 32 - 63,
8160b57cec5SDimitry Andric // vs32 ~ vs63 is mapping to 77 - 108.
8175f757f3fSDimitry Andric // And this mapping applies to all OSes which run on powerpc.
8180b57cec5SDimitry Andric const TargetInfo::AddlRegName GCCAddlRegNames[] = {
8190b57cec5SDimitry Andric // Table of additional register names to use in user input.
8200b57cec5SDimitry Andric {{"vs0"}, 32}, {{"vs1"}, 33}, {{"vs2"}, 34}, {{"vs3"}, 35},
8210b57cec5SDimitry Andric {{"vs4"}, 36}, {{"vs5"}, 37}, {{"vs6"}, 38}, {{"vs7"}, 39},
8220b57cec5SDimitry Andric {{"vs8"}, 40}, {{"vs9"}, 41}, {{"vs10"}, 42}, {{"vs11"}, 43},
8230b57cec5SDimitry Andric {{"vs12"}, 44}, {{"vs13"}, 45}, {{"vs14"}, 46}, {{"vs15"}, 47},
8240b57cec5SDimitry Andric {{"vs16"}, 48}, {{"vs17"}, 49}, {{"vs18"}, 50}, {{"vs19"}, 51},
8250b57cec5SDimitry Andric {{"vs20"}, 52}, {{"vs21"}, 53}, {{"vs22"}, 54}, {{"vs23"}, 55},
8260b57cec5SDimitry Andric {{"vs24"}, 56}, {{"vs25"}, 57}, {{"vs26"}, 58}, {{"vs27"}, 59},
8270b57cec5SDimitry Andric {{"vs28"}, 60}, {{"vs29"}, 61}, {{"vs30"}, 62}, {{"vs31"}, 63},
8280b57cec5SDimitry Andric {{"vs32"}, 77}, {{"vs33"}, 78}, {{"vs34"}, 79}, {{"vs35"}, 80},
8290b57cec5SDimitry Andric {{"vs36"}, 81}, {{"vs37"}, 82}, {{"vs38"}, 83}, {{"vs39"}, 84},
8300b57cec5SDimitry Andric {{"vs40"}, 85}, {{"vs41"}, 86}, {{"vs42"}, 87}, {{"vs43"}, 88},
8310b57cec5SDimitry Andric {{"vs44"}, 89}, {{"vs45"}, 90}, {{"vs46"}, 91}, {{"vs47"}, 92},
8320b57cec5SDimitry Andric {{"vs48"}, 93}, {{"vs49"}, 94}, {{"vs50"}, 95}, {{"vs51"}, 96},
8330b57cec5SDimitry Andric {{"vs52"}, 97}, {{"vs53"}, 98}, {{"vs54"}, 99}, {{"vs55"}, 100},
8340b57cec5SDimitry Andric {{"vs56"}, 101}, {{"vs57"}, 102}, {{"vs58"}, 103}, {{"vs59"}, 104},
8350b57cec5SDimitry Andric {{"vs60"}, 105}, {{"vs61"}, 106}, {{"vs62"}, 107}, {{"vs63"}, 108},
8360b57cec5SDimitry Andric };
8370b57cec5SDimitry Andric
getGCCAddlRegNames() const8380b57cec5SDimitry Andric ArrayRef<TargetInfo::AddlRegName> PPCTargetInfo::getGCCAddlRegNames() const {
839bdd1243dSDimitry Andric return llvm::ArrayRef(GCCAddlRegNames);
8400b57cec5SDimitry Andric }
8410b57cec5SDimitry Andric
8420b57cec5SDimitry Andric static constexpr llvm::StringLiteral ValidCPUNames[] = {
8430b57cec5SDimitry Andric {"generic"}, {"440"}, {"450"}, {"601"}, {"602"},
8440b57cec5SDimitry Andric {"603"}, {"603e"}, {"603ev"}, {"604"}, {"604e"},
8450b57cec5SDimitry Andric {"620"}, {"630"}, {"g3"}, {"7400"}, {"g4"},
846f8e1cfadSDimitry Andric {"7450"}, {"g4+"}, {"750"}, {"8548"}, {"970"},
847e8d8bef9SDimitry Andric {"g5"}, {"a2"}, {"e500"}, {"e500mc"}, {"e5500"},
848e8d8bef9SDimitry Andric {"power3"}, {"pwr3"}, {"power4"}, {"pwr4"}, {"power5"},
849e8d8bef9SDimitry Andric {"pwr5"}, {"power5x"}, {"pwr5x"}, {"power6"}, {"pwr6"},
850e8d8bef9SDimitry Andric {"power6x"}, {"pwr6x"}, {"power7"}, {"pwr7"}, {"power8"},
851e8d8bef9SDimitry Andric {"pwr8"}, {"power9"}, {"pwr9"}, {"power10"}, {"pwr10"},
852fe6060f1SDimitry Andric {"powerpc"}, {"ppc"}, {"ppc32"}, {"powerpc64"}, {"ppc64"},
853fe6060f1SDimitry Andric {"powerpc64le"}, {"ppc64le"}, {"future"}};
8540b57cec5SDimitry Andric
isValidCPUName(StringRef Name) const8550b57cec5SDimitry Andric bool PPCTargetInfo::isValidCPUName(StringRef Name) const {
856349cc55cSDimitry Andric return llvm::is_contained(ValidCPUNames, Name);
8570b57cec5SDimitry Andric }
8580b57cec5SDimitry Andric
fillValidCPUList(SmallVectorImpl<StringRef> & Values) const8590b57cec5SDimitry Andric void PPCTargetInfo::fillValidCPUList(SmallVectorImpl<StringRef> &Values) const {
8600b57cec5SDimitry Andric Values.append(std::begin(ValidCPUNames), std::end(ValidCPUNames));
8610b57cec5SDimitry Andric }
8620b57cec5SDimitry Andric
adjust(DiagnosticsEngine & Diags,LangOptions & Opts)863fe6060f1SDimitry Andric void PPCTargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts) {
8640b57cec5SDimitry Andric if (HasAltivec)
8650b57cec5SDimitry Andric Opts.AltiVec = 1;
866fe6060f1SDimitry Andric TargetInfo::adjust(Diags, Opts);
8670b57cec5SDimitry Andric if (LongDoubleFormat != &llvm::APFloat::IEEEdouble())
8680b57cec5SDimitry Andric LongDoubleFormat = Opts.PPCIEEELongDouble
8690b57cec5SDimitry Andric ? &llvm::APFloat::IEEEquad()
8700b57cec5SDimitry Andric : &llvm::APFloat::PPCDoubleDouble();
871fe6060f1SDimitry Andric Opts.IEEE128 = 1;
872972a253aSDimitry Andric if (getTriple().isOSAIX() && Opts.EnableAIXQuadwordAtomicsABI &&
873972a253aSDimitry Andric HasQuadwordAtomics)
874972a253aSDimitry Andric MaxAtomicInlineWidth = 128;
8750b57cec5SDimitry Andric }
8760b57cec5SDimitry Andric
getTargetBuiltins() const8770b57cec5SDimitry Andric ArrayRef<Builtin::Info> PPCTargetInfo::getTargetBuiltins() const {
878bdd1243dSDimitry Andric return llvm::ArrayRef(BuiltinInfo,
879bdd1243dSDimitry Andric clang::PPC::LastTSBuiltin - Builtin::FirstTSBuiltin);
8800b57cec5SDimitry Andric }
881