1 //===-- EmulateInstructionMIPS64.h ------------------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #ifndef LLDB_SOURCE_PLUGINS_INSTRUCTION_MIPS64_EMULATEINSTRUCTIONMIPS64_H 10 #define LLDB_SOURCE_PLUGINS_INSTRUCTION_MIPS64_EMULATEINSTRUCTIONMIPS64_H 11 12 #include "lldb/Core/EmulateInstruction.h" 13 #include "lldb/Interpreter/OptionValue.h" 14 #include "lldb/Utility/Status.h" 15 16 namespace llvm { 17 class MCDisassembler; 18 class MCSubtargetInfo; 19 class MCRegisterInfo; 20 class MCAsmInfo; 21 class MCContext; 22 class MCInstrInfo; 23 class MCInst; 24 } // namespace llvm 25 26 class EmulateInstructionMIPS64 : public lldb_private::EmulateInstruction { 27 public: 28 EmulateInstructionMIPS64(const lldb_private::ArchSpec &arch); 29 30 static void Initialize(); 31 32 static void Terminate(); 33 34 static llvm::StringRef GetPluginNameStatic() { return "mips64"; } 35 36 static llvm::StringRef GetPluginDescriptionStatic(); 37 38 static lldb_private::EmulateInstruction * 39 CreateInstance(const lldb_private::ArchSpec &arch, 40 lldb_private::InstructionType inst_type); 41 42 static bool SupportsEmulatingInstructionsOfTypeStatic( 43 lldb_private::InstructionType inst_type) { 44 switch (inst_type) { 45 case lldb_private::eInstructionTypeAny: 46 case lldb_private::eInstructionTypePrologueEpilogue: 47 case lldb_private::eInstructionTypePCModifying: 48 return true; 49 50 case lldb_private::eInstructionTypeAll: 51 return false; 52 } 53 return false; 54 } 55 56 llvm::StringRef GetPluginName() override { return GetPluginNameStatic(); } 57 58 bool SetTargetTriple(const lldb_private::ArchSpec &arch) override; 59 60 bool SupportsEmulatingInstructionsOfType( 61 lldb_private::InstructionType inst_type) override { 62 return SupportsEmulatingInstructionsOfTypeStatic(inst_type); 63 } 64 65 bool ReadInstruction() override; 66 67 bool EvaluateInstruction(uint32_t evaluate_options) override; 68 69 bool TestEmulation(lldb_private::Stream *out_stream, 70 lldb_private::ArchSpec &arch, 71 lldb_private::OptionValueDictionary *test_data) override { 72 return false; 73 } 74 75 bool GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num, 76 lldb_private::RegisterInfo ®_info) override; 77 78 bool 79 CreateFunctionEntryUnwind(lldb_private::UnwindPlan &unwind_plan) override; 80 81 protected: 82 typedef struct { 83 const char *op_name; 84 bool (EmulateInstructionMIPS64::*callback)(llvm::MCInst &insn); 85 const char *insn_name; 86 } MipsOpcode; 87 88 static MipsOpcode *GetOpcodeForInstruction(llvm::StringRef op_name); 89 90 bool Emulate_DADDiu(llvm::MCInst &insn); 91 92 bool Emulate_DSUBU_DADDU(llvm::MCInst &insn); 93 94 bool Emulate_LUI(llvm::MCInst &insn); 95 96 bool Emulate_SD(llvm::MCInst &insn); 97 98 bool Emulate_LD(llvm::MCInst &insn); 99 100 bool Emulate_LDST_Imm(llvm::MCInst &insn); 101 102 bool Emulate_LDST_Reg(llvm::MCInst &insn); 103 104 bool Emulate_BXX_3ops(llvm::MCInst &insn); 105 106 bool Emulate_BXX_3ops_C(llvm::MCInst &insn); 107 108 bool Emulate_BXX_2ops(llvm::MCInst &insn); 109 110 bool Emulate_BXX_2ops_C(llvm::MCInst &insn); 111 112 bool Emulate_Bcond_Link_C(llvm::MCInst &insn); 113 114 bool Emulate_Bcond_Link(llvm::MCInst &insn); 115 116 bool Emulate_FP_branch(llvm::MCInst &insn); 117 118 bool Emulate_3D_branch(llvm::MCInst &insn); 119 120 bool Emulate_BAL(llvm::MCInst &insn); 121 122 bool Emulate_BALC(llvm::MCInst &insn); 123 124 bool Emulate_BC(llvm::MCInst &insn); 125 126 bool Emulate_J(llvm::MCInst &insn); 127 128 bool Emulate_JAL(llvm::MCInst &insn); 129 130 bool Emulate_JALR(llvm::MCInst &insn); 131 132 bool Emulate_JIALC(llvm::MCInst &insn); 133 134 bool Emulate_JIC(llvm::MCInst &insn); 135 136 bool Emulate_JR(llvm::MCInst &insn); 137 138 bool Emulate_BC1EQZ(llvm::MCInst &insn); 139 140 bool Emulate_BC1NEZ(llvm::MCInst &insn); 141 142 bool Emulate_BNZB(llvm::MCInst &insn); 143 144 bool Emulate_BNZH(llvm::MCInst &insn); 145 146 bool Emulate_BNZW(llvm::MCInst &insn); 147 148 bool Emulate_BNZD(llvm::MCInst &insn); 149 150 bool Emulate_BZB(llvm::MCInst &insn); 151 152 bool Emulate_BZH(llvm::MCInst &insn); 153 154 bool Emulate_BZW(llvm::MCInst &insn); 155 156 bool Emulate_BZD(llvm::MCInst &insn); 157 158 bool Emulate_MSA_Branch_DF(llvm::MCInst &insn, int element_byte_size, 159 bool bnz); 160 161 bool Emulate_BNZV(llvm::MCInst &insn); 162 163 bool Emulate_BZV(llvm::MCInst &insn); 164 165 bool Emulate_MSA_Branch_V(llvm::MCInst &insn, bool bnz); 166 167 bool nonvolatile_reg_p(uint64_t regnum); 168 169 const char *GetRegisterName(unsigned reg_num, bool alternate_name); 170 171 private: 172 std::unique_ptr<llvm::MCDisassembler> m_disasm; 173 std::unique_ptr<llvm::MCSubtargetInfo> m_subtype_info; 174 std::unique_ptr<llvm::MCRegisterInfo> m_reg_info; 175 std::unique_ptr<llvm::MCAsmInfo> m_asm_info; 176 std::unique_ptr<llvm::MCContext> m_context; 177 std::unique_ptr<llvm::MCInstrInfo> m_insn_info; 178 }; 179 180 #endif // LLDB_SOURCE_PLUGINS_INSTRUCTION_MIPS64_EMULATEINSTRUCTIONMIPS64_H 181