1 //===-- RegisterInfos_x86_64.h ----------------------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 // This file is meant to be textually included. Do not #include modular 10 // headers here. 11 12 // Computes the offset of the given GPR in the user data area. 13 #define GPR_OFFSET(regname) (LLVM_EXTENSION offsetof(GPR, regname)) 14 15 // Computes the offset of the given FPR in the extended data area. 16 #define FPR_OFFSET(regname) \ 17 (LLVM_EXTENSION offsetof(UserArea, fpr) + \ 18 LLVM_EXTENSION offsetof(FPR, fxsave) + \ 19 LLVM_EXTENSION offsetof(FXSAVE, regname)) 20 21 // Computes the offset of the YMM register assembled from register halves. 22 // Based on DNBArchImplX86_64.cpp from debugserver 23 #define YMM_OFFSET(reg_index) \ 24 (LLVM_EXTENSION offsetof(UserArea, fpr) + \ 25 LLVM_EXTENSION offsetof(FPR, xsave) + \ 26 LLVM_EXTENSION offsetof(XSAVE, ymmh[0]) + (32 * reg_index)) 27 28 // Guarantees BNDR/BNDC offsets do not overlap with YMM offsets. 29 #define GDB_REMOTE_OFFSET 128 30 31 #define BNDR_OFFSET(reg_index) \ 32 (LLVM_EXTENSION offsetof(UserArea, fpr) + \ 33 LLVM_EXTENSION offsetof(FPR, xsave) + \ 34 LLVM_EXTENSION offsetof(XSAVE, mpxr[reg_index]) + GDB_REMOTE_OFFSET) 35 36 #define BNDC_OFFSET(reg_index) \ 37 (LLVM_EXTENSION offsetof(UserArea, fpr) + \ 38 LLVM_EXTENSION offsetof(FPR, xsave) + \ 39 LLVM_EXTENSION offsetof(XSAVE, mpxc[reg_index]) + GDB_REMOTE_OFFSET) 40 41 #ifdef DECLARE_REGISTER_INFOS_X86_64_STRUCT 42 43 // Number of bytes needed to represent a FPR. 44 #define FPR_SIZE(reg) sizeof(((FXSAVE *)nullptr)->reg) 45 46 // Number of bytes needed to represent the i'th FP register. 47 #define FP_SIZE sizeof(((MMSReg *)nullptr)->bytes) 48 49 // Number of bytes needed to represent an XMM register. 50 #define XMM_SIZE sizeof(XMMReg) 51 52 // Number of bytes needed to represent a YMM register. 53 #define YMM_SIZE sizeof(YMMReg) 54 55 // Number of bytes needed to represent MPX registers. 56 #define BNDR_SIZE sizeof(MPXReg) 57 #define BNDC_SIZE sizeof(MPXCsr) 58 59 #define DR_SIZE sizeof(((DBG *)nullptr)->dr[0]) 60 61 // RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB 62 63 // Note that the size and offset will be updated by platform-specific classes. 64 #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \ 65 { \ 66 #reg, alt, sizeof(((GPR *)nullptr)->reg), \ 67 GPR_OFFSET(reg), eEncodingUint, eFormatHex, \ 68 {kind1, kind2, kind3, kind4, \ 69 lldb_##reg##_x86_64 }, \ 70 nullptr, nullptr, nullptr, 0 \ 71 } 72 73 #define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4) \ 74 { \ 75 #name, nullptr, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, eFormatHex, \ 76 {kind1, kind2, kind3, kind4, \ 77 lldb_##name##_x86_64 }, \ 78 nullptr, nullptr, nullptr, 0 \ 79 } 80 81 #define DEFINE_FP_ST(reg, i) \ 82 { \ 83 #reg #i, nullptr, FP_SIZE, \ 84 LLVM_EXTENSION FPR_OFFSET( \ 85 stmm[i]), eEncodingVector, eFormatVectorOfUInt8, \ 86 {dwarf_st##i##_x86_64, dwarf_st##i##_x86_64, LLDB_INVALID_REGNUM, \ 87 LLDB_INVALID_REGNUM, lldb_st##i##_x86_64 }, \ 88 nullptr, nullptr, nullptr, 0 \ 89 } 90 91 #define DEFINE_FP_MM(reg, i, streg) \ 92 { \ 93 #reg #i, nullptr, sizeof(uint64_t), LLVM_EXTENSION FPR_OFFSET(stmm[i]), \ 94 eEncodingUint, eFormatHex, \ 95 {dwarf_mm##i##_x86_64, dwarf_mm##i##_x86_64, LLDB_INVALID_REGNUM, \ 96 LLDB_INVALID_REGNUM, lldb_mm##i##_x86_64 }, \ 97 RegisterContextPOSIX_x86::g_contained_##streg##_64, \ 98 RegisterContextPOSIX_x86::g_invalidate_##streg##_64, nullptr, 0 \ 99 } 100 101 #define DEFINE_XMM(reg, i) \ 102 { \ 103 #reg #i, nullptr, XMM_SIZE, \ 104 LLVM_EXTENSION FPR_OFFSET( \ 105 reg[i]), eEncodingVector, eFormatVectorOfUInt8, \ 106 {dwarf_##reg##i##_x86_64, dwarf_##reg##i##_x86_64, \ 107 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 108 lldb_##reg##i##_x86_64 }, \ 109 nullptr, nullptr, nullptr, 0 \ 110 } 111 112 #define DEFINE_YMM(reg, i) \ 113 { \ 114 #reg #i, nullptr, YMM_SIZE, \ 115 LLVM_EXTENSION YMM_OFFSET(i), eEncodingVector, eFormatVectorOfUInt8, \ 116 {dwarf_##reg##i##h_x86_64, \ 117 dwarf_##reg##i##h_x86_64, \ 118 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 119 lldb_##reg##i##_x86_64 }, \ 120 nullptr, nullptr, nullptr, 0 \ 121 } 122 123 #define DEFINE_BNDR(reg, i) \ 124 { \ 125 #reg #i, nullptr, BNDR_SIZE, \ 126 LLVM_EXTENSION BNDR_OFFSET(i), eEncodingVector, eFormatVectorOfUInt64, \ 127 {dwarf_##reg##i##_x86_64, \ 128 dwarf_##reg##i##_x86_64, \ 129 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 130 lldb_##reg##i##_x86_64 }, \ 131 nullptr, nullptr, nullptr, 0 \ 132 } 133 134 #define DEFINE_BNDC(name, i) \ 135 { \ 136 #name, nullptr, BNDC_SIZE, \ 137 LLVM_EXTENSION BNDC_OFFSET(i), eEncodingVector, eFormatVectorOfUInt8, \ 138 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 139 LLDB_INVALID_REGNUM, lldb_##name##_x86_64 }, \ 140 nullptr, nullptr, nullptr, 0 \ 141 } 142 143 #define DEFINE_DR(reg, i) \ 144 { \ 145 #reg #i, nullptr, DR_SIZE, \ 146 DR_OFFSET(i), eEncodingUint, eFormatHex, \ 147 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 148 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 149 lldb_##reg##i##_x86_64 }, \ 150 nullptr, nullptr, nullptr, 0 \ 151 } 152 153 #define DEFINE_GPR_PSEUDO_32(reg32, reg64) \ 154 { \ 155 #reg32, nullptr, 4, \ 156 GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \ 157 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 158 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 159 lldb_##reg32##_x86_64 }, \ 160 RegisterContextPOSIX_x86::g_contained_##reg64, \ 161 RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \ 162 } 163 164 #define DEFINE_GPR_PSEUDO_16(reg16, reg64) \ 165 { \ 166 #reg16, nullptr, 2, \ 167 GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \ 168 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 169 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 170 lldb_##reg16##_x86_64 }, \ 171 RegisterContextPOSIX_x86::g_contained_##reg64, \ 172 RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \ 173 } 174 175 #define DEFINE_GPR_PSEUDO_8H(reg8, reg64) \ 176 { \ 177 #reg8, nullptr, 1, \ 178 GPR_OFFSET(reg64) + 1, eEncodingUint, eFormatHex, \ 179 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 180 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 181 lldb_##reg8##_x86_64 }, \ 182 RegisterContextPOSIX_x86::g_contained_##reg64, \ 183 RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \ 184 } 185 186 #define DEFINE_GPR_PSEUDO_8L(reg8, reg64) \ 187 { \ 188 #reg8, nullptr, 1, \ 189 GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \ 190 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 191 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 192 lldb_##reg8##_x86_64 }, \ 193 RegisterContextPOSIX_x86::g_contained_##reg64, \ 194 RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \ 195 } 196 197 #define DEFINE_FPR_32(name, reg, kind1, kind2, kind3, kind4, reg64) \ 198 { \ 199 #name, nullptr, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, eFormatHex, \ 200 {kind1, kind2, kind3, kind4, lldb_##name##_x86_64 }, \ 201 RegisterContextPOSIX_x86::g_contained_##reg64, \ 202 RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \ 203 } 204 205 // clang-format off 206 static RegisterInfo g_register_infos_x86_64[] = { 207 // General purpose registers EH_Frame DWARF Generic Process Plugin 208 // =========================== ================== ================ ========================= ==================== 209 DEFINE_GPR(rax, nullptr, dwarf_rax_x86_64, dwarf_rax_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 210 DEFINE_GPR(rbx, nullptr, dwarf_rbx_x86_64, dwarf_rbx_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 211 DEFINE_GPR(rcx, "arg4", dwarf_rcx_x86_64, dwarf_rcx_x86_64, LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM), 212 DEFINE_GPR(rdx, "arg3", dwarf_rdx_x86_64, dwarf_rdx_x86_64, LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM), 213 DEFINE_GPR(rdi, "arg1", dwarf_rdi_x86_64, dwarf_rdi_x86_64, LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM), 214 DEFINE_GPR(rsi, "arg2", dwarf_rsi_x86_64, dwarf_rsi_x86_64, LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM), 215 DEFINE_GPR(rbp, "fp", dwarf_rbp_x86_64, dwarf_rbp_x86_64, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM), 216 DEFINE_GPR(rsp, "sp", dwarf_rsp_x86_64, dwarf_rsp_x86_64, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM), 217 DEFINE_GPR(r8, "arg5", dwarf_r8_x86_64, dwarf_r8_x86_64, LLDB_REGNUM_GENERIC_ARG5, LLDB_INVALID_REGNUM), 218 DEFINE_GPR(r9, "arg6", dwarf_r9_x86_64, dwarf_r9_x86_64, LLDB_REGNUM_GENERIC_ARG6, LLDB_INVALID_REGNUM), 219 DEFINE_GPR(r10, nullptr, dwarf_r10_x86_64, dwarf_r10_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 220 DEFINE_GPR(r11, nullptr, dwarf_r11_x86_64, dwarf_r11_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 221 DEFINE_GPR(r12, nullptr, dwarf_r12_x86_64, dwarf_r12_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 222 DEFINE_GPR(r13, nullptr, dwarf_r13_x86_64, dwarf_r13_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 223 DEFINE_GPR(r14, nullptr, dwarf_r14_x86_64, dwarf_r14_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 224 DEFINE_GPR(r15, nullptr, dwarf_r15_x86_64, dwarf_r15_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 225 DEFINE_GPR(rip, "pc", dwarf_rip_x86_64, dwarf_rip_x86_64, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM), 226 DEFINE_GPR(rflags, "flags", dwarf_rflags_x86_64, dwarf_rflags_x86_64, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM), 227 DEFINE_GPR(cs, nullptr, dwarf_cs_x86_64, dwarf_cs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 228 DEFINE_GPR(fs, nullptr, dwarf_fs_x86_64, dwarf_fs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 229 DEFINE_GPR(gs, nullptr, dwarf_gs_x86_64, dwarf_gs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 230 DEFINE_GPR(ss, nullptr, dwarf_ss_x86_64, dwarf_ss_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 231 DEFINE_GPR(ds, nullptr, dwarf_ds_x86_64, dwarf_ds_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 232 DEFINE_GPR(es, nullptr, dwarf_es_x86_64, dwarf_es_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 233 234 DEFINE_GPR_PSEUDO_32(eax, rax), DEFINE_GPR_PSEUDO_32(ebx, rbx), 235 DEFINE_GPR_PSEUDO_32(ecx, rcx), DEFINE_GPR_PSEUDO_32(edx, rdx), 236 DEFINE_GPR_PSEUDO_32(edi, rdi), DEFINE_GPR_PSEUDO_32(esi, rsi), 237 DEFINE_GPR_PSEUDO_32(ebp, rbp), DEFINE_GPR_PSEUDO_32(esp, rsp), 238 DEFINE_GPR_PSEUDO_32(r8d, r8), DEFINE_GPR_PSEUDO_32(r9d, r9), 239 DEFINE_GPR_PSEUDO_32(r10d, r10), DEFINE_GPR_PSEUDO_32(r11d, r11), 240 DEFINE_GPR_PSEUDO_32(r12d, r12), DEFINE_GPR_PSEUDO_32(r13d, r13), 241 DEFINE_GPR_PSEUDO_32(r14d, r14), DEFINE_GPR_PSEUDO_32(r15d, r15), 242 DEFINE_GPR_PSEUDO_16(ax, rax), DEFINE_GPR_PSEUDO_16(bx, rbx), 243 DEFINE_GPR_PSEUDO_16(cx, rcx), DEFINE_GPR_PSEUDO_16(dx, rdx), 244 DEFINE_GPR_PSEUDO_16(di, rdi), DEFINE_GPR_PSEUDO_16(si, rsi), 245 DEFINE_GPR_PSEUDO_16(bp, rbp), DEFINE_GPR_PSEUDO_16(sp, rsp), 246 DEFINE_GPR_PSEUDO_16(r8w, r8), DEFINE_GPR_PSEUDO_16(r9w, r9), 247 DEFINE_GPR_PSEUDO_16(r10w, r10), DEFINE_GPR_PSEUDO_16(r11w, r11), 248 DEFINE_GPR_PSEUDO_16(r12w, r12), DEFINE_GPR_PSEUDO_16(r13w, r13), 249 DEFINE_GPR_PSEUDO_16(r14w, r14), DEFINE_GPR_PSEUDO_16(r15w, r15), 250 DEFINE_GPR_PSEUDO_8H(ah, rax), DEFINE_GPR_PSEUDO_8H(bh, rbx), 251 DEFINE_GPR_PSEUDO_8H(ch, rcx), DEFINE_GPR_PSEUDO_8H(dh, rdx), 252 DEFINE_GPR_PSEUDO_8L(al, rax), DEFINE_GPR_PSEUDO_8L(bl, rbx), 253 DEFINE_GPR_PSEUDO_8L(cl, rcx), DEFINE_GPR_PSEUDO_8L(dl, rdx), 254 DEFINE_GPR_PSEUDO_8L(dil, rdi), DEFINE_GPR_PSEUDO_8L(sil, rsi), 255 DEFINE_GPR_PSEUDO_8L(bpl, rbp), DEFINE_GPR_PSEUDO_8L(spl, rsp), 256 DEFINE_GPR_PSEUDO_8L(r8l, r8), DEFINE_GPR_PSEUDO_8L(r9l, r9), 257 DEFINE_GPR_PSEUDO_8L(r10l, r10), DEFINE_GPR_PSEUDO_8L(r11l, r11), 258 DEFINE_GPR_PSEUDO_8L(r12l, r12), DEFINE_GPR_PSEUDO_8L(r13l, r13), 259 DEFINE_GPR_PSEUDO_8L(r14l, r14), DEFINE_GPR_PSEUDO_8L(r15l, r15), 260 261 // i387 Floating point registers. EH_frame DWARF Generic Process Plugin reg64 262 // ====================================== =============== ================== =================== ==================== ===== 263 DEFINE_FPR(fctrl, fctrl, dwarf_fctrl_x86_64, dwarf_fctrl_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 264 DEFINE_FPR(fstat, fstat, dwarf_fstat_x86_64, dwarf_fstat_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 265 DEFINE_FPR(ftag, ftag, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 266 DEFINE_FPR(fop, fop, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 267 DEFINE_FPR_32(fiseg, ptr.i386_.fiseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fip), 268 DEFINE_FPR_32(fioff, ptr.i386_.fioff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fip), 269 DEFINE_FPR(fip, ptr.x86_64.fip, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 270 DEFINE_FPR_32(foseg, ptr.i386_.foseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fdp), 271 DEFINE_FPR_32(fooff, ptr.i386_.fooff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fdp), 272 DEFINE_FPR(fdp, ptr.x86_64.fdp, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 273 DEFINE_FPR(mxcsr, mxcsr, dwarf_mxcsr_x86_64, dwarf_mxcsr_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 274 DEFINE_FPR(mxcsrmask, mxcsrmask, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 275 276 // FP registers. 277 DEFINE_FP_ST(st, 0), DEFINE_FP_ST(st, 1), DEFINE_FP_ST(st, 2), 278 DEFINE_FP_ST(st, 3), DEFINE_FP_ST(st, 4), DEFINE_FP_ST(st, 5), 279 DEFINE_FP_ST(st, 6), DEFINE_FP_ST(st, 7), 280 281 DEFINE_FP_MM(mm, 0, st0), DEFINE_FP_MM(mm, 1, st1), 282 DEFINE_FP_MM(mm, 2, st2), DEFINE_FP_MM(mm, 3, st3), 283 DEFINE_FP_MM(mm, 4, st4), DEFINE_FP_MM(mm, 5, st5), 284 DEFINE_FP_MM(mm, 6, st6), DEFINE_FP_MM(mm, 7, st7), 285 286 // XMM registers 287 DEFINE_XMM(xmm, 0), DEFINE_XMM(xmm, 1), DEFINE_XMM(xmm, 2), 288 DEFINE_XMM(xmm, 3), DEFINE_XMM(xmm, 4), DEFINE_XMM(xmm, 5), 289 DEFINE_XMM(xmm, 6), DEFINE_XMM(xmm, 7), DEFINE_XMM(xmm, 8), 290 DEFINE_XMM(xmm, 9), DEFINE_XMM(xmm, 10), DEFINE_XMM(xmm, 11), 291 DEFINE_XMM(xmm, 12), DEFINE_XMM(xmm, 13), DEFINE_XMM(xmm, 14), 292 DEFINE_XMM(xmm, 15), 293 294 // Copy of YMM registers assembled from xmm and ymmh 295 DEFINE_YMM(ymm, 0), DEFINE_YMM(ymm, 1), DEFINE_YMM(ymm, 2), 296 DEFINE_YMM(ymm, 3), DEFINE_YMM(ymm, 4), DEFINE_YMM(ymm, 5), 297 DEFINE_YMM(ymm, 6), DEFINE_YMM(ymm, 7), DEFINE_YMM(ymm, 8), 298 DEFINE_YMM(ymm, 9), DEFINE_YMM(ymm, 10), DEFINE_YMM(ymm, 11), 299 DEFINE_YMM(ymm, 12), DEFINE_YMM(ymm, 13), DEFINE_YMM(ymm, 14), 300 DEFINE_YMM(ymm, 15), 301 302 // MPX registers 303 DEFINE_BNDR(bnd, 0), 304 DEFINE_BNDR(bnd, 1), 305 DEFINE_BNDR(bnd, 2), 306 DEFINE_BNDR(bnd, 3), 307 308 DEFINE_BNDC(bndcfgu, 0), 309 DEFINE_BNDC(bndstatus, 1), 310 311 // Debug registers for lldb internal use 312 DEFINE_DR(dr, 0), DEFINE_DR(dr, 1), DEFINE_DR(dr, 2), DEFINE_DR(dr, 3), 313 DEFINE_DR(dr, 4), DEFINE_DR(dr, 5), DEFINE_DR(dr, 6), DEFINE_DR(dr, 7)}; 314 315 // clang-format on 316 317 static_assert((sizeof(g_register_infos_x86_64) / 318 sizeof(g_register_infos_x86_64[0])) == k_num_registers_x86_64, 319 "g_register_infos_x86_64 has wrong number of register infos"); 320 321 #undef FPR_SIZE 322 #undef FP_SIZE 323 #undef XMM_SIZE 324 #undef YMM_SIZE 325 #undef DEFINE_GPR 326 #undef DEFINE_FPR 327 #undef DEFINE_FP 328 #undef DEFINE_XMM 329 #undef DEFINE_YMM 330 #undef DEFINE_BNDR 331 #undef DEFINE_BNDC 332 #undef DEFINE_DR 333 #undef DEFINE_GPR_PSEUDO_32 334 #undef DEFINE_GPR_PSEUDO_16 335 #undef DEFINE_GPR_PSEUDO_8H 336 #undef DEFINE_GPR_PSEUDO_8L 337 338 #endif // DECLARE_REGISTER_INFOS_X86_64_STRUCT 339 340 #ifdef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS 341 342 #define UPDATE_GPR_INFO(reg, reg64) \ 343 do { \ 344 g_register_infos[lldb_##reg##_i386].byte_offset = GPR_OFFSET(reg64); \ 345 } while (false); 346 347 #define UPDATE_GPR_INFO_8H(reg, reg64) \ 348 do { \ 349 g_register_infos[lldb_##reg##_i386].byte_offset = GPR_OFFSET(reg64) + 1; \ 350 } while (false); 351 352 #define UPDATE_FPR_INFO(reg, reg64) \ 353 do { \ 354 g_register_infos[lldb_##reg##_i386].byte_offset = FPR_OFFSET(reg64); \ 355 } while (false); 356 357 #define UPDATE_FP_INFO(reg, i) \ 358 do { \ 359 g_register_infos[lldb_##reg##i##_i386].byte_offset = FPR_OFFSET(stmm[i]); \ 360 } while (false); 361 362 #define UPDATE_XMM_INFO(reg, i) \ 363 do { \ 364 g_register_infos[lldb_##reg##i##_i386].byte_offset = FPR_OFFSET(reg[i]); \ 365 } while (false); 366 367 #define UPDATE_YMM_INFO(reg, i) \ 368 do { \ 369 g_register_infos[lldb_##reg##i##_i386].byte_offset = YMM_OFFSET(i); \ 370 } while (false); 371 372 #define UPDATE_DR_INFO(reg_index) \ 373 do { \ 374 g_register_infos[lldb_dr##reg_index##_i386].byte_offset = \ 375 DR_OFFSET(reg_index); \ 376 } while (false); 377 378 // Update the register offsets 379 UPDATE_GPR_INFO(eax, rax); 380 UPDATE_GPR_INFO(ebx, rbx); 381 UPDATE_GPR_INFO(ecx, rcx); 382 UPDATE_GPR_INFO(edx, rdx); 383 UPDATE_GPR_INFO(edi, rdi); 384 UPDATE_GPR_INFO(esi, rsi); 385 UPDATE_GPR_INFO(ebp, rbp); 386 UPDATE_GPR_INFO(esp, rsp); 387 UPDATE_GPR_INFO(eip, rip); 388 UPDATE_GPR_INFO(eflags, rflags); 389 UPDATE_GPR_INFO(cs, cs); 390 UPDATE_GPR_INFO(fs, fs); 391 UPDATE_GPR_INFO(gs, gs); 392 UPDATE_GPR_INFO(ss, ss); 393 UPDATE_GPR_INFO(ds, ds); 394 UPDATE_GPR_INFO(es, es); 395 396 UPDATE_GPR_INFO(ax, rax); 397 UPDATE_GPR_INFO(bx, rbx); 398 UPDATE_GPR_INFO(cx, rcx); 399 UPDATE_GPR_INFO(dx, rdx); 400 UPDATE_GPR_INFO(di, rdi); 401 UPDATE_GPR_INFO(si, rsi); 402 UPDATE_GPR_INFO(bp, rbp); 403 UPDATE_GPR_INFO(sp, rsp); 404 UPDATE_GPR_INFO_8H(ah, rax); 405 UPDATE_GPR_INFO_8H(bh, rbx); 406 UPDATE_GPR_INFO_8H(ch, rcx); 407 UPDATE_GPR_INFO_8H(dh, rdx); 408 UPDATE_GPR_INFO(al, rax); 409 UPDATE_GPR_INFO(bl, rbx); 410 UPDATE_GPR_INFO(cl, rcx); 411 UPDATE_GPR_INFO(dl, rdx); 412 413 UPDATE_FPR_INFO(fctrl, fctrl); 414 UPDATE_FPR_INFO(fstat, fstat); 415 UPDATE_FPR_INFO(ftag, ftag); 416 UPDATE_FPR_INFO(fop, fop); 417 UPDATE_FPR_INFO(fiseg, ptr.i386_.fiseg); 418 UPDATE_FPR_INFO(fioff, ptr.i386_.fioff); 419 UPDATE_FPR_INFO(fooff, ptr.i386_.fooff); 420 UPDATE_FPR_INFO(foseg, ptr.i386_.foseg); 421 UPDATE_FPR_INFO(mxcsr, mxcsr); 422 UPDATE_FPR_INFO(mxcsrmask, mxcsrmask); 423 424 UPDATE_FP_INFO(st, 0); 425 UPDATE_FP_INFO(st, 1); 426 UPDATE_FP_INFO(st, 2); 427 UPDATE_FP_INFO(st, 3); 428 UPDATE_FP_INFO(st, 4); 429 UPDATE_FP_INFO(st, 5); 430 UPDATE_FP_INFO(st, 6); 431 UPDATE_FP_INFO(st, 7); 432 UPDATE_FP_INFO(mm, 0); 433 UPDATE_FP_INFO(mm, 1); 434 UPDATE_FP_INFO(mm, 2); 435 UPDATE_FP_INFO(mm, 3); 436 UPDATE_FP_INFO(mm, 4); 437 UPDATE_FP_INFO(mm, 5); 438 UPDATE_FP_INFO(mm, 6); 439 UPDATE_FP_INFO(mm, 7); 440 441 UPDATE_XMM_INFO(xmm, 0); 442 UPDATE_XMM_INFO(xmm, 1); 443 UPDATE_XMM_INFO(xmm, 2); 444 UPDATE_XMM_INFO(xmm, 3); 445 UPDATE_XMM_INFO(xmm, 4); 446 UPDATE_XMM_INFO(xmm, 5); 447 UPDATE_XMM_INFO(xmm, 6); 448 UPDATE_XMM_INFO(xmm, 7); 449 450 UPDATE_YMM_INFO(ymm, 0); 451 UPDATE_YMM_INFO(ymm, 1); 452 UPDATE_YMM_INFO(ymm, 2); 453 UPDATE_YMM_INFO(ymm, 3); 454 UPDATE_YMM_INFO(ymm, 4); 455 UPDATE_YMM_INFO(ymm, 5); 456 UPDATE_YMM_INFO(ymm, 6); 457 UPDATE_YMM_INFO(ymm, 7); 458 459 UPDATE_DR_INFO(0); 460 UPDATE_DR_INFO(1); 461 UPDATE_DR_INFO(2); 462 UPDATE_DR_INFO(3); 463 UPDATE_DR_INFO(4); 464 UPDATE_DR_INFO(5); 465 UPDATE_DR_INFO(6); 466 UPDATE_DR_INFO(7); 467 468 #undef UPDATE_GPR_INFO 469 #undef UPDATE_GPR_INFO_8H 470 #undef UPDATE_FPR_INFO 471 #undef UPDATE_FP_INFO 472 #undef UPDATE_XMM_INFO 473 #undef UPDATE_YMM_INFO 474 #undef UPDATE_DR_INFO 475 476 #endif // UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS 477 478 #undef GPR_OFFSET 479 #undef FPR_OFFSET 480 #undef YMM_OFFSET 481