1 //===- llvm/CodeGen/GlobalISel/CallLowering.h - Call lowering ---*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file describes how to lower LLVM calls to machine code calls.
11 ///
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_GLOBALISEL_CALLLOWERING_H
15 #define LLVM_CODEGEN_GLOBALISEL_CALLLOWERING_H
16 
17 #include "llvm/ADT/ArrayRef.h"
18 #include "llvm/ADT/SmallVector.h"
19 #include "llvm/CodeGen/CallingConvLower.h"
20 #include "llvm/CodeGen/MachineOperand.h"
21 #include "llvm/CodeGen/TargetCallingConv.h"
22 #include "llvm/IR/CallingConv.h"
23 #include "llvm/IR/Type.h"
24 #include "llvm/IR/Value.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Support/LowLevelTypeImpl.h"
27 #include "llvm/Support/MachineValueType.h"
28 #include <cstdint>
29 #include <functional>
30 
31 namespace llvm {
32 
33 class AttributeList;
34 class CallBase;
35 class DataLayout;
36 class Function;
37 class FunctionLoweringInfo;
38 class MachineIRBuilder;
39 class MachineFunction;
40 struct MachinePointerInfo;
41 class MachineRegisterInfo;
42 class TargetLowering;
43 
44 class CallLowering {
45   const TargetLowering *TLI;
46 
47   virtual void anchor();
48 public:
49   struct BaseArgInfo {
50     Type *Ty;
51     SmallVector<ISD::ArgFlagsTy, 4> Flags;
52     bool IsFixed;
53 
54     BaseArgInfo(Type *Ty,
55                 ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>(),
56                 bool IsFixed = true)
57         : Ty(Ty), Flags(Flags.begin(), Flags.end()), IsFixed(IsFixed) {}
58 
59     BaseArgInfo() : Ty(nullptr), IsFixed(false) {}
60   };
61 
62   struct ArgInfo : public BaseArgInfo {
63     SmallVector<Register, 4> Regs;
64     // If the argument had to be split into multiple parts according to the
65     // target calling convention, then this contains the original vregs
66     // if the argument was an incoming arg.
67     SmallVector<Register, 2> OrigRegs;
68 
69     /// Optionally track the original IR value for the argument. This may not be
70     /// meaningful in all contexts. This should only be used on for forwarding
71     /// through to use for aliasing information in MachinePointerInfo for memory
72     /// arguments.
73     const Value *OrigValue = nullptr;
74 
75     /// Index original Function's argument.
76     unsigned OrigArgIndex;
77 
78     /// Sentinel value for implicit machine-level input arguments.
79     static const unsigned NoArgIndex = UINT_MAX;
80 
81     ArgInfo(ArrayRef<Register> Regs, Type *Ty, unsigned OrigIndex,
82             ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>(),
83             bool IsFixed = true, const Value *OrigValue = nullptr)
84         : BaseArgInfo(Ty, Flags, IsFixed), Regs(Regs.begin(), Regs.end()),
85           OrigValue(OrigValue), OrigArgIndex(OrigIndex) {
86       if (!Regs.empty() && Flags.empty())
87         this->Flags.push_back(ISD::ArgFlagsTy());
88       // FIXME: We should have just one way of saying "no register".
89       assert(((Ty->isVoidTy() || Ty->isEmptyTy()) ==
90               (Regs.empty() || Regs[0] == 0)) &&
91              "only void types should have no register");
92     }
93 
94     ArgInfo(ArrayRef<Register> Regs, const Value &OrigValue, unsigned OrigIndex,
95             ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>(),
96             bool IsFixed = true)
97       : ArgInfo(Regs, OrigValue.getType(), OrigIndex, Flags, IsFixed, &OrigValue) {}
98 
99     ArgInfo() = default;
100   };
101 
102   struct CallLoweringInfo {
103     /// Calling convention to be used for the call.
104     CallingConv::ID CallConv = CallingConv::C;
105 
106     /// Destination of the call. It should be either a register, globaladdress,
107     /// or externalsymbol.
108     MachineOperand Callee = MachineOperand::CreateImm(0);
109 
110     /// Descriptor for the return type of the function.
111     ArgInfo OrigRet;
112 
113     /// List of descriptors of the arguments passed to the function.
114     SmallVector<ArgInfo, 32> OrigArgs;
115 
116     /// Valid if the call has a swifterror inout parameter, and contains the
117     /// vreg that the swifterror should be copied into after the call.
118     Register SwiftErrorVReg;
119 
120     /// Original IR callsite corresponding to this call, if available.
121     const CallBase *CB = nullptr;
122 
123     MDNode *KnownCallees = nullptr;
124 
125     /// True if the call must be tail call optimized.
126     bool IsMustTailCall = false;
127 
128     /// True if the call passes all target-independent checks for tail call
129     /// optimization.
130     bool IsTailCall = false;
131 
132     /// True if the call was lowered as a tail call. This is consumed by the
133     /// legalizer. This allows the legalizer to lower libcalls as tail calls.
134     bool LoweredTailCall = false;
135 
136     /// True if the call is to a vararg function.
137     bool IsVarArg = false;
138 
139     /// True if the function's return value can be lowered to registers.
140     bool CanLowerReturn = true;
141 
142     /// VReg to hold the hidden sret parameter.
143     Register DemoteRegister;
144 
145     /// The stack index for sret demotion.
146     int DemoteStackIndex;
147   };
148 
149   /// Argument handling is mostly uniform between the four places that
150   /// make these decisions: function formal arguments, call
151   /// instruction args, call instruction returns and function
152   /// returns. However, once a decision has been made on where an
153   /// argument should go, exactly what happens can vary slightly. This
154   /// class abstracts the differences.
155   ///
156   /// ValueAssigner should not depend on any specific function state, and
157   /// only determine the types and locations for arguments.
158   struct ValueAssigner {
159     ValueAssigner(bool IsIncoming, CCAssignFn *AssignFn_,
160                   CCAssignFn *AssignFnVarArg_ = nullptr)
161         : AssignFn(AssignFn_), AssignFnVarArg(AssignFnVarArg_),
162           IsIncomingArgumentHandler(IsIncoming) {
163 
164       // Some targets change the handler depending on whether the call is
165       // varargs or not. If
166       if (!AssignFnVarArg)
167         AssignFnVarArg = AssignFn;
168     }
169 
170     virtual ~ValueAssigner() = default;
171 
172     /// Returns true if the handler is dealing with incoming arguments,
173     /// i.e. those that move values from some physical location to vregs.
174     bool isIncomingArgumentHandler() const {
175       return IsIncomingArgumentHandler;
176     }
177 
178     /// Wrap call to (typically tablegenerated CCAssignFn). This may be
179     /// overridden to track additional state information as arguments are
180     /// assigned or apply target specific hacks around the legacy
181     /// infrastructure.
182     virtual bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT,
183                            CCValAssign::LocInfo LocInfo, const ArgInfo &Info,
184                            ISD::ArgFlagsTy Flags, CCState &State) {
185       if (getAssignFn(State.isVarArg())(ValNo, ValVT, LocVT, LocInfo, Flags,
186                                         State))
187         return true;
188       StackOffset = State.getNextStackOffset();
189       return false;
190     }
191 
192     /// Assignment function to use for a general call.
193     CCAssignFn *AssignFn;
194 
195     /// Assignment function to use for a variadic call. This is usually the same
196     /// as AssignFn on most targets.
197     CCAssignFn *AssignFnVarArg;
198 
199     /// Stack offset for next argument. At the end of argument evaluation, this
200     /// is typically the total stack size.
201     uint64_t StackOffset = 0;
202 
203     /// Select the appropriate assignment function depending on whether this is
204     /// a variadic call.
205     CCAssignFn *getAssignFn(bool IsVarArg) const {
206       return IsVarArg ? AssignFnVarArg : AssignFn;
207     }
208 
209   private:
210     const bool IsIncomingArgumentHandler;
211     virtual void anchor();
212   };
213 
214   struct IncomingValueAssigner : public ValueAssigner {
215     IncomingValueAssigner(CCAssignFn *AssignFn_,
216                           CCAssignFn *AssignFnVarArg_ = nullptr)
217         : ValueAssigner(true, AssignFn_, AssignFnVarArg_) {}
218   };
219 
220   struct OutgoingValueAssigner : public ValueAssigner {
221     OutgoingValueAssigner(CCAssignFn *AssignFn_,
222                           CCAssignFn *AssignFnVarArg_ = nullptr)
223         : ValueAssigner(false, AssignFn_, AssignFnVarArg_) {}
224   };
225 
226   struct ValueHandler {
227     MachineIRBuilder &MIRBuilder;
228     MachineRegisterInfo &MRI;
229     const bool IsIncomingArgumentHandler;
230 
231     ValueHandler(bool IsIncoming, MachineIRBuilder &MIRBuilder,
232                  MachineRegisterInfo &MRI)
233         : MIRBuilder(MIRBuilder), MRI(MRI),
234           IsIncomingArgumentHandler(IsIncoming) {}
235 
236     virtual ~ValueHandler() = default;
237 
238     /// Returns true if the handler is dealing with incoming arguments,
239     /// i.e. those that move values from some physical location to vregs.
240     bool isIncomingArgumentHandler() const {
241       return IsIncomingArgumentHandler;
242     }
243 
244     /// Materialize a VReg containing the address of the specified
245     /// stack-based object. This is either based on a FrameIndex or
246     /// direct SP manipulation, depending on the context. \p MPO
247     /// should be initialized to an appropriate description of the
248     /// address created.
249     virtual Register getStackAddress(uint64_t MemSize, int64_t Offset,
250                                      MachinePointerInfo &MPO,
251                                      ISD::ArgFlagsTy Flags) = 0;
252 
253     /// Return the in-memory size to write for the argument at \p VA. This may
254     /// be smaller than the allocated stack slot size.
255     ///
256     /// This is overridable primarily for targets to maintain compatibility with
257     /// hacks around the existing DAG call lowering infrastructure.
258     virtual LLT getStackValueStoreType(const DataLayout &DL,
259                                        const CCValAssign &VA,
260                                        ISD::ArgFlagsTy Flags) const;
261 
262     /// The specified value has been assigned to a physical register,
263     /// handle the appropriate COPY (either to or from) and mark any
264     /// relevant uses/defines as needed.
265     virtual void assignValueToReg(Register ValVReg, Register PhysReg,
266                                   CCValAssign VA) = 0;
267 
268     /// The specified value has been assigned to a stack
269     /// location. Load or store it there, with appropriate extension
270     /// if necessary.
271     virtual void assignValueToAddress(Register ValVReg, Register Addr,
272                                       LLT MemTy, MachinePointerInfo &MPO,
273                                       CCValAssign &VA) = 0;
274 
275     /// An overload which takes an ArgInfo if additional information about the
276     /// arg is needed. \p ValRegIndex is the index in \p Arg.Regs for the value
277     /// to store.
278     virtual void assignValueToAddress(const ArgInfo &Arg, unsigned ValRegIndex,
279                                       Register Addr, LLT MemTy,
280                                       MachinePointerInfo &MPO,
281                                       CCValAssign &VA) {
282       assignValueToAddress(Arg.Regs[ValRegIndex], Addr, MemTy, MPO, VA);
283     }
284 
285     /// Handle custom values, which may be passed into one or more of \p VAs.
286     /// \p If the handler wants the assignments to be delayed until after
287     /// mem loc assignments, then it sets \p Thunk to the thunk to do the
288     /// assignment.
289     /// \return The number of \p VAs that have been assigned after the first
290     ///         one, and which should therefore be skipped from further
291     ///         processing.
292     virtual unsigned assignCustomValue(ArgInfo &Arg, ArrayRef<CCValAssign> VAs,
293                                        std::function<void()> *Thunk = nullptr) {
294       // This is not a pure virtual method because not all targets need to worry
295       // about custom values.
296       llvm_unreachable("Custom values not supported");
297     }
298 
299     /// Do a memory copy of \p MemSize bytes from \p SrcPtr to \p DstPtr. This
300     /// is necessary for outgoing stack-passed byval arguments.
301     void
302     copyArgumentMemory(const ArgInfo &Arg, Register DstPtr, Register SrcPtr,
303                        const MachinePointerInfo &DstPtrInfo, Align DstAlign,
304                        const MachinePointerInfo &SrcPtrInfo, Align SrcAlign,
305                        uint64_t MemSize, CCValAssign &VA) const;
306 
307     /// Extend a register to the location type given in VA, capped at extending
308     /// to at most MaxSize bits. If MaxSizeBits is 0 then no maximum is set.
309     Register extendRegister(Register ValReg, CCValAssign &VA,
310                             unsigned MaxSizeBits = 0);
311   };
312 
313   /// Base class for ValueHandlers used for arguments coming into the current
314   /// function, or for return values received from a call.
315   struct IncomingValueHandler : public ValueHandler {
316     IncomingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI)
317         : ValueHandler(/*IsIncoming*/ true, MIRBuilder, MRI) {}
318 
319     /// Insert G_ASSERT_ZEXT/G_ASSERT_SEXT or other hint instruction based on \p
320     /// VA, returning the new register if a hint was inserted.
321     Register buildExtensionHint(CCValAssign &VA, Register SrcReg, LLT NarrowTy);
322 
323     /// Provides a default implementation for argument handling.
324     void assignValueToReg(Register ValVReg, Register PhysReg,
325                           CCValAssign VA) override;
326   };
327 
328   /// Base class for ValueHandlers used for arguments passed to a function call,
329   /// or for return values.
330   struct OutgoingValueHandler : public ValueHandler {
331     OutgoingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI)
332         : ValueHandler(/*IsIncoming*/ false, MIRBuilder, MRI) {}
333   };
334 
335 protected:
336   /// Getter for generic TargetLowering class.
337   const TargetLowering *getTLI() const {
338     return TLI;
339   }
340 
341   /// Getter for target specific TargetLowering class.
342   template <class XXXTargetLowering>
343     const XXXTargetLowering *getTLI() const {
344     return static_cast<const XXXTargetLowering *>(TLI);
345   }
346 
347   /// \returns Flags corresponding to the attributes on the \p ArgIdx-th
348   /// parameter of \p Call.
349   ISD::ArgFlagsTy getAttributesForArgIdx(const CallBase &Call,
350                                          unsigned ArgIdx) const;
351 
352   /// Adds flags to \p Flags based off of the attributes in \p Attrs.
353   /// \p OpIdx is the index in \p Attrs to add flags from.
354   void addArgFlagsFromAttributes(ISD::ArgFlagsTy &Flags,
355                                  const AttributeList &Attrs,
356                                  unsigned OpIdx) const;
357 
358   template <typename FuncInfoTy>
359   void setArgFlags(ArgInfo &Arg, unsigned OpIdx, const DataLayout &DL,
360                    const FuncInfoTy &FuncInfo) const;
361 
362   /// Break \p OrigArgInfo into one or more pieces the calling convention can
363   /// process, returned in \p SplitArgs. For example, this should break structs
364   /// down into individual fields.
365   ///
366   /// If \p Offsets is non-null, it points to a vector to be filled in
367   /// with the in-memory offsets of each of the individual values.
368   void splitToValueTypes(const ArgInfo &OrigArgInfo,
369                          SmallVectorImpl<ArgInfo> &SplitArgs,
370                          const DataLayout &DL, CallingConv::ID CallConv,
371                          SmallVectorImpl<uint64_t> *Offsets = nullptr) const;
372 
373   /// Analyze the argument list in \p Args, using \p Assigner to populate \p
374   /// CCInfo. This will determine the types and locations to use for passed or
375   /// returned values. This may resize fields in \p Args if the value is split
376   /// across multiple registers or stack slots.
377   ///
378   /// This is independent of the function state and can be used
379   /// to determine how a call would pass arguments without needing to change the
380   /// function. This can be used to check if arguments are suitable for tail
381   /// call lowering.
382   ///
383   /// \return True if everything has succeeded, false otherwise.
384   bool determineAssignments(ValueAssigner &Assigner,
385                             SmallVectorImpl<ArgInfo> &Args,
386                             CCState &CCInfo) const;
387 
388   /// Invoke ValueAssigner::assignArg on each of the given \p Args and then use
389   /// \p Handler to move them to the assigned locations.
390   ///
391   /// \return True if everything has succeeded, false otherwise.
392   bool
393   determineAndHandleAssignments(ValueHandler &Handler, ValueAssigner &Assigner,
394                                 SmallVectorImpl<ArgInfo> &Args,
395                                 MachineIRBuilder &MIRBuilder,
396                                 CallingConv::ID CallConv, bool IsVarArg,
397                                 ArrayRef<Register> ThisReturnRegs = None) const;
398 
399   /// Use \p Handler to insert code to handle the argument/return values
400   /// represented by \p Args. It's expected determineAssignments previously
401   /// processed these arguments to populate \p CCState and \p ArgLocs.
402   bool handleAssignments(ValueHandler &Handler, SmallVectorImpl<ArgInfo> &Args,
403                          CCState &CCState,
404                          SmallVectorImpl<CCValAssign> &ArgLocs,
405                          MachineIRBuilder &MIRBuilder,
406                          ArrayRef<Register> ThisReturnRegs = None) const;
407 
408   /// Check whether parameters to a call that are passed in callee saved
409   /// registers are the same as from the calling function.  This needs to be
410   /// checked for tail call eligibility.
411   bool parametersInCSRMatch(const MachineRegisterInfo &MRI,
412                             const uint32_t *CallerPreservedMask,
413                             const SmallVectorImpl<CCValAssign> &ArgLocs,
414                             const SmallVectorImpl<ArgInfo> &OutVals) const;
415 
416   /// \returns True if the calling convention for a callee and its caller pass
417   /// results in the same way. Typically used for tail call eligibility checks.
418   ///
419   /// \p Info is the CallLoweringInfo for the call.
420   /// \p MF is the MachineFunction for the caller.
421   /// \p InArgs contains the results of the call.
422   /// \p CalleeAssigner specifies the target's handling of the argument types
423   /// for the callee.
424   /// \p CallerAssigner specifies the target's handling of the
425   /// argument types for the caller.
426   bool resultsCompatible(CallLoweringInfo &Info, MachineFunction &MF,
427                          SmallVectorImpl<ArgInfo> &InArgs,
428                          ValueAssigner &CalleeAssigner,
429                          ValueAssigner &CallerAssigner) const;
430 
431 public:
432   CallLowering(const TargetLowering *TLI) : TLI(TLI) {}
433   virtual ~CallLowering() = default;
434 
435   /// \return true if the target is capable of handling swifterror values that
436   /// have been promoted to a specified register. The extended versions of
437   /// lowerReturn and lowerCall should be implemented.
438   virtual bool supportSwiftError() const {
439     return false;
440   }
441 
442   /// Load the returned value from the stack into virtual registers in \p VRegs.
443   /// It uses the frame index \p FI and the start offset from \p DemoteReg.
444   /// The loaded data size will be determined from \p RetTy.
445   void insertSRetLoads(MachineIRBuilder &MIRBuilder, Type *RetTy,
446                        ArrayRef<Register> VRegs, Register DemoteReg,
447                        int FI) const;
448 
449   /// Store the return value given by \p VRegs into stack starting at the offset
450   /// specified in \p DemoteReg.
451   void insertSRetStores(MachineIRBuilder &MIRBuilder, Type *RetTy,
452                         ArrayRef<Register> VRegs, Register DemoteReg) const;
453 
454   /// Insert the hidden sret ArgInfo to the beginning of \p SplitArgs.
455   /// This function should be called from the target specific
456   /// lowerFormalArguments when \p F requires the sret demotion.
457   void insertSRetIncomingArgument(const Function &F,
458                                   SmallVectorImpl<ArgInfo> &SplitArgs,
459                                   Register &DemoteReg, MachineRegisterInfo &MRI,
460                                   const DataLayout &DL) const;
461 
462   /// For the call-base described by \p CB, insert the hidden sret ArgInfo to
463   /// the OrigArgs field of \p Info.
464   void insertSRetOutgoingArgument(MachineIRBuilder &MIRBuilder,
465                                   const CallBase &CB,
466                                   CallLoweringInfo &Info) const;
467 
468   /// \return True if the return type described by \p Outs can be returned
469   /// without performing sret demotion.
470   bool checkReturn(CCState &CCInfo, SmallVectorImpl<BaseArgInfo> &Outs,
471                    CCAssignFn *Fn) const;
472 
473   /// Get the type and the ArgFlags for the split components of \p RetTy as
474   /// returned by \c ComputeValueVTs.
475   void getReturnInfo(CallingConv::ID CallConv, Type *RetTy, AttributeList Attrs,
476                      SmallVectorImpl<BaseArgInfo> &Outs,
477                      const DataLayout &DL) const;
478 
479   /// Toplevel function to check the return type based on the target calling
480   /// convention. \return True if the return value of \p MF can be returned
481   /// without performing sret demotion.
482   bool checkReturnTypeForCallConv(MachineFunction &MF) const;
483 
484   /// This hook must be implemented to check whether the return values
485   /// described by \p Outs can fit into the return registers. If false
486   /// is returned, an sret-demotion is performed.
487   virtual bool canLowerReturn(MachineFunction &MF, CallingConv::ID CallConv,
488                               SmallVectorImpl<BaseArgInfo> &Outs,
489                               bool IsVarArg) const {
490     return true;
491   }
492 
493   /// This hook must be implemented to lower outgoing return values, described
494   /// by \p Val, into the specified virtual registers \p VRegs.
495   /// This hook is used by GlobalISel.
496   ///
497   /// \p FLI is required for sret demotion.
498   ///
499   /// \p SwiftErrorVReg is non-zero if the function has a swifterror parameter
500   /// that needs to be implicitly returned.
501   ///
502   /// \return True if the lowering succeeds, false otherwise.
503   virtual bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
504                            ArrayRef<Register> VRegs, FunctionLoweringInfo &FLI,
505                            Register SwiftErrorVReg) const {
506     if (!supportSwiftError()) {
507       assert(SwiftErrorVReg == 0 && "attempt to use unsupported swifterror");
508       return lowerReturn(MIRBuilder, Val, VRegs, FLI);
509     }
510     return false;
511   }
512 
513   /// This hook behaves as the extended lowerReturn function, but for targets
514   /// that do not support swifterror value promotion.
515   virtual bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
516                            ArrayRef<Register> VRegs,
517                            FunctionLoweringInfo &FLI) const {
518     return false;
519   }
520 
521   virtual bool fallBackToDAGISel(const MachineFunction &MF) const {
522     return false;
523   }
524 
525   /// This hook must be implemented to lower the incoming (formal)
526   /// arguments, described by \p VRegs, for GlobalISel. Each argument
527   /// must end up in the related virtual registers described by \p VRegs.
528   /// In other words, the first argument should end up in \c VRegs[0],
529   /// the second in \c VRegs[1], and so on. For each argument, there will be one
530   /// register for each non-aggregate type, as returned by \c computeValueLLTs.
531   /// \p MIRBuilder is set to the proper insertion for the argument
532   /// lowering. \p FLI is required for sret demotion.
533   ///
534   /// \return True if the lowering succeeded, false otherwise.
535   virtual bool lowerFormalArguments(MachineIRBuilder &MIRBuilder,
536                                     const Function &F,
537                                     ArrayRef<ArrayRef<Register>> VRegs,
538                                     FunctionLoweringInfo &FLI) const {
539     return false;
540   }
541 
542   /// This hook must be implemented to lower the given call instruction,
543   /// including argument and return value marshalling.
544   ///
545   ///
546   /// \return true if the lowering succeeded, false otherwise.
547   virtual bool lowerCall(MachineIRBuilder &MIRBuilder,
548                          CallLoweringInfo &Info) const {
549     return false;
550   }
551 
552   /// Lower the given call instruction, including argument and return value
553   /// marshalling.
554   ///
555   /// \p CI is the call/invoke instruction.
556   ///
557   /// \p ResRegs are the registers where the call's return value should be
558   /// stored (or 0 if there is no return value). There will be one register for
559   /// each non-aggregate type, as returned by \c computeValueLLTs.
560   ///
561   /// \p ArgRegs is a list of lists of virtual registers containing each
562   /// argument that needs to be passed (argument \c i should be placed in \c
563   /// ArgRegs[i]). For each argument, there will be one register for each
564   /// non-aggregate type, as returned by \c computeValueLLTs.
565   ///
566   /// \p SwiftErrorVReg is non-zero if the call has a swifterror inout
567   /// parameter, and contains the vreg that the swifterror should be copied into
568   /// after the call.
569   ///
570   /// \p GetCalleeReg is a callback to materialize a register for the callee if
571   /// the target determines it cannot jump to the destination based purely on \p
572   /// CI. This might be because \p CI is indirect, or because of the limited
573   /// range of an immediate jump.
574   ///
575   /// \return true if the lowering succeeded, false otherwise.
576   bool lowerCall(MachineIRBuilder &MIRBuilder, const CallBase &Call,
577                  ArrayRef<Register> ResRegs,
578                  ArrayRef<ArrayRef<Register>> ArgRegs, Register SwiftErrorVReg,
579                  std::function<unsigned()> GetCalleeReg) const;
580 
581   /// For targets which want to use big-endian can enable it with
582   /// enableBigEndian() hook
583   virtual bool enableBigEndian() const { return false; }
584 
585   /// For targets which support the "returned" parameter attribute, returns
586   /// true if the given type is a valid one to use with "returned".
587   virtual bool isTypeIsValidForThisReturn(EVT Ty) const { return false; }
588 };
589 
590 } // end namespace llvm
591 
592 #endif // LLVM_CODEGEN_GLOBALISEL_CALLLOWERING_H
593