1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file defines interfaces to access the target independent code generation 10 // passes provided by the LLVM backend. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_CODEGEN_PASSES_H 15 #define LLVM_CODEGEN_PASSES_H 16 17 #include "llvm/Support/CodeGen.h" 18 #include "llvm/Support/Discriminator.h" 19 #include "llvm/CodeGen/RegAllocCommon.h" 20 21 #include <functional> 22 #include <string> 23 24 namespace llvm { 25 26 class FunctionPass; 27 class MachineFunction; 28 class MachineFunctionPass; 29 class MemoryBuffer; 30 class ModulePass; 31 class Pass; 32 class TargetMachine; 33 class raw_ostream; 34 35 } // End llvm namespace 36 37 // List of target independent CodeGen pass IDs. 38 namespace llvm { 39 40 /// AtomicExpandPass - At IR level this pass replace atomic instructions with 41 /// __atomic_* library calls, or target specific instruction which implement the 42 /// same semantics in a way which better fits the target backend. 43 FunctionPass *createAtomicExpandPass(); 44 45 /// createUnreachableBlockEliminationPass - The LLVM code generator does not 46 /// work well with unreachable basic blocks (what live ranges make sense for a 47 /// block that cannot be reached?). As such, a code generator should either 48 /// not instruction select unreachable blocks, or run this pass as its 49 /// last LLVM modifying pass to clean up blocks that are not reachable from 50 /// the entry block. 51 FunctionPass *createUnreachableBlockEliminationPass(); 52 53 /// createBasicBlockSections Pass - This pass assigns sections to machine 54 /// basic blocks and is enabled with -fbasic-block-sections. Buf is a memory 55 /// buffer that contains the list of functions and basic block ids to 56 /// selectively enable basic block sections. 57 MachineFunctionPass *createBasicBlockSectionsPass(const MemoryBuffer *Buf); 58 59 /// createMachineFunctionSplitterPass - This pass splits machine functions 60 /// using profile information. 61 MachineFunctionPass *createMachineFunctionSplitterPass(); 62 63 /// MachineFunctionPrinter pass - This pass prints out the machine function to 64 /// the given stream as a debugging tool. 65 MachineFunctionPass * 66 createMachineFunctionPrinterPass(raw_ostream &OS, 67 const std::string &Banner =""); 68 69 /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream 70 /// using the MIR serialization format. 71 MachineFunctionPass *createPrintMIRPass(raw_ostream &OS); 72 73 /// This pass resets a MachineFunction when it has the FailedISel property 74 /// as if it was just created. 75 /// If EmitFallbackDiag is true, the pass will emit a 76 /// DiagnosticInfoISelFallback for every MachineFunction it resets. 77 /// If AbortOnFailedISel is true, abort compilation instead of resetting. 78 MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag, 79 bool AbortOnFailedISel); 80 81 /// createCodeGenPreparePass - Transform the code to expose more pattern 82 /// matching during instruction selection. 83 FunctionPass *createCodeGenPreparePass(); 84 85 /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg 86 /// load-linked/store-conditional loops. 87 extern char &AtomicExpandID; 88 89 /// MachineLoopInfo - This pass is a loop analysis pass. 90 extern char &MachineLoopInfoID; 91 92 /// MachineDominators - This pass is a machine dominators analysis pass. 93 extern char &MachineDominatorsID; 94 95 /// MachineDominanaceFrontier - This pass is a machine dominators analysis. 96 extern char &MachineDominanceFrontierID; 97 98 /// MachineRegionInfo - This pass computes SESE regions for machine functions. 99 extern char &MachineRegionInfoPassID; 100 101 /// EdgeBundles analysis - Bundle machine CFG edges. 102 extern char &EdgeBundlesID; 103 104 /// LiveVariables pass - This pass computes the set of blocks in which each 105 /// variable is life and sets machine operand kill flags. 106 extern char &LiveVariablesID; 107 108 /// PHIElimination - This pass eliminates machine instruction PHI nodes 109 /// by inserting copy instructions. This destroys SSA information, but is the 110 /// desired input for some register allocators. This pass is "required" by 111 /// these register allocator like this: AU.addRequiredID(PHIEliminationID); 112 extern char &PHIEliminationID; 113 114 /// LiveIntervals - This analysis keeps track of the live ranges of virtual 115 /// and physical registers. 116 extern char &LiveIntervalsID; 117 118 /// LiveStacks pass. An analysis keeping track of the liveness of stack slots. 119 extern char &LiveStacksID; 120 121 /// TwoAddressInstruction - This pass reduces two-address instructions to 122 /// use two operands. This destroys SSA information but it is desired by 123 /// register allocators. 124 extern char &TwoAddressInstructionPassID; 125 126 /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs. 127 extern char &ProcessImplicitDefsID; 128 129 /// RegisterCoalescer - This pass merges live ranges to eliminate copies. 130 extern char &RegisterCoalescerID; 131 132 /// MachineScheduler - This pass schedules machine instructions. 133 extern char &MachineSchedulerID; 134 135 /// PostMachineScheduler - This pass schedules machine instructions postRA. 136 extern char &PostMachineSchedulerID; 137 138 /// SpillPlacement analysis. Suggest optimal placement of spill code between 139 /// basic blocks. 140 extern char &SpillPlacementID; 141 142 /// ShrinkWrap pass. Look for the best place to insert save and restore 143 // instruction and update the MachineFunctionInfo with that information. 144 extern char &ShrinkWrapID; 145 146 /// LiveRangeShrink pass. Move instruction close to its definition to shrink 147 /// the definition's live range. 148 extern char &LiveRangeShrinkID; 149 150 /// Greedy register allocator. 151 extern char &RAGreedyID; 152 153 /// Basic register allocator. 154 extern char &RABasicID; 155 156 /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as 157 /// assigned in VirtRegMap. 158 extern char &VirtRegRewriterID; 159 FunctionPass *createVirtRegRewriter(bool ClearVirtRegs = true); 160 161 /// UnreachableMachineBlockElimination - This pass removes unreachable 162 /// machine basic blocks. 163 extern char &UnreachableMachineBlockElimID; 164 165 /// DeadMachineInstructionElim - This pass removes dead machine instructions. 166 extern char &DeadMachineInstructionElimID; 167 168 /// This pass adds dead/undef flags after analyzing subregister lanes. 169 extern char &DetectDeadLanesID; 170 171 /// This pass perform post-ra machine sink for COPY instructions. 172 extern char &PostRAMachineSinkingID; 173 174 /// This pass adds flow sensitive discriminators. 175 extern char &MIRAddFSDiscriminatorsID; 176 177 /// This pass reads flow sensitive profile. 178 extern char &MIRProfileLoaderPassID; 179 180 /// FastRegisterAllocation Pass - This pass register allocates as fast as 181 /// possible. It is best suited for debug code where live ranges are short. 182 /// 183 FunctionPass *createFastRegisterAllocator(); 184 FunctionPass *createFastRegisterAllocator(RegClassFilterFunc F, 185 bool ClearVirtRegs); 186 187 /// BasicRegisterAllocation Pass - This pass implements a degenerate global 188 /// register allocator using the basic regalloc framework. 189 /// 190 FunctionPass *createBasicRegisterAllocator(); 191 FunctionPass *createBasicRegisterAllocator(RegClassFilterFunc F); 192 193 /// Greedy register allocation pass - This pass implements a global register 194 /// allocator for optimized builds. 195 /// 196 FunctionPass *createGreedyRegisterAllocator(); 197 FunctionPass *createGreedyRegisterAllocator(RegClassFilterFunc F); 198 199 /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean 200 /// Quadratic Prograaming (PBQP) based register allocator. 201 /// 202 FunctionPass *createDefaultPBQPRegisterAllocator(); 203 204 /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code, 205 /// and eliminates abstract frame references. 206 extern char &PrologEpilogCodeInserterID; 207 MachineFunctionPass *createPrologEpilogInserterPass(); 208 209 /// ExpandPostRAPseudos - This pass expands pseudo instructions after 210 /// register allocation. 211 extern char &ExpandPostRAPseudosID; 212 213 /// PostRAHazardRecognizer - This pass runs the post-ra hazard 214 /// recognizer. 215 extern char &PostRAHazardRecognizerID; 216 217 /// PostRAScheduler - This pass performs post register allocation 218 /// scheduling. 219 extern char &PostRASchedulerID; 220 221 /// BranchFolding - This pass performs machine code CFG based 222 /// optimizations to delete branches to branches, eliminate branches to 223 /// successor blocks (creating fall throughs), and eliminating branches over 224 /// branches. 225 extern char &BranchFolderPassID; 226 227 /// BranchRelaxation - This pass replaces branches that need to jump further 228 /// than is supported by a branch instruction. 229 extern char &BranchRelaxationPassID; 230 231 /// MachineFunctionPrinterPass - This pass prints out MachineInstr's. 232 extern char &MachineFunctionPrinterPassID; 233 234 /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR 235 /// serialization format. 236 extern char &MIRPrintingPassID; 237 238 /// TailDuplicate - Duplicate blocks with unconditional branches 239 /// into tails of their predecessors. 240 extern char &TailDuplicateID; 241 242 /// Duplicate blocks with unconditional branches into tails of their 243 /// predecessors. Variant that works before register allocation. 244 extern char &EarlyTailDuplicateID; 245 246 /// MachineTraceMetrics - This pass computes critical path and CPU resource 247 /// usage in an ensemble of traces. 248 extern char &MachineTraceMetricsID; 249 250 /// EarlyIfConverter - This pass performs if-conversion on SSA form by 251 /// inserting cmov instructions. 252 extern char &EarlyIfConverterID; 253 254 /// EarlyIfPredicator - This pass performs if-conversion on SSA form by 255 /// predicating if/else block and insert select at the join point. 256 extern char &EarlyIfPredicatorID; 257 258 /// This pass performs instruction combining using trace metrics to estimate 259 /// critical-path and resource depth. 260 extern char &MachineCombinerID; 261 262 /// StackSlotColoring - This pass performs stack coloring and merging. 263 /// It merges disjoint allocas to reduce the stack size. 264 extern char &StackColoringID; 265 266 /// IfConverter - This pass performs machine code if conversion. 267 extern char &IfConverterID; 268 269 FunctionPass *createIfConverter( 270 std::function<bool(const MachineFunction &)> Ftor); 271 272 /// MachineBlockPlacement - This pass places basic blocks based on branch 273 /// probabilities. 274 extern char &MachineBlockPlacementID; 275 276 /// MachineBlockPlacementStats - This pass collects statistics about the 277 /// basic block placement using branch probabilities and block frequency 278 /// information. 279 extern char &MachineBlockPlacementStatsID; 280 281 /// GCLowering Pass - Used by gc.root to perform its default lowering 282 /// operations. 283 FunctionPass *createGCLoweringPass(); 284 285 /// GCLowering Pass - Used by gc.root to perform its default lowering 286 /// operations. 287 extern char &GCLoweringID; 288 289 /// ShadowStackGCLowering - Implements the custom lowering mechanism 290 /// used by the shadow stack GC. Only runs on functions which opt in to 291 /// the shadow stack collector. 292 FunctionPass *createShadowStackGCLoweringPass(); 293 294 /// ShadowStackGCLowering - Implements the custom lowering mechanism 295 /// used by the shadow stack GC. 296 extern char &ShadowStackGCLoweringID; 297 298 /// GCMachineCodeAnalysis - Target-independent pass to mark safe points 299 /// in machine code. Must be added very late during code generation, just 300 /// prior to output, and importantly after all CFG transformations (such as 301 /// branch folding). 302 extern char &GCMachineCodeAnalysisID; 303 304 /// Creates a pass to print GC metadata. 305 /// 306 FunctionPass *createGCInfoPrinter(raw_ostream &OS); 307 308 /// MachineCSE - This pass performs global CSE on machine instructions. 309 extern char &MachineCSEID; 310 311 /// MIRCanonicalizer - This pass canonicalizes MIR by renaming vregs 312 /// according to the semantics of the instruction as well as hoists 313 /// code. 314 extern char &MIRCanonicalizerID; 315 316 /// ImplicitNullChecks - This pass folds null pointer checks into nearby 317 /// memory operations. 318 extern char &ImplicitNullChecksID; 319 320 /// This pass performs loop invariant code motion on machine instructions. 321 extern char &MachineLICMID; 322 323 /// This pass performs loop invariant code motion on machine instructions. 324 /// This variant works before register allocation. \see MachineLICMID. 325 extern char &EarlyMachineLICMID; 326 327 /// MachineSinking - This pass performs sinking on machine instructions. 328 extern char &MachineSinkingID; 329 330 /// MachineCopyPropagation - This pass performs copy propagation on 331 /// machine instructions. 332 extern char &MachineCopyPropagationID; 333 334 /// PeepholeOptimizer - This pass performs peephole optimizations - 335 /// like extension and comparison eliminations. 336 extern char &PeepholeOptimizerID; 337 338 /// OptimizePHIs - This pass optimizes machine instruction PHIs 339 /// to take advantage of opportunities created during DAG legalization. 340 extern char &OptimizePHIsID; 341 342 /// StackSlotColoring - This pass performs stack slot coloring. 343 extern char &StackSlotColoringID; 344 345 /// This pass lays out funclets contiguously. 346 extern char &FuncletLayoutID; 347 348 /// This pass inserts the XRay instrumentation sleds if they are supported by 349 /// the target platform. 350 extern char &XRayInstrumentationID; 351 352 /// This pass inserts FEntry calls 353 extern char &FEntryInserterID; 354 355 /// This pass implements the "patchable-function" attribute. 356 extern char &PatchableFunctionID; 357 358 /// createStackProtectorPass - This pass adds stack protectors to functions. 359 /// 360 FunctionPass *createStackProtectorPass(); 361 362 /// createMachineVerifierPass - This pass verifies cenerated machine code 363 /// instructions for correctness. 364 /// 365 FunctionPass *createMachineVerifierPass(const std::string& Banner); 366 367 /// createDwarfEHPass - This pass mulches exception handling code into a form 368 /// adapted to code generation. Required if using dwarf exception handling. 369 FunctionPass *createDwarfEHPass(CodeGenOpt::Level OptLevel); 370 371 /// createWinEHPass - Prepares personality functions used by MSVC on Windows, 372 /// in addition to the Itanium LSDA based personalities. 373 FunctionPass *createWinEHPass(bool DemoteCatchSwitchPHIOnly = false); 374 375 /// createSjLjEHPreparePass - This pass adapts exception handling code to use 376 /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow. 377 /// 378 FunctionPass *createSjLjEHPreparePass(const TargetMachine *TM); 379 380 /// createWasmEHPass - This pass adapts exception handling code to use 381 /// WebAssembly's exception handling scheme. 382 FunctionPass *createWasmEHPass(); 383 384 /// LocalStackSlotAllocation - This pass assigns local frame indices to stack 385 /// slots relative to one another and allocates base registers to access them 386 /// when it is estimated by the target to be out of range of normal frame 387 /// pointer or stack pointer index addressing. 388 extern char &LocalStackSlotAllocationID; 389 390 /// This pass expands pseudo-instructions, reserves registers and adjusts 391 /// machine frame information. 392 extern char &FinalizeISelID; 393 394 /// UnpackMachineBundles - This pass unpack machine instruction bundles. 395 extern char &UnpackMachineBundlesID; 396 397 FunctionPass * 398 createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor); 399 400 /// FinalizeMachineBundles - This pass finalize machine instruction 401 /// bundles (created earlier, e.g. during pre-RA scheduling). 402 extern char &FinalizeMachineBundlesID; 403 404 /// StackMapLiveness - This pass analyses the register live-out set of 405 /// stackmap/patchpoint intrinsics and attaches the calculated information to 406 /// the intrinsic for later emission to the StackMap. 407 extern char &StackMapLivenessID; 408 409 /// RemoveRedundantDebugValues pass. 410 extern char &RemoveRedundantDebugValuesID; 411 412 /// LiveDebugValues pass 413 extern char &LiveDebugValuesID; 414 415 /// createJumpInstrTables - This pass creates jump-instruction tables. 416 ModulePass *createJumpInstrTablesPass(); 417 418 /// InterleavedAccess Pass - This pass identifies and matches interleaved 419 /// memory accesses to target specific intrinsics. 420 /// 421 FunctionPass *createInterleavedAccessPass(); 422 423 /// InterleavedLoadCombines Pass - This pass identifies interleaved loads and 424 /// combines them into wide loads detectable by InterleavedAccessPass 425 /// 426 FunctionPass *createInterleavedLoadCombinePass(); 427 428 /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all 429 /// TLS variables for the emulated TLS model. 430 /// 431 ModulePass *createLowerEmuTLSPass(); 432 433 /// This pass lowers the \@llvm.load.relative and \@llvm.objc.* intrinsics to 434 /// instructions. This is unsafe to do earlier because a pass may combine the 435 /// constant initializer into the load, which may result in an overflowing 436 /// evaluation. 437 ModulePass *createPreISelIntrinsicLoweringPass(); 438 439 /// GlobalMerge - This pass merges internal (by default) globals into structs 440 /// to enable reuse of a base pointer by indexed addressing modes. 441 /// It can also be configured to focus on size optimizations only. 442 /// 443 Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset, 444 bool OnlyOptimizeForSize = false, 445 bool MergeExternalByDefault = false); 446 447 /// This pass splits the stack into a safe stack and an unsafe stack to 448 /// protect against stack-based overflow vulnerabilities. 449 FunctionPass *createSafeStackPass(); 450 451 /// This pass detects subregister lanes in a virtual register that are used 452 /// independently of other lanes and splits them into separate virtual 453 /// registers. 454 extern char &RenameIndependentSubregsID; 455 456 /// This pass is executed POST-RA to collect which physical registers are 457 /// preserved by given machine function. 458 FunctionPass *createRegUsageInfoCollector(); 459 460 /// Return a MachineFunction pass that identifies call sites 461 /// and propagates register usage information of callee to caller 462 /// if available with PysicalRegisterUsageInfo pass. 463 FunctionPass *createRegUsageInfoPropPass(); 464 465 /// This pass performs software pipelining on machine instructions. 466 extern char &MachinePipelinerID; 467 468 /// This pass frees the memory occupied by the MachineFunction. 469 FunctionPass *createFreeMachineFunctionPass(); 470 471 /// This pass performs outlining on machine instructions directly before 472 /// printing assembly. 473 ModulePass *createMachineOutlinerPass(bool RunOnAllFunctions = true); 474 475 /// This pass expands the experimental reduction intrinsics into sequences of 476 /// shuffles. 477 FunctionPass *createExpandReductionsPass(); 478 479 // This pass replaces intrinsics operating on vector operands with calls to 480 // the corresponding function in a vector library (e.g., SVML, libmvec). 481 FunctionPass *createReplaceWithVeclibLegacyPass(); 482 483 /// This pass expands the vector predication intrinsics into unpredicated 484 /// instructions with selects or just the explicit vector length into the 485 /// predicate mask. 486 FunctionPass *createExpandVectorPredicationPass(); 487 488 // This pass expands memcmp() to load/stores. 489 FunctionPass *createExpandMemCmpPass(); 490 491 /// Creates Break False Dependencies pass. \see BreakFalseDeps.cpp 492 FunctionPass *createBreakFalseDeps(); 493 494 // This pass expands indirectbr instructions. 495 FunctionPass *createIndirectBrExpandPass(); 496 497 /// Creates CFI Instruction Inserter pass. \see CFIInstrInserter.cpp 498 FunctionPass *createCFIInstrInserter(); 499 500 /// Creates CFGuard longjmp target identification pass. 501 /// \see CFGuardLongjmp.cpp 502 FunctionPass *createCFGuardLongjmpPass(); 503 504 /// Creates EHContGuard catchret target identification pass. 505 /// \see EHContGuardCatchret.cpp 506 FunctionPass *createEHContGuardCatchretPass(); 507 508 /// Create Hardware Loop pass. \see HardwareLoops.cpp 509 FunctionPass *createHardwareLoopsPass(); 510 511 /// This pass inserts pseudo probe annotation for callsite profiling. 512 FunctionPass *createPseudoProbeInserter(); 513 514 /// Create IR Type Promotion pass. \see TypePromotion.cpp 515 FunctionPass *createTypePromotionPass(); 516 517 /// Add Flow Sensitive Discriminators. PassNum specifies the 518 /// sequence number of this pass (starting from 1). 519 FunctionPass * 520 createMIRAddFSDiscriminatorsPass(sampleprof::FSDiscriminatorPass P); 521 522 /// Read Flow Sensitive Profile. 523 FunctionPass *createMIRProfileLoaderPass(std::string File, 524 std::string RemappingFile, 525 sampleprof::FSDiscriminatorPass P); 526 527 /// Creates MIR Debugify pass. \see MachineDebugify.cpp 528 ModulePass *createDebugifyMachineModulePass(); 529 530 /// Creates MIR Strip Debug pass. \see MachineStripDebug.cpp 531 /// If OnlyDebugified is true then it will only strip debug info if it was 532 /// added by a Debugify pass. The module will be left unchanged if the debug 533 /// info was generated by another source such as clang. 534 ModulePass *createStripDebugMachineModulePass(bool OnlyDebugified); 535 536 /// Creates MIR Check Debug pass. \see MachineCheckDebugify.cpp 537 ModulePass *createCheckDebugMachineModulePass(); 538 539 /// The pass fixups statepoint machine instruction to replace usage of 540 /// caller saved registers with stack slots. 541 extern char &FixupStatepointCallerSavedID; 542 543 /// The pass transforms load/store <256 x i32> to AMX load/store intrinsics 544 /// or split the data to two <128 x i32>. 545 FunctionPass *createX86LowerAMXTypePass(); 546 547 /// The pass insert tile config intrinsics for AMX fast register allocation. 548 FunctionPass *createX86PreAMXConfigPass(); 549 550 /// The pass transforms amx intrinsics to scalar operation if the function has 551 /// optnone attribute or it is O0. 552 FunctionPass *createX86LowerAMXIntrinsicsPass(); 553 554 /// When learning an eviction policy, extract score(reward) information, 555 /// otherwise this does nothing 556 FunctionPass *createRegAllocScoringPass(); 557 } // End llvm namespace 558 559 #endif 560