1 //===- RegisterScavenging.h - Machine register scavenging -------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// This file declares the machine register scavenger class. It can provide
11 /// information such as unused register at any point in a machine basic block.
12 /// It also provides a mechanism to make registers available by evicting them
13 /// to spill slots.
14 //
15 //===----------------------------------------------------------------------===//
16 
17 #ifndef LLVM_CODEGEN_REGISTERSCAVENGING_H
18 #define LLVM_CODEGEN_REGISTERSCAVENGING_H
19 
20 #include "llvm/ADT/BitVector.h"
21 #include "llvm/ADT/SmallVector.h"
22 #include "llvm/CodeGen/LiveRegUnits.h"
23 #include "llvm/CodeGen/MachineBasicBlock.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/MC/LaneBitmask.h"
26 
27 namespace llvm {
28 
29 class MachineInstr;
30 class TargetInstrInfo;
31 class TargetRegisterClass;
32 class TargetRegisterInfo;
33 
34 class RegScavenger {
35   const TargetRegisterInfo *TRI;
36   const TargetInstrInfo *TII;
37   MachineRegisterInfo* MRI;
38   MachineBasicBlock *MBB = nullptr;
39   MachineBasicBlock::iterator MBBI;
40   unsigned NumRegUnits = 0;
41 
42   /// True if RegScavenger is currently tracking the liveness of registers.
43   bool Tracking = false;
44 
45   /// Information on scavenged registers (held in a spill slot).
46   struct ScavengedInfo {
47     ScavengedInfo(int FI = -1) : FrameIndex(FI) {}
48 
49     /// A spill slot used for scavenging a register post register allocation.
50     int FrameIndex;
51 
52     /// If non-zero, the specific register is currently being
53     /// scavenged. That is, it is spilled to this scavenging stack slot.
54     Register Reg;
55 
56     /// The instruction that restores the scavenged register from stack.
57     const MachineInstr *Restore = nullptr;
58   };
59 
60   /// A vector of information on scavenged registers.
61   SmallVector<ScavengedInfo, 2> Scavenged;
62 
63   LiveRegUnits LiveUnits;
64 
65   // These BitVectors are only used internally to forward(). They are members
66   // to avoid frequent reallocations.
67   BitVector KillRegUnits, DefRegUnits;
68   BitVector TmpRegUnits;
69 
70 public:
71   RegScavenger() = default;
72 
73   /// Record that \p Reg is in use at scavenging index \p FI. This is for
74   /// targets which need to directly manage the spilling process, and need to
75   /// update the scavenger's internal state.  It's expected this be called a
76   /// second time with \p Restore set to a non-null value, so that the
77   /// externally inserted restore instruction resets the scavenged slot
78   /// liveness when encountered.
79   void assignRegToScavengingIndex(int FI, Register Reg,
80                                   MachineInstr *Restore = nullptr) {
81     for (ScavengedInfo &Slot : Scavenged) {
82       if (Slot.FrameIndex == FI) {
83         assert(!Slot.Reg || Slot.Reg == Reg);
84         Slot.Reg = Reg;
85         Slot.Restore = Restore;
86         return;
87       }
88     }
89 
90     llvm_unreachable("did not find scavenging index");
91   }
92 
93   /// Start tracking liveness from the begin of basic block \p MBB.
94   void enterBasicBlock(MachineBasicBlock &MBB);
95 
96   /// Start tracking liveness from the end of basic block \p MBB.
97   /// Use backward() to move towards the beginning of the block. This is
98   /// preferred to enterBasicBlock() and forward() because it does not depend
99   /// on the presence of kill flags.
100   void enterBasicBlockEnd(MachineBasicBlock &MBB);
101 
102   /// Move the internal MBB iterator and update register states.
103   void forward();
104 
105   /// Move the internal MBB iterator and update register states until
106   /// it has processed the specific iterator.
107   void forward(MachineBasicBlock::iterator I) {
108     if (!Tracking && MBB->begin() != I) forward();
109     while (MBBI != I) forward();
110   }
111 
112   /// Update internal register state and move MBB iterator backwards.
113   /// Contrary to unprocess() this method gives precise results even in the
114   /// absence of kill flags.
115   void backward();
116 
117   /// Call backward() as long as the internal iterator does not point to \p I.
118   void backward(MachineBasicBlock::iterator I) {
119     while (MBBI != I)
120       backward();
121   }
122 
123   /// Move the internal MBB iterator but do not update register states.
124   void skipTo(MachineBasicBlock::iterator I) {
125     if (I == MachineBasicBlock::iterator(nullptr))
126       Tracking = false;
127     MBBI = I;
128   }
129 
130   MachineBasicBlock::iterator getCurrentPosition() const { return MBBI; }
131 
132   /// Return if a specific register is currently used.
133   bool isRegUsed(Register Reg, bool includeReserved = true) const;
134 
135   /// Return all available registers in the register class in Mask.
136   BitVector getRegsAvailable(const TargetRegisterClass *RC);
137 
138   /// Find an unused register of the specified register class.
139   /// Return 0 if none is found.
140   Register FindUnusedReg(const TargetRegisterClass *RC) const;
141 
142   /// Add a scavenging frame index.
143   void addScavengingFrameIndex(int FI) {
144     Scavenged.push_back(ScavengedInfo(FI));
145   }
146 
147   /// Query whether a frame index is a scavenging frame index.
148   bool isScavengingFrameIndex(int FI) const {
149     for (const ScavengedInfo &SI : Scavenged)
150       if (SI.FrameIndex == FI)
151         return true;
152 
153     return false;
154   }
155 
156   /// Get an array of scavenging frame indices.
157   void getScavengingFrameIndices(SmallVectorImpl<int> &A) const {
158     for (const ScavengedInfo &I : Scavenged)
159       if (I.FrameIndex >= 0)
160         A.push_back(I.FrameIndex);
161   }
162 
163   /// Make a register of the specific register class
164   /// available and do the appropriate bookkeeping. SPAdj is the stack
165   /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
166   /// Returns the scavenged register.
167   /// This is deprecated as it depends on the quality of the kill flags being
168   /// present; Use scavengeRegisterBackwards() instead!
169   ///
170   /// If \p AllowSpill is false, fail if a spill is required to make the
171   /// register available, and return NoRegister.
172   Register scavengeRegister(const TargetRegisterClass *RC,
173                             MachineBasicBlock::iterator I, int SPAdj,
174                             bool AllowSpill = true);
175   Register scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj,
176                             bool AllowSpill = true) {
177     return scavengeRegister(RegClass, MBBI, SPAdj, AllowSpill);
178   }
179 
180   /// Make a register of the specific register class available from the current
181   /// position backwards to the place before \p To. If \p RestoreAfter is true
182   /// this includes the instruction following the current position.
183   /// SPAdj is the stack adjustment due to call frame, it's passed along to
184   /// eliminateFrameIndex().
185   /// Returns the scavenged register.
186   ///
187   /// If \p AllowSpill is false, fail if a spill is required to make the
188   /// register available, and return NoRegister.
189   Register scavengeRegisterBackwards(const TargetRegisterClass &RC,
190                                      MachineBasicBlock::iterator To,
191                                      bool RestoreAfter, int SPAdj,
192                                      bool AllowSpill = true);
193 
194   /// Tell the scavenger a register is used.
195   void setRegUsed(Register Reg, LaneBitmask LaneMask = LaneBitmask::getAll());
196 
197 private:
198   /// Returns true if a register is reserved. It is never "unused".
199   bool isReserved(Register Reg) const { return MRI->isReserved(Reg); }
200 
201   /// setUsed / setUnused - Mark the state of one or a number of register units.
202   ///
203   void setUsed(const BitVector &RegUnits) {
204     LiveUnits.addUnits(RegUnits);
205   }
206   void setUnused(const BitVector &RegUnits) {
207     LiveUnits.removeUnits(RegUnits);
208   }
209 
210   /// Processes the current instruction and fill the KillRegUnits and
211   /// DefRegUnits bit vectors.
212   void determineKillsAndDefs();
213 
214   /// Add all Reg Units that Reg contains to BV.
215   void addRegUnits(BitVector &BV, MCRegister Reg);
216 
217   /// Remove all Reg Units that \p Reg contains from \p BV.
218   void removeRegUnits(BitVector &BV, MCRegister Reg);
219 
220   /// Return the candidate register that is unused for the longest after
221   /// StartMI. UseMI is set to the instruction where the search stopped.
222   ///
223   /// No more than InstrLimit instructions are inspected.
224   Register findSurvivorReg(MachineBasicBlock::iterator StartMI,
225                            BitVector &Candidates,
226                            unsigned InstrLimit,
227                            MachineBasicBlock::iterator &UseMI);
228 
229   /// Initialize RegisterScavenger.
230   void init(MachineBasicBlock &MBB);
231 
232   /// Spill a register after position \p After and reload it before position
233   /// \p UseMI.
234   ScavengedInfo &spill(Register Reg, const TargetRegisterClass &RC, int SPAdj,
235                        MachineBasicBlock::iterator Before,
236                        MachineBasicBlock::iterator &UseMI);
237 };
238 
239 /// Replaces all frame index virtual registers with physical registers. Uses the
240 /// register scavenger to find an appropriate register to use.
241 void scavengeFrameVirtualRegs(MachineFunction &MF, RegScavenger &RS);
242 
243 } // end namespace llvm
244 
245 #endif // LLVM_CODEGEN_REGISTERSCAVENGING_H
246