1 //===----- PostRAHazardRecognizer.cpp - hazard recognizer -----------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// This runs the hazard recognizer and emits noops when necessary.  This
11 /// gives targets a way to run the hazard recognizer without running one of
12 /// the schedulers.  Example use cases for this pass would be:
13 ///
14 /// - Targets that need the hazard recognizer to be run at -O0.
15 /// - Targets that want to guarantee that hazards at the beginning of
16 ///   scheduling regions are handled correctly.  The post-RA scheduler is
17 ///   a top-down scheduler, but when there are multiple scheduling regions
18 ///   in a basic block, it visits the regions in bottom-up order.  This
19 ///   makes it impossible for the scheduler to gauranttee it can correctly
20 ///   handle hazards at the beginning of scheduling regions.
21 ///
22 /// This pass traverses all the instructions in a program in top-down order.
23 /// In contrast to the instruction scheduling passes, this pass never resets
24 /// the hazard recognizer to ensure it can correctly handles noop hazards at
25 /// the beginning of blocks.
26 //
27 //===----------------------------------------------------------------------===//
28 
29 #include "llvm/ADT/Statistic.h"
30 #include "llvm/CodeGen/MachineFunctionPass.h"
31 #include "llvm/CodeGen/ScheduleHazardRecognizer.h"
32 #include "llvm/CodeGen/TargetInstrInfo.h"
33 #include "llvm/CodeGen/TargetSubtargetInfo.h"
34 #include "llvm/InitializePasses.h"
35 #include "llvm/Pass.h"
36 using namespace llvm;
37 
38 #define DEBUG_TYPE "post-RA-hazard-rec"
39 
40 STATISTIC(NumNoops, "Number of noops inserted");
41 
42 namespace {
43   class PostRAHazardRecognizer : public MachineFunctionPass {
44 
45   public:
46     static char ID;
47     PostRAHazardRecognizer() : MachineFunctionPass(ID) {}
48 
49     void getAnalysisUsage(AnalysisUsage &AU) const override {
50       AU.setPreservesCFG();
51       MachineFunctionPass::getAnalysisUsage(AU);
52     }
53 
54     bool runOnMachineFunction(MachineFunction &Fn) override;
55 
56   };
57   char PostRAHazardRecognizer::ID = 0;
58 
59 }
60 
61 char &llvm::PostRAHazardRecognizerID = PostRAHazardRecognizer::ID;
62 
63 INITIALIZE_PASS(PostRAHazardRecognizer, DEBUG_TYPE,
64                 "Post RA hazard recognizer", false, false)
65 
66 bool PostRAHazardRecognizer::runOnMachineFunction(MachineFunction &Fn) {
67   const TargetInstrInfo *TII = Fn.getSubtarget().getInstrInfo();
68   std::unique_ptr<ScheduleHazardRecognizer> HazardRec(
69       TII->CreateTargetPostRAHazardRecognizer(Fn));
70 
71   // Return if the target has not implemented a hazard recognizer.
72   if (!HazardRec)
73     return false;
74 
75   // Loop over all of the basic blocks
76   bool Changed = false;
77   for (auto &MBB : Fn) {
78     // We do not call HazardRec->reset() here to make sure we are handling noop
79     // hazards at the start of basic blocks.
80     for (MachineInstr &MI : MBB) {
81       // If we need to emit noops prior to this instruction, then do so.
82       unsigned NumPreNoops = HazardRec->PreEmitNoops(&MI);
83       HazardRec->EmitNoops(NumPreNoops);
84       TII->insertNoops(MBB, MachineBasicBlock::iterator(MI), NumPreNoops);
85       NumNoops += NumPreNoops;
86       if (NumPreNoops)
87         Changed = true;
88 
89       HazardRec->EmitInstruction(&MI);
90       if (HazardRec->atIssueLimit()) {
91         HazardRec->AdvanceCycle();
92       }
93     }
94   }
95   return Changed;
96 }
97