1 //===- AArch64LegalizerInfo --------------------------------------*- C++ -*-==//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file declares the targeting of the Machinelegalizer class for
10 /// AArch64.
11 /// \todo This should be generated by TableGen.
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64MACHINELEGALIZER_H
15 #define LLVM_LIB_TARGET_AARCH64_AARCH64MACHINELEGALIZER_H
16 
17 #include "llvm/CodeGen/GlobalISel/GISelChangeObserver.h"
18 #include "llvm/CodeGen/GlobalISel/LegalizerHelper.h"
19 #include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
20 #include "llvm/CodeGen/MachineRegisterInfo.h"
21 
22 namespace llvm {
23 
24 class LLVMContext;
25 class AArch64Subtarget;
26 
27 /// This class provides the information for the target register banks.
28 class AArch64LegalizerInfo : public LegalizerInfo {
29 public:
30   AArch64LegalizerInfo(const AArch64Subtarget &ST);
31 
32   bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI) const override;
33 
34   bool legalizeIntrinsic(LegalizerHelper &Helper,
35                          MachineInstr &MI) const override;
36 
37 private:
38   bool legalizeVaArg(MachineInstr &MI, MachineRegisterInfo &MRI,
39                      MachineIRBuilder &MIRBuilder) const;
40   bool legalizeLoadStore(MachineInstr &MI, MachineRegisterInfo &MRI,
41                          MachineIRBuilder &MIRBuilder,
42                          GISelChangeObserver &Observer) const;
43   bool legalizeShlAshrLshr(MachineInstr &MI, MachineRegisterInfo &MRI,
44                            MachineIRBuilder &MIRBuilder,
45                            GISelChangeObserver &Observer) const;
46 
47   bool legalizeSmallCMGlobalValue(MachineInstr &MI, MachineRegisterInfo &MRI,
48                                   MachineIRBuilder &MIRBuilder,
49                                   GISelChangeObserver &Observer) const;
50   bool legalizeVectorTrunc(MachineInstr &MI, LegalizerHelper &Helper) const;
51   bool legalizeBitfieldExtract(MachineInstr &MI, MachineRegisterInfo &MRI,
52                                LegalizerHelper &Helper) const;
53   bool legalizeRotate(MachineInstr &MI, MachineRegisterInfo &MRI,
54                       LegalizerHelper &Helper) const;
55   bool legalizeCTPOP(MachineInstr &MI, MachineRegisterInfo &MRI,
56                      LegalizerHelper &Helper) const;
57   bool legalizeAtomicCmpxchg128(MachineInstr &MI, MachineRegisterInfo &MRI,
58                                 LegalizerHelper &Helper) const;
59   bool legalizeCTTZ(MachineInstr &MI, LegalizerHelper &Helper) const;
60   const AArch64Subtarget *ST;
61 };
62 } // End llvm namespace.
63 #endif
64