1 //===----------------------- R600FrameLowering.cpp ------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //==-----------------------------------------------------------------------===//
8 
9 #include "R600FrameLowering.h"
10 #include "AMDGPUSubtarget.h"
11 #include "R600RegisterInfo.h"
12 #include "llvm/CodeGen/MachineFrameInfo.h"
13 #include "llvm/CodeGen/MachineFunction.h"
14 #include "llvm/Support/MathExtras.h"
15 
16 using namespace llvm;
17 
18 R600FrameLowering::~R600FrameLowering() = default;
19 
20 /// \returns The number of registers allocated for \p FI.
21 int R600FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
22                                               Register &FrameReg) const {
23   const MachineFrameInfo &MFI = MF.getFrameInfo();
24   const R600RegisterInfo *RI
25     = MF.getSubtarget<R600Subtarget>().getRegisterInfo();
26 
27   // Fill in FrameReg output argument.
28   FrameReg = RI->getFrameRegister(MF);
29 
30   // Start the offset at 2 so we don't overwrite work group information.
31   // FIXME: We should only do this when the shader actually uses this
32   // information.
33   unsigned OffsetBytes = 2 * (getStackWidth(MF) * 4);
34   int UpperBound = FI == -1 ? MFI.getNumObjects() : FI;
35 
36   for (int i = MFI.getObjectIndexBegin(); i < UpperBound; ++i) {
37     OffsetBytes = alignTo(OffsetBytes, MFI.getObjectAlign(i));
38     OffsetBytes += MFI.getObjectSize(i);
39     // Each register holds 4 bytes, so we must always align the offset to at
40     // least 4 bytes, so that 2 frame objects won't share the same register.
41     OffsetBytes = alignTo(OffsetBytes, Align(4));
42   }
43 
44   if (FI != -1)
45     OffsetBytes = alignTo(OffsetBytes, MFI.getObjectAlign(FI));
46 
47   return OffsetBytes / (getStackWidth(MF) * 4);
48 }
49