1//===-- VOPCInstructions.td - Vector Instruction Definitions --------------===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8 9//===----------------------------------------------------------------------===// 10// Encodings 11//===----------------------------------------------------------------------===// 12 13class VOPCe <bits<8> op> : Enc32 { 14 bits<9> src0; 15 bits<8> src1; 16 17 let Inst{8-0} = src0; 18 let Inst{16-9} = src1; 19 let Inst{24-17} = op; 20 let Inst{31-25} = 0x3e; 21} 22 23class VOPC_SDWAe <bits<8> op, VOPProfile P> : VOP_SDWAe <P> { 24 bits<8> src1; 25 26 let Inst{8-0} = 0xf9; // sdwa 27 let Inst{16-9} = !if(P.HasSrc1, src1{7-0}, 0); 28 let Inst{24-17} = op; 29 let Inst{31-25} = 0x3e; // encoding 30 31 // VOPC disallows dst_sel and dst_unused as they have no effect on destination 32 let Inst{42-40} = 0; 33 let Inst{44-43} = 0; 34} 35 36class VOPC_SDWA9e <bits<8> op, VOPProfile P> : VOP_SDWA9Be <P> { 37 bits<9> src1; 38 39 let Inst{8-0} = 0xf9; // sdwa 40 let Inst{16-9} = !if(P.HasSrc1, src1{7-0}, 0); 41 let Inst{24-17} = op; 42 let Inst{31-25} = 0x3e; // encoding 43 let Inst{63} = !if(P.HasSrc1, src1{8}, 0); // src1_sgpr 44} 45 46 47//===----------------------------------------------------------------------===// 48// VOPC classes 49//===----------------------------------------------------------------------===// 50 51// VOPC instructions are a special case because for the 32-bit 52// encoding, we want to display the implicit vcc write as if it were 53// an explicit $dst. 54class VOPC_Profile<list<SchedReadWrite> sched, ValueType vt0, ValueType vt1 = vt0> : 55 VOPProfile <[i1, vt0, vt1, untyped]> { 56 let Asm32 = "$src0, $src1"; 57 // The destination for 32-bit encoding is implicit. 58 let HasDst32 = 0; 59 let Outs64 = (outs VOPDstS64orS32:$sdst); 60 list<SchedReadWrite> Schedule = sched; 61} 62 63class VOPC_NoSdst_Profile<list<SchedReadWrite> sched, ValueType vt0, 64 ValueType vt1 = vt0> : 65 VOPC_Profile<sched, vt0, vt1> { 66 let Outs64 = (outs ); 67 let OutsSDWA = (outs ); 68 let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0, 69 Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1, 70 src0_sel:$src0_sel, src1_sel:$src1_sel); 71 let Asm64 = !if(isFloatType<Src0VT>.ret, "$src0_modifiers, $src1_modifiers$clamp", 72 "$src0, $src1"); 73 let AsmSDWA9 = "$src0_modifiers, $src1_modifiers $src0_sel $src1_sel"; 74 let EmitDst = 0; 75} 76 77class VOPC_Pseudo <string opName, VOPC_Profile P, list<dag> pattern=[], 78 bit DefVcc = 1> : 79 InstSI<(outs), P.Ins32, "", pattern>, 80 VOP <opName>, 81 SIMCInstr<opName#"_e32", SIEncodingFamily.NONE> { 82 83 let isPseudo = 1; 84 let isCodeGenOnly = 1; 85 let UseNamedOperandTable = 1; 86 87 string Mnemonic = opName; 88 string AsmOperands = P.Asm32; 89 90 let Size = 4; 91 let mayLoad = 0; 92 let mayStore = 0; 93 let hasSideEffects = 0; 94 95 let ReadsModeReg = isFloatType<P.Src0VT>.ret; 96 97 let VALU = 1; 98 let VOPC = 1; 99 let Uses = !if(ReadsModeReg, [MODE, EXEC], [EXEC]); 100 let Defs = !if(DefVcc, [VCC], []); 101 102 VOPProfile Pfl = P; 103} 104 105class VOPC_Real <VOPC_Pseudo ps, int EncodingFamily> : 106 InstSI <ps.OutOperandList, ps.InOperandList, ps.PseudoInstr # " " # ps.AsmOperands, []>, 107 SIMCInstr <ps.PseudoInstr, EncodingFamily> { 108 109 let isPseudo = 0; 110 let isCodeGenOnly = 0; 111 112 let Constraints = ps.Constraints; 113 let DisableEncoding = ps.DisableEncoding; 114 115 // copy relevant pseudo op flags 116 let SubtargetPredicate = ps.SubtargetPredicate; 117 let AsmMatchConverter = ps.AsmMatchConverter; 118 let Constraints = ps.Constraints; 119 let DisableEncoding = ps.DisableEncoding; 120 let TSFlags = ps.TSFlags; 121 let UseNamedOperandTable = ps.UseNamedOperandTable; 122 let Uses = ps.Uses; 123 let Defs = ps.Defs; 124} 125 126class VOPC_SDWA_Pseudo <string OpName, VOPProfile P, list<dag> pattern=[]> : 127 VOP_SDWA_Pseudo <OpName, P, pattern> { 128 let AsmMatchConverter = "cvtSdwaVOPC"; 129} 130 131// This class is used only with VOPC instructions. Use $sdst for out operand 132class VOPCInstAlias <VOP3_Pseudo ps, Instruction inst, 133 string Asm32 = ps.Pfl.Asm32, VOPProfile p = ps.Pfl> : 134 InstAlias <ps.OpName#" "#Asm32, (inst)>, PredicateControl { 135 136 field bit isCompare; 137 field bit isCommutable; 138 139 let ResultInst = 140 !if (p.HasDst32, 141 !if (!eq(p.NumSrcArgs, 0), 142 // 1 dst, 0 src 143 (inst p.DstRC:$sdst), 144 !if (!eq(p.NumSrcArgs, 1), 145 // 1 dst, 1 src 146 (inst p.DstRC:$sdst, p.Src0RC32:$src0), 147 !if (!eq(p.NumSrcArgs, 2), 148 // 1 dst, 2 src 149 (inst p.DstRC:$sdst, p.Src0RC32:$src0, p.Src1RC32:$src1), 150 // else - unreachable 151 (inst)))), 152 // else 153 !if (!eq(p.NumSrcArgs, 2), 154 // 0 dst, 2 src 155 (inst p.Src0RC32:$src0, p.Src1RC32:$src1), 156 !if (!eq(p.NumSrcArgs, 1), 157 // 0 dst, 1 src 158 (inst p.Src0RC32:$src1), 159 // else 160 // 0 dst, 0 src 161 (inst)))); 162 163 let AsmVariantName = AMDGPUAsmVariants.Default; 164 let SubtargetPredicate = AssemblerPredicate; 165} 166 167multiclass VOPCInstAliases <string OpName, string Arch> { 168 def : VOPCInstAlias <!cast<VOP3_Pseudo>(OpName#"_e64"), 169 !cast<Instruction>(OpName#"_e32_"#Arch)>; 170 let WaveSizePredicate = isWave32 in { 171 def : VOPCInstAlias <!cast<VOP3_Pseudo>(OpName#"_e64"), 172 !cast<Instruction>(OpName#"_e32_"#Arch), 173 "vcc_lo, "#!cast<VOP3_Pseudo>(OpName#"_e64").Pfl.Asm32>; 174 } 175 let WaveSizePredicate = isWave64 in { 176 def : VOPCInstAlias <!cast<VOP3_Pseudo>(OpName#"_e64"), 177 !cast<Instruction>(OpName#"_e32_"#Arch), 178 "vcc, "#!cast<VOP3_Pseudo>(OpName#"_e64").Pfl.Asm32>; 179 } 180} 181 182multiclass VOPCXInstAliases <string OpName, string Arch> { 183 def : VOPCInstAlias <!cast<VOP3_Pseudo>(OpName#"_e64"), 184 !cast<Instruction>(OpName#"_e32_"#Arch)>; 185} 186 187 188class getVOPCPat64 <SDPatternOperator cond, VOPProfile P> : LetDummies { 189 list<dag> ret = !if(P.HasModifiers, 190 [(set i1:$sdst, 191 (setcc (P.Src0VT 192 !if(P.HasOMod, 193 (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers, i1:$clamp, i32:$omod), 194 (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers, i1:$clamp))), 195 (P.Src1VT (VOP3Mods P.Src1VT:$src1, i32:$src1_modifiers)), 196 cond))], 197 [(set i1:$sdst, (setcc P.Src0VT:$src0, P.Src1VT:$src1, cond))]); 198} 199 200class VCMPXNoSDstTable <bit has_sdst, string Name> { 201 bit HasSDst = has_sdst; 202 string NoSDstOp = Name; 203} 204 205multiclass VOPC_Pseudos <string opName, 206 VOPC_Profile P, 207 SDPatternOperator cond = COND_NULL, 208 string revOp = opName, 209 bit DefExec = 0> { 210 211 def _e32 : VOPC_Pseudo <opName, P>, 212 Commutable_REV<revOp#"_e32", !eq(revOp, opName)>, 213 VCMPXNoSDstTable<1, opName#"_e32"> { 214 let Defs = !if(DefExec, [VCC, EXEC], [VCC]); 215 let SchedRW = P.Schedule; 216 let isConvergent = DefExec; 217 let isCompare = 1; 218 let isCommutable = 1; 219 } 220 221 def _e64 : VOP3_Pseudo<opName, P, getVOPCPat64<cond, P>.ret>, 222 Commutable_REV<revOp#"_e64", !eq(revOp, opName)>, 223 VCMPXNoSDstTable<1, opName#"_e64"> { 224 let Defs = !if(DefExec, [EXEC], []); 225 let SchedRW = P.Schedule; 226 let isCompare = 1; 227 let isCommutable = 1; 228 } 229 230 foreach _ = BoolToList<P.HasExtSDWA>.ret in 231 def _sdwa : VOPC_SDWA_Pseudo <opName, P> { 232 let Defs = !if(DefExec, [VCC, EXEC], [VCC]); 233 let SchedRW = P.Schedule; 234 let isConvergent = DefExec; 235 let isCompare = 1; 236 } 237} 238 239let SubtargetPredicate = HasSdstCMPX in { 240multiclass VOPCX_Pseudos <string opName, 241 VOPC_Profile P, VOPC_Profile P_NoSDst, 242 SDPatternOperator cond = COND_NULL, 243 string revOp = opName> : 244 VOPC_Pseudos <opName, P, cond, revOp, 1> { 245 246 def _nosdst_e32 : VOPC_Pseudo <opName#"_nosdst", P_NoSDst, [], 0>, 247 Commutable_REV<revOp#"_nosdst_e32", !eq(revOp, opName)>, 248 VCMPXNoSDstTable<0, opName#"_e32"> { 249 let Defs = [EXEC]; 250 let SchedRW = P_NoSDst.Schedule; 251 let isConvergent = 1; 252 let isCompare = 1; 253 let isCommutable = 1; 254 let SubtargetPredicate = HasNoSdstCMPX; 255 } 256 257 def _nosdst_e64 : VOP3_Pseudo<opName#"_nosdst", P_NoSDst>, 258 Commutable_REV<revOp#"_nosdst_e64", !eq(revOp, opName)>, 259 VCMPXNoSDstTable<0, opName#"_e64"> { 260 let Defs = [EXEC]; 261 let SchedRW = P_NoSDst.Schedule; 262 let isCompare = 1; 263 let isCommutable = 1; 264 let SubtargetPredicate = HasNoSdstCMPX; 265 } 266 267 foreach _ = BoolToList<P_NoSDst.HasExtSDWA>.ret in 268 def _nosdst_sdwa : VOPC_SDWA_Pseudo <opName#"_nosdst", P_NoSDst> { 269 let Defs = [EXEC]; 270 let SchedRW = P_NoSDst.Schedule; 271 let isConvergent = 1; 272 let isCompare = 1; 273 let SubtargetPredicate = HasNoSdstCMPX; 274 } 275} 276} // End SubtargetPredicate = HasSdstCMPX 277 278def VOPC_I1_F16_F16 : VOPC_Profile<[Write32Bit], f16>; 279def VOPC_I1_F32_F32 : VOPC_Profile<[Write32Bit], f32>; 280def VOPC_I1_F64_F64 : VOPC_Profile<[WriteDoubleAdd], f64>; 281def VOPC_I1_I16_I16 : VOPC_Profile<[Write32Bit], i16>; 282def VOPC_I1_I32_I32 : VOPC_Profile<[Write32Bit], i32>; 283def VOPC_I1_I64_I64 : VOPC_Profile<[Write64Bit], i64>; 284 285def VOPC_F16_F16 : VOPC_NoSdst_Profile<[Write32Bit], f16>; 286def VOPC_F32_F32 : VOPC_NoSdst_Profile<[Write32Bit], f32>; 287def VOPC_F64_F64 : VOPC_NoSdst_Profile<[Write64Bit], f64>; 288def VOPC_I16_I16 : VOPC_NoSdst_Profile<[Write32Bit], i16>; 289def VOPC_I32_I32 : VOPC_NoSdst_Profile<[Write32Bit], i32>; 290def VOPC_I64_I64 : VOPC_NoSdst_Profile<[Write64Bit], i64>; 291 292multiclass VOPC_F16 <string opName, SDPatternOperator cond = COND_NULL, 293 string revOp = opName> : 294 VOPC_Pseudos <opName, VOPC_I1_F16_F16, cond, revOp, 0>; 295 296multiclass VOPC_F32 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 297 VOPC_Pseudos <opName, VOPC_I1_F32_F32, cond, revOp, 0>; 298 299multiclass VOPC_F64 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 300 VOPC_Pseudos <opName, VOPC_I1_F64_F64, cond, revOp, 0>; 301 302multiclass VOPC_I16 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 303 VOPC_Pseudos <opName, VOPC_I1_I16_I16, cond, revOp, 0>; 304 305multiclass VOPC_I32 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 306 VOPC_Pseudos <opName, VOPC_I1_I32_I32, cond, revOp, 0>; 307 308multiclass VOPC_I64 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 309 VOPC_Pseudos <opName, VOPC_I1_I64_I64, cond, revOp, 0>; 310 311multiclass VOPCX_F16 <string opName, string revOp = opName> : 312 VOPCX_Pseudos <opName, VOPC_I1_F16_F16, VOPC_F16_F16, COND_NULL, revOp>; 313 314multiclass VOPCX_F32 <string opName, string revOp = opName> : 315 VOPCX_Pseudos <opName, VOPC_I1_F32_F32, VOPC_F32_F32, COND_NULL, revOp>; 316 317multiclass VOPCX_F64 <string opName, string revOp = opName> : 318 VOPCX_Pseudos <opName, VOPC_I1_F64_F64, VOPC_F64_F64, COND_NULL, revOp>; 319 320multiclass VOPCX_I16 <string opName, string revOp = opName> : 321 VOPCX_Pseudos <opName, VOPC_I1_I16_I16, VOPC_I16_I16, COND_NULL, revOp>; 322 323multiclass VOPCX_I32 <string opName, string revOp = opName> : 324 VOPCX_Pseudos <opName, VOPC_I1_I32_I32, VOPC_I32_I32, COND_NULL, revOp>; 325 326multiclass VOPCX_I64 <string opName, string revOp = opName> : 327 VOPCX_Pseudos <opName, VOPC_I1_I64_I64, VOPC_I64_I64, COND_NULL, revOp>; 328 329 330//===----------------------------------------------------------------------===// 331// Compare instructions 332//===----------------------------------------------------------------------===// 333 334defm V_CMP_F_F32 : VOPC_F32 <"v_cmp_f_f32">; 335defm V_CMP_LT_F32 : VOPC_F32 <"v_cmp_lt_f32", COND_OLT, "v_cmp_gt_f32">; 336defm V_CMP_EQ_F32 : VOPC_F32 <"v_cmp_eq_f32", COND_OEQ>; 337defm V_CMP_LE_F32 : VOPC_F32 <"v_cmp_le_f32", COND_OLE, "v_cmp_ge_f32">; 338defm V_CMP_GT_F32 : VOPC_F32 <"v_cmp_gt_f32", COND_OGT>; 339defm V_CMP_LG_F32 : VOPC_F32 <"v_cmp_lg_f32", COND_ONE>; 340defm V_CMP_GE_F32 : VOPC_F32 <"v_cmp_ge_f32", COND_OGE>; 341defm V_CMP_O_F32 : VOPC_F32 <"v_cmp_o_f32", COND_O>; 342defm V_CMP_U_F32 : VOPC_F32 <"v_cmp_u_f32", COND_UO>; 343defm V_CMP_NGE_F32 : VOPC_F32 <"v_cmp_nge_f32", COND_ULT, "v_cmp_nle_f32">; 344defm V_CMP_NLG_F32 : VOPC_F32 <"v_cmp_nlg_f32", COND_UEQ>; 345defm V_CMP_NGT_F32 : VOPC_F32 <"v_cmp_ngt_f32", COND_ULE, "v_cmp_nlt_f32">; 346defm V_CMP_NLE_F32 : VOPC_F32 <"v_cmp_nle_f32", COND_UGT>; 347defm V_CMP_NEQ_F32 : VOPC_F32 <"v_cmp_neq_f32", COND_UNE>; 348defm V_CMP_NLT_F32 : VOPC_F32 <"v_cmp_nlt_f32", COND_UGE>; 349defm V_CMP_TRU_F32 : VOPC_F32 <"v_cmp_tru_f32">; 350 351defm V_CMPX_F_F32 : VOPCX_F32 <"v_cmpx_f_f32">; 352defm V_CMPX_LT_F32 : VOPCX_F32 <"v_cmpx_lt_f32", "v_cmpx_gt_f32">; 353defm V_CMPX_EQ_F32 : VOPCX_F32 <"v_cmpx_eq_f32">; 354defm V_CMPX_LE_F32 : VOPCX_F32 <"v_cmpx_le_f32", "v_cmpx_ge_f32">; 355defm V_CMPX_GT_F32 : VOPCX_F32 <"v_cmpx_gt_f32">; 356defm V_CMPX_LG_F32 : VOPCX_F32 <"v_cmpx_lg_f32">; 357defm V_CMPX_GE_F32 : VOPCX_F32 <"v_cmpx_ge_f32">; 358defm V_CMPX_O_F32 : VOPCX_F32 <"v_cmpx_o_f32">; 359defm V_CMPX_U_F32 : VOPCX_F32 <"v_cmpx_u_f32">; 360defm V_CMPX_NGE_F32 : VOPCX_F32 <"v_cmpx_nge_f32", "v_cmpx_nle_f32">; 361defm V_CMPX_NLG_F32 : VOPCX_F32 <"v_cmpx_nlg_f32">; 362defm V_CMPX_NGT_F32 : VOPCX_F32 <"v_cmpx_ngt_f32", "v_cmpx_nlt_f32">; 363defm V_CMPX_NLE_F32 : VOPCX_F32 <"v_cmpx_nle_f32">; 364defm V_CMPX_NEQ_F32 : VOPCX_F32 <"v_cmpx_neq_f32">; 365defm V_CMPX_NLT_F32 : VOPCX_F32 <"v_cmpx_nlt_f32">; 366defm V_CMPX_TRU_F32 : VOPCX_F32 <"v_cmpx_tru_f32">; 367 368defm V_CMP_F_F64 : VOPC_F64 <"v_cmp_f_f64">; 369defm V_CMP_LT_F64 : VOPC_F64 <"v_cmp_lt_f64", COND_OLT, "v_cmp_gt_f64">; 370defm V_CMP_EQ_F64 : VOPC_F64 <"v_cmp_eq_f64", COND_OEQ>; 371defm V_CMP_LE_F64 : VOPC_F64 <"v_cmp_le_f64", COND_OLE, "v_cmp_ge_f64">; 372defm V_CMP_GT_F64 : VOPC_F64 <"v_cmp_gt_f64", COND_OGT>; 373defm V_CMP_LG_F64 : VOPC_F64 <"v_cmp_lg_f64", COND_ONE>; 374defm V_CMP_GE_F64 : VOPC_F64 <"v_cmp_ge_f64", COND_OGE>; 375defm V_CMP_O_F64 : VOPC_F64 <"v_cmp_o_f64", COND_O>; 376defm V_CMP_U_F64 : VOPC_F64 <"v_cmp_u_f64", COND_UO>; 377defm V_CMP_NGE_F64 : VOPC_F64 <"v_cmp_nge_f64", COND_ULT, "v_cmp_nle_f64">; 378defm V_CMP_NLG_F64 : VOPC_F64 <"v_cmp_nlg_f64", COND_UEQ>; 379defm V_CMP_NGT_F64 : VOPC_F64 <"v_cmp_ngt_f64", COND_ULE, "v_cmp_nlt_f64">; 380defm V_CMP_NLE_F64 : VOPC_F64 <"v_cmp_nle_f64", COND_UGT>; 381defm V_CMP_NEQ_F64 : VOPC_F64 <"v_cmp_neq_f64", COND_UNE>; 382defm V_CMP_NLT_F64 : VOPC_F64 <"v_cmp_nlt_f64", COND_UGE>; 383defm V_CMP_TRU_F64 : VOPC_F64 <"v_cmp_tru_f64">; 384 385defm V_CMPX_F_F64 : VOPCX_F64 <"v_cmpx_f_f64">; 386defm V_CMPX_LT_F64 : VOPCX_F64 <"v_cmpx_lt_f64", "v_cmpx_gt_f64">; 387defm V_CMPX_EQ_F64 : VOPCX_F64 <"v_cmpx_eq_f64">; 388defm V_CMPX_LE_F64 : VOPCX_F64 <"v_cmpx_le_f64", "v_cmpx_ge_f64">; 389defm V_CMPX_GT_F64 : VOPCX_F64 <"v_cmpx_gt_f64">; 390defm V_CMPX_LG_F64 : VOPCX_F64 <"v_cmpx_lg_f64">; 391defm V_CMPX_GE_F64 : VOPCX_F64 <"v_cmpx_ge_f64">; 392defm V_CMPX_O_F64 : VOPCX_F64 <"v_cmpx_o_f64">; 393defm V_CMPX_U_F64 : VOPCX_F64 <"v_cmpx_u_f64">; 394defm V_CMPX_NGE_F64 : VOPCX_F64 <"v_cmpx_nge_f64", "v_cmpx_nle_f64">; 395defm V_CMPX_NLG_F64 : VOPCX_F64 <"v_cmpx_nlg_f64">; 396defm V_CMPX_NGT_F64 : VOPCX_F64 <"v_cmpx_ngt_f64", "v_cmpx_nlt_f64">; 397defm V_CMPX_NLE_F64 : VOPCX_F64 <"v_cmpx_nle_f64">; 398defm V_CMPX_NEQ_F64 : VOPCX_F64 <"v_cmpx_neq_f64">; 399defm V_CMPX_NLT_F64 : VOPCX_F64 <"v_cmpx_nlt_f64">; 400defm V_CMPX_TRU_F64 : VOPCX_F64 <"v_cmpx_tru_f64">; 401 402let SubtargetPredicate = isGFX6GFX7 in { 403 404defm V_CMPS_F_F32 : VOPC_F32 <"v_cmps_f_f32">; 405defm V_CMPS_LT_F32 : VOPC_F32 <"v_cmps_lt_f32", COND_NULL, "v_cmps_gt_f32">; 406defm V_CMPS_EQ_F32 : VOPC_F32 <"v_cmps_eq_f32">; 407defm V_CMPS_LE_F32 : VOPC_F32 <"v_cmps_le_f32", COND_NULL, "v_cmps_ge_f32">; 408defm V_CMPS_GT_F32 : VOPC_F32 <"v_cmps_gt_f32">; 409defm V_CMPS_LG_F32 : VOPC_F32 <"v_cmps_lg_f32">; 410defm V_CMPS_GE_F32 : VOPC_F32 <"v_cmps_ge_f32">; 411defm V_CMPS_O_F32 : VOPC_F32 <"v_cmps_o_f32">; 412defm V_CMPS_U_F32 : VOPC_F32 <"v_cmps_u_f32">; 413defm V_CMPS_NGE_F32 : VOPC_F32 <"v_cmps_nge_f32", COND_NULL, "v_cmps_nle_f32">; 414defm V_CMPS_NLG_F32 : VOPC_F32 <"v_cmps_nlg_f32">; 415defm V_CMPS_NGT_F32 : VOPC_F32 <"v_cmps_ngt_f32", COND_NULL, "v_cmps_nlt_f32">; 416defm V_CMPS_NLE_F32 : VOPC_F32 <"v_cmps_nle_f32">; 417defm V_CMPS_NEQ_F32 : VOPC_F32 <"v_cmps_neq_f32">; 418defm V_CMPS_NLT_F32 : VOPC_F32 <"v_cmps_nlt_f32">; 419defm V_CMPS_TRU_F32 : VOPC_F32 <"v_cmps_tru_f32">; 420 421defm V_CMPSX_F_F32 : VOPCX_F32 <"v_cmpsx_f_f32">; 422defm V_CMPSX_LT_F32 : VOPCX_F32 <"v_cmpsx_lt_f32", "v_cmpsx_gt_f32">; 423defm V_CMPSX_EQ_F32 : VOPCX_F32 <"v_cmpsx_eq_f32">; 424defm V_CMPSX_LE_F32 : VOPCX_F32 <"v_cmpsx_le_f32", "v_cmpsx_ge_f32">; 425defm V_CMPSX_GT_F32 : VOPCX_F32 <"v_cmpsx_gt_f32">; 426defm V_CMPSX_LG_F32 : VOPCX_F32 <"v_cmpsx_lg_f32">; 427defm V_CMPSX_GE_F32 : VOPCX_F32 <"v_cmpsx_ge_f32">; 428defm V_CMPSX_O_F32 : VOPCX_F32 <"v_cmpsx_o_f32">; 429defm V_CMPSX_U_F32 : VOPCX_F32 <"v_cmpsx_u_f32">; 430defm V_CMPSX_NGE_F32 : VOPCX_F32 <"v_cmpsx_nge_f32", "v_cmpsx_nle_f32">; 431defm V_CMPSX_NLG_F32 : VOPCX_F32 <"v_cmpsx_nlg_f32">; 432defm V_CMPSX_NGT_F32 : VOPCX_F32 <"v_cmpsx_ngt_f32", "v_cmpsx_nlt_f32">; 433defm V_CMPSX_NLE_F32 : VOPCX_F32 <"v_cmpsx_nle_f32">; 434defm V_CMPSX_NEQ_F32 : VOPCX_F32 <"v_cmpsx_neq_f32">; 435defm V_CMPSX_NLT_F32 : VOPCX_F32 <"v_cmpsx_nlt_f32">; 436defm V_CMPSX_TRU_F32 : VOPCX_F32 <"v_cmpsx_tru_f32">; 437 438defm V_CMPS_F_F64 : VOPC_F64 <"v_cmps_f_f64">; 439defm V_CMPS_LT_F64 : VOPC_F64 <"v_cmps_lt_f64", COND_NULL, "v_cmps_gt_f64">; 440defm V_CMPS_EQ_F64 : VOPC_F64 <"v_cmps_eq_f64">; 441defm V_CMPS_LE_F64 : VOPC_F64 <"v_cmps_le_f64", COND_NULL, "v_cmps_ge_f64">; 442defm V_CMPS_GT_F64 : VOPC_F64 <"v_cmps_gt_f64">; 443defm V_CMPS_LG_F64 : VOPC_F64 <"v_cmps_lg_f64">; 444defm V_CMPS_GE_F64 : VOPC_F64 <"v_cmps_ge_f64">; 445defm V_CMPS_O_F64 : VOPC_F64 <"v_cmps_o_f64">; 446defm V_CMPS_U_F64 : VOPC_F64 <"v_cmps_u_f64">; 447defm V_CMPS_NGE_F64 : VOPC_F64 <"v_cmps_nge_f64", COND_NULL, "v_cmps_nle_f64">; 448defm V_CMPS_NLG_F64 : VOPC_F64 <"v_cmps_nlg_f64">; 449defm V_CMPS_NGT_F64 : VOPC_F64 <"v_cmps_ngt_f64", COND_NULL, "v_cmps_nlt_f64">; 450defm V_CMPS_NLE_F64 : VOPC_F64 <"v_cmps_nle_f64">; 451defm V_CMPS_NEQ_F64 : VOPC_F64 <"v_cmps_neq_f64">; 452defm V_CMPS_NLT_F64 : VOPC_F64 <"v_cmps_nlt_f64">; 453defm V_CMPS_TRU_F64 : VOPC_F64 <"v_cmps_tru_f64">; 454 455defm V_CMPSX_F_F64 : VOPCX_F64 <"v_cmpsx_f_f64">; 456defm V_CMPSX_LT_F64 : VOPCX_F64 <"v_cmpsx_lt_f64", "v_cmpsx_gt_f64">; 457defm V_CMPSX_EQ_F64 : VOPCX_F64 <"v_cmpsx_eq_f64">; 458defm V_CMPSX_LE_F64 : VOPCX_F64 <"v_cmpsx_le_f64", "v_cmpsx_ge_f64">; 459defm V_CMPSX_GT_F64 : VOPCX_F64 <"v_cmpsx_gt_f64">; 460defm V_CMPSX_LG_F64 : VOPCX_F64 <"v_cmpsx_lg_f64">; 461defm V_CMPSX_GE_F64 : VOPCX_F64 <"v_cmpsx_ge_f64">; 462defm V_CMPSX_O_F64 : VOPCX_F64 <"v_cmpsx_o_f64">; 463defm V_CMPSX_U_F64 : VOPCX_F64 <"v_cmpsx_u_f64">; 464defm V_CMPSX_NGE_F64 : VOPCX_F64 <"v_cmpsx_nge_f64", "v_cmpsx_nle_f64">; 465defm V_CMPSX_NLG_F64 : VOPCX_F64 <"v_cmpsx_nlg_f64">; 466defm V_CMPSX_NGT_F64 : VOPCX_F64 <"v_cmpsx_ngt_f64", "v_cmpsx_nlt_f64">; 467defm V_CMPSX_NLE_F64 : VOPCX_F64 <"v_cmpsx_nle_f64">; 468defm V_CMPSX_NEQ_F64 : VOPCX_F64 <"v_cmpsx_neq_f64">; 469defm V_CMPSX_NLT_F64 : VOPCX_F64 <"v_cmpsx_nlt_f64">; 470defm V_CMPSX_TRU_F64 : VOPCX_F64 <"v_cmpsx_tru_f64">; 471 472} // End SubtargetPredicate = isGFX6GFX7 473 474let SubtargetPredicate = Has16BitInsts in { 475 476defm V_CMP_F_F16 : VOPC_F16 <"v_cmp_f_f16">; 477defm V_CMP_LT_F16 : VOPC_F16 <"v_cmp_lt_f16", COND_OLT, "v_cmp_gt_f16">; 478defm V_CMP_EQ_F16 : VOPC_F16 <"v_cmp_eq_f16", COND_OEQ>; 479defm V_CMP_LE_F16 : VOPC_F16 <"v_cmp_le_f16", COND_OLE, "v_cmp_ge_f16">; 480defm V_CMP_GT_F16 : VOPC_F16 <"v_cmp_gt_f16", COND_OGT>; 481defm V_CMP_LG_F16 : VOPC_F16 <"v_cmp_lg_f16", COND_ONE>; 482defm V_CMP_GE_F16 : VOPC_F16 <"v_cmp_ge_f16", COND_OGE>; 483defm V_CMP_O_F16 : VOPC_F16 <"v_cmp_o_f16", COND_O>; 484defm V_CMP_U_F16 : VOPC_F16 <"v_cmp_u_f16", COND_UO>; 485defm V_CMP_NGE_F16 : VOPC_F16 <"v_cmp_nge_f16", COND_ULT, "v_cmp_nle_f16">; 486defm V_CMP_NLG_F16 : VOPC_F16 <"v_cmp_nlg_f16", COND_UEQ>; 487defm V_CMP_NGT_F16 : VOPC_F16 <"v_cmp_ngt_f16", COND_ULE, "v_cmp_nlt_f16">; 488defm V_CMP_NLE_F16 : VOPC_F16 <"v_cmp_nle_f16", COND_UGT>; 489defm V_CMP_NEQ_F16 : VOPC_F16 <"v_cmp_neq_f16", COND_UNE>; 490defm V_CMP_NLT_F16 : VOPC_F16 <"v_cmp_nlt_f16", COND_UGE>; 491defm V_CMP_TRU_F16 : VOPC_F16 <"v_cmp_tru_f16">; 492 493defm V_CMPX_F_F16 : VOPCX_F16 <"v_cmpx_f_f16">; 494defm V_CMPX_LT_F16 : VOPCX_F16 <"v_cmpx_lt_f16", "v_cmpx_gt_f16">; 495defm V_CMPX_EQ_F16 : VOPCX_F16 <"v_cmpx_eq_f16">; 496defm V_CMPX_LE_F16 : VOPCX_F16 <"v_cmpx_le_f16", "v_cmpx_ge_f16">; 497defm V_CMPX_GT_F16 : VOPCX_F16 <"v_cmpx_gt_f16">; 498defm V_CMPX_LG_F16 : VOPCX_F16 <"v_cmpx_lg_f16">; 499defm V_CMPX_GE_F16 : VOPCX_F16 <"v_cmpx_ge_f16">; 500defm V_CMPX_O_F16 : VOPCX_F16 <"v_cmpx_o_f16">; 501defm V_CMPX_U_F16 : VOPCX_F16 <"v_cmpx_u_f16">; 502defm V_CMPX_NGE_F16 : VOPCX_F16 <"v_cmpx_nge_f16", "v_cmpx_nle_f16">; 503defm V_CMPX_NLG_F16 : VOPCX_F16 <"v_cmpx_nlg_f16">; 504defm V_CMPX_NGT_F16 : VOPCX_F16 <"v_cmpx_ngt_f16", "v_cmpx_nlt_f16">; 505defm V_CMPX_NLE_F16 : VOPCX_F16 <"v_cmpx_nle_f16">; 506defm V_CMPX_NEQ_F16 : VOPCX_F16 <"v_cmpx_neq_f16">; 507defm V_CMPX_NLT_F16 : VOPCX_F16 <"v_cmpx_nlt_f16">; 508defm V_CMPX_TRU_F16 : VOPCX_F16 <"v_cmpx_tru_f16">; 509 510defm V_CMP_F_I16 : VOPC_I16 <"v_cmp_f_i16">; 511defm V_CMP_LT_I16 : VOPC_I16 <"v_cmp_lt_i16", COND_SLT, "v_cmp_gt_i16">; 512defm V_CMP_EQ_I16 : VOPC_I16 <"v_cmp_eq_i16">; 513defm V_CMP_LE_I16 : VOPC_I16 <"v_cmp_le_i16", COND_SLE, "v_cmp_ge_i16">; 514defm V_CMP_GT_I16 : VOPC_I16 <"v_cmp_gt_i16", COND_SGT>; 515defm V_CMP_NE_I16 : VOPC_I16 <"v_cmp_ne_i16">; 516defm V_CMP_GE_I16 : VOPC_I16 <"v_cmp_ge_i16", COND_SGE>; 517defm V_CMP_T_I16 : VOPC_I16 <"v_cmp_t_i16">; 518 519defm V_CMP_F_U16 : VOPC_I16 <"v_cmp_f_u16">; 520defm V_CMP_LT_U16 : VOPC_I16 <"v_cmp_lt_u16", COND_ULT, "v_cmp_gt_u16">; 521defm V_CMP_EQ_U16 : VOPC_I16 <"v_cmp_eq_u16", COND_EQ>; 522defm V_CMP_LE_U16 : VOPC_I16 <"v_cmp_le_u16", COND_ULE, "v_cmp_ge_u16">; 523defm V_CMP_GT_U16 : VOPC_I16 <"v_cmp_gt_u16", COND_UGT>; 524defm V_CMP_NE_U16 : VOPC_I16 <"v_cmp_ne_u16", COND_NE>; 525defm V_CMP_GE_U16 : VOPC_I16 <"v_cmp_ge_u16", COND_UGE>; 526defm V_CMP_T_U16 : VOPC_I16 <"v_cmp_t_u16">; 527 528defm V_CMPX_F_I16 : VOPCX_I16 <"v_cmpx_f_i16">; 529defm V_CMPX_LT_I16 : VOPCX_I16 <"v_cmpx_lt_i16", "v_cmpx_gt_i16">; 530defm V_CMPX_EQ_I16 : VOPCX_I16 <"v_cmpx_eq_i16">; 531defm V_CMPX_LE_I16 : VOPCX_I16 <"v_cmpx_le_i16", "v_cmpx_ge_i16">; 532defm V_CMPX_GT_I16 : VOPCX_I16 <"v_cmpx_gt_i16">; 533defm V_CMPX_NE_I16 : VOPCX_I16 <"v_cmpx_ne_i16">; 534defm V_CMPX_GE_I16 : VOPCX_I16 <"v_cmpx_ge_i16">; 535defm V_CMPX_T_I16 : VOPCX_I16 <"v_cmpx_t_i16">; 536defm V_CMPX_F_U16 : VOPCX_I16 <"v_cmpx_f_u16">; 537 538defm V_CMPX_LT_U16 : VOPCX_I16 <"v_cmpx_lt_u16", "v_cmpx_gt_u16">; 539defm V_CMPX_EQ_U16 : VOPCX_I16 <"v_cmpx_eq_u16">; 540defm V_CMPX_LE_U16 : VOPCX_I16 <"v_cmpx_le_u16", "v_cmpx_ge_u16">; 541defm V_CMPX_GT_U16 : VOPCX_I16 <"v_cmpx_gt_u16">; 542defm V_CMPX_NE_U16 : VOPCX_I16 <"v_cmpx_ne_u16">; 543defm V_CMPX_GE_U16 : VOPCX_I16 <"v_cmpx_ge_u16">; 544defm V_CMPX_T_U16 : VOPCX_I16 <"v_cmpx_t_u16">; 545 546} // End SubtargetPredicate = Has16BitInsts 547 548defm V_CMP_F_I32 : VOPC_I32 <"v_cmp_f_i32">; 549defm V_CMP_LT_I32 : VOPC_I32 <"v_cmp_lt_i32", COND_SLT, "v_cmp_gt_i32">; 550defm V_CMP_EQ_I32 : VOPC_I32 <"v_cmp_eq_i32">; 551defm V_CMP_LE_I32 : VOPC_I32 <"v_cmp_le_i32", COND_SLE, "v_cmp_ge_i32">; 552defm V_CMP_GT_I32 : VOPC_I32 <"v_cmp_gt_i32", COND_SGT>; 553defm V_CMP_NE_I32 : VOPC_I32 <"v_cmp_ne_i32">; 554defm V_CMP_GE_I32 : VOPC_I32 <"v_cmp_ge_i32", COND_SGE>; 555defm V_CMP_T_I32 : VOPC_I32 <"v_cmp_t_i32">; 556 557defm V_CMPX_F_I32 : VOPCX_I32 <"v_cmpx_f_i32">; 558defm V_CMPX_LT_I32 : VOPCX_I32 <"v_cmpx_lt_i32", "v_cmpx_gt_i32">; 559defm V_CMPX_EQ_I32 : VOPCX_I32 <"v_cmpx_eq_i32">; 560defm V_CMPX_LE_I32 : VOPCX_I32 <"v_cmpx_le_i32", "v_cmpx_ge_i32">; 561defm V_CMPX_GT_I32 : VOPCX_I32 <"v_cmpx_gt_i32">; 562defm V_CMPX_NE_I32 : VOPCX_I32 <"v_cmpx_ne_i32">; 563defm V_CMPX_GE_I32 : VOPCX_I32 <"v_cmpx_ge_i32">; 564defm V_CMPX_T_I32 : VOPCX_I32 <"v_cmpx_t_i32">; 565 566defm V_CMP_F_I64 : VOPC_I64 <"v_cmp_f_i64">; 567defm V_CMP_LT_I64 : VOPC_I64 <"v_cmp_lt_i64", COND_SLT, "v_cmp_gt_i64">; 568defm V_CMP_EQ_I64 : VOPC_I64 <"v_cmp_eq_i64">; 569defm V_CMP_LE_I64 : VOPC_I64 <"v_cmp_le_i64", COND_SLE, "v_cmp_ge_i64">; 570defm V_CMP_GT_I64 : VOPC_I64 <"v_cmp_gt_i64", COND_SGT>; 571defm V_CMP_NE_I64 : VOPC_I64 <"v_cmp_ne_i64">; 572defm V_CMP_GE_I64 : VOPC_I64 <"v_cmp_ge_i64", COND_SGE>; 573defm V_CMP_T_I64 : VOPC_I64 <"v_cmp_t_i64">; 574 575defm V_CMPX_F_I64 : VOPCX_I64 <"v_cmpx_f_i64">; 576defm V_CMPX_LT_I64 : VOPCX_I64 <"v_cmpx_lt_i64", "v_cmpx_gt_i64">; 577defm V_CMPX_EQ_I64 : VOPCX_I64 <"v_cmpx_eq_i64">; 578defm V_CMPX_LE_I64 : VOPCX_I64 <"v_cmpx_le_i64", "v_cmpx_ge_i64">; 579defm V_CMPX_GT_I64 : VOPCX_I64 <"v_cmpx_gt_i64">; 580defm V_CMPX_NE_I64 : VOPCX_I64 <"v_cmpx_ne_i64">; 581defm V_CMPX_GE_I64 : VOPCX_I64 <"v_cmpx_ge_i64">; 582defm V_CMPX_T_I64 : VOPCX_I64 <"v_cmpx_t_i64">; 583 584defm V_CMP_F_U32 : VOPC_I32 <"v_cmp_f_u32">; 585defm V_CMP_LT_U32 : VOPC_I32 <"v_cmp_lt_u32", COND_ULT, "v_cmp_gt_u32">; 586defm V_CMP_EQ_U32 : VOPC_I32 <"v_cmp_eq_u32", COND_EQ>; 587defm V_CMP_LE_U32 : VOPC_I32 <"v_cmp_le_u32", COND_ULE, "v_cmp_ge_u32">; 588defm V_CMP_GT_U32 : VOPC_I32 <"v_cmp_gt_u32", COND_UGT>; 589defm V_CMP_NE_U32 : VOPC_I32 <"v_cmp_ne_u32", COND_NE>; 590defm V_CMP_GE_U32 : VOPC_I32 <"v_cmp_ge_u32", COND_UGE>; 591defm V_CMP_T_U32 : VOPC_I32 <"v_cmp_t_u32">; 592 593defm V_CMPX_F_U32 : VOPCX_I32 <"v_cmpx_f_u32">; 594defm V_CMPX_LT_U32 : VOPCX_I32 <"v_cmpx_lt_u32", "v_cmpx_gt_u32">; 595defm V_CMPX_EQ_U32 : VOPCX_I32 <"v_cmpx_eq_u32">; 596defm V_CMPX_LE_U32 : VOPCX_I32 <"v_cmpx_le_u32", "v_cmpx_le_u32">; 597defm V_CMPX_GT_U32 : VOPCX_I32 <"v_cmpx_gt_u32">; 598defm V_CMPX_NE_U32 : VOPCX_I32 <"v_cmpx_ne_u32">; 599defm V_CMPX_GE_U32 : VOPCX_I32 <"v_cmpx_ge_u32">; 600defm V_CMPX_T_U32 : VOPCX_I32 <"v_cmpx_t_u32">; 601 602defm V_CMP_F_U64 : VOPC_I64 <"v_cmp_f_u64">; 603defm V_CMP_LT_U64 : VOPC_I64 <"v_cmp_lt_u64", COND_ULT, "v_cmp_gt_u64">; 604defm V_CMP_EQ_U64 : VOPC_I64 <"v_cmp_eq_u64", COND_EQ>; 605defm V_CMP_LE_U64 : VOPC_I64 <"v_cmp_le_u64", COND_ULE, "v_cmp_ge_u64">; 606defm V_CMP_GT_U64 : VOPC_I64 <"v_cmp_gt_u64", COND_UGT>; 607defm V_CMP_NE_U64 : VOPC_I64 <"v_cmp_ne_u64", COND_NE>; 608defm V_CMP_GE_U64 : VOPC_I64 <"v_cmp_ge_u64", COND_UGE>; 609defm V_CMP_T_U64 : VOPC_I64 <"v_cmp_t_u64">; 610 611defm V_CMPX_F_U64 : VOPCX_I64 <"v_cmpx_f_u64">; 612defm V_CMPX_LT_U64 : VOPCX_I64 <"v_cmpx_lt_u64", "v_cmpx_gt_u64">; 613defm V_CMPX_EQ_U64 : VOPCX_I64 <"v_cmpx_eq_u64">; 614defm V_CMPX_LE_U64 : VOPCX_I64 <"v_cmpx_le_u64", "v_cmpx_ge_u64">; 615defm V_CMPX_GT_U64 : VOPCX_I64 <"v_cmpx_gt_u64">; 616defm V_CMPX_NE_U64 : VOPCX_I64 <"v_cmpx_ne_u64">; 617defm V_CMPX_GE_U64 : VOPCX_I64 <"v_cmpx_ge_u64">; 618defm V_CMPX_T_U64 : VOPCX_I64 <"v_cmpx_t_u64">; 619 620//===----------------------------------------------------------------------===// 621// Class instructions 622//===----------------------------------------------------------------------===// 623 624class VOPC_Class_Profile<list<SchedReadWrite> sched, ValueType vt> : 625 VOPC_Profile<sched, vt, i32> { 626 let Ins64 = (ins Src0Mod:$src0_modifiers, Src0RC64:$src0, Src1RC64:$src1); 627 let Asm64 = "$sdst, $src0_modifiers, $src1"; 628 629 let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0, 630 Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1, 631 clampmod:$clamp, src0_sel:$src0_sel, src1_sel:$src1_sel); 632 633 let AsmSDWA = " vcc, $src0_modifiers, $src1_modifiers$clamp $src0_sel $src1_sel"; 634 let HasSrc1Mods = 0; 635 let HasClamp = 0; 636 let HasOMod = 0; 637} 638 639class VOPC_Class_NoSdst_Profile<list<SchedReadWrite> sched, ValueType vt> : 640 VOPC_Class_Profile<sched, vt> { 641 let Outs64 = (outs ); 642 let OutsSDWA = (outs ); 643 let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0, 644 Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1, 645 src0_sel:$src0_sel, src1_sel:$src1_sel); 646 let Asm64 = "$src0_modifiers, $src1"; 647 let AsmSDWA9 = "$src0_modifiers, $src1_modifiers $src0_sel $src1_sel"; 648 let EmitDst = 0; 649} 650 651class getVOPCClassPat64 <VOPProfile P> { 652 list<dag> ret = 653 [(set i1:$sdst, 654 (AMDGPUfp_class 655 (P.Src0VT (VOP3Mods P.Src0VT:$src0, i32:$src0_modifiers)), 656 P.Src1VT:$src1))]; 657} 658 659// Special case for class instructions which only have modifiers on 660// the 1st source operand. 661multiclass VOPC_Class_Pseudos <string opName, VOPC_Profile p, bit DefExec, 662 bit DefVcc = 1> { 663 def _e32 : VOPC_Pseudo <opName, p>, 664 VCMPXNoSDstTable<1, opName#"_e32"> { 665 let Defs = !if(DefExec, !if(DefVcc, [VCC, EXEC], [EXEC]), 666 !if(DefVcc, [VCC], [])); 667 let SchedRW = p.Schedule; 668 let isConvergent = DefExec; 669 } 670 671 def _e64 : VOP3_Pseudo<opName, p, getVOPCClassPat64<p>.ret>, 672 VCMPXNoSDstTable<1, opName#"_e64"> { 673 let Defs = !if(DefExec, [EXEC], []); 674 let SchedRW = p.Schedule; 675 } 676 677 foreach _ = BoolToList<p.HasExtSDWA>.ret in 678 def _sdwa : VOPC_SDWA_Pseudo <opName, p> { 679 let Defs = !if(DefExec, !if(DefVcc, [VCC, EXEC], [EXEC]), 680 !if(DefVcc, [VCC], [])); 681 let SchedRW = p.Schedule; 682 let isConvergent = DefExec; 683 } 684} 685 686let SubtargetPredicate = HasSdstCMPX in { 687multiclass VOPCX_Class_Pseudos <string opName, 688 VOPC_Profile P, 689 VOPC_Profile P_NoSDst> : 690 VOPC_Class_Pseudos <opName, P, 1, 1> { 691 692 def _nosdst_e32 : VOPC_Pseudo <opName#"_nosdst", P_NoSDst, [], 0>, 693 VCMPXNoSDstTable<0, opName#"_e32"> { 694 let Defs = [EXEC]; 695 let SchedRW = P_NoSDst.Schedule; 696 let isConvergent = 1; 697 let SubtargetPredicate = HasNoSdstCMPX; 698 } 699 700 def _nosdst_e64 : VOP3_Pseudo<opName#"_nosdst", P_NoSDst>, 701 VCMPXNoSDstTable<0, opName#"_e64"> { 702 let Defs = [EXEC]; 703 let SchedRW = P_NoSDst.Schedule; 704 let SubtargetPredicate = HasNoSdstCMPX; 705 } 706 707 foreach _ = BoolToList<P_NoSDst.HasExtSDWA>.ret in 708 def _nosdst_sdwa : VOPC_SDWA_Pseudo <opName#"_nosdst", P_NoSDst> { 709 let Defs = [EXEC]; 710 let SchedRW = P_NoSDst.Schedule; 711 let isConvergent = 1; 712 let SubtargetPredicate = HasNoSdstCMPX; 713 } 714} 715} // End SubtargetPredicate = HasSdstCMPX 716 717def VOPC_I1_F16_I32 : VOPC_Class_Profile<[Write32Bit], f16>; 718def VOPC_I1_F32_I32 : VOPC_Class_Profile<[Write32Bit], f32>; 719def VOPC_I1_F64_I32 : VOPC_Class_Profile<[WriteDoubleAdd], f64>; 720 721def VOPC_F16_I32 : VOPC_Class_NoSdst_Profile<[Write32Bit], f16>; 722def VOPC_F32_I32 : VOPC_Class_NoSdst_Profile<[Write32Bit], f32>; 723def VOPC_F64_I32 : VOPC_Class_NoSdst_Profile<[Write64Bit], f64>; 724 725multiclass VOPC_CLASS_F16 <string opName> : 726 VOPC_Class_Pseudos <opName, VOPC_I1_F16_I32, 0>; 727 728multiclass VOPCX_CLASS_F16 <string opName> : 729 VOPCX_Class_Pseudos <opName, VOPC_I1_F16_I32, VOPC_F16_I32>; 730 731multiclass VOPC_CLASS_F32 <string opName> : 732 VOPC_Class_Pseudos <opName, VOPC_I1_F32_I32, 0>; 733 734multiclass VOPCX_CLASS_F32 <string opName> : 735 VOPCX_Class_Pseudos <opName, VOPC_I1_F32_I32, VOPC_F32_I32>; 736 737multiclass VOPC_CLASS_F64 <string opName> : 738 VOPC_Class_Pseudos <opName, VOPC_I1_F64_I32, 0>; 739 740multiclass VOPCX_CLASS_F64 <string opName> : 741 VOPCX_Class_Pseudos <opName, VOPC_I1_F64_I32, VOPC_F64_I32>; 742 743// cmp_class ignores the FP mode and faithfully reports the unmodified 744// source value. 745let ReadsModeReg = 0, mayRaiseFPException = 0 in { 746defm V_CMP_CLASS_F32 : VOPC_CLASS_F32 <"v_cmp_class_f32">; 747defm V_CMPX_CLASS_F32 : VOPCX_CLASS_F32 <"v_cmpx_class_f32">; 748defm V_CMP_CLASS_F64 : VOPC_CLASS_F64 <"v_cmp_class_f64">; 749defm V_CMPX_CLASS_F64 : VOPCX_CLASS_F64 <"v_cmpx_class_f64">; 750 751let SubtargetPredicate = Has16BitInsts in { 752defm V_CMP_CLASS_F16 : VOPC_CLASS_F16 <"v_cmp_class_f16">; 753defm V_CMPX_CLASS_F16 : VOPCX_CLASS_F16 <"v_cmpx_class_f16">; 754} 755} // End ReadsModeReg = 0, mayRaiseFPException = 0 756 757//===----------------------------------------------------------------------===// 758// V_ICMPIntrinsic Pattern. 759//===----------------------------------------------------------------------===// 760 761// We need to use COPY_TO_REGCLASS to w/a the problem when ReplaceAllUsesWith() 762// complaints it cannot replace i1 <-> i64/i32 if node was not morphed in place. 763multiclass ICMP_Pattern <PatLeaf cond, Instruction inst, ValueType vt> { 764 let WaveSizePredicate = isWave64 in 765 def : GCNPat < 766 (i64 (AMDGPUsetcc vt:$src0, vt:$src1, cond)), 767 (i64 (COPY_TO_REGCLASS (inst $src0, $src1), SReg_64)) 768 >; 769 770 let WaveSizePredicate = isWave32 in 771 def : GCNPat < 772 (i32 (AMDGPUsetcc vt:$src0, vt:$src1, cond)), 773 (i32 (COPY_TO_REGCLASS (inst $src0, $src1), SReg_32)) 774 >; 775} 776 777defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U32_e64, i32>; 778defm : ICMP_Pattern <COND_NE, V_CMP_NE_U32_e64, i32>; 779defm : ICMP_Pattern <COND_UGT, V_CMP_GT_U32_e64, i32>; 780defm : ICMP_Pattern <COND_UGE, V_CMP_GE_U32_e64, i32>; 781defm : ICMP_Pattern <COND_ULT, V_CMP_LT_U32_e64, i32>; 782defm : ICMP_Pattern <COND_ULE, V_CMP_LE_U32_e64, i32>; 783defm : ICMP_Pattern <COND_SGT, V_CMP_GT_I32_e64, i32>; 784defm : ICMP_Pattern <COND_SGE, V_CMP_GE_I32_e64, i32>; 785defm : ICMP_Pattern <COND_SLT, V_CMP_LT_I32_e64, i32>; 786defm : ICMP_Pattern <COND_SLE, V_CMP_LE_I32_e64, i32>; 787 788defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U64_e64, i64>; 789defm : ICMP_Pattern <COND_NE, V_CMP_NE_U64_e64, i64>; 790defm : ICMP_Pattern <COND_UGT, V_CMP_GT_U64_e64, i64>; 791defm : ICMP_Pattern <COND_UGE, V_CMP_GE_U64_e64, i64>; 792defm : ICMP_Pattern <COND_ULT, V_CMP_LT_U64_e64, i64>; 793defm : ICMP_Pattern <COND_ULE, V_CMP_LE_U64_e64, i64>; 794defm : ICMP_Pattern <COND_SGT, V_CMP_GT_I64_e64, i64>; 795defm : ICMP_Pattern <COND_SGE, V_CMP_GE_I64_e64, i64>; 796defm : ICMP_Pattern <COND_SLT, V_CMP_LT_I64_e64, i64>; 797defm : ICMP_Pattern <COND_SLE, V_CMP_LE_I64_e64, i64>; 798 799defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U16_e64, i16>; 800defm : ICMP_Pattern <COND_NE, V_CMP_NE_U16_e64, i16>; 801defm : ICMP_Pattern <COND_UGT, V_CMP_GT_U16_e64, i16>; 802defm : ICMP_Pattern <COND_UGE, V_CMP_GE_U16_e64, i16>; 803defm : ICMP_Pattern <COND_ULT, V_CMP_LT_U16_e64, i16>; 804defm : ICMP_Pattern <COND_ULE, V_CMP_LE_U16_e64, i16>; 805defm : ICMP_Pattern <COND_SGT, V_CMP_GT_I16_e64, i16>; 806defm : ICMP_Pattern <COND_SGE, V_CMP_GE_I16_e64, i16>; 807defm : ICMP_Pattern <COND_SLT, V_CMP_LT_I16_e64, i16>; 808defm : ICMP_Pattern <COND_SLE, V_CMP_LE_I16_e64, i16>; 809 810multiclass FCMP_Pattern <PatLeaf cond, Instruction inst, ValueType vt> { 811 let WaveSizePredicate = isWave64 in 812 def : GCNPat < 813 (i64 (AMDGPUsetcc (vt (VOP3Mods vt:$src0, i32:$src0_modifiers)), 814 (vt (VOP3Mods vt:$src1, i32:$src1_modifiers)), cond)), 815 (i64 (COPY_TO_REGCLASS (inst $src0_modifiers, $src0, $src1_modifiers, $src1, 816 DSTCLAMP.NONE), SReg_64)) 817 >; 818 819 let WaveSizePredicate = isWave32 in 820 def : GCNPat < 821 (i32 (AMDGPUsetcc (vt (VOP3Mods vt:$src0, i32:$src0_modifiers)), 822 (vt (VOP3Mods vt:$src1, i32:$src1_modifiers)), cond)), 823 (i32 (COPY_TO_REGCLASS (inst $src0_modifiers, $src0, $src1_modifiers, $src1, 824 DSTCLAMP.NONE), SReg_32)) 825 >; 826} 827 828defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F32_e64, f32>; 829defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F32_e64, f32>; 830defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F32_e64, f32>; 831defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F32_e64, f32>; 832defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F32_e64, f32>; 833defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F32_e64, f32>; 834 835defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F64_e64, f64>; 836defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F64_e64, f64>; 837defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F64_e64, f64>; 838defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F64_e64, f64>; 839defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F64_e64, f64>; 840defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F64_e64, f64>; 841 842defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F16_e64, f16>; 843defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F16_e64, f16>; 844defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F16_e64, f16>; 845defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F16_e64, f16>; 846defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F16_e64, f16>; 847defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F16_e64, f16>; 848 849 850defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F32_e64, f32>; 851defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F32_e64, f32>; 852defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F32_e64, f32>; 853defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F32_e64, f32>; 854defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F32_e64, f32>; 855defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F32_e64, f32>; 856 857defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F64_e64, f64>; 858defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F64_e64, f64>; 859defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F64_e64, f64>; 860defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F64_e64, f64>; 861defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F64_e64, f64>; 862defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F64_e64, f64>; 863 864defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F16_e64, f16>; 865defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F16_e64, f16>; 866defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F16_e64, f16>; 867defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F16_e64, f16>; 868defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F16_e64, f16>; 869defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F16_e64, f16>; 870 871//===----------------------------------------------------------------------===// 872// Target-specific instruction encodings. 873//===----------------------------------------------------------------------===// 874 875//===----------------------------------------------------------------------===// 876// GFX10. 877//===----------------------------------------------------------------------===// 878 879let AssemblerPredicate = isGFX10Plus in { 880 multiclass VOPC_Real_gfx10<bits<9> op> { 881 let DecoderNamespace = "GFX10" in { 882 def _e32_gfx10 : 883 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.GFX10>, 884 VOPCe<op{7-0}>; 885 def _e64_gfx10 : 886 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.GFX10>, 887 VOP3a_gfx10<{0, op}, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> { 888 // Encoding used for VOPC instructions encoded as VOP3 differs from 889 // VOP3e by destination name (sdst) as VOPC doesn't have vector dst. 890 bits<8> sdst; 891 let Inst{7-0} = sdst; 892 } 893 } // End DecoderNamespace = "GFX10" 894 895 foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_e32").Pfl.HasExtSDWA9>.ret in 896 def _sdwa_gfx10 : 897 VOP_SDWA10_Real<!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>, 898 VOPC_SDWA9e<op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>; 899 900 defm : VOPCInstAliases<NAME, "gfx10">; 901 } 902 903 multiclass VOPCX_Real_gfx10<bits<9> op> { 904 let DecoderNamespace = "GFX10" in { 905 def _e32_gfx10 : 906 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_nosdst_e32"), SIEncodingFamily.GFX10>, 907 VOPCe<op{7-0}> { 908 let AsmString = !subst("_nosdst", "", !cast<VOPC_Pseudo>(NAME#"_nosdst_e32").PseudoInstr) 909 # " " # !cast<VOPC_Pseudo>(NAME#"_nosdst_e32").AsmOperands; 910 } 911 912 def _e64_gfx10 : 913 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_nosdst_e64"), SIEncodingFamily.GFX10>, 914 VOP3a_gfx10<{0, op}, !cast<VOP3_Pseudo>(NAME#"_nosdst_e64").Pfl> { 915 let Inst{7-0} = ?; // sdst 916 let AsmString = !subst("_nosdst", "", !cast<VOP3_Pseudo>(NAME#"_nosdst_e64").Mnemonic) 917 # "{_e64} " # !cast<VOP3_Pseudo>(NAME#"_nosdst_e64").AsmOperands; 918 } 919 } // End DecoderNamespace = "GFX10" 920 921 foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_nosdst_e32").Pfl.HasExtSDWA9>.ret in 922 def _sdwa_gfx10 : 923 VOP_SDWA10_Real<!cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa")>, 924 VOPC_SDWA9e<op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa").Pfl> { 925 let AsmString = !subst("_nosdst", "", !cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa").Mnemonic) 926 # "{_sdwa} " # !cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa").AsmOperands9; 927 } 928 929 defm : VOPCXInstAliases<NAME, "gfx10">; 930 } 931} // End AssemblerPredicate = isGFX10Plus 932 933defm V_CMP_LT_I16 : VOPC_Real_gfx10<0x089>; 934defm V_CMP_EQ_I16 : VOPC_Real_gfx10<0x08a>; 935defm V_CMP_LE_I16 : VOPC_Real_gfx10<0x08b>; 936defm V_CMP_GT_I16 : VOPC_Real_gfx10<0x08c>; 937defm V_CMP_NE_I16 : VOPC_Real_gfx10<0x08d>; 938defm V_CMP_GE_I16 : VOPC_Real_gfx10<0x08e>; 939defm V_CMP_CLASS_F16 : VOPC_Real_gfx10<0x08f>; 940defm V_CMPX_LT_I16 : VOPCX_Real_gfx10<0x099>; 941defm V_CMPX_EQ_I16 : VOPCX_Real_gfx10<0x09a>; 942defm V_CMPX_LE_I16 : VOPCX_Real_gfx10<0x09b>; 943defm V_CMPX_GT_I16 : VOPCX_Real_gfx10<0x09c>; 944defm V_CMPX_NE_I16 : VOPCX_Real_gfx10<0x09d>; 945defm V_CMPX_GE_I16 : VOPCX_Real_gfx10<0x09e>; 946defm V_CMPX_CLASS_F16 : VOPCX_Real_gfx10<0x09f>; 947defm V_CMP_LT_U16 : VOPC_Real_gfx10<0x0a9>; 948defm V_CMP_EQ_U16 : VOPC_Real_gfx10<0x0aa>; 949defm V_CMP_LE_U16 : VOPC_Real_gfx10<0x0ab>; 950defm V_CMP_GT_U16 : VOPC_Real_gfx10<0x0ac>; 951defm V_CMP_NE_U16 : VOPC_Real_gfx10<0x0ad>; 952defm V_CMP_GE_U16 : VOPC_Real_gfx10<0x0ae>; 953defm V_CMPX_LT_U16 : VOPCX_Real_gfx10<0x0b9>; 954defm V_CMPX_EQ_U16 : VOPCX_Real_gfx10<0x0ba>; 955defm V_CMPX_LE_U16 : VOPCX_Real_gfx10<0x0bb>; 956defm V_CMPX_GT_U16 : VOPCX_Real_gfx10<0x0bc>; 957defm V_CMPX_NE_U16 : VOPCX_Real_gfx10<0x0bd>; 958defm V_CMPX_GE_U16 : VOPCX_Real_gfx10<0x0be>; 959defm V_CMP_F_F16 : VOPC_Real_gfx10<0x0c8>; 960defm V_CMP_LT_F16 : VOPC_Real_gfx10<0x0c9>; 961defm V_CMP_EQ_F16 : VOPC_Real_gfx10<0x0ca>; 962defm V_CMP_LE_F16 : VOPC_Real_gfx10<0x0cb>; 963defm V_CMP_GT_F16 : VOPC_Real_gfx10<0x0cc>; 964defm V_CMP_LG_F16 : VOPC_Real_gfx10<0x0cd>; 965defm V_CMP_GE_F16 : VOPC_Real_gfx10<0x0ce>; 966defm V_CMP_O_F16 : VOPC_Real_gfx10<0x0cf>; 967defm V_CMPX_F_F16 : VOPCX_Real_gfx10<0x0d8>; 968defm V_CMPX_LT_F16 : VOPCX_Real_gfx10<0x0d9>; 969defm V_CMPX_EQ_F16 : VOPCX_Real_gfx10<0x0da>; 970defm V_CMPX_LE_F16 : VOPCX_Real_gfx10<0x0db>; 971defm V_CMPX_GT_F16 : VOPCX_Real_gfx10<0x0dc>; 972defm V_CMPX_LG_F16 : VOPCX_Real_gfx10<0x0dd>; 973defm V_CMPX_GE_F16 : VOPCX_Real_gfx10<0x0de>; 974defm V_CMPX_O_F16 : VOPCX_Real_gfx10<0x0df>; 975defm V_CMP_U_F16 : VOPC_Real_gfx10<0x0e8>; 976defm V_CMP_NGE_F16 : VOPC_Real_gfx10<0x0e9>; 977defm V_CMP_NLG_F16 : VOPC_Real_gfx10<0x0ea>; 978defm V_CMP_NGT_F16 : VOPC_Real_gfx10<0x0eb>; 979defm V_CMP_NLE_F16 : VOPC_Real_gfx10<0x0ec>; 980defm V_CMP_NEQ_F16 : VOPC_Real_gfx10<0x0ed>; 981defm V_CMP_NLT_F16 : VOPC_Real_gfx10<0x0ee>; 982defm V_CMP_TRU_F16 : VOPC_Real_gfx10<0x0ef>; 983defm V_CMPX_U_F16 : VOPCX_Real_gfx10<0x0f8>; 984defm V_CMPX_NGE_F16 : VOPCX_Real_gfx10<0x0f9>; 985defm V_CMPX_NLG_F16 : VOPCX_Real_gfx10<0x0fa>; 986defm V_CMPX_NGT_F16 : VOPCX_Real_gfx10<0x0fb>; 987defm V_CMPX_NLE_F16 : VOPCX_Real_gfx10<0x0fc>; 988defm V_CMPX_NEQ_F16 : VOPCX_Real_gfx10<0x0fd>; 989defm V_CMPX_NLT_F16 : VOPCX_Real_gfx10<0x0fe>; 990defm V_CMPX_TRU_F16 : VOPCX_Real_gfx10<0x0ff>; 991 992//===----------------------------------------------------------------------===// 993// GFX6, GFX7, GFX10. 994//===----------------------------------------------------------------------===// 995 996let AssemblerPredicate = isGFX6GFX7 in { 997 multiclass VOPC_Real_gfx6_gfx7<bits<9> op> { 998 let DecoderNamespace = "GFX6GFX7" in { 999 def _e32_gfx6_gfx7 : 1000 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.SI>, 1001 VOPCe<op{7-0}>; 1002 def _e64_gfx6_gfx7 : 1003 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.SI>, 1004 VOP3a_gfx6_gfx7<op, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> { 1005 // Encoding used for VOPC instructions encoded as VOP3 differs from 1006 // VOP3e by destination name (sdst) as VOPC doesn't have vector dst. 1007 bits<8> sdst; 1008 let Inst{7-0} = sdst; 1009 } 1010 } // End DecoderNamespace = "GFX6GFX7" 1011 1012 defm : VOPCInstAliases<NAME, "gfx6_gfx7">; 1013 } 1014} // End AssemblerPredicate = isGFX6GFX7 1015 1016multiclass VOPC_Real_gfx6_gfx7_gfx10<bits<9> op> : 1017 VOPC_Real_gfx6_gfx7<op>, VOPC_Real_gfx10<op>; 1018 1019multiclass VOPCX_Real_gfx6_gfx7<bits<9> op> : 1020 VOPC_Real_gfx6_gfx7<op>; 1021 1022multiclass VOPCX_Real_gfx6_gfx7_gfx10 <bits<9> op> : 1023 VOPC_Real_gfx6_gfx7<op>, VOPCX_Real_gfx10<op>; 1024 1025defm V_CMP_F_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x000>; 1026defm V_CMP_LT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x001>; 1027defm V_CMP_EQ_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x002>; 1028defm V_CMP_LE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x003>; 1029defm V_CMP_GT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x004>; 1030defm V_CMP_LG_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x005>; 1031defm V_CMP_GE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x006>; 1032defm V_CMP_O_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x007>; 1033defm V_CMP_U_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x008>; 1034defm V_CMP_NGE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x009>; 1035defm V_CMP_NLG_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00a>; 1036defm V_CMP_NGT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00b>; 1037defm V_CMP_NLE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00c>; 1038defm V_CMP_NEQ_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00d>; 1039defm V_CMP_NLT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00e>; 1040defm V_CMP_TRU_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00f>; 1041defm V_CMPX_F_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x010>; 1042defm V_CMPX_LT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x011>; 1043defm V_CMPX_EQ_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x012>; 1044defm V_CMPX_LE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x013>; 1045defm V_CMPX_GT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x014>; 1046defm V_CMPX_LG_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x015>; 1047defm V_CMPX_GE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x016>; 1048defm V_CMPX_O_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x017>; 1049defm V_CMPX_U_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x018>; 1050defm V_CMPX_NGE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x019>; 1051defm V_CMPX_NLG_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01a>; 1052defm V_CMPX_NGT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01b>; 1053defm V_CMPX_NLE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01c>; 1054defm V_CMPX_NEQ_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01d>; 1055defm V_CMPX_NLT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01e>; 1056defm V_CMPX_TRU_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01f>; 1057defm V_CMP_F_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x020>; 1058defm V_CMP_LT_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x021>; 1059defm V_CMP_EQ_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x022>; 1060defm V_CMP_LE_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x023>; 1061defm V_CMP_GT_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x024>; 1062defm V_CMP_LG_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x025>; 1063defm V_CMP_GE_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x026>; 1064defm V_CMP_O_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x027>; 1065defm V_CMP_U_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x028>; 1066defm V_CMP_NGE_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x029>; 1067defm V_CMP_NLG_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02a>; 1068defm V_CMP_NGT_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02b>; 1069defm V_CMP_NLE_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02c>; 1070defm V_CMP_NEQ_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02d>; 1071defm V_CMP_NLT_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02e>; 1072defm V_CMP_TRU_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02f>; 1073defm V_CMPX_F_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x030>; 1074defm V_CMPX_LT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x031>; 1075defm V_CMPX_EQ_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x032>; 1076defm V_CMPX_LE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x033>; 1077defm V_CMPX_GT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x034>; 1078defm V_CMPX_LG_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x035>; 1079defm V_CMPX_GE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x036>; 1080defm V_CMPX_O_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x037>; 1081defm V_CMPX_U_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x038>; 1082defm V_CMPX_NGE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x039>; 1083defm V_CMPX_NLG_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03a>; 1084defm V_CMPX_NGT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03b>; 1085defm V_CMPX_NLE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03c>; 1086defm V_CMPX_NEQ_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03d>; 1087defm V_CMPX_NLT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03e>; 1088defm V_CMPX_TRU_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03f>; 1089defm V_CMPS_F_F32 : VOPC_Real_gfx6_gfx7<0x040>; 1090defm V_CMPS_LT_F32 : VOPC_Real_gfx6_gfx7<0x041>; 1091defm V_CMPS_EQ_F32 : VOPC_Real_gfx6_gfx7<0x042>; 1092defm V_CMPS_LE_F32 : VOPC_Real_gfx6_gfx7<0x043>; 1093defm V_CMPS_GT_F32 : VOPC_Real_gfx6_gfx7<0x044>; 1094defm V_CMPS_LG_F32 : VOPC_Real_gfx6_gfx7<0x045>; 1095defm V_CMPS_GE_F32 : VOPC_Real_gfx6_gfx7<0x046>; 1096defm V_CMPS_O_F32 : VOPC_Real_gfx6_gfx7<0x047>; 1097defm V_CMPS_U_F32 : VOPC_Real_gfx6_gfx7<0x048>; 1098defm V_CMPS_NGE_F32 : VOPC_Real_gfx6_gfx7<0x049>; 1099defm V_CMPS_NLG_F32 : VOPC_Real_gfx6_gfx7<0x04a>; 1100defm V_CMPS_NGT_F32 : VOPC_Real_gfx6_gfx7<0x04b>; 1101defm V_CMPS_NLE_F32 : VOPC_Real_gfx6_gfx7<0x04c>; 1102defm V_CMPS_NEQ_F32 : VOPC_Real_gfx6_gfx7<0x04d>; 1103defm V_CMPS_NLT_F32 : VOPC_Real_gfx6_gfx7<0x04e>; 1104defm V_CMPS_TRU_F32 : VOPC_Real_gfx6_gfx7<0x04f>; 1105defm V_CMPSX_F_F32 : VOPCX_Real_gfx6_gfx7<0x050>; 1106defm V_CMPSX_LT_F32 : VOPCX_Real_gfx6_gfx7<0x051>; 1107defm V_CMPSX_EQ_F32 : VOPCX_Real_gfx6_gfx7<0x052>; 1108defm V_CMPSX_LE_F32 : VOPCX_Real_gfx6_gfx7<0x053>; 1109defm V_CMPSX_GT_F32 : VOPCX_Real_gfx6_gfx7<0x054>; 1110defm V_CMPSX_LG_F32 : VOPCX_Real_gfx6_gfx7<0x055>; 1111defm V_CMPSX_GE_F32 : VOPCX_Real_gfx6_gfx7<0x056>; 1112defm V_CMPSX_O_F32 : VOPCX_Real_gfx6_gfx7<0x057>; 1113defm V_CMPSX_U_F32 : VOPCX_Real_gfx6_gfx7<0x058>; 1114defm V_CMPSX_NGE_F32 : VOPCX_Real_gfx6_gfx7<0x059>; 1115defm V_CMPSX_NLG_F32 : VOPCX_Real_gfx6_gfx7<0x05a>; 1116defm V_CMPSX_NGT_F32 : VOPCX_Real_gfx6_gfx7<0x05b>; 1117defm V_CMPSX_NLE_F32 : VOPCX_Real_gfx6_gfx7<0x05c>; 1118defm V_CMPSX_NEQ_F32 : VOPCX_Real_gfx6_gfx7<0x05d>; 1119defm V_CMPSX_NLT_F32 : VOPCX_Real_gfx6_gfx7<0x05e>; 1120defm V_CMPSX_TRU_F32 : VOPCX_Real_gfx6_gfx7<0x05f>; 1121defm V_CMPS_F_F64 : VOPC_Real_gfx6_gfx7<0x060>; 1122defm V_CMPS_LT_F64 : VOPC_Real_gfx6_gfx7<0x061>; 1123defm V_CMPS_EQ_F64 : VOPC_Real_gfx6_gfx7<0x062>; 1124defm V_CMPS_LE_F64 : VOPC_Real_gfx6_gfx7<0x063>; 1125defm V_CMPS_GT_F64 : VOPC_Real_gfx6_gfx7<0x064>; 1126defm V_CMPS_LG_F64 : VOPC_Real_gfx6_gfx7<0x065>; 1127defm V_CMPS_GE_F64 : VOPC_Real_gfx6_gfx7<0x066>; 1128defm V_CMPS_O_F64 : VOPC_Real_gfx6_gfx7<0x067>; 1129defm V_CMPS_U_F64 : VOPC_Real_gfx6_gfx7<0x068>; 1130defm V_CMPS_NGE_F64 : VOPC_Real_gfx6_gfx7<0x069>; 1131defm V_CMPS_NLG_F64 : VOPC_Real_gfx6_gfx7<0x06a>; 1132defm V_CMPS_NGT_F64 : VOPC_Real_gfx6_gfx7<0x06b>; 1133defm V_CMPS_NLE_F64 : VOPC_Real_gfx6_gfx7<0x06c>; 1134defm V_CMPS_NEQ_F64 : VOPC_Real_gfx6_gfx7<0x06d>; 1135defm V_CMPS_NLT_F64 : VOPC_Real_gfx6_gfx7<0x06e>; 1136defm V_CMPS_TRU_F64 : VOPC_Real_gfx6_gfx7<0x06f>; 1137defm V_CMPSX_F_F64 : VOPCX_Real_gfx6_gfx7<0x070>; 1138defm V_CMPSX_LT_F64 : VOPCX_Real_gfx6_gfx7<0x071>; 1139defm V_CMPSX_EQ_F64 : VOPCX_Real_gfx6_gfx7<0x072>; 1140defm V_CMPSX_LE_F64 : VOPCX_Real_gfx6_gfx7<0x073>; 1141defm V_CMPSX_GT_F64 : VOPCX_Real_gfx6_gfx7<0x074>; 1142defm V_CMPSX_LG_F64 : VOPCX_Real_gfx6_gfx7<0x075>; 1143defm V_CMPSX_GE_F64 : VOPCX_Real_gfx6_gfx7<0x076>; 1144defm V_CMPSX_O_F64 : VOPCX_Real_gfx6_gfx7<0x077>; 1145defm V_CMPSX_U_F64 : VOPCX_Real_gfx6_gfx7<0x078>; 1146defm V_CMPSX_NGE_F64 : VOPCX_Real_gfx6_gfx7<0x079>; 1147defm V_CMPSX_NLG_F64 : VOPCX_Real_gfx6_gfx7<0x07a>; 1148defm V_CMPSX_NGT_F64 : VOPCX_Real_gfx6_gfx7<0x07b>; 1149defm V_CMPSX_NLE_F64 : VOPCX_Real_gfx6_gfx7<0x07c>; 1150defm V_CMPSX_NEQ_F64 : VOPCX_Real_gfx6_gfx7<0x07d>; 1151defm V_CMPSX_NLT_F64 : VOPCX_Real_gfx6_gfx7<0x07e>; 1152defm V_CMPSX_TRU_F64 : VOPCX_Real_gfx6_gfx7<0x07f>; 1153defm V_CMP_F_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x080>; 1154defm V_CMP_LT_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x081>; 1155defm V_CMP_EQ_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x082>; 1156defm V_CMP_LE_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x083>; 1157defm V_CMP_GT_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x084>; 1158defm V_CMP_NE_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x085>; 1159defm V_CMP_GE_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x086>; 1160defm V_CMP_T_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x087>; 1161defm V_CMP_CLASS_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x088>; 1162defm V_CMPX_F_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x090>; 1163defm V_CMPX_LT_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x091>; 1164defm V_CMPX_EQ_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x092>; 1165defm V_CMPX_LE_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x093>; 1166defm V_CMPX_GT_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x094>; 1167defm V_CMPX_NE_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x095>; 1168defm V_CMPX_GE_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x096>; 1169defm V_CMPX_T_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x097>; 1170defm V_CMPX_CLASS_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x098>; 1171defm V_CMP_F_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a0>; 1172defm V_CMP_LT_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a1>; 1173defm V_CMP_EQ_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a2>; 1174defm V_CMP_LE_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a3>; 1175defm V_CMP_GT_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a4>; 1176defm V_CMP_NE_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a5>; 1177defm V_CMP_GE_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a6>; 1178defm V_CMP_T_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a7>; 1179defm V_CMP_CLASS_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a8>; 1180defm V_CMPX_F_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b0>; 1181defm V_CMPX_LT_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b1>; 1182defm V_CMPX_EQ_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b2>; 1183defm V_CMPX_LE_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b3>; 1184defm V_CMPX_GT_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b4>; 1185defm V_CMPX_NE_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b5>; 1186defm V_CMPX_GE_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b6>; 1187defm V_CMPX_T_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b7>; 1188defm V_CMPX_CLASS_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b8>; 1189defm V_CMP_F_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c0>; 1190defm V_CMP_LT_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c1>; 1191defm V_CMP_EQ_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c2>; 1192defm V_CMP_LE_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c3>; 1193defm V_CMP_GT_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c4>; 1194defm V_CMP_NE_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c5>; 1195defm V_CMP_GE_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c6>; 1196defm V_CMP_T_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c7>; 1197defm V_CMPX_F_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d0>; 1198defm V_CMPX_LT_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d1>; 1199defm V_CMPX_EQ_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d2>; 1200defm V_CMPX_LE_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d3>; 1201defm V_CMPX_GT_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d4>; 1202defm V_CMPX_NE_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d5>; 1203defm V_CMPX_GE_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d6>; 1204defm V_CMPX_T_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d7>; 1205defm V_CMP_F_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e0>; 1206defm V_CMP_LT_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e1>; 1207defm V_CMP_EQ_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e2>; 1208defm V_CMP_LE_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e3>; 1209defm V_CMP_GT_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e4>; 1210defm V_CMP_NE_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e5>; 1211defm V_CMP_GE_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e6>; 1212defm V_CMP_T_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e7>; 1213defm V_CMPX_F_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f0>; 1214defm V_CMPX_LT_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f1>; 1215defm V_CMPX_EQ_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f2>; 1216defm V_CMPX_LE_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f3>; 1217defm V_CMPX_GT_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f4>; 1218defm V_CMPX_NE_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f5>; 1219defm V_CMPX_GE_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f6>; 1220defm V_CMPX_T_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f7>; 1221 1222//===----------------------------------------------------------------------===// 1223// GFX8, GFX9 (VI). 1224//===----------------------------------------------------------------------===// 1225 1226multiclass VOPC_Real_vi <bits<10> op> { 1227 let AssemblerPredicate = isGFX8GFX9, DecoderNamespace = "GFX8" in { 1228 def _e32_vi : 1229 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.VI>, 1230 VOPCe<op{7-0}>; 1231 1232 def _e64_vi : 1233 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.VI>, 1234 VOP3a_vi <op, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> { 1235 // Encoding used for VOPC instructions encoded as VOP3 1236 // Differs from VOP3e by destination name (sdst) as VOPC doesn't have vector dst 1237 bits<8> sdst; 1238 let Inst{7-0} = sdst; 1239 } 1240 } 1241 1242 foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_e32").Pfl.HasExtSDWA>.ret in 1243 def _sdwa_vi : 1244 VOP_SDWA_Real <!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>, 1245 VOPC_SDWAe <op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>; 1246 1247 foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_e32").Pfl.HasExtSDWA9>.ret in 1248 def _sdwa_gfx9 : 1249 VOP_SDWA9_Real <!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>, 1250 VOPC_SDWA9e <op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>; 1251 1252 let AssemblerPredicate = isGFX8GFX9 in { 1253 defm : VOPCInstAliases<NAME, "vi">; 1254 } 1255} 1256 1257defm V_CMP_CLASS_F32 : VOPC_Real_vi <0x10>; 1258defm V_CMPX_CLASS_F32 : VOPC_Real_vi <0x11>; 1259defm V_CMP_CLASS_F64 : VOPC_Real_vi <0x12>; 1260defm V_CMPX_CLASS_F64 : VOPC_Real_vi <0x13>; 1261defm V_CMP_CLASS_F16 : VOPC_Real_vi <0x14>; 1262defm V_CMPX_CLASS_F16 : VOPC_Real_vi <0x15>; 1263 1264defm V_CMP_F_F16 : VOPC_Real_vi <0x20>; 1265defm V_CMP_LT_F16 : VOPC_Real_vi <0x21>; 1266defm V_CMP_EQ_F16 : VOPC_Real_vi <0x22>; 1267defm V_CMP_LE_F16 : VOPC_Real_vi <0x23>; 1268defm V_CMP_GT_F16 : VOPC_Real_vi <0x24>; 1269defm V_CMP_LG_F16 : VOPC_Real_vi <0x25>; 1270defm V_CMP_GE_F16 : VOPC_Real_vi <0x26>; 1271defm V_CMP_O_F16 : VOPC_Real_vi <0x27>; 1272defm V_CMP_U_F16 : VOPC_Real_vi <0x28>; 1273defm V_CMP_NGE_F16 : VOPC_Real_vi <0x29>; 1274defm V_CMP_NLG_F16 : VOPC_Real_vi <0x2a>; 1275defm V_CMP_NGT_F16 : VOPC_Real_vi <0x2b>; 1276defm V_CMP_NLE_F16 : VOPC_Real_vi <0x2c>; 1277defm V_CMP_NEQ_F16 : VOPC_Real_vi <0x2d>; 1278defm V_CMP_NLT_F16 : VOPC_Real_vi <0x2e>; 1279defm V_CMP_TRU_F16 : VOPC_Real_vi <0x2f>; 1280 1281defm V_CMPX_F_F16 : VOPC_Real_vi <0x30>; 1282defm V_CMPX_LT_F16 : VOPC_Real_vi <0x31>; 1283defm V_CMPX_EQ_F16 : VOPC_Real_vi <0x32>; 1284defm V_CMPX_LE_F16 : VOPC_Real_vi <0x33>; 1285defm V_CMPX_GT_F16 : VOPC_Real_vi <0x34>; 1286defm V_CMPX_LG_F16 : VOPC_Real_vi <0x35>; 1287defm V_CMPX_GE_F16 : VOPC_Real_vi <0x36>; 1288defm V_CMPX_O_F16 : VOPC_Real_vi <0x37>; 1289defm V_CMPX_U_F16 : VOPC_Real_vi <0x38>; 1290defm V_CMPX_NGE_F16 : VOPC_Real_vi <0x39>; 1291defm V_CMPX_NLG_F16 : VOPC_Real_vi <0x3a>; 1292defm V_CMPX_NGT_F16 : VOPC_Real_vi <0x3b>; 1293defm V_CMPX_NLE_F16 : VOPC_Real_vi <0x3c>; 1294defm V_CMPX_NEQ_F16 : VOPC_Real_vi <0x3d>; 1295defm V_CMPX_NLT_F16 : VOPC_Real_vi <0x3e>; 1296defm V_CMPX_TRU_F16 : VOPC_Real_vi <0x3f>; 1297 1298defm V_CMP_F_F32 : VOPC_Real_vi <0x40>; 1299defm V_CMP_LT_F32 : VOPC_Real_vi <0x41>; 1300defm V_CMP_EQ_F32 : VOPC_Real_vi <0x42>; 1301defm V_CMP_LE_F32 : VOPC_Real_vi <0x43>; 1302defm V_CMP_GT_F32 : VOPC_Real_vi <0x44>; 1303defm V_CMP_LG_F32 : VOPC_Real_vi <0x45>; 1304defm V_CMP_GE_F32 : VOPC_Real_vi <0x46>; 1305defm V_CMP_O_F32 : VOPC_Real_vi <0x47>; 1306defm V_CMP_U_F32 : VOPC_Real_vi <0x48>; 1307defm V_CMP_NGE_F32 : VOPC_Real_vi <0x49>; 1308defm V_CMP_NLG_F32 : VOPC_Real_vi <0x4a>; 1309defm V_CMP_NGT_F32 : VOPC_Real_vi <0x4b>; 1310defm V_CMP_NLE_F32 : VOPC_Real_vi <0x4c>; 1311defm V_CMP_NEQ_F32 : VOPC_Real_vi <0x4d>; 1312defm V_CMP_NLT_F32 : VOPC_Real_vi <0x4e>; 1313defm V_CMP_TRU_F32 : VOPC_Real_vi <0x4f>; 1314 1315defm V_CMPX_F_F32 : VOPC_Real_vi <0x50>; 1316defm V_CMPX_LT_F32 : VOPC_Real_vi <0x51>; 1317defm V_CMPX_EQ_F32 : VOPC_Real_vi <0x52>; 1318defm V_CMPX_LE_F32 : VOPC_Real_vi <0x53>; 1319defm V_CMPX_GT_F32 : VOPC_Real_vi <0x54>; 1320defm V_CMPX_LG_F32 : VOPC_Real_vi <0x55>; 1321defm V_CMPX_GE_F32 : VOPC_Real_vi <0x56>; 1322defm V_CMPX_O_F32 : VOPC_Real_vi <0x57>; 1323defm V_CMPX_U_F32 : VOPC_Real_vi <0x58>; 1324defm V_CMPX_NGE_F32 : VOPC_Real_vi <0x59>; 1325defm V_CMPX_NLG_F32 : VOPC_Real_vi <0x5a>; 1326defm V_CMPX_NGT_F32 : VOPC_Real_vi <0x5b>; 1327defm V_CMPX_NLE_F32 : VOPC_Real_vi <0x5c>; 1328defm V_CMPX_NEQ_F32 : VOPC_Real_vi <0x5d>; 1329defm V_CMPX_NLT_F32 : VOPC_Real_vi <0x5e>; 1330defm V_CMPX_TRU_F32 : VOPC_Real_vi <0x5f>; 1331 1332defm V_CMP_F_F64 : VOPC_Real_vi <0x60>; 1333defm V_CMP_LT_F64 : VOPC_Real_vi <0x61>; 1334defm V_CMP_EQ_F64 : VOPC_Real_vi <0x62>; 1335defm V_CMP_LE_F64 : VOPC_Real_vi <0x63>; 1336defm V_CMP_GT_F64 : VOPC_Real_vi <0x64>; 1337defm V_CMP_LG_F64 : VOPC_Real_vi <0x65>; 1338defm V_CMP_GE_F64 : VOPC_Real_vi <0x66>; 1339defm V_CMP_O_F64 : VOPC_Real_vi <0x67>; 1340defm V_CMP_U_F64 : VOPC_Real_vi <0x68>; 1341defm V_CMP_NGE_F64 : VOPC_Real_vi <0x69>; 1342defm V_CMP_NLG_F64 : VOPC_Real_vi <0x6a>; 1343defm V_CMP_NGT_F64 : VOPC_Real_vi <0x6b>; 1344defm V_CMP_NLE_F64 : VOPC_Real_vi <0x6c>; 1345defm V_CMP_NEQ_F64 : VOPC_Real_vi <0x6d>; 1346defm V_CMP_NLT_F64 : VOPC_Real_vi <0x6e>; 1347defm V_CMP_TRU_F64 : VOPC_Real_vi <0x6f>; 1348 1349defm V_CMPX_F_F64 : VOPC_Real_vi <0x70>; 1350defm V_CMPX_LT_F64 : VOPC_Real_vi <0x71>; 1351defm V_CMPX_EQ_F64 : VOPC_Real_vi <0x72>; 1352defm V_CMPX_LE_F64 : VOPC_Real_vi <0x73>; 1353defm V_CMPX_GT_F64 : VOPC_Real_vi <0x74>; 1354defm V_CMPX_LG_F64 : VOPC_Real_vi <0x75>; 1355defm V_CMPX_GE_F64 : VOPC_Real_vi <0x76>; 1356defm V_CMPX_O_F64 : VOPC_Real_vi <0x77>; 1357defm V_CMPX_U_F64 : VOPC_Real_vi <0x78>; 1358defm V_CMPX_NGE_F64 : VOPC_Real_vi <0x79>; 1359defm V_CMPX_NLG_F64 : VOPC_Real_vi <0x7a>; 1360defm V_CMPX_NGT_F64 : VOPC_Real_vi <0x7b>; 1361defm V_CMPX_NLE_F64 : VOPC_Real_vi <0x7c>; 1362defm V_CMPX_NEQ_F64 : VOPC_Real_vi <0x7d>; 1363defm V_CMPX_NLT_F64 : VOPC_Real_vi <0x7e>; 1364defm V_CMPX_TRU_F64 : VOPC_Real_vi <0x7f>; 1365 1366defm V_CMP_F_I16 : VOPC_Real_vi <0xa0>; 1367defm V_CMP_LT_I16 : VOPC_Real_vi <0xa1>; 1368defm V_CMP_EQ_I16 : VOPC_Real_vi <0xa2>; 1369defm V_CMP_LE_I16 : VOPC_Real_vi <0xa3>; 1370defm V_CMP_GT_I16 : VOPC_Real_vi <0xa4>; 1371defm V_CMP_NE_I16 : VOPC_Real_vi <0xa5>; 1372defm V_CMP_GE_I16 : VOPC_Real_vi <0xa6>; 1373defm V_CMP_T_I16 : VOPC_Real_vi <0xa7>; 1374 1375defm V_CMP_F_U16 : VOPC_Real_vi <0xa8>; 1376defm V_CMP_LT_U16 : VOPC_Real_vi <0xa9>; 1377defm V_CMP_EQ_U16 : VOPC_Real_vi <0xaa>; 1378defm V_CMP_LE_U16 : VOPC_Real_vi <0xab>; 1379defm V_CMP_GT_U16 : VOPC_Real_vi <0xac>; 1380defm V_CMP_NE_U16 : VOPC_Real_vi <0xad>; 1381defm V_CMP_GE_U16 : VOPC_Real_vi <0xae>; 1382defm V_CMP_T_U16 : VOPC_Real_vi <0xaf>; 1383 1384defm V_CMPX_F_I16 : VOPC_Real_vi <0xb0>; 1385defm V_CMPX_LT_I16 : VOPC_Real_vi <0xb1>; 1386defm V_CMPX_EQ_I16 : VOPC_Real_vi <0xb2>; 1387defm V_CMPX_LE_I16 : VOPC_Real_vi <0xb3>; 1388defm V_CMPX_GT_I16 : VOPC_Real_vi <0xb4>; 1389defm V_CMPX_NE_I16 : VOPC_Real_vi <0xb5>; 1390defm V_CMPX_GE_I16 : VOPC_Real_vi <0xb6>; 1391defm V_CMPX_T_I16 : VOPC_Real_vi <0xb7>; 1392 1393defm V_CMPX_F_U16 : VOPC_Real_vi <0xb8>; 1394defm V_CMPX_LT_U16 : VOPC_Real_vi <0xb9>; 1395defm V_CMPX_EQ_U16 : VOPC_Real_vi <0xba>; 1396defm V_CMPX_LE_U16 : VOPC_Real_vi <0xbb>; 1397defm V_CMPX_GT_U16 : VOPC_Real_vi <0xbc>; 1398defm V_CMPX_NE_U16 : VOPC_Real_vi <0xbd>; 1399defm V_CMPX_GE_U16 : VOPC_Real_vi <0xbe>; 1400defm V_CMPX_T_U16 : VOPC_Real_vi <0xbf>; 1401 1402defm V_CMP_F_I32 : VOPC_Real_vi <0xc0>; 1403defm V_CMP_LT_I32 : VOPC_Real_vi <0xc1>; 1404defm V_CMP_EQ_I32 : VOPC_Real_vi <0xc2>; 1405defm V_CMP_LE_I32 : VOPC_Real_vi <0xc3>; 1406defm V_CMP_GT_I32 : VOPC_Real_vi <0xc4>; 1407defm V_CMP_NE_I32 : VOPC_Real_vi <0xc5>; 1408defm V_CMP_GE_I32 : VOPC_Real_vi <0xc6>; 1409defm V_CMP_T_I32 : VOPC_Real_vi <0xc7>; 1410 1411defm V_CMPX_F_I32 : VOPC_Real_vi <0xd0>; 1412defm V_CMPX_LT_I32 : VOPC_Real_vi <0xd1>; 1413defm V_CMPX_EQ_I32 : VOPC_Real_vi <0xd2>; 1414defm V_CMPX_LE_I32 : VOPC_Real_vi <0xd3>; 1415defm V_CMPX_GT_I32 : VOPC_Real_vi <0xd4>; 1416defm V_CMPX_NE_I32 : VOPC_Real_vi <0xd5>; 1417defm V_CMPX_GE_I32 : VOPC_Real_vi <0xd6>; 1418defm V_CMPX_T_I32 : VOPC_Real_vi <0xd7>; 1419 1420defm V_CMP_F_I64 : VOPC_Real_vi <0xe0>; 1421defm V_CMP_LT_I64 : VOPC_Real_vi <0xe1>; 1422defm V_CMP_EQ_I64 : VOPC_Real_vi <0xe2>; 1423defm V_CMP_LE_I64 : VOPC_Real_vi <0xe3>; 1424defm V_CMP_GT_I64 : VOPC_Real_vi <0xe4>; 1425defm V_CMP_NE_I64 : VOPC_Real_vi <0xe5>; 1426defm V_CMP_GE_I64 : VOPC_Real_vi <0xe6>; 1427defm V_CMP_T_I64 : VOPC_Real_vi <0xe7>; 1428 1429defm V_CMPX_F_I64 : VOPC_Real_vi <0xf0>; 1430defm V_CMPX_LT_I64 : VOPC_Real_vi <0xf1>; 1431defm V_CMPX_EQ_I64 : VOPC_Real_vi <0xf2>; 1432defm V_CMPX_LE_I64 : VOPC_Real_vi <0xf3>; 1433defm V_CMPX_GT_I64 : VOPC_Real_vi <0xf4>; 1434defm V_CMPX_NE_I64 : VOPC_Real_vi <0xf5>; 1435defm V_CMPX_GE_I64 : VOPC_Real_vi <0xf6>; 1436defm V_CMPX_T_I64 : VOPC_Real_vi <0xf7>; 1437 1438defm V_CMP_F_U32 : VOPC_Real_vi <0xc8>; 1439defm V_CMP_LT_U32 : VOPC_Real_vi <0xc9>; 1440defm V_CMP_EQ_U32 : VOPC_Real_vi <0xca>; 1441defm V_CMP_LE_U32 : VOPC_Real_vi <0xcb>; 1442defm V_CMP_GT_U32 : VOPC_Real_vi <0xcc>; 1443defm V_CMP_NE_U32 : VOPC_Real_vi <0xcd>; 1444defm V_CMP_GE_U32 : VOPC_Real_vi <0xce>; 1445defm V_CMP_T_U32 : VOPC_Real_vi <0xcf>; 1446 1447defm V_CMPX_F_U32 : VOPC_Real_vi <0xd8>; 1448defm V_CMPX_LT_U32 : VOPC_Real_vi <0xd9>; 1449defm V_CMPX_EQ_U32 : VOPC_Real_vi <0xda>; 1450defm V_CMPX_LE_U32 : VOPC_Real_vi <0xdb>; 1451defm V_CMPX_GT_U32 : VOPC_Real_vi <0xdc>; 1452defm V_CMPX_NE_U32 : VOPC_Real_vi <0xdd>; 1453defm V_CMPX_GE_U32 : VOPC_Real_vi <0xde>; 1454defm V_CMPX_T_U32 : VOPC_Real_vi <0xdf>; 1455 1456defm V_CMP_F_U64 : VOPC_Real_vi <0xe8>; 1457defm V_CMP_LT_U64 : VOPC_Real_vi <0xe9>; 1458defm V_CMP_EQ_U64 : VOPC_Real_vi <0xea>; 1459defm V_CMP_LE_U64 : VOPC_Real_vi <0xeb>; 1460defm V_CMP_GT_U64 : VOPC_Real_vi <0xec>; 1461defm V_CMP_NE_U64 : VOPC_Real_vi <0xed>; 1462defm V_CMP_GE_U64 : VOPC_Real_vi <0xee>; 1463defm V_CMP_T_U64 : VOPC_Real_vi <0xef>; 1464 1465defm V_CMPX_F_U64 : VOPC_Real_vi <0xf8>; 1466defm V_CMPX_LT_U64 : VOPC_Real_vi <0xf9>; 1467defm V_CMPX_EQ_U64 : VOPC_Real_vi <0xfa>; 1468defm V_CMPX_LE_U64 : VOPC_Real_vi <0xfb>; 1469defm V_CMPX_GT_U64 : VOPC_Real_vi <0xfc>; 1470defm V_CMPX_NE_U64 : VOPC_Real_vi <0xfd>; 1471defm V_CMPX_GE_U64 : VOPC_Real_vi <0xfe>; 1472defm V_CMPX_T_U64 : VOPC_Real_vi <0xff>; 1473