1 //===-- ARMMachineFunctionInfo.h - ARM machine function info ----*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares ARM-specific per-machine-function information.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_ARM_ARMMACHINEFUNCTIONINFO_H
14 #define LLVM_LIB_TARGET_ARM_ARMMACHINEFUNCTIONINFO_H
15 
16 #include "llvm/ADT/DenseMap.h"
17 #include "llvm/ADT/SmallPtrSet.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/IR/GlobalVariable.h"
20 #include "llvm/Support/ErrorHandling.h"
21 #include <utility>
22 
23 namespace llvm {
24 
25 class ARMSubtarget;
26 
27 /// ARMFunctionInfo - This class is derived from MachineFunctionInfo and
28 /// contains private ARM-specific information for each MachineFunction.
29 class ARMFunctionInfo : public MachineFunctionInfo {
30   virtual void anchor();
31 
32   /// isThumb - True if this function is compiled under Thumb mode.
33   /// Used to initialized Align, so must precede it.
34   bool isThumb = false;
35 
36   /// hasThumb2 - True if the target architecture supports Thumb2. Do not use
37   /// to determine if function is compiled under Thumb mode, for that use
38   /// 'isThumb'.
39   bool hasThumb2 = false;
40 
41   /// ArgsRegSaveSize - Size of the register save area for vararg functions or
42   /// those making guaranteed tail calls that need more stack argument space
43   /// than is provided by this functions incoming parameters.
44   ///
45   unsigned ArgRegsSaveSize = 0;
46 
47   /// ReturnRegsCount - Number of registers used up in the return.
48   unsigned ReturnRegsCount = 0;
49 
50   /// HasStackFrame - True if this function has a stack frame. Set by
51   /// determineCalleeSaves().
52   bool HasStackFrame = false;
53 
54   /// RestoreSPFromFP - True if epilogue should restore SP from FP. Set by
55   /// emitPrologue.
56   bool RestoreSPFromFP = false;
57 
58   /// LRSpilled - True if the LR register has been for spilled for
59   /// any reason, so it's legal to emit an ARM::tBfar (i.e. "bl").
60   bool LRSpilled = false;
61 
62   /// FramePtrSpillOffset - If HasStackFrame, this records the frame pointer
63   /// spill stack offset.
64   unsigned FramePtrSpillOffset = 0;
65 
66   /// GPRCS1Offset, GPRCS2Offset, DPRCSOffset - Starting offset of callee saved
67   /// register spills areas. For Mac OS X:
68   ///
69   /// GPR callee-saved (1) : r4, r5, r6, r7, lr
70   /// --------------------------------------------
71   /// GPR callee-saved (2) : r8, r10, r11
72   /// --------------------------------------------
73   /// DPR callee-saved : d8 - d15
74   ///
75   /// Also see AlignedDPRCSRegs below. Not all D-regs need to go in area 3.
76   /// Some may be spilled after the stack has been realigned.
77   unsigned GPRCS1Offset = 0;
78   unsigned GPRCS2Offset = 0;
79   unsigned DPRCSOffset = 0;
80 
81   /// GPRCS1Size, GPRCS2Size, DPRCSSize - Sizes of callee saved register spills
82   /// areas.
83   unsigned FPCXTSaveSize = 0;
84   unsigned FRSaveSize = 0;
85   unsigned GPRCS1Size = 0;
86   unsigned GPRCS2Size = 0;
87   unsigned DPRCSAlignGapSize = 0;
88   unsigned DPRCSSize = 0;
89 
90   /// NumAlignedDPRCS2Regs - The number of callee-saved DPRs that are saved in
91   /// the aligned portion of the stack frame.  This is always a contiguous
92   /// sequence of D-registers starting from d8.
93   ///
94   /// We do not keep track of the frame indices used for these registers - they
95   /// behave like any other frame index in the aligned stack frame.  These
96   /// registers also aren't included in DPRCSSize above.
97   unsigned NumAlignedDPRCS2Regs = 0;
98 
99   unsigned PICLabelUId = 0;
100 
101   /// VarArgsFrameIndex - FrameIndex for start of varargs area.
102   int VarArgsFrameIndex = 0;
103 
104   /// HasITBlocks - True if IT blocks have been inserted.
105   bool HasITBlocks = false;
106 
107   // Security Extensions
108   bool IsCmseNSEntry;
109   bool IsCmseNSCall;
110 
111   /// CPEClones - Track constant pool entries clones created by Constant Island
112   /// pass.
113   DenseMap<unsigned, unsigned> CPEClones;
114 
115   /// ArgumentStackSize - amount of bytes on stack consumed by the arguments
116   /// being passed on the stack
117   unsigned ArgumentStackSize = 0;
118 
119   /// ArgumentStackToRestore - amount of bytes on stack consumed that we must
120   /// restore on return.
121   unsigned ArgumentStackToRestore = 0;
122 
123   /// CoalescedWeights - mapping of basic blocks to the rolling counter of
124   /// coalesced weights.
125   DenseMap<const MachineBasicBlock*, unsigned> CoalescedWeights;
126 
127   /// True if this function has a subset of CSRs that is handled explicitly via
128   /// copies.
129   bool IsSplitCSR = false;
130 
131   /// Globals that have had their storage promoted into the constant pool.
132   SmallPtrSet<const GlobalVariable*,2> PromotedGlobals;
133 
134   /// The amount the literal pool has been increasedby due to promoted globals.
135   int PromotedGlobalsIncrease = 0;
136 
137   /// True if r0 will be preserved by a call to this function (e.g. C++
138   /// con/destructors).
139   bool PreservesR0 = false;
140 
141   /// True if the function should sign its return address.
142   bool SignReturnAddress = false;
143 
144   /// True if the fucntion should sign its return address, even if LR is not
145   /// saved.
146   bool SignReturnAddressAll = false;
147 
148   /// True if BTI instructions should be placed at potential indirect jump
149   /// destinations.
150   bool BranchTargetEnforcement = false;
151 
152 public:
153   ARMFunctionInfo() = default;
154 
155   explicit ARMFunctionInfo(const Function &F, const ARMSubtarget *STI);
156 
157   MachineFunctionInfo *
158   clone(BumpPtrAllocator &Allocator, MachineFunction &DestMF,
159         const DenseMap<MachineBasicBlock *, MachineBasicBlock *> &Src2DstMBB)
160       const override;
161 
162   bool isThumbFunction() const { return isThumb; }
163   bool isThumb1OnlyFunction() const { return isThumb && !hasThumb2; }
164   bool isThumb2Function() const { return isThumb && hasThumb2; }
165 
166   bool isCmseNSEntryFunction() const { return IsCmseNSEntry; }
167   bool isCmseNSCallFunction() const { return IsCmseNSCall; }
168 
169   unsigned getArgRegsSaveSize() const { return ArgRegsSaveSize; }
170   void setArgRegsSaveSize(unsigned s) { ArgRegsSaveSize = s; }
171 
172   unsigned getReturnRegsCount() const { return ReturnRegsCount; }
173   void setReturnRegsCount(unsigned s) { ReturnRegsCount = s; }
174 
175   bool hasStackFrame() const { return HasStackFrame; }
176   void setHasStackFrame(bool s) { HasStackFrame = s; }
177 
178   bool shouldRestoreSPFromFP() const { return RestoreSPFromFP; }
179   void setShouldRestoreSPFromFP(bool s) { RestoreSPFromFP = s; }
180 
181   bool isLRSpilled() const { return LRSpilled; }
182   void setLRIsSpilled(bool s) { LRSpilled = s; }
183 
184   unsigned getFramePtrSpillOffset() const { return FramePtrSpillOffset; }
185   void setFramePtrSpillOffset(unsigned o) { FramePtrSpillOffset = o; }
186 
187   unsigned getNumAlignedDPRCS2Regs() const { return NumAlignedDPRCS2Regs; }
188   void setNumAlignedDPRCS2Regs(unsigned n) { NumAlignedDPRCS2Regs = n; }
189 
190   unsigned getGPRCalleeSavedArea1Offset() const { return GPRCS1Offset; }
191   unsigned getGPRCalleeSavedArea2Offset() const { return GPRCS2Offset; }
192   unsigned getDPRCalleeSavedAreaOffset()  const { return DPRCSOffset; }
193 
194   void setGPRCalleeSavedArea1Offset(unsigned o) { GPRCS1Offset = o; }
195   void setGPRCalleeSavedArea2Offset(unsigned o) { GPRCS2Offset = o; }
196   void setDPRCalleeSavedAreaOffset(unsigned o)  { DPRCSOffset = o; }
197 
198   unsigned getFPCXTSaveAreaSize() const       { return FPCXTSaveSize; }
199   unsigned getFrameRecordSavedAreaSize() const { return FRSaveSize; }
200   unsigned getGPRCalleeSavedArea1Size() const { return GPRCS1Size; }
201   unsigned getGPRCalleeSavedArea2Size() const { return GPRCS2Size; }
202   unsigned getDPRCalleeSavedGapSize() const   { return DPRCSAlignGapSize; }
203   unsigned getDPRCalleeSavedAreaSize()  const { return DPRCSSize; }
204 
205   void setFPCXTSaveAreaSize(unsigned s)       { FPCXTSaveSize = s; }
206   void setFrameRecordSavedAreaSize(unsigned s) { FRSaveSize = s; }
207   void setGPRCalleeSavedArea1Size(unsigned s) { GPRCS1Size = s; }
208   void setGPRCalleeSavedArea2Size(unsigned s) { GPRCS2Size = s; }
209   void setDPRCalleeSavedGapSize(unsigned s)   { DPRCSAlignGapSize = s; }
210   void setDPRCalleeSavedAreaSize(unsigned s)  { DPRCSSize = s; }
211 
212   unsigned getArgumentStackSize() const { return ArgumentStackSize; }
213   void setArgumentStackSize(unsigned size) { ArgumentStackSize = size; }
214 
215   unsigned getArgumentStackToRestore() const { return ArgumentStackToRestore; }
216   void setArgumentStackToRestore(unsigned v) { ArgumentStackToRestore = v; }
217 
218   void initPICLabelUId(unsigned UId) {
219     PICLabelUId = UId;
220   }
221 
222   unsigned getNumPICLabels() const {
223     return PICLabelUId;
224   }
225 
226   unsigned createPICLabelUId() {
227     return PICLabelUId++;
228   }
229 
230   int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
231   void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; }
232 
233   bool hasITBlocks() const { return HasITBlocks; }
234   void setHasITBlocks(bool h) { HasITBlocks = h; }
235 
236   bool isSplitCSR() const { return IsSplitCSR; }
237   void setIsSplitCSR(bool s) { IsSplitCSR = s; }
238 
239   void recordCPEClone(unsigned CPIdx, unsigned CPCloneIdx) {
240     if (!CPEClones.insert(std::make_pair(CPCloneIdx, CPIdx)).second)
241       llvm_unreachable("Duplicate entries!");
242   }
243 
244   unsigned getOriginalCPIdx(unsigned CloneIdx) const {
245     DenseMap<unsigned, unsigned>::const_iterator I = CPEClones.find(CloneIdx);
246     if (I != CPEClones.end())
247       return I->second;
248     else
249       return -1U;
250   }
251 
252   DenseMap<const MachineBasicBlock*, unsigned>::iterator getCoalescedWeight(
253                                                   MachineBasicBlock* MBB) {
254     auto It = CoalescedWeights.find(MBB);
255     if (It == CoalescedWeights.end()) {
256       It = CoalescedWeights.insert(std::make_pair(MBB, 0)).first;
257     }
258     return It;
259   }
260 
261   /// Indicate to the backend that \c GV has had its storage changed to inside
262   /// a constant pool. This means it no longer needs to be emitted as a
263   /// global variable.
264   void markGlobalAsPromotedToConstantPool(const GlobalVariable *GV) {
265     PromotedGlobals.insert(GV);
266   }
267   SmallPtrSet<const GlobalVariable*, 2>& getGlobalsPromotedToConstantPool() {
268     return PromotedGlobals;
269   }
270   int getPromotedConstpoolIncrease() const {
271     return PromotedGlobalsIncrease;
272   }
273   void setPromotedConstpoolIncrease(int Sz) {
274     PromotedGlobalsIncrease = Sz;
275   }
276 
277   DenseMap<unsigned, unsigned> EHPrologueRemappedRegs;
278   DenseMap<unsigned, unsigned> EHPrologueOffsetInRegs;
279 
280   void setPreservesR0() { PreservesR0 = true; }
281   bool getPreservesR0() const { return PreservesR0; }
282 
283   bool shouldSignReturnAddress() const {
284     return shouldSignReturnAddress(LRSpilled);
285   }
286 
287   bool shouldSignReturnAddress(bool SpillsLR) const {
288     if (!SignReturnAddress)
289       return false;
290     if (SignReturnAddressAll)
291       return true;
292     return SpillsLR;
293   }
294 
295   bool branchTargetEnforcement() const { return BranchTargetEnforcement; }
296 };
297 
298 } // end namespace llvm
299 
300 #endif // LLVM_LIB_TARGET_ARM_ARMMACHINEFUNCTIONINFO_H
301