1 //===-- MVEVPTBlockPass.cpp - Insert MVE VPT blocks -----------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "ARM.h"
10 #include "ARMMachineFunctionInfo.h"
11 #include "ARMSubtarget.h"
12 #include "MCTargetDesc/ARMBaseInfo.h"
13 #include "Thumb2InstrInfo.h"
14 #include "llvm/ADT/SmallSet.h"
15 #include "llvm/ADT/SmallVector.h"
16 #include "llvm/ADT/Statistic.h"
17 #include "llvm/ADT/StringRef.h"
18 #include "llvm/CodeGen/MachineBasicBlock.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineInstrBundle.h"
24 #include "llvm/CodeGen/MachineOperand.h"
25 #include "llvm/IR/DebugLoc.h"
26 #include "llvm/MC/MCInstrDesc.h"
27 #include "llvm/MC/MCRegisterInfo.h"
28 #include "llvm/Support/Debug.h"
29 #include <cassert>
30 #include <new>
31 
32 using namespace llvm;
33 
34 #define DEBUG_TYPE "arm-mve-vpt"
35 
36 namespace {
37 class MVEVPTBlock : public MachineFunctionPass {
38 public:
39   static char ID;
40   const Thumb2InstrInfo *TII;
41   const TargetRegisterInfo *TRI;
42 
43   MVEVPTBlock() : MachineFunctionPass(ID) {}
44 
45   bool runOnMachineFunction(MachineFunction &Fn) override;
46 
47   MachineFunctionProperties getRequiredProperties() const override {
48     return MachineFunctionProperties().set(
49         MachineFunctionProperties::Property::NoVRegs);
50   }
51 
52   StringRef getPassName() const override {
53     return "MVE VPT block insertion pass";
54   }
55 
56 private:
57   bool InsertVPTBlocks(MachineBasicBlock &MBB);
58 };
59 
60 char MVEVPTBlock::ID = 0;
61 
62 } // end anonymous namespace
63 
64 INITIALIZE_PASS(MVEVPTBlock, DEBUG_TYPE, "ARM MVE VPT block pass", false, false)
65 
66 static MachineInstr *findVCMPToFoldIntoVPST(MachineBasicBlock::iterator MI,
67                                             const TargetRegisterInfo *TRI,
68                                             unsigned &NewOpcode) {
69   // Search backwards to the instruction that defines VPR. This may or not
70   // be a VCMP, we check that after this loop. If we find another instruction
71   // that reads cpsr, we return nullptr.
72   MachineBasicBlock::iterator CmpMI = MI;
73   while (CmpMI != MI->getParent()->begin()) {
74     --CmpMI;
75     if (CmpMI->modifiesRegister(ARM::VPR, TRI))
76       break;
77     if (CmpMI->readsRegister(ARM::VPR, TRI))
78       break;
79   }
80 
81   if (CmpMI == MI)
82     return nullptr;
83   NewOpcode = VCMPOpcodeToVPT(CmpMI->getOpcode());
84   if (NewOpcode == 0)
85     return nullptr;
86 
87   // Search forward from CmpMI to MI, checking if either register was def'd
88   if (registerDefinedBetween(CmpMI->getOperand(1).getReg(), std::next(CmpMI),
89                              MI, TRI))
90     return nullptr;
91   if (registerDefinedBetween(CmpMI->getOperand(2).getReg(), std::next(CmpMI),
92                              MI, TRI))
93     return nullptr;
94   return &*CmpMI;
95 }
96 
97 // Advances Iter past a block of predicated instructions.
98 // Returns true if it successfully skipped the whole block of predicated
99 // instructions. Returns false when it stopped early (due to MaxSteps), or if
100 // Iter didn't point to a predicated instruction.
101 static bool StepOverPredicatedInstrs(MachineBasicBlock::instr_iterator &Iter,
102                                      MachineBasicBlock::instr_iterator EndIter,
103                                      unsigned MaxSteps,
104                                      unsigned &NumInstrsSteppedOver) {
105   ARMVCC::VPTCodes NextPred = ARMVCC::None;
106   Register PredReg;
107   NumInstrsSteppedOver = 0;
108 
109   while (Iter != EndIter) {
110     if (Iter->isDebugInstr()) {
111       // Skip debug instructions
112       ++Iter;
113       continue;
114     }
115 
116     NextPred = getVPTInstrPredicate(*Iter, PredReg);
117     assert(NextPred != ARMVCC::Else &&
118            "VPT block pass does not expect Else preds");
119     if (NextPred == ARMVCC::None || MaxSteps == 0)
120       break;
121     --MaxSteps;
122     ++Iter;
123     ++NumInstrsSteppedOver;
124   };
125 
126   return NumInstrsSteppedOver != 0 &&
127          (NextPred == ARMVCC::None || Iter == EndIter);
128 }
129 
130 // Returns true if at least one instruction in the range [Iter, End) defines
131 // or kills VPR.
132 static bool IsVPRDefinedOrKilledByBlock(MachineBasicBlock::iterator Iter,
133                                         MachineBasicBlock::iterator End) {
134   for (; Iter != End; ++Iter)
135     if (Iter->definesRegister(ARM::VPR) || Iter->killsRegister(ARM::VPR))
136       return true;
137   return false;
138 }
139 
140 // Creates a T, TT, TTT or TTTT BlockMask depending on BlockSize.
141 static ARM::PredBlockMask GetInitialBlockMask(unsigned BlockSize) {
142   switch (BlockSize) {
143   case 1:
144     return ARM::PredBlockMask::T;
145   case 2:
146     return ARM::PredBlockMask::TT;
147   case 3:
148     return ARM::PredBlockMask::TTT;
149   case 4:
150     return ARM::PredBlockMask::TTTT;
151   default:
152     llvm_unreachable("Invalid BlockSize!");
153   }
154 }
155 
156 // Given an iterator (Iter) that points at an instruction with a "Then"
157 // predicate, tries to create the largest block of continuous predicated
158 // instructions possible, and returns the VPT Block Mask of that block.
159 //
160 // This will try to perform some minor optimization in order to maximize the
161 // size of the block.
162 static ARM::PredBlockMask
163 CreateVPTBlock(MachineBasicBlock::instr_iterator &Iter,
164                MachineBasicBlock::instr_iterator EndIter,
165                SmallVectorImpl<MachineInstr *> &DeadInstructions) {
166   MachineBasicBlock::instr_iterator BlockBeg = Iter;
167   (void)BlockBeg;
168   assert(getVPTInstrPredicate(*Iter) == ARMVCC::Then &&
169          "Expected a Predicated Instruction");
170 
171   LLVM_DEBUG(dbgs() << "VPT block created for: "; Iter->dump());
172 
173   unsigned BlockSize;
174   StepOverPredicatedInstrs(Iter, EndIter, 4, BlockSize);
175 
176   LLVM_DEBUG(for (MachineBasicBlock::instr_iterator AddedInstIter =
177                       std::next(BlockBeg);
178                   AddedInstIter != Iter; ++AddedInstIter) {
179     if (AddedInstIter->isDebugInstr())
180       continue;
181     dbgs() << "  adding: ";
182     AddedInstIter->dump();
183   });
184 
185   // Generate the initial BlockMask
186   ARM::PredBlockMask BlockMask = GetInitialBlockMask(BlockSize);
187 
188   // Remove VPNOTs while there's still room in the block, so we can make the
189   // largest block possible.
190   ARMVCC::VPTCodes CurrentPredicate = ARMVCC::Else;
191   while (BlockSize < 4 && Iter != EndIter &&
192          Iter->getOpcode() == ARM::MVE_VPNOT) {
193 
194     // Try to skip all of the predicated instructions after the VPNOT, stopping
195     // after (4 - BlockSize). If we can't skip them all, stop.
196     unsigned ElseInstCnt = 0;
197     MachineBasicBlock::instr_iterator VPNOTBlockEndIter = std::next(Iter);
198     if (!StepOverPredicatedInstrs(VPNOTBlockEndIter, EndIter, (4 - BlockSize),
199                                   ElseInstCnt))
200       break;
201 
202     // Check if this VPNOT can be removed or not: It can only be removed if at
203     // least one of the predicated instruction that follows it kills or sets
204     // VPR.
205     if (!IsVPRDefinedOrKilledByBlock(Iter, VPNOTBlockEndIter))
206       break;
207 
208     LLVM_DEBUG(dbgs() << "  removing VPNOT: "; Iter->dump());
209 
210     // Record the new size of the block
211     BlockSize += ElseInstCnt;
212     assert(BlockSize <= 4 && "Block is too large!");
213 
214     // Record the VPNot to remove it later.
215     DeadInstructions.push_back(&*Iter);
216     ++Iter;
217 
218     // Replace the predicates of the instructions we're adding.
219     // Note that we are using "Iter" to iterate over the block so we can update
220     // it at the same time.
221     for (; Iter != VPNOTBlockEndIter; ++Iter) {
222       if (Iter->isDebugInstr())
223         continue;
224 
225       // Find the register in which the predicate is
226       int OpIdx = findFirstVPTPredOperandIdx(*Iter);
227       assert(OpIdx != -1);
228 
229       // Change the predicate and update the mask
230       Iter->getOperand(OpIdx).setImm(CurrentPredicate);
231       BlockMask = expandPredBlockMask(BlockMask, CurrentPredicate);
232 
233       LLVM_DEBUG(dbgs() << "  adding : "; Iter->dump());
234     }
235 
236     CurrentPredicate =
237         (CurrentPredicate == ARMVCC::Then ? ARMVCC::Else : ARMVCC::Then);
238   }
239   return BlockMask;
240 }
241 
242 bool MVEVPTBlock::InsertVPTBlocks(MachineBasicBlock &Block) {
243   bool Modified = false;
244   MachineBasicBlock::instr_iterator MBIter = Block.instr_begin();
245   MachineBasicBlock::instr_iterator EndIter = Block.instr_end();
246 
247   SmallVector<MachineInstr *, 4> DeadInstructions;
248 
249   while (MBIter != EndIter) {
250     MachineInstr *MI = &*MBIter;
251     Register PredReg;
252     DebugLoc DL = MI->getDebugLoc();
253 
254     ARMVCC::VPTCodes Pred = getVPTInstrPredicate(*MI, PredReg);
255 
256     // The idea of the predicate is that None, Then and Else are for use when
257     // handling assembly language: they correspond to the three possible
258     // suffixes "", "t" and "e" on the mnemonic. So when instructions are read
259     // from assembly source or disassembled from object code, you expect to
260     // see a mixture whenever there's a long VPT block. But in code
261     // generation, we hope we'll never generate an Else as input to this pass.
262     assert(Pred != ARMVCC::Else && "VPT block pass does not expect Else preds");
263 
264     if (Pred == ARMVCC::None) {
265       ++MBIter;
266       continue;
267     }
268 
269     ARM::PredBlockMask BlockMask =
270         CreateVPTBlock(MBIter, EndIter, DeadInstructions);
271 
272     // Search back for a VCMP that can be folded to create a VPT, or else
273     // create a VPST directly
274     MachineInstrBuilder MIBuilder;
275     unsigned NewOpcode;
276     LLVM_DEBUG(dbgs() << "  final block mask: " << (unsigned)BlockMask << "\n");
277     if (MachineInstr *VCMP = findVCMPToFoldIntoVPST(MI, TRI, NewOpcode)) {
278       LLVM_DEBUG(dbgs() << "  folding VCMP into VPST: "; VCMP->dump());
279       MIBuilder = BuildMI(Block, MI, DL, TII->get(NewOpcode));
280       MIBuilder.addImm((uint64_t)BlockMask);
281       MIBuilder.add(VCMP->getOperand(1));
282       MIBuilder.add(VCMP->getOperand(2));
283       MIBuilder.add(VCMP->getOperand(3));
284 
285       // We need to remove any kill flags between the original VCMP and the new
286       // insertion point.
287       for (MachineInstr &MII :
288            make_range(VCMP->getIterator(), MI->getIterator())) {
289         MII.clearRegisterKills(VCMP->getOperand(1).getReg(), TRI);
290         MII.clearRegisterKills(VCMP->getOperand(2).getReg(), TRI);
291       }
292 
293       VCMP->eraseFromParent();
294     } else {
295       MIBuilder = BuildMI(Block, MI, DL, TII->get(ARM::MVE_VPST));
296       MIBuilder.addImm((uint64_t)BlockMask);
297     }
298 
299     // Erase all dead instructions (VPNOT's). Do that now so that they do not
300     // mess with the bundle creation.
301     for (MachineInstr *DeadMI : DeadInstructions)
302       DeadMI->eraseFromParent();
303     DeadInstructions.clear();
304 
305     finalizeBundle(
306         Block, MachineBasicBlock::instr_iterator(MIBuilder.getInstr()), MBIter);
307 
308     Modified = true;
309   }
310 
311   return Modified;
312 }
313 
314 bool MVEVPTBlock::runOnMachineFunction(MachineFunction &Fn) {
315   const ARMSubtarget &STI = Fn.getSubtarget<ARMSubtarget>();
316 
317   if (!STI.isThumb2() || !STI.hasMVEIntegerOps())
318     return false;
319 
320   TII = static_cast<const Thumb2InstrInfo *>(STI.getInstrInfo());
321   TRI = STI.getRegisterInfo();
322 
323   LLVM_DEBUG(dbgs() << "********** ARM MVE VPT BLOCKS **********\n"
324                     << "********** Function: " << Fn.getName() << '\n');
325 
326   bool Modified = false;
327   for (MachineBasicBlock &MBB : Fn)
328     Modified |= InsertVPTBlocks(MBB);
329 
330   LLVM_DEBUG(dbgs() << "**************************************\n");
331   return Modified;
332 }
333 
334 /// createMVEVPTBlock - Returns an instance of the MVE VPT block
335 /// insertion pass.
336 FunctionPass *llvm::createMVEVPTBlockPass() { return new MVEVPTBlock(); }
337