1 //===- HexagonBitTracker.h --------------------------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H
10 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H
11 
12 #include "BitTracker.h"
13 #include "llvm/ADT/DenseMap.h"
14 #include <cstdint>
15 
16 namespace llvm {
17 
18 class HexagonInstrInfo;
19 class HexagonRegisterInfo;
20 class MachineFrameInfo;
21 class MachineFunction;
22 class MachineInstr;
23 class MachineRegisterInfo;
24 
25 struct HexagonEvaluator : public BitTracker::MachineEvaluator {
26   using CellMapType = BitTracker::CellMapType;
27   using RegisterRef = BitTracker::RegisterRef;
28   using RegisterCell = BitTracker::RegisterCell;
29   using BranchTargetList = BitTracker::BranchTargetList;
30 
31   HexagonEvaluator(const HexagonRegisterInfo &tri, MachineRegisterInfo &mri,
32                    const HexagonInstrInfo &tii, MachineFunction &mf);
33 
34   bool evaluate(const MachineInstr &MI, const CellMapType &Inputs,
35                 CellMapType &Outputs) const override;
36   bool evaluate(const MachineInstr &BI, const CellMapType &Inputs,
37                 BranchTargetList &Targets, bool &FallsThru) const override;
38 
39   BitTracker::BitMask mask(Register Reg, unsigned Sub) const override;
40 
41   uint16_t getPhysRegBitWidth(MCRegister Reg) const override;
42 
43   const TargetRegisterClass &composeWithSubRegIndex(
44         const TargetRegisterClass &RC, unsigned Idx) const override;
45 
46   MachineFunction &MF;
47   MachineFrameInfo &MFI;
48   const HexagonInstrInfo &TII;
49 
50 private:
51   unsigned getUniqueDefVReg(const MachineInstr &MI) const;
52   bool evaluateLoad(const MachineInstr &MI, const CellMapType &Inputs,
53                     CellMapType &Outputs) const;
54   bool evaluateFormalCopy(const MachineInstr &MI, const CellMapType &Inputs,
55                           CellMapType &Outputs) const;
56 
57   unsigned getNextPhysReg(unsigned PReg, unsigned Width) const;
58   unsigned getVirtRegFor(unsigned PReg) const;
59 
60   // Type of formal parameter extension.
61   struct ExtType {
62     enum { SExt, ZExt };
63 
64     ExtType() = default;
65     ExtType(char t, uint16_t w) : Type(t), Width(w) {}
66 
67     char Type = 0;
68     uint16_t Width = 0;
69   };
70   // Map VR -> extension type.
71   using RegExtMap = DenseMap<unsigned, ExtType>;
72   RegExtMap VRX;
73 };
74 
75 } // end namespace llvm
76 
77 #endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H
78