1 //===-- M68kRegisterBankInfo.h ----------------------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file declares the targeting of the RegisterBankInfo class for M68k.
10 /// \todo This should be generated by TableGen.
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_M68K_GLSEL_M68KREGISTERBANKINFO_H
14 #define LLVM_LIB_TARGET_M68K_GLSEL_M68KREGISTERBANKINFO_H
15 
16 #include "llvm/CodeGen/RegisterBankInfo.h"
17 
18 #define GET_REGBANK_DECLARATIONS
19 #include "M68kGenRegisterBank.inc"
20 #undef GET_REGBANK_DECLARATIONS
21 
22 namespace llvm {
23 
24 class TargetRegisterInfo;
25 
26 class M68kGenRegisterBankInfo : public RegisterBankInfo {
27 protected:
28 #define GET_TARGET_REGBANK_CLASS
29 #include "M68kGenRegisterBank.inc"
30 #undef GET_TARGET_REGBANK_CLASS
31 };
32 
33 /// This class provides the information for the target register banks.
34 class M68kRegisterBankInfo final : public M68kGenRegisterBankInfo {
35 public:
36   M68kRegisterBankInfo(const TargetRegisterInfo &TRI);
37 
38   const RegisterBank &getRegBankFromRegClass(const TargetRegisterClass &RC,
39                                              LLT) const override;
40 
41   const InstructionMapping &
42   getInstrMapping(const MachineInstr &MI) const override;
43 };
44 } // end namespace llvm
45 #endif // LLVM_LIB_TARGET_M68K_GLSEL_M68KREGISTERBANKINFO_H
46