1 //===-- NVPTX.h - Top-level interface for NVPTX representation --*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the entry points for global functions defined in
10 // the LLVM NVPTX back-end.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_NVPTX_NVPTX_H
15 #define LLVM_LIB_TARGET_NVPTX_NVPTX_H
16 
17 #include "llvm/IR/PassManager.h"
18 #include "llvm/Pass.h"
19 #include "llvm/Support/CodeGen.h"
20 
21 namespace llvm {
22 class FunctionPass;
23 class MachineFunctionPass;
24 class NVPTXTargetMachine;
25 class PassRegistry;
26 
27 namespace NVPTXCC {
28 enum CondCodes {
29   EQ,
30   NE,
31   LT,
32   LE,
33   GT,
34   GE
35 };
36 }
37 
38 FunctionPass *createNVPTXISelDag(NVPTXTargetMachine &TM,
39                                  llvm::CodeGenOpt::Level OptLevel);
40 ModulePass *createNVPTXAssignValidGlobalNamesPass();
41 ModulePass *createGenericToNVVMPass();
42 FunctionPass *createNVVMIntrRangePass(unsigned int SmVersion);
43 FunctionPass *createNVVMReflectPass(unsigned int SmVersion);
44 MachineFunctionPass *createNVPTXPrologEpilogPass();
45 MachineFunctionPass *createNVPTXReplaceImageHandlesPass();
46 FunctionPass *createNVPTXImageOptimizerPass();
47 FunctionPass *createNVPTXLowerArgsPass(const NVPTXTargetMachine *TM);
48 FunctionPass *createNVPTXLowerAllocaPass();
49 MachineFunctionPass *createNVPTXPeephole();
50 MachineFunctionPass *createNVPTXProxyRegErasurePass();
51 
52 struct NVVMIntrRangePass : PassInfoMixin<NVVMIntrRangePass> {
53   NVVMIntrRangePass();
54   NVVMIntrRangePass(unsigned SmVersion) : SmVersion(SmVersion) {}
55   PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
56 
57 private:
58   unsigned SmVersion;
59 };
60 
61 struct NVVMReflectPass : PassInfoMixin<NVVMReflectPass> {
62   NVVMReflectPass();
63   NVVMReflectPass(unsigned SmVersion) : SmVersion(SmVersion) {}
64   PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
65 
66 private:
67   unsigned SmVersion;
68 };
69 
70 namespace NVPTX {
71 enum DrvInterface {
72   NVCL,
73   CUDA
74 };
75 
76 // A field inside TSFlags needs a shift and a mask. The usage is
77 // always as follows :
78 // ((TSFlags & fieldMask) >> fieldShift)
79 // The enum keeps the mask, the shift, and all valid values of the
80 // field in one place.
81 enum VecInstType {
82   VecInstTypeShift = 0,
83   VecInstTypeMask = 0xF,
84 
85   VecNOP = 0,
86   VecLoad = 1,
87   VecStore = 2,
88   VecBuild = 3,
89   VecShuffle = 4,
90   VecExtract = 5,
91   VecInsert = 6,
92   VecDest = 7,
93   VecOther = 15
94 };
95 
96 enum SimpleMove {
97   SimpleMoveMask = 0x10,
98   SimpleMoveShift = 4
99 };
100 enum LoadStore {
101   isLoadMask = 0x20,
102   isLoadShift = 5,
103   isStoreMask = 0x40,
104   isStoreShift = 6
105 };
106 
107 namespace PTXLdStInstCode {
108 enum AddressSpace {
109   GENERIC = 0,
110   GLOBAL = 1,
111   CONSTANT = 2,
112   SHARED = 3,
113   PARAM = 4,
114   LOCAL = 5
115 };
116 enum FromType {
117   Unsigned = 0,
118   Signed,
119   Float,
120   Untyped
121 };
122 enum VecType {
123   Scalar = 1,
124   V2 = 2,
125   V4 = 4
126 };
127 }
128 
129 /// PTXCvtMode - Conversion code enumeration
130 namespace PTXCvtMode {
131 enum CvtMode {
132   NONE = 0,
133   RNI,
134   RZI,
135   RMI,
136   RPI,
137   RN,
138   RZ,
139   RM,
140   RP,
141   RNA,
142 
143   BASE_MASK = 0x0F,
144   FTZ_FLAG = 0x10,
145   SAT_FLAG = 0x20,
146   RELU_FLAG = 0x40
147 };
148 }
149 
150 /// PTXCmpMode - Comparison mode enumeration
151 namespace PTXCmpMode {
152 enum CmpMode {
153   EQ = 0,
154   NE,
155   LT,
156   LE,
157   GT,
158   GE,
159   LO,
160   LS,
161   HI,
162   HS,
163   EQU,
164   NEU,
165   LTU,
166   LEU,
167   GTU,
168   GEU,
169   NUM,
170   // NAN is a MACRO
171   NotANumber,
172 
173   BASE_MASK = 0xFF,
174   FTZ_FLAG = 0x100
175 };
176 }
177 }
178 void initializeNVPTXDAGToDAGISelPass(PassRegistry &);
179 } // namespace llvm
180 
181 // Defines symbolic names for NVPTX registers.  This defines a mapping from
182 // register name to register number.
183 #define GET_REGINFO_ENUM
184 #include "NVPTXGenRegisterInfo.inc"
185 
186 // Defines symbolic names for the NVPTX instructions.
187 #define GET_INSTRINFO_ENUM
188 #define GET_INSTRINFO_MC_HELPER_DECLS
189 #include "NVPTXGenInstrInfo.inc"
190 
191 #endif
192