1 //===-- RISCVTargetStreamer.h - RISC-V Target Streamer ---------*- C++ -*--===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVTARGETSTREAMER_H
10 #define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVTARGETSTREAMER_H
11 
12 #include "RISCV.h"
13 #include "llvm/MC/MCStreamer.h"
14 #include "llvm/MC/MCSubtargetInfo.h"
15 
16 namespace llvm {
17 
18 class formatted_raw_ostream;
19 
20 enum class RISCVOptionArchArgType {
21   Full,
22   Plus,
23   Minus,
24 };
25 
26 struct RISCVOptionArchArg {
27   RISCVOptionArchArgType Type;
28   std::string Value;
29 
30   RISCVOptionArchArg(RISCVOptionArchArgType Type, std::string Value)
31       : Type(Type), Value(Value) {}
32 };
33 
34 class RISCVTargetStreamer : public MCTargetStreamer {
35   RISCVABI::ABI TargetABI = RISCVABI::ABI_Unknown;
36 
37 public:
38   RISCVTargetStreamer(MCStreamer &S);
39   void finish() override;
40   virtual void reset();
41 
42   virtual void emitDirectiveOptionPush();
43   virtual void emitDirectiveOptionPop();
44   virtual void emitDirectiveOptionPIC();
45   virtual void emitDirectiveOptionNoPIC();
46   virtual void emitDirectiveOptionRVC();
47   virtual void emitDirectiveOptionNoRVC();
48   virtual void emitDirectiveOptionRelax();
49   virtual void emitDirectiveOptionNoRelax();
50   virtual void emitDirectiveOptionArch(ArrayRef<RISCVOptionArchArg> Args);
51   virtual void emitDirectiveVariantCC(MCSymbol &Symbol);
52   virtual void emitAttribute(unsigned Attribute, unsigned Value);
53   virtual void finishAttributeSection();
54   virtual void emitTextAttribute(unsigned Attribute, StringRef String);
55   virtual void emitIntTextAttribute(unsigned Attribute, unsigned IntValue,
56                                     StringRef StringValue);
57 
58   void emitTargetAttributes(const MCSubtargetInfo &STI, bool EmitStackAlign);
59   void setTargetABI(RISCVABI::ABI ABI);
60   RISCVABI::ABI getTargetABI() const { return TargetABI; }
61 };
62 
63 // This part is for ascii assembly output
64 class RISCVTargetAsmStreamer : public RISCVTargetStreamer {
65   formatted_raw_ostream &OS;
66 
67   void finishAttributeSection() override;
68   void emitAttribute(unsigned Attribute, unsigned Value) override;
69   void emitTextAttribute(unsigned Attribute, StringRef String) override;
70   void emitIntTextAttribute(unsigned Attribute, unsigned IntValue,
71                             StringRef StringValue) override;
72 
73 public:
74   RISCVTargetAsmStreamer(MCStreamer &S, formatted_raw_ostream &OS);
75 
76   void emitDirectiveOptionPush() override;
77   void emitDirectiveOptionPop() override;
78   void emitDirectiveOptionPIC() override;
79   void emitDirectiveOptionNoPIC() override;
80   void emitDirectiveOptionRVC() override;
81   void emitDirectiveOptionNoRVC() override;
82   void emitDirectiveOptionRelax() override;
83   void emitDirectiveOptionNoRelax() override;
84   void emitDirectiveOptionArch(ArrayRef<RISCVOptionArchArg> Args) override;
85   void emitDirectiveVariantCC(MCSymbol &Symbol) override;
86 };
87 
88 }
89 #endif
90