1 //- WebAssemblyISelLowering.h - WebAssembly DAG Lowering Interface -*- C++ -*-// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 /// 9 /// \file 10 /// This file defines the interfaces that WebAssembly uses to lower LLVM 11 /// code into a selection DAG. 12 /// 13 //===----------------------------------------------------------------------===// 14 15 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYISELLOWERING_H 16 #define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYISELLOWERING_H 17 18 #include "llvm/CodeGen/TargetLowering.h" 19 20 namespace llvm { 21 22 namespace WebAssemblyISD { 23 24 enum NodeType : unsigned { 25 FIRST_NUMBER = ISD::BUILTIN_OP_END, 26 #define HANDLE_NODETYPE(NODE) NODE, 27 #define HANDLE_MEM_NODETYPE(NODE) 28 #include "WebAssemblyISD.def" 29 FIRST_MEM_OPCODE = ISD::FIRST_TARGET_MEMORY_OPCODE, 30 #undef HANDLE_NODETYPE 31 #undef HANDLE_MEM_NODETYPE 32 #define HANDLE_NODETYPE(NODE) 33 #define HANDLE_MEM_NODETYPE(NODE) NODE, 34 #include "WebAssemblyISD.def" 35 #undef HANDLE_NODETYPE 36 #undef HANDLE_MEM_NODETYPE 37 }; 38 39 } // end namespace WebAssemblyISD 40 41 class WebAssemblySubtarget; 42 43 class WebAssemblyTargetLowering final : public TargetLowering { 44 public: 45 WebAssemblyTargetLowering(const TargetMachine &TM, 46 const WebAssemblySubtarget &STI); 47 48 MVT getPointerTy(const DataLayout &DL, uint32_t AS = 0) const override; 49 MVT getPointerMemTy(const DataLayout &DL, uint32_t AS = 0) const override; 50 51 private: 52 /// Keep a pointer to the WebAssemblySubtarget around so that we can make the 53 /// right decision when generating code for different targets. 54 const WebAssemblySubtarget *Subtarget; 55 56 AtomicExpansionKind shouldExpandAtomicRMWInIR(AtomicRMWInst *) const override; 57 bool shouldScalarizeBinop(SDValue VecOp) const override; 58 FastISel *createFastISel(FunctionLoweringInfo &FuncInfo, 59 const TargetLibraryInfo *LibInfo) const override; 60 MVT getScalarShiftAmountTy(const DataLayout &DL, EVT) const override; 61 MachineBasicBlock * 62 EmitInstrWithCustomInserter(MachineInstr &MI, 63 MachineBasicBlock *MBB) const override; 64 const char *getTargetNodeName(unsigned Opcode) const override; 65 std::pair<unsigned, const TargetRegisterClass *> 66 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, 67 StringRef Constraint, MVT VT) const override; 68 bool isCheapToSpeculateCttz() const override; 69 bool isCheapToSpeculateCtlz() const override; 70 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty, 71 unsigned AS, 72 Instruction *I = nullptr) const override; 73 bool allowsMisalignedMemoryAccesses(EVT, unsigned AddrSpace, Align Alignment, 74 MachineMemOperand::Flags Flags, 75 bool *Fast) const override; 76 bool isIntDivCheap(EVT VT, AttributeList Attr) const override; 77 bool isVectorLoadExtDesirable(SDValue ExtVal) const override; 78 bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override; 79 EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context, 80 EVT VT) const override; 81 bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I, 82 MachineFunction &MF, 83 unsigned Intrinsic) const override; 84 85 void computeKnownBitsForTargetNode(const SDValue Op, KnownBits &Known, 86 const APInt &DemandedElts, 87 const SelectionDAG &DAG, 88 unsigned Depth) const override; 89 90 TargetLoweringBase::LegalizeTypeAction 91 getPreferredVectorAction(MVT VT) const override; 92 93 SDValue LowerCall(CallLoweringInfo &CLI, 94 SmallVectorImpl<SDValue> &InVals) const override; 95 bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF, 96 bool isVarArg, 97 const SmallVectorImpl<ISD::OutputArg> &Outs, 98 LLVMContext &Context) const override; 99 SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, 100 const SmallVectorImpl<ISD::OutputArg> &Outs, 101 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl, 102 SelectionDAG &DAG) const override; 103 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, 104 bool IsVarArg, 105 const SmallVectorImpl<ISD::InputArg> &Ins, 106 const SDLoc &DL, SelectionDAG &DAG, 107 SmallVectorImpl<SDValue> &InVals) const override; 108 109 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results, 110 SelectionDAG &DAG) const override; 111 112 const char *getClearCacheBuiltinName() const override { 113 report_fatal_error("llvm.clear_cache is not supported on wasm"); 114 } 115 116 // Custom lowering hooks. 117 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 118 SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const; 119 SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const; 120 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const; 121 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; 122 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const; 123 SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const; 124 SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const; 125 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const; 126 SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const; 127 SDValue LowerCopyToReg(SDValue Op, SelectionDAG &DAG) const; 128 SDValue LowerIntrinsic(SDValue Op, SelectionDAG &DAG) const; 129 SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const; 130 SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const; 131 SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const; 132 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const; 133 SDValue LowerAccessVectorElement(SDValue Op, SelectionDAG &DAG) const; 134 SDValue LowerShift(SDValue Op, SelectionDAG &DAG) const; 135 SDValue LowerFP_TO_INT_SAT(SDValue Op, SelectionDAG &DAG) const; 136 SDValue LowerLoad(SDValue Op, SelectionDAG &DAG) const; 137 SDValue LowerStore(SDValue Op, SelectionDAG &DAG) const; 138 139 // Helper for LoadLoad and LowerStore 140 bool MatchTableForLowering(SelectionDAG &DAG, const SDLoc &DL, 141 const SDValue &Base, GlobalAddressSDNode *&GA, 142 SDValue &Idx) const; 143 144 // Custom DAG combine hooks 145 SDValue 146 PerformDAGCombine(SDNode *N, 147 TargetLowering::DAGCombinerInfo &DCI) const override; 148 }; 149 150 namespace WebAssembly { 151 FastISel *createFastISel(FunctionLoweringInfo &funcInfo, 152 const TargetLibraryInfo *libInfo); 153 } // end namespace WebAssembly 154 155 } // end namespace llvm 156 157 #endif 158