1 //===- XtensaTargetMachine.cpp - Define TargetMachine for Xtensa ----------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
6 // See https://llvm.org/LICENSE.txt for license information.
7 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
8 //
9 //===----------------------------------------------------------------------===//
10 //
11 // Implements the info about Xtensa target spec.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #include "XtensaTargetMachine.h"
16 #include "TargetInfo/XtensaTargetInfo.h"
17 #include "llvm/CodeGen/Passes.h"
18 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
19 #include "llvm/CodeGen/TargetPassConfig.h"
20 #include "llvm/IR/LegacyPassManager.h"
21 #include "llvm/MC/TargetRegistry.h"
22 #include "llvm/Transforms/IPO/PassManagerBuilder.h"
23 #include "llvm/Transforms/Scalar.h"
24 #include <optional>
25 
26 using namespace llvm;
27 
28 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeXtensaTarget() {
29   // Register the target.
30   RegisterTargetMachine<XtensaTargetMachine> A(getTheXtensaTarget());
31 }
32 
33 static std::string computeDataLayout(const Triple &TT, StringRef CPU,
34                                      const TargetOptions &Options,
35                                      bool IsLittle) {
36   std::string Ret = "e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32";
37   return Ret;
38 }
39 
40 static Reloc::Model getEffectiveRelocModel(bool JIT,
41                                            std::optional<Reloc::Model> RM) {
42   if (!RM || JIT)
43      return Reloc::Static;
44   return *RM;
45 }
46 
47 XtensaTargetMachine::XtensaTargetMachine(const Target &T, const Triple &TT,
48                                          StringRef CPU, StringRef FS,
49                                          const TargetOptions &Options,
50                                          std::optional<Reloc::Model> RM,
51                                          std::optional<CodeModel::Model> CM,
52                                          CodeGenOpt::Level OL, bool JIT,
53                                          bool IsLittle)
54     : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, IsLittle), TT,
55                         CPU, FS, Options, getEffectiveRelocModel(JIT, RM),
56                         getEffectiveCodeModel(CM, CodeModel::Small), OL),
57       TLOF(std::make_unique<TargetLoweringObjectFileELF>()) {
58   initAsmInfo();
59 }
60 
61 XtensaTargetMachine::XtensaTargetMachine(const Target &T, const Triple &TT,
62                                          StringRef CPU, StringRef FS,
63                                          const TargetOptions &Options,
64                                          std::optional<Reloc::Model> RM,
65                                          std::optional<CodeModel::Model> CM,
66                                          CodeGenOpt::Level OL, bool JIT)
67     : XtensaTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {}
68 
69 TargetPassConfig *XtensaTargetMachine::createPassConfig(PassManagerBase &PM) {
70   return new TargetPassConfig(*this, PM);
71 }
72