1 //===- X86DisassemblerTables.cpp - Disassembler tables ----------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file is part of the X86 Disassembler Emitter. 10 // It contains the implementation of the disassembler tables. 11 // Documentation for the disassembler emitter in general can be found in 12 // X86DisassemblerEmitter.h. 13 // 14 //===----------------------------------------------------------------------===// 15 16 #include "X86DisassemblerTables.h" 17 #include "X86DisassemblerShared.h" 18 #include "X86ModRMFilters.h" 19 #include "llvm/ADT/SmallVector.h" 20 #include "llvm/Support/ErrorHandling.h" 21 #include "llvm/Support/Format.h" 22 #include "llvm/Support/raw_ostream.h" 23 #include <map> 24 25 using namespace llvm; 26 using namespace X86Disassembler; 27 28 /// stringForContext - Returns a string containing the name of a particular 29 /// InstructionContext, usually for diagnostic purposes. 30 /// 31 /// @param insnContext - The instruction class to transform to a string. 32 /// @return - A statically-allocated string constant that contains the 33 /// name of the instruction class. 34 static inline const char* stringForContext(InstructionContext insnContext) { 35 switch (insnContext) { 36 default: 37 llvm_unreachable("Unhandled instruction class"); 38 #define ENUM_ENTRY(n, r, d) case n: return #n; break; 39 #define ENUM_ENTRY_K_B(n, r, d) ENUM_ENTRY(n, r, d) ENUM_ENTRY(n##_K_B, r, d)\ 40 ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) ENUM_ENTRY(n##_B, r, d)\ 41 ENUM_ENTRY(n##_KZ_B, r, d) 42 INSTRUCTION_CONTEXTS 43 #undef ENUM_ENTRY 44 #undef ENUM_ENTRY_K_B 45 } 46 } 47 48 /// stringForOperandType - Like stringForContext, but for OperandTypes. 49 static inline const char* stringForOperandType(OperandType type) { 50 switch (type) { 51 default: 52 llvm_unreachable("Unhandled type"); 53 #define ENUM_ENTRY(i, d) case i: return #i; 54 TYPES 55 #undef ENUM_ENTRY 56 } 57 } 58 59 /// stringForOperandEncoding - like stringForContext, but for 60 /// OperandEncodings. 61 static inline const char* stringForOperandEncoding(OperandEncoding encoding) { 62 switch (encoding) { 63 default: 64 llvm_unreachable("Unhandled encoding"); 65 #define ENUM_ENTRY(i, d) case i: return #i; 66 ENCODINGS 67 #undef ENUM_ENTRY 68 } 69 } 70 71 /// inheritsFrom - Indicates whether all instructions in one class also belong 72 /// to another class. 73 /// 74 /// @param child - The class that may be the subset 75 /// @param parent - The class that may be the superset 76 /// @return - True if child is a subset of parent, false otherwise. 77 static inline bool inheritsFrom(InstructionContext child, 78 InstructionContext parent, bool noPrefix = true, 79 bool VEX_LIG = false, bool VEX_WIG = false, 80 bool AdSize64 = false) { 81 if (child == parent) 82 return true; 83 84 switch (parent) { 85 case IC: 86 return(inheritsFrom(child, IC_64BIT, AdSize64) || 87 (noPrefix && inheritsFrom(child, IC_OPSIZE, noPrefix)) || 88 inheritsFrom(child, IC_ADSIZE) || 89 (noPrefix && inheritsFrom(child, IC_XD, noPrefix)) || 90 (noPrefix && inheritsFrom(child, IC_XS, noPrefix))); 91 case IC_64BIT: 92 return(inheritsFrom(child, IC_64BIT_REXW) || 93 (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE, noPrefix)) || 94 (!AdSize64 && inheritsFrom(child, IC_64BIT_ADSIZE)) || 95 (noPrefix && inheritsFrom(child, IC_64BIT_XD, noPrefix)) || 96 (noPrefix && inheritsFrom(child, IC_64BIT_XS, noPrefix))); 97 case IC_OPSIZE: 98 return inheritsFrom(child, IC_64BIT_OPSIZE) || 99 inheritsFrom(child, IC_OPSIZE_ADSIZE); 100 case IC_ADSIZE: 101 return (noPrefix && inheritsFrom(child, IC_OPSIZE_ADSIZE, noPrefix)); 102 case IC_OPSIZE_ADSIZE: 103 return false; 104 case IC_64BIT_ADSIZE: 105 return (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE, noPrefix)); 106 case IC_64BIT_OPSIZE_ADSIZE: 107 return false; 108 case IC_XD: 109 return inheritsFrom(child, IC_64BIT_XD); 110 case IC_XS: 111 return inheritsFrom(child, IC_64BIT_XS); 112 case IC_XD_OPSIZE: 113 return inheritsFrom(child, IC_64BIT_XD_OPSIZE); 114 case IC_XS_OPSIZE: 115 return inheritsFrom(child, IC_64BIT_XS_OPSIZE); 116 case IC_XD_ADSIZE: 117 return inheritsFrom(child, IC_64BIT_XD_ADSIZE); 118 case IC_XS_ADSIZE: 119 return inheritsFrom(child, IC_64BIT_XS_ADSIZE); 120 case IC_64BIT_REXW: 121 return((noPrefix && inheritsFrom(child, IC_64BIT_REXW_XS, noPrefix)) || 122 (noPrefix && inheritsFrom(child, IC_64BIT_REXW_XD, noPrefix)) || 123 (noPrefix && inheritsFrom(child, IC_64BIT_REXW_OPSIZE, noPrefix)) || 124 (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE))); 125 case IC_64BIT_OPSIZE: 126 return inheritsFrom(child, IC_64BIT_REXW_OPSIZE) || 127 (!AdSize64 && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE)) || 128 (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE)); 129 case IC_64BIT_XD: 130 return(inheritsFrom(child, IC_64BIT_REXW_XD) || 131 (!AdSize64 && inheritsFrom(child, IC_64BIT_XD_ADSIZE))); 132 case IC_64BIT_XS: 133 return(inheritsFrom(child, IC_64BIT_REXW_XS) || 134 (!AdSize64 && inheritsFrom(child, IC_64BIT_XS_ADSIZE))); 135 case IC_64BIT_XD_OPSIZE: 136 case IC_64BIT_XS_OPSIZE: 137 return false; 138 case IC_64BIT_XD_ADSIZE: 139 case IC_64BIT_XS_ADSIZE: 140 return false; 141 case IC_64BIT_REXW_XD: 142 case IC_64BIT_REXW_XS: 143 case IC_64BIT_REXW_OPSIZE: 144 case IC_64BIT_REXW_ADSIZE: 145 return false; 146 case IC_VEX: 147 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W)) || 148 (VEX_WIG && inheritsFrom(child, IC_VEX_W)) || 149 (VEX_LIG && inheritsFrom(child, IC_VEX_L)); 150 case IC_VEX_XS: 151 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XS)) || 152 (VEX_WIG && inheritsFrom(child, IC_VEX_W_XS)) || 153 (VEX_LIG && inheritsFrom(child, IC_VEX_L_XS)); 154 case IC_VEX_XD: 155 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XD)) || 156 (VEX_WIG && inheritsFrom(child, IC_VEX_W_XD)) || 157 (VEX_LIG && inheritsFrom(child, IC_VEX_L_XD)); 158 case IC_VEX_OPSIZE: 159 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE)) || 160 (VEX_WIG && inheritsFrom(child, IC_VEX_W_OPSIZE)) || 161 (VEX_LIG && inheritsFrom(child, IC_VEX_L_OPSIZE)); 162 case IC_VEX_W: 163 return VEX_LIG && inheritsFrom(child, IC_VEX_L_W); 164 case IC_VEX_W_XS: 165 return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XS); 166 case IC_VEX_W_XD: 167 return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XD); 168 case IC_VEX_W_OPSIZE: 169 return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE); 170 case IC_VEX_L: 171 return VEX_WIG && inheritsFrom(child, IC_VEX_L_W); 172 case IC_VEX_L_XS: 173 return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XS); 174 case IC_VEX_L_XD: 175 return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XD); 176 case IC_VEX_L_OPSIZE: 177 return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE); 178 case IC_VEX_L_W: 179 case IC_VEX_L_W_XS: 180 case IC_VEX_L_W_XD: 181 case IC_VEX_L_W_OPSIZE: 182 return false; 183 case IC_EVEX: 184 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W)) || 185 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W)) || 186 (VEX_WIG && inheritsFrom(child, IC_EVEX_W)) || 187 (VEX_LIG && inheritsFrom(child, IC_EVEX_L)) || 188 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2)); 189 case IC_EVEX_XS: 190 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS)) || 191 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS)) || 192 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS)) || 193 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS)) || 194 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS)); 195 case IC_EVEX_XD: 196 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD)) || 197 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD)) || 198 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD)) || 199 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD)) || 200 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD)); 201 case IC_EVEX_OPSIZE: 202 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE)) || 203 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE)) || 204 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE)) || 205 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE)) || 206 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE)); 207 case IC_EVEX_K: 208 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K)) || 209 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K)) || 210 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_K)) || 211 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_K)) || 212 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_K)); 213 case IC_EVEX_XS_K: 214 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K)) || 215 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K)) || 216 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_K)) || 217 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_K)) || 218 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_K)); 219 case IC_EVEX_XD_K: 220 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K)) || 221 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K)) || 222 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_K)) || 223 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K)) || 224 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K)); 225 case IC_EVEX_OPSIZE_K: 226 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K)) || 227 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K)) || 228 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K)) || 229 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K)) || 230 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K)); 231 case IC_EVEX_KZ: 232 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ)) || 233 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ)) || 234 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_KZ)) || 235 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_KZ)) || 236 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_KZ)); 237 case IC_EVEX_XS_KZ: 238 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ)) || 239 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ)) || 240 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_KZ)) || 241 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_KZ)) || 242 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_KZ)); 243 case IC_EVEX_XD_KZ: 244 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ)) || 245 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ)) || 246 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_KZ)) || 247 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ)) || 248 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ)); 249 case IC_EVEX_OPSIZE_KZ: 250 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ)) || 251 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ)) || 252 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ)) || 253 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ)) || 254 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ)); 255 case IC_EVEX_W: 256 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W)) || 257 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W)); 258 case IC_EVEX_W_XS: 259 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS)) || 260 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS)); 261 case IC_EVEX_W_XD: 262 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD)) || 263 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD)); 264 case IC_EVEX_W_OPSIZE: 265 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE)) || 266 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE)); 267 case IC_EVEX_W_K: 268 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_K)) || 269 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_K)); 270 case IC_EVEX_W_XS_K: 271 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_K)) || 272 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K)); 273 case IC_EVEX_W_XD_K: 274 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_K)) || 275 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K)); 276 case IC_EVEX_W_OPSIZE_K: 277 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K)) || 278 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K)); 279 case IC_EVEX_W_KZ: 280 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_KZ)) || 281 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_KZ)); 282 case IC_EVEX_W_XS_KZ: 283 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ)) || 284 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ)); 285 case IC_EVEX_W_XD_KZ: 286 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ)) || 287 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ)); 288 case IC_EVEX_W_OPSIZE_KZ: 289 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ)) || 290 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ)); 291 case IC_EVEX_L: 292 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W); 293 case IC_EVEX_L_XS: 294 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS); 295 case IC_EVEX_L_XD: 296 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD); 297 case IC_EVEX_L_OPSIZE: 298 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE); 299 case IC_EVEX_L_K: 300 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K); 301 case IC_EVEX_L_XS_K: 302 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K); 303 case IC_EVEX_L_XD_K: 304 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K); 305 case IC_EVEX_L_OPSIZE_K: 306 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K); 307 case IC_EVEX_L_KZ: 308 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ); 309 case IC_EVEX_L_XS_KZ: 310 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ); 311 case IC_EVEX_L_XD_KZ: 312 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ); 313 case IC_EVEX_L_OPSIZE_KZ: 314 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ); 315 case IC_EVEX_L_W: 316 case IC_EVEX_L_W_XS: 317 case IC_EVEX_L_W_XD: 318 case IC_EVEX_L_W_OPSIZE: 319 return false; 320 case IC_EVEX_L_W_K: 321 case IC_EVEX_L_W_XS_K: 322 case IC_EVEX_L_W_XD_K: 323 case IC_EVEX_L_W_OPSIZE_K: 324 return false; 325 case IC_EVEX_L_W_KZ: 326 case IC_EVEX_L_W_XS_KZ: 327 case IC_EVEX_L_W_XD_KZ: 328 case IC_EVEX_L_W_OPSIZE_KZ: 329 return false; 330 case IC_EVEX_L2: 331 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W); 332 case IC_EVEX_L2_XS: 333 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS); 334 case IC_EVEX_L2_XD: 335 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD); 336 case IC_EVEX_L2_OPSIZE: 337 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE); 338 case IC_EVEX_L2_K: 339 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K); 340 case IC_EVEX_L2_XS_K: 341 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K); 342 case IC_EVEX_L2_XD_K: 343 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K); 344 case IC_EVEX_L2_OPSIZE_K: 345 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K); 346 case IC_EVEX_L2_KZ: 347 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ); 348 case IC_EVEX_L2_XS_KZ: 349 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ); 350 case IC_EVEX_L2_XD_KZ: 351 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ); 352 case IC_EVEX_L2_OPSIZE_KZ: 353 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ); 354 case IC_EVEX_L2_W: 355 case IC_EVEX_L2_W_XS: 356 case IC_EVEX_L2_W_XD: 357 case IC_EVEX_L2_W_OPSIZE: 358 return false; 359 case IC_EVEX_L2_W_K: 360 case IC_EVEX_L2_W_XS_K: 361 case IC_EVEX_L2_W_XD_K: 362 case IC_EVEX_L2_W_OPSIZE_K: 363 return false; 364 case IC_EVEX_L2_W_KZ: 365 case IC_EVEX_L2_W_XS_KZ: 366 case IC_EVEX_L2_W_XD_KZ: 367 case IC_EVEX_L2_W_OPSIZE_KZ: 368 return false; 369 case IC_EVEX_B: 370 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_B)) || 371 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_B)) || 372 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_B)) || 373 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_B)) || 374 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_B)); 375 case IC_EVEX_XS_B: 376 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) || 377 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B)) || 378 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_B)) || 379 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_B)) || 380 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_B)); 381 case IC_EVEX_XD_B: 382 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_B)) || 383 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B)) || 384 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_B)) || 385 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_B)) || 386 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_B)); 387 case IC_EVEX_OPSIZE_B: 388 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B)) || 389 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B)) || 390 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_B)) || 391 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_B)) || 392 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_B)); 393 case IC_EVEX_K_B: 394 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K_B)) || 395 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K_B)) || 396 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_K_B)) || 397 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_K_B)) || 398 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_K_B)); 399 case IC_EVEX_XS_K_B: 400 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B)) || 401 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B)) || 402 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_K_B)) || 403 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_K_B)) || 404 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_K_B)); 405 case IC_EVEX_XD_K_B: 406 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B)) || 407 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B)) || 408 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_K_B)) || 409 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K_B)) || 410 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K_B)); 411 case IC_EVEX_OPSIZE_K_B: 412 return (VEX_LIG && VEX_WIG && 413 inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) || 414 (VEX_LIG && VEX_WIG && 415 inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B)) || 416 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K_B)) || 417 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K_B)) || 418 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K_B)); 419 case IC_EVEX_KZ_B: 420 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B)) || 421 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B)) || 422 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_KZ_B)) || 423 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_KZ_B)) || 424 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_KZ_B)); 425 case IC_EVEX_XS_KZ_B: 426 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B)) || 427 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B)) || 428 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_KZ_B)) || 429 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_KZ_B)) || 430 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_KZ_B)); 431 case IC_EVEX_XD_KZ_B: 432 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B)) || 433 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B)) || 434 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_KZ_B)) || 435 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ_B)) || 436 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ_B)); 437 case IC_EVEX_OPSIZE_KZ_B: 438 return (VEX_LIG && VEX_WIG && 439 inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) || 440 (VEX_LIG && VEX_WIG && 441 inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B)) || 442 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ_B)) || 443 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ_B)) || 444 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ_B)); 445 case IC_EVEX_W_B: 446 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_B)) || 447 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_B)); 448 case IC_EVEX_W_XS_B: 449 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) || 450 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B)); 451 case IC_EVEX_W_XD_B: 452 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_B)) || 453 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B)); 454 case IC_EVEX_W_OPSIZE_B: 455 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B)) || 456 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B)); 457 case IC_EVEX_W_K_B: 458 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_K_B)) || 459 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_K_B)); 460 case IC_EVEX_W_XS_K_B: 461 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B)) || 462 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B)); 463 case IC_EVEX_W_XD_K_B: 464 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B)) || 465 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B)); 466 case IC_EVEX_W_OPSIZE_K_B: 467 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) || 468 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B)); 469 case IC_EVEX_W_KZ_B: 470 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B)) || 471 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B)); 472 case IC_EVEX_W_XS_KZ_B: 473 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B)) || 474 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B)); 475 case IC_EVEX_W_XD_KZ_B: 476 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B)) || 477 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B)); 478 case IC_EVEX_W_OPSIZE_KZ_B: 479 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) || 480 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B)); 481 case IC_EVEX_L_B: 482 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_B); 483 case IC_EVEX_L_XS_B: 484 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_B); 485 case IC_EVEX_L_XD_B: 486 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_B); 487 case IC_EVEX_L_OPSIZE_B: 488 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B); 489 case IC_EVEX_L_K_B: 490 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K_B); 491 case IC_EVEX_L_XS_K_B: 492 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B); 493 case IC_EVEX_L_XD_K_B: 494 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B); 495 case IC_EVEX_L_OPSIZE_K_B: 496 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B); 497 case IC_EVEX_L_KZ_B: 498 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B); 499 case IC_EVEX_L_XS_KZ_B: 500 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B); 501 case IC_EVEX_L_XD_KZ_B: 502 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B); 503 case IC_EVEX_L_OPSIZE_KZ_B: 504 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B); 505 case IC_EVEX_L_W_B: 506 case IC_EVEX_L_W_XS_B: 507 case IC_EVEX_L_W_XD_B: 508 case IC_EVEX_L_W_OPSIZE_B: 509 return false; 510 case IC_EVEX_L_W_K_B: 511 case IC_EVEX_L_W_XS_K_B: 512 case IC_EVEX_L_W_XD_K_B: 513 case IC_EVEX_L_W_OPSIZE_K_B: 514 return false; 515 case IC_EVEX_L_W_KZ_B: 516 case IC_EVEX_L_W_XS_KZ_B: 517 case IC_EVEX_L_W_XD_KZ_B: 518 case IC_EVEX_L_W_OPSIZE_KZ_B: 519 return false; 520 case IC_EVEX_L2_B: 521 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_B); 522 case IC_EVEX_L2_XS_B: 523 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B); 524 case IC_EVEX_L2_XD_B: 525 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B); 526 case IC_EVEX_L2_OPSIZE_B: 527 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B); 528 case IC_EVEX_L2_K_B: 529 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K_B); 530 case IC_EVEX_L2_XS_K_B: 531 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B); 532 case IC_EVEX_L2_XD_K_B: 533 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B); 534 case IC_EVEX_L2_OPSIZE_K_B: 535 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B); 536 case IC_EVEX_L2_KZ_B: 537 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B); 538 case IC_EVEX_L2_XS_KZ_B: 539 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B); 540 case IC_EVEX_L2_XD_KZ_B: 541 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B); 542 case IC_EVEX_L2_OPSIZE_KZ_B: 543 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B); 544 case IC_EVEX_L2_W_B: 545 case IC_EVEX_L2_W_XS_B: 546 case IC_EVEX_L2_W_XD_B: 547 case IC_EVEX_L2_W_OPSIZE_B: 548 return false; 549 case IC_EVEX_L2_W_K_B: 550 case IC_EVEX_L2_W_XS_K_B: 551 case IC_EVEX_L2_W_XD_K_B: 552 case IC_EVEX_L2_W_OPSIZE_K_B: 553 return false; 554 case IC_EVEX_L2_W_KZ_B: 555 case IC_EVEX_L2_W_XS_KZ_B: 556 case IC_EVEX_L2_W_XD_KZ_B: 557 case IC_EVEX_L2_W_OPSIZE_KZ_B: 558 return false; 559 default: 560 errs() << "Unknown instruction class: " << 561 stringForContext((InstructionContext)parent) << "\n"; 562 llvm_unreachable("Unknown instruction class"); 563 } 564 } 565 566 /// outranks - Indicates whether, if an instruction has two different applicable 567 /// classes, which class should be preferred when performing decode. This 568 /// imposes a total ordering (ties are resolved toward "lower") 569 /// 570 /// @param upper - The class that may be preferable 571 /// @param lower - The class that may be less preferable 572 /// @return - True if upper is to be preferred, false otherwise. 573 static inline bool outranks(InstructionContext upper, 574 InstructionContext lower) { 575 assert(upper < IC_max); 576 assert(lower < IC_max); 577 578 #define ENUM_ENTRY(n, r, d) r, 579 #define ENUM_ENTRY_K_B(n, r, d) ENUM_ENTRY(n, r, d) \ 580 ENUM_ENTRY(n##_K_B, r, d) ENUM_ENTRY(n##_KZ_B, r, d) \ 581 ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) ENUM_ENTRY(n##_B, r, d) 582 static int ranks[IC_max] = { 583 INSTRUCTION_CONTEXTS 584 }; 585 #undef ENUM_ENTRY 586 #undef ENUM_ENTRY_K_B 587 588 return (ranks[upper] > ranks[lower]); 589 } 590 591 /// getDecisionType - Determines whether a ModRM decision with 255 entries can 592 /// be compacted by eliminating redundant information. 593 /// 594 /// @param decision - The decision to be compacted. 595 /// @return - The compactest available representation for the decision. 596 static ModRMDecisionType getDecisionType(ModRMDecision &decision) { 597 bool satisfiesOneEntry = true; 598 bool satisfiesSplitRM = true; 599 bool satisfiesSplitReg = true; 600 bool satisfiesSplitMisc = true; 601 602 for (unsigned index = 0; index < 256; ++index) { 603 if (decision.instructionIDs[index] != decision.instructionIDs[0]) 604 satisfiesOneEntry = false; 605 606 if (((index & 0xc0) == 0xc0) && 607 (decision.instructionIDs[index] != decision.instructionIDs[0xc0])) 608 satisfiesSplitRM = false; 609 610 if (((index & 0xc0) != 0xc0) && 611 (decision.instructionIDs[index] != decision.instructionIDs[0x00])) 612 satisfiesSplitRM = false; 613 614 if (((index & 0xc0) == 0xc0) && 615 (decision.instructionIDs[index] != decision.instructionIDs[index&0xf8])) 616 satisfiesSplitReg = false; 617 618 if (((index & 0xc0) != 0xc0) && 619 (decision.instructionIDs[index] != decision.instructionIDs[index&0x38])) 620 satisfiesSplitMisc = false; 621 } 622 623 if (satisfiesOneEntry) 624 return MODRM_ONEENTRY; 625 626 if (satisfiesSplitRM) 627 return MODRM_SPLITRM; 628 629 if (satisfiesSplitReg && satisfiesSplitMisc) 630 return MODRM_SPLITREG; 631 632 if (satisfiesSplitMisc) 633 return MODRM_SPLITMISC; 634 635 return MODRM_FULL; 636 } 637 638 /// stringForDecisionType - Returns a statically-allocated string corresponding 639 /// to a particular decision type. 640 /// 641 /// @param dt - The decision type. 642 /// @return - A pointer to the statically-allocated string (e.g., 643 /// "MODRM_ONEENTRY" for MODRM_ONEENTRY). 644 static const char* stringForDecisionType(ModRMDecisionType dt) { 645 #define ENUM_ENTRY(n) case n: return #n; 646 switch (dt) { 647 default: 648 llvm_unreachable("Unknown decision type"); 649 MODRMTYPES 650 }; 651 #undef ENUM_ENTRY 652 } 653 654 DisassemblerTables::DisassemblerTables() { 655 for (unsigned i = 0; i < std::size(Tables); i++) 656 Tables[i] = std::make_unique<ContextDecision>(); 657 658 HasConflicts = false; 659 } 660 661 DisassemblerTables::~DisassemblerTables() { 662 } 663 664 void DisassemblerTables::emitModRMDecision(raw_ostream &o1, raw_ostream &o2, 665 unsigned &i1, unsigned &i2, 666 unsigned &ModRMTableNum, 667 ModRMDecision &decision) const { 668 static uint32_t sEntryNumber = 1; 669 ModRMDecisionType dt = getDecisionType(decision); 670 671 if (dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0) { 672 // Empty table. 673 o2 << "{" << stringForDecisionType(dt) << ", 0}"; 674 return; 675 } 676 677 std::vector<unsigned> ModRMDecision; 678 679 switch (dt) { 680 default: 681 llvm_unreachable("Unknown decision type"); 682 case MODRM_ONEENTRY: 683 ModRMDecision.push_back(decision.instructionIDs[0]); 684 break; 685 case MODRM_SPLITRM: 686 ModRMDecision.push_back(decision.instructionIDs[0x00]); 687 ModRMDecision.push_back(decision.instructionIDs[0xc0]); 688 break; 689 case MODRM_SPLITREG: 690 for (unsigned index = 0; index < 64; index += 8) 691 ModRMDecision.push_back(decision.instructionIDs[index]); 692 for (unsigned index = 0xc0; index < 256; index += 8) 693 ModRMDecision.push_back(decision.instructionIDs[index]); 694 break; 695 case MODRM_SPLITMISC: 696 for (unsigned index = 0; index < 64; index += 8) 697 ModRMDecision.push_back(decision.instructionIDs[index]); 698 for (unsigned index = 0xc0; index < 256; ++index) 699 ModRMDecision.push_back(decision.instructionIDs[index]); 700 break; 701 case MODRM_FULL: 702 for (unsigned short InstructionID : decision.instructionIDs) 703 ModRMDecision.push_back(InstructionID); 704 break; 705 } 706 707 unsigned &EntryNumber = ModRMTable[ModRMDecision]; 708 if (EntryNumber == 0) { 709 EntryNumber = ModRMTableNum; 710 711 ModRMTableNum += ModRMDecision.size(); 712 o1 << "/*Table" << EntryNumber << "*/\n"; 713 i1++; 714 for (unsigned I : ModRMDecision) { 715 o1.indent(i1 * 2) << format("0x%hx", I) << ", /*" 716 << InstructionSpecifiers[I].name << "*/\n"; 717 } 718 i1--; 719 } 720 721 o2 << "{" << stringForDecisionType(dt) << ", " << EntryNumber << "}"; 722 723 switch (dt) { 724 default: 725 llvm_unreachable("Unknown decision type"); 726 case MODRM_ONEENTRY: 727 sEntryNumber += 1; 728 break; 729 case MODRM_SPLITRM: 730 sEntryNumber += 2; 731 break; 732 case MODRM_SPLITREG: 733 sEntryNumber += 16; 734 break; 735 case MODRM_SPLITMISC: 736 sEntryNumber += 8 + 64; 737 break; 738 case MODRM_FULL: 739 sEntryNumber += 256; 740 break; 741 } 742 743 // We assume that the index can fit into uint16_t. 744 assert(sEntryNumber < 65536U && 745 "Index into ModRMDecision is too large for uint16_t!"); 746 (void)sEntryNumber; 747 } 748 749 void DisassemblerTables::emitOpcodeDecision(raw_ostream &o1, raw_ostream &o2, 750 unsigned &i1, unsigned &i2, 751 unsigned &ModRMTableNum, 752 OpcodeDecision &opDecision) const { 753 o2 << "{"; 754 ++i2; 755 756 unsigned index; 757 for (index = 0; index < 256; ++index) { 758 auto &decision = opDecision.modRMDecisions[index]; 759 ModRMDecisionType dt = getDecisionType(decision); 760 if (!(dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0)) 761 break; 762 } 763 if (index == 256) { 764 // If all 256 entries are MODRM_ONEENTRY, omit output. 765 static_assert(MODRM_ONEENTRY == 0); 766 --i2; 767 o2 << "},\n"; 768 } else { 769 o2 << " /* struct OpcodeDecision */ {\n"; 770 for (index = 0; index < 256; ++index) { 771 o2.indent(i2); 772 773 o2 << "/*0x" << format("%02hhx", index) << "*/"; 774 775 emitModRMDecision(o1, o2, i1, i2, ModRMTableNum, 776 opDecision.modRMDecisions[index]); 777 778 if (index < 255) 779 o2 << ","; 780 781 o2 << "\n"; 782 } 783 o2.indent(i2) << "}\n"; 784 --i2; 785 o2.indent(i2) << "},\n"; 786 } 787 } 788 789 void DisassemblerTables::emitContextDecision(raw_ostream &o1, raw_ostream &o2, 790 unsigned &i1, unsigned &i2, 791 unsigned &ModRMTableNum, 792 ContextDecision &decision, 793 const char* name) const { 794 o2.indent(i2) << "static const struct ContextDecision " << name << " = {{/* opcodeDecisions */\n"; 795 i2++; 796 797 for (unsigned index = 0; index < IC_max; ++index) { 798 o2.indent(i2) << "/*"; 799 o2 << stringForContext((InstructionContext)index); 800 o2 << "*/ "; 801 802 emitOpcodeDecision(o1, o2, i1, i2, ModRMTableNum, 803 decision.opcodeDecisions[index]); 804 } 805 806 i2--; 807 o2.indent(i2) << "}};" << "\n"; 808 } 809 810 void DisassemblerTables::emitInstructionInfo(raw_ostream &o, 811 unsigned &i) const { 812 unsigned NumInstructions = InstructionSpecifiers.size(); 813 814 o << "static const struct OperandSpecifier x86OperandSets[][" 815 << X86_MAX_OPERANDS << "] = {\n"; 816 817 typedef SmallVector<std::pair<OperandEncoding, OperandType>, 818 X86_MAX_OPERANDS> OperandListTy; 819 std::map<OperandListTy, unsigned> OperandSets; 820 821 unsigned OperandSetNum = 0; 822 for (unsigned Index = 0; Index < NumInstructions; ++Index) { 823 OperandListTy OperandList; 824 825 for (auto Operand : InstructionSpecifiers[Index].operands) { 826 OperandEncoding Encoding = (OperandEncoding)Operand.encoding; 827 OperandType Type = (OperandType)Operand.type; 828 OperandList.push_back(std::make_pair(Encoding, Type)); 829 } 830 unsigned &N = OperandSets[OperandList]; 831 if (N != 0) continue; 832 833 N = ++OperandSetNum; 834 835 o << " { /* " << (OperandSetNum - 1) << " */\n"; 836 for (unsigned i = 0, e = OperandList.size(); i != e; ++i) { 837 const char *Encoding = stringForOperandEncoding(OperandList[i].first); 838 const char *Type = stringForOperandType(OperandList[i].second); 839 o << " { " << Encoding << ", " << Type << " },\n"; 840 } 841 o << " },\n"; 842 } 843 o << "};" << "\n\n"; 844 845 o.indent(i * 2) << "static const struct InstructionSpecifier "; 846 o << INSTRUCTIONS_STR "[" << InstructionSpecifiers.size() << "] = {\n"; 847 848 i++; 849 850 for (unsigned index = 0; index < NumInstructions; ++index) { 851 o.indent(i * 2) << "{ /* " << index << " */\n"; 852 i++; 853 854 OperandListTy OperandList; 855 for (auto Operand : InstructionSpecifiers[index].operands) { 856 OperandEncoding Encoding = (OperandEncoding)Operand.encoding; 857 OperandType Type = (OperandType)Operand.type; 858 OperandList.push_back(std::make_pair(Encoding, Type)); 859 } 860 o.indent(i * 2) << (OperandSets[OperandList] - 1) << ",\n"; 861 862 o.indent(i * 2) << "/* " << InstructionSpecifiers[index].name << " */\n"; 863 864 i--; 865 o.indent(i * 2) << "},\n"; 866 } 867 868 i--; 869 o.indent(i * 2) << "};" << "\n"; 870 } 871 872 void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const { 873 o.indent(i * 2) << "static const uint8_t " CONTEXTS_STR 874 "[" << ATTR_max << "] = {\n"; 875 i++; 876 877 for (unsigned index = 0; index < ATTR_max; ++index) { 878 o.indent(i * 2); 879 880 if ((index & ATTR_EVEX) || (index & ATTR_VEX) || (index & ATTR_VEXL)) { 881 if (index & ATTR_EVEX) 882 o << "IC_EVEX"; 883 else 884 o << "IC_VEX"; 885 886 if ((index & ATTR_EVEX) && (index & ATTR_EVEXL2)) 887 o << "_L2"; 888 else if (index & ATTR_VEXL) 889 o << "_L"; 890 891 if (index & ATTR_REXW) 892 o << "_W"; 893 894 if (index & ATTR_OPSIZE) 895 o << "_OPSIZE"; 896 else if (index & ATTR_XD) 897 o << "_XD"; 898 else if (index & ATTR_XS) 899 o << "_XS"; 900 901 if ((index & ATTR_EVEX)) { 902 if (index & ATTR_EVEXKZ) 903 o << "_KZ"; 904 else if (index & ATTR_EVEXK) 905 o << "_K"; 906 907 if (index & ATTR_EVEXB) 908 o << "_B"; 909 } 910 } 911 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XS)) 912 o << "IC_64BIT_REXW_XS"; 913 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XD)) 914 o << "IC_64BIT_REXW_XD"; 915 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && 916 (index & ATTR_OPSIZE)) 917 o << "IC_64BIT_REXW_OPSIZE"; 918 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && 919 (index & ATTR_ADSIZE)) 920 o << "IC_64BIT_REXW_ADSIZE"; 921 else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_OPSIZE)) 922 o << "IC_64BIT_XD_OPSIZE"; 923 else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_ADSIZE)) 924 o << "IC_64BIT_XD_ADSIZE"; 925 else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_OPSIZE)) 926 o << "IC_64BIT_XS_OPSIZE"; 927 else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_ADSIZE)) 928 o << "IC_64BIT_XS_ADSIZE"; 929 else if ((index & ATTR_64BIT) && (index & ATTR_XS)) 930 o << "IC_64BIT_XS"; 931 else if ((index & ATTR_64BIT) && (index & ATTR_XD)) 932 o << "IC_64BIT_XD"; 933 else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE) && 934 (index & ATTR_ADSIZE)) 935 o << "IC_64BIT_OPSIZE_ADSIZE"; 936 else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE)) 937 o << "IC_64BIT_OPSIZE"; 938 else if ((index & ATTR_64BIT) && (index & ATTR_ADSIZE)) 939 o << "IC_64BIT_ADSIZE"; 940 else if ((index & ATTR_64BIT) && (index & ATTR_REXW)) 941 o << "IC_64BIT_REXW"; 942 else if ((index & ATTR_64BIT)) 943 o << "IC_64BIT"; 944 else if ((index & ATTR_XS) && (index & ATTR_OPSIZE)) 945 o << "IC_XS_OPSIZE"; 946 else if ((index & ATTR_XD) && (index & ATTR_OPSIZE)) 947 o << "IC_XD_OPSIZE"; 948 else if ((index & ATTR_XS) && (index & ATTR_ADSIZE)) 949 o << "IC_XS_ADSIZE"; 950 else if ((index & ATTR_XD) && (index & ATTR_ADSIZE)) 951 o << "IC_XD_ADSIZE"; 952 else if (index & ATTR_XS) 953 o << "IC_XS"; 954 else if (index & ATTR_XD) 955 o << "IC_XD"; 956 else if ((index & ATTR_OPSIZE) && (index & ATTR_ADSIZE)) 957 o << "IC_OPSIZE_ADSIZE"; 958 else if (index & ATTR_OPSIZE) 959 o << "IC_OPSIZE"; 960 else if (index & ATTR_ADSIZE) 961 o << "IC_ADSIZE"; 962 else 963 o << "IC"; 964 965 o << ", // " << index << "\n"; 966 } 967 968 i--; 969 o.indent(i * 2) << "};" << "\n"; 970 } 971 972 void DisassemblerTables::emitContextDecisions(raw_ostream &o1, raw_ostream &o2, 973 unsigned &i1, unsigned &i2, 974 unsigned &ModRMTableNum) const { 975 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[0], ONEBYTE_STR); 976 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[1], TWOBYTE_STR); 977 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[2], THREEBYTE38_STR); 978 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[3], THREEBYTE3A_STR); 979 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[4], XOP8_MAP_STR); 980 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[5], XOP9_MAP_STR); 981 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[6], XOPA_MAP_STR); 982 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[7], THREEDNOW_MAP_STR); 983 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[8], MAP5_STR); 984 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[9], MAP6_STR); 985 } 986 987 void DisassemblerTables::emit(raw_ostream &o) const { 988 unsigned i1 = 0; 989 unsigned i2 = 0; 990 991 std::string s1; 992 std::string s2; 993 994 raw_string_ostream o1(s1); 995 raw_string_ostream o2(s2); 996 997 emitInstructionInfo(o, i2); 998 o << "\n"; 999 1000 emitContextTable(o, i2); 1001 o << "\n"; 1002 1003 unsigned ModRMTableNum = 0; 1004 1005 o << "static const InstrUID modRMTable[] = {\n"; 1006 i1++; 1007 std::vector<unsigned> EmptyTable(1, 0); 1008 ModRMTable[EmptyTable] = ModRMTableNum; 1009 ModRMTableNum += EmptyTable.size(); 1010 o1 << "/*EmptyTable*/\n"; 1011 o1.indent(i1 * 2) << "0x0,\n"; 1012 i1--; 1013 emitContextDecisions(o1, o2, i1, i2, ModRMTableNum); 1014 1015 o << o1.str(); 1016 o << " 0x0\n"; 1017 o << "};\n"; 1018 o << "\n"; 1019 o << o2.str(); 1020 o << "\n"; 1021 o << "\n"; 1022 } 1023 1024 void DisassemblerTables::setTableFields(ModRMDecision &decision, 1025 const ModRMFilter &filter, 1026 InstrUID uid, 1027 uint8_t opcode) { 1028 for (unsigned index = 0; index < 256; ++index) { 1029 if (filter.accepts(index)) { 1030 if (decision.instructionIDs[index] == uid) 1031 continue; 1032 1033 if (decision.instructionIDs[index] != 0) { 1034 InstructionSpecifier &newInfo = 1035 InstructionSpecifiers[uid]; 1036 InstructionSpecifier &previousInfo = 1037 InstructionSpecifiers[decision.instructionIDs[index]]; 1038 1039 if(previousInfo.name == "NOOP" && (newInfo.name == "XCHG16ar" || 1040 newInfo.name == "XCHG32ar" || 1041 newInfo.name == "XCHG64ar")) 1042 continue; // special case for XCHG*ar and NOOP 1043 1044 if (outranks(previousInfo.insnContext, newInfo.insnContext)) 1045 continue; 1046 1047 if (previousInfo.insnContext == newInfo.insnContext) { 1048 errs() << "Error: Primary decode conflict: "; 1049 errs() << newInfo.name << " would overwrite " << previousInfo.name; 1050 errs() << "\n"; 1051 errs() << "ModRM " << index << "\n"; 1052 errs() << "Opcode " << (uint16_t)opcode << "\n"; 1053 errs() << "Context " << stringForContext(newInfo.insnContext) << "\n"; 1054 HasConflicts = true; 1055 } 1056 } 1057 1058 decision.instructionIDs[index] = uid; 1059 } 1060 } 1061 } 1062 1063 void DisassemblerTables::setTableFields(OpcodeType type, 1064 InstructionContext insnContext, 1065 uint8_t opcode, 1066 const ModRMFilter &filter, 1067 InstrUID uid, 1068 bool is32bit, 1069 bool noPrefix, 1070 bool ignoresVEX_L, 1071 bool ignoresVEX_W, 1072 unsigned addressSize) { 1073 ContextDecision &decision = *Tables[type]; 1074 1075 for (unsigned index = 0; index < IC_max; ++index) { 1076 if ((is32bit || addressSize == 16) && 1077 inheritsFrom((InstructionContext)index, IC_64BIT)) 1078 continue; 1079 1080 bool adSize64 = addressSize == 64; 1081 if (inheritsFrom((InstructionContext)index, 1082 InstructionSpecifiers[uid].insnContext, noPrefix, 1083 ignoresVEX_L, ignoresVEX_W, adSize64)) 1084 setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode], 1085 filter, 1086 uid, 1087 opcode); 1088 } 1089 } 1090