1 /*!
2  * \file       opencsd/trc_gen_elem_types.h
3  * \brief      OpenCSD : Decoder Output Generic Element types.
4  *
5  * \copyright  Copyright (c) 2015, ARM Limited. All Rights Reserved.
6  */
7 
8 /*
9  * Redistribution and use in source and binary forms, with or without modification,
10  * are permitted provided that the following conditions are met:
11  *
12  * 1. Redistributions of source code must retain the above copyright notice,
13  * this list of conditions and the following disclaimer.
14  *
15  * 2. Redistributions in binary form must reproduce the above copyright notice,
16  * this list of conditions and the following disclaimer in the documentation
17  * and/or other materials provided with the distribution.
18  *
19  * 3. Neither the name of the copyright holder nor the names of its contributors
20  * may be used to endorse or promote products derived from this software without
21  * specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26  * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 #ifndef ARM_TRC_GEN_ELEM_TYPES_H_INCLUDED
36 #define ARM_TRC_GEN_ELEM_TYPES_H_INCLUDED
37 
38 /** @defgroup gen_trc_elem  OpenCSD Library : Generic Trace Elements
39   * @brief Generic trace elements output by the PE trace decode and SW stim decode stages.
40   *
41   *
42 @{*/
43 
44 #include "opencsd/ocsd_if_types.h"
45 
46 /**  Enum for generic element types */
47 typedef enum _ocsd_gen_trc_elem_t
48 {
49     OCSD_GEN_TRC_ELEM_UNKNOWN = 0,     /*!< Unknown trace element - default value or indicate error in stream to client */
50     OCSD_GEN_TRC_ELEM_NO_SYNC,         /*!< Waiting for sync - either at start of decode, or after overflow / bad packet */
51     OCSD_GEN_TRC_ELEM_TRACE_ON,        /*!< Start of trace - beginning of elements or restart after discontinuity (overflow, trace filtering). */
52     OCSD_GEN_TRC_ELEM_EO_TRACE,        /*!< end of the available trace in the buffer.  */
53     OCSD_GEN_TRC_ELEM_PE_CONTEXT,      /*!< PE status update / change (arch, ctxtid, vmid etc).  */
54     OCSD_GEN_TRC_ELEM_INSTR_RANGE,     /*!< traced N consecutive instructions from addr (no intervening events or data elements), may have data assoc key  */
55     OCSD_GEN_TRC_ELEM_ADDR_NACC,       /*!< tracing in inaccessible memory area  */
56     OCSD_GEN_TRC_ELEM_ADDR_UNKNOWN,    /*!< address currently unknown - need address packet update */
57     OCSD_GEN_TRC_ELEM_EXCEPTION,       /*!< exception - start address may be exception target, end address may be preferred ret addr. */
58     OCSD_GEN_TRC_ELEM_EXCEPTION_RET,   /*!< expection return */
59     OCSD_GEN_TRC_ELEM_TIMESTAMP,       /*!< Timestamp - preceding elements happeded before this time. */
60     OCSD_GEN_TRC_ELEM_CYCLE_COUNT,     /*!< Cycle count - cycles since last cycle count value - associated with a preceding instruction range. */
61     OCSD_GEN_TRC_ELEM_EVENT,           /*!< Event - trigger or numbered event  */
62     OCSD_GEN_TRC_ELEM_SWTRACE,         /*!< Software trace packet - may contain data payload. */
63     OCSD_GEN_TRC_ELEM_CUSTOM,          /*!< Fully custom packet type - used by none-ARM architecture decoders */
64 } ocsd_gen_trc_elem_t;
65 
66 
67 typedef enum _trace_on_reason_t {
68     TRACE_ON_NORMAL = 0,    /**< Trace on at start of trace or filtering discontinuity */
69     TRACE_ON_OVERFLOW,      /**< Trace on due to prior trace overflow discontinuity */
70     TRACE_ON_EX_DEBUG,      /**< Trace restarted due to debug exit */
71 } trace_on_reason_t;
72 
73 typedef struct _trace_event_t {
74     uint16_t ev_type;          /**< event type - unknown (0) trigger (1), numbered event (2)*/
75     uint16_t ev_number;        /**< event number if numbered event type */
76 } trace_event_t;
77 
78 typedef struct _ocsd_generic_trace_elem {
79     ocsd_gen_trc_elem_t elem_type;   /**< Element type - remaining data interpreted according to this value */
80     ocsd_isa           isa;          /**< instruction set for executed instructions */
81     ocsd_vaddr_t       st_addr;      /**< start address for instruction execution range / inaccessible code address / data address */
82     ocsd_vaddr_t       en_addr;        /**< end address (exclusive) for instruction execution range. */
83     ocsd_pe_context    context;        /**< PE Context */
84     uint64_t           timestamp;      /**< timestamp value for TS element type */
85     uint32_t           cycle_count;    /**< cycle count for explicit cycle count element, or count for element with associated cycle count */
86     ocsd_instr_type    last_i_type;    /**< Last instruction type if instruction execution range */
87     ocsd_instr_subtype last_i_subtype; /**< sub type for last instruction in range */
88 
89     //! per element flags
90     union {
91         struct {
92             uint32_t last_instr_exec:1;     /**< 1 if last instruction in range was executed; */
93             uint32_t last_instr_sz:3;       /**< size of last instruction in bytes (2/4) */
94             uint32_t has_cc:1;              /**< 1 if this packet has a valid cycle count included (e.g. cycle count included as part of instruction range packet, always 1 for pure cycle count packet.*/
95             uint32_t cpu_freq_change:1;     /**< 1 if this packet indicates a change in CPU frequency */
96             uint32_t excep_ret_addr:1;      /**< 1 if en_addr is the preferred exception return address on exception packet type */
97             uint32_t excep_data_marker:1;   /**< 1 if the exception entry packet is a data push marker only, with no address information (used typically in v7M trace for marking data pushed onto stack) */
98             uint32_t extended_data:1;       /**< 1 if the packet extended data pointer is valid. Allows packet extensions for custom decoders, or additional data payloads for data trace.  */
99             uint32_t has_ts:1;              /**< 1 if the packet has an associated timestamp - e.g. SW/STM trace TS+Payload as a single packet */
100             uint32_t last_instr_cond:1;     /**< 1 if the last instruction was conditional */
101             uint32_t excep_ret_addr_br_tgt:1;   /**< 1 if exception return address (en_addr) is also the target of a taken branch addr from the previous range. */
102         };
103         uint32_t flag_bits;
104     };
105 
106     //! packet specific payloads
107     union {
108         uint32_t exception_number;          /**< exception number for exception type packets */
109         trace_event_t  trace_event;         /**< Trace event - trigger etc      */
110         trace_on_reason_t trace_on_reason;  /**< reason for the trace on packet */
111         ocsd_swt_info_t sw_trace_info;      /**< software trace packet info    */
112 		uint32_t num_instr_range;	        /**< number of instructions covered by range packet (for T32 this cannot be calculated from en-st/i_size) */
113     };
114 
115     const void *ptr_extended_data;        /**< pointer to extended data buffer (data trace, sw trace payload) / custom structure */
116 
117 } ocsd_generic_trace_elem;
118 
119 
120 typedef enum _event_t {
121     EVENT_UNKNOWN = 0,
122     EVENT_TRIGGER,
123     EVENT_NUMBERED
124 } event_t;
125 
126 
127 /** @}*/
128 #endif // ARM_TRC_GEN_ELEM_TYPES_H_INCLUDED
129 
130 /* End of File opencsd/trc_gen_elem_types.h */
131