xref: /freebsd/lib/libc/riscv/gen/setjmp.S (revision 4f52dfbb)
1/*-
2 * Copyright (c) 2015-2016 Ruslan Bukin <br@bsdpad.com>
3 * All rights reserved.
4 *
5 * Portions of this software were developed by SRI International and the
6 * University of Cambridge Computer Laboratory under DARPA/AFRL contract
7 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
8 *
9 * Portions of this software were developed by the University of Cambridge
10 * Computer Laboratory as part of the CTSRD Project, with support from the
11 * UK Higher Education Innovation Fund (HEIF).
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 * 1. Redistributions of source code must retain the above copyright
17 *    notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 *    notice, this list of conditions and the following disclaimer in the
20 *    documentation and/or other materials provided with the distribution.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 */
34
35#include <machine/asm.h>
36__FBSDID("$FreeBSD$");
37
38#include <machine/setjmp.h>
39
40ENTRY(setjmp)
41	addi	sp, sp, -(2 * 8)
42	sd	a0, 0(sp)
43	sd	ra, 8(sp)
44
45	/* Store the signal mask */
46	addi	a2, a0, (_JB_SIGMASK * 8)	/* oset */
47	li	a1, 0				/* set */
48	li	a0, 1				/* SIG_BLOCK */
49	jal	sigprocmask
50
51	ld	a0, 0(sp)
52	ld	ra, 8(sp)
53	addi	sp, sp, (2 * 8)
54
55	/* Store the magic value and stack pointer */
56	la	t0, .Lmagic
57	ld	t0, 0(t0)
58	sd	t0, (0 * 8)(a0)
59	sd	sp, (1 * 8)(a0)
60	addi	a0, a0, (2 * 8)
61
62	/* Store the general purpose registers and ra */
63	sd	s0, (0 * 8)(a0)
64	sd	s1, (1 * 8)(a0)
65	sd	s2, (2 * 8)(a0)
66	sd	s3, (3 * 8)(a0)
67	sd	s4, (4 * 8)(a0)
68	sd	s5, (5 * 8)(a0)
69	sd	s6, (6 * 8)(a0)
70	sd	s7, (7 * 8)(a0)
71	sd	s8, (8 * 8)(a0)
72	sd	s9, (9 * 8)(a0)
73	sd	s10, (10 * 8)(a0)
74	sd	s11, (11 * 8)(a0)
75	sd	ra, (12 * 8)(a0)
76	addi	a0, a0, (13 * 8)
77
78#ifdef __riscv_float_abi_double
79	/* Store the fpe registers */
80	fsd	fs0, (0 * 16)(a0)
81	fsd	fs1, (1 * 16)(a0)
82	fsd	fs2, (2 * 16)(a0)
83	fsd	fs3, (3 * 16)(a0)
84	fsd	fs4, (4 * 16)(a0)
85	fsd	fs5, (5 * 16)(a0)
86	fsd	fs6, (6 * 16)(a0)
87	fsd	fs7, (7 * 16)(a0)
88	fsd	fs8, (8 * 16)(a0)
89	fsd	fs9, (9 * 16)(a0)
90	fsd	fs10, (10 * 16)(a0)
91	fsd	fs11, (11 * 16)(a0)
92	addi	a0, a0, (12 * 16)
93#endif
94
95	/* Return value */
96	li	a0, 0
97	ret
98	.align	3
99.Lmagic:
100	.quad	_JB_MAGIC_SETJMP
101END(setjmp)
102
103ENTRY(longjmp)
104	addi	sp, sp, -(4 * 8)
105	sd	a0, (0 * 8)(sp)
106	sd	ra, (1 * 8)(sp)
107	sd	a1, (2 * 8)(sp)
108
109	/* Restore the signal mask */
110	li	a2, 0				/* oset */
111	addi	a1, a0, (_JB_SIGMASK * 8)	/* set */
112	li	a0, 3				/* SIG_BLOCK */
113	jal	sigprocmask
114
115	ld	a1, (2 * 8)(sp)
116	ld	ra, (1 * 8)(sp)
117	ld	a0, (0 * 8)(sp)
118	addi	sp, sp, (4 * 8)
119
120	/* Check the magic value */
121	ld	t0, 0(a0)
122	la	t1, .Lmagic
123	ld	t1, 0(t1)
124	bne	t0, t1, botch
125
126	/* Restore the stack pointer */
127	ld	t0, 8(a0)
128	mv	sp, t0
129	addi	a0, a0, (2 * 8)
130
131	/* Restore the general purpose registers and ra */
132	ld	s0, (0 * 8)(a0)
133	ld	s1, (1 * 8)(a0)
134	ld	s2, (2 * 8)(a0)
135	ld	s3, (3 * 8)(a0)
136	ld	s4, (4 * 8)(a0)
137	ld	s5, (5 * 8)(a0)
138	ld	s6, (6 * 8)(a0)
139	ld	s7, (7 * 8)(a0)
140	ld	s8, (8 * 8)(a0)
141	ld	s9, (9 * 8)(a0)
142	ld	s10, (10 * 8)(a0)
143	ld	s11, (11 * 8)(a0)
144	ld	ra, (12 * 8)(a0)
145	addi	a0, a0, (13 * 8)
146
147#ifdef __riscv_float_abi_double
148	/* Restore the fpe registers */
149	fld	fs0, (0 * 16)(a0)
150	fld	fs1, (1 * 16)(a0)
151	fld	fs2, (2 * 16)(a0)
152	fld	fs3, (3 * 16)(a0)
153	fld	fs4, (4 * 16)(a0)
154	fld	fs5, (5 * 16)(a0)
155	fld	fs6, (6 * 16)(a0)
156	fld	fs7, (7 * 16)(a0)
157	fld	fs8, (8 * 16)(a0)
158	fld	fs9, (9 * 16)(a0)
159	fld	fs10, (10 * 16)(a0)
160	fld	fs11, (11 * 16)(a0)
161	addi	a0, a0, (12 * 16)
162#endif
163
164	/* Load the return value */
165	mv	a0, a1
166	ret
167
168botch:
169	call	_C_LABEL(longjmperror)
170	call	_C_LABEL(abort)
171END(longjmp)
172