1[
2	{
3		"EventCode": "128",
4		"EventName": "L1D_RO_EXCL_WRITES",
5		"BriefDescription": "L1D Read-only Exclusive Writes",
6		"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line"
7	},
8	{
9		"EventCode": "129",
10		"EventName": "DTLB2_WRITES",
11		"BriefDescription": "DTLB2 Writes",
12		"PublicDescription": "A translation has been written into The Translation Lookaside Buffer 2 (TLB2) and the request was made by the data cache"
13	},
14	{
15		"EventCode": "130",
16		"EventName": "DTLB2_MISSES",
17		"BriefDescription": "DTLB2 Misses",
18		"PublicDescription": "A TLB2 miss is in progress for a request made by the data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this cycle"
19	},
20	{
21		"EventCode": "131",
22		"EventName": "DTLB2_HPAGE_WRITES",
23		"BriefDescription": "DTLB2 One-Megabyte Page Writes",
24		"PublicDescription": "A translation entry was written into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page or a Last Host Translation was done"
25	},
26	{
27		"EventCode": "132",
28		"EventName": "DTLB2_GPAGE_WRITES",
29		"BriefDescription": "DTLB2 Two-Gigabyte Page Writes",
30		"PublicDescription": "A translation entry for a two-gigabyte page was written into the Level-2 TLB"
31	},
32	{
33		"EventCode": "133",
34		"EventName": "L1D_L2D_SOURCED_WRITES",
35		"BriefDescription": "L1D L2D Sourced Writes",
36		"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the Level-2 Data cache"
37	},
38	{
39		"EventCode": "134",
40		"EventName": "ITLB2_WRITES",
41		"BriefDescription": "ITLB2 Writes",
42		"PublicDescription": "A translation entry has been written into the Translation Lookaside Buffer 2 (TLB2) and the request was made by the instruction cache"
43	},
44	{
45		"EventCode": "135",
46		"EventName": "ITLB2_MISSES",
47		"BriefDescription": "ITLB2 Misses",
48		"PublicDescription": "A TLB2 miss is in progress for a request made by the instruction cache. Incremented by one for every TLB2 miss in progress for the Level-1 Instruction cache in a cycle"
49	},
50	{
51		"EventCode": "136",
52		"EventName": "L1I_L2I_SOURCED_WRITES",
53		"BriefDescription": "L1I L2I Sourced Writes",
54		"PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from the Level-2 Instruction cache"
55	},
56	{
57		"EventCode": "137",
58		"EventName": "TLB2_PTE_WRITES",
59		"BriefDescription": "TLB2 PTE Writes",
60		"PublicDescription": "A translation entry was written into the Page Table Entry array in the Level-2 TLB"
61	},
62	{
63		"EventCode": "138",
64		"EventName": "TLB2_CRSTE_WRITES",
65		"BriefDescription": "TLB2 CRSTE Writes",
66		"PublicDescription": "Translation entries were written into the Combined Region and Segment Table Entry array and the Page Table Entry array in the Level-2 TLB"
67	},
68	{
69		"EventCode": "139",
70		"EventName": "TLB2_ENGINES_BUSY",
71		"BriefDescription": "TLB2 Engines Busy",
72		"PublicDescription": "The number of Level-2 TLB translation engines busy in a cycle"
73	},
74	{
75		"EventCode": "140",
76		"EventName": "TX_C_TEND",
77		"BriefDescription": "Completed TEND instructions in constrained TX mode",
78		"PublicDescription": "A TEND instruction has completed in a constrained transactional-execution mode"
79	},
80	{
81		"EventCode": "141",
82		"EventName": "TX_NC_TEND",
83		"BriefDescription": "Completed TEND instructions in non-constrained TX mode",
84		"PublicDescription": "A TEND instruction has completed in a non-constrained transactional-execution mode"
85	},
86	{
87		"EventCode": "143",
88		"EventName": "L1C_TLB2_MISSES",
89		"BriefDescription": "L1C TLB2 Misses",
90		"PublicDescription": "Increments by one for any cycle where a level-1 cache or level-2 TLB miss is in progress"
91	},
92	{
93		"EventCode": "144",
94		"EventName": "L1D_ONCHIP_L3_SOURCED_WRITES",
95		"BriefDescription": "L1D On-Chip L3 Sourced Writes",
96		"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-3 cache without intervention"
97	},
98	{
99		"EventCode": "145",
100		"EventName": "L1D_ONCHIP_MEMORY_SOURCED_WRITES",
101		"BriefDescription": "L1D On-Chip Memory Sourced Writes",
102		"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Chip memory"
103	},
104	{
105		"EventCode": "146",
106		"EventName": "L1D_ONCHIP_L3_SOURCED_WRITES_IV",
107		"BriefDescription": "L1D On-Chip L3 Sourced Writes with Intervention",
108		"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-3 cache with intervention"
109	},
110	{
111		"EventCode": "147",
112		"EventName": "L1D_ONCLUSTER_L3_SOURCED_WRITES",
113		"BriefDescription": "L1D On-Cluster L3 Sourced Writes",
114		"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Cluster Level-3 cache withountervention"
115	},
116	{
117		"EventCode": "148",
118		"EventName": "L1D_ONCLUSTER_MEMORY_SOURCED_WRITES",
119		"BriefDescription": "L1D On-Cluster Memory Sourced Writes",
120		"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Cluster memory"
121	},
122	{
123		"EventCode": "149",
124		"EventName": "L1D_ONCLUSTER_L3_SOURCED_WRITES_IV",
125		"BriefDescription": "L1D On-Cluster L3 Sourced Writes with Intervention",
126		"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Cluster Level-3 cache with intervention"
127	},
128	{
129		"EventCode": "150",
130		"EventName": "L1D_OFFCLUSTER_L3_SOURCED_WRITES",
131		"BriefDescription": "L1D Off-Cluster L3 Sourced Writes",
132		"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Cluster Level-3 cache without intervention"
133	},
134	{
135		"EventCode": "151",
136		"EventName": "L1D_OFFCLUSTER_MEMORY_SOURCED_WRITES",
137		"BriefDescription": "L1D Off-Cluster Memory Sourced Writes",
138		"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from Off-Cluster memory"
139	},
140	{
141		"EventCode": "152",
142		"EventName": "L1D_OFFCLUSTER_L3_SOURCED_WRITES_IV",
143		"BriefDescription": "L1D Off-Cluster L3 Sourced Writes with Intervention",
144		"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Cluster Level-3 cache with intervention"
145	},
146	{
147		"EventCode": "153",
148		"EventName": "L1D_OFFDRAWER_L3_SOURCED_WRITES",
149		"BriefDescription": "L1D Off-Drawer L3 Sourced Writes",
150		"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Level-3 cache without intervention"
151	},
152	{
153		"EventCode": "154",
154		"EventName": "L1D_OFFDRAWER_MEMORY_SOURCED_WRITES",
155		"BriefDescription": "L1D Off-Drawer Memory Sourced Writes",
156		"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from Off-Drawer memory"
157	},
158	{
159		"EventCode": "155",
160		"EventName": "L1D_OFFDRAWER_L3_SOURCED_WRITES_IV",
161		"BriefDescription": "L1D Off-Drawer L3 Sourced Writes with Intervention",
162		"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Level-3 cache with intervention"
163	},
164	{
165		"EventCode": "156",
166		"EventName": "L1D_ONDRAWER_L4_SOURCED_WRITES",
167		"BriefDescription": "L1D On-Drawer L4 Sourced Writes",
168		"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Drawer Level-4 cache"
169	},
170	{
171		"EventCode": "157",
172		"EventName": "L1D_OFFDRAWER_L4_SOURCED_WRITES",
173		"BriefDescription": "L1D Off-Drawer L4 Sourced Writes",
174		"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from Off-Drawer Level-4 cache"
175	},
176	{
177		"EventCode": "158",
178		"EventName": "L1D_ONCHIP_L3_SOURCED_WRITES_RO",
179		"BriefDescription": "L1D On-Chip L3 Sourced Writes read-only",
180		"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Chip L3 but a read-only invalidate was done to remove other copies of the cache line"
181	},
182	{
183		"EventCode": "162",
184		"EventName": "L1I_ONCHIP_L3_SOURCED_WRITES",
185		"BriefDescription": "L1I On-Chip L3 Sourced Writes",
186		"PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache ine was sourced from an On-Chip Level-3 cache without intervention"
187	},
188	{
189		"EventCode": "163",
190		"EventName": "L1I_ONCHIP_MEMORY_SOURCED_WRITES",
191		"BriefDescription": "L1I On-Chip Memory Sourced Writes",
192		"PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache ine was sourced from On-Chip memory"
193	},
194	{
195		"EventCode": "164",
196		"EventName": "L1I_ONCHIP_L3_SOURCED_WRITES_IV",
197		"BriefDescription": "L1I On-Chip L3 Sourced Writes with Intervention",
198		"PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache ine was sourced from an On-Chip Level-3 cache with intervention"
199	},
200	{
201		"EventCode": "165",
202		"EventName": "L1I_ONCLUSTER_L3_SOURCED_WRITES",
203		"BriefDescription": "L1I On-Cluster L3 Sourced Writes",
204		"PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Cluster Level-3 cache without intervention"
205	},
206	{
207		"EventCode": "166",
208		"EventName": "L1I_ONCLUSTER_MEMORY_SOURCED_WRITES",
209		"BriefDescription": "L1I On-Cluster Memory Sourced Writes",
210		"PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Cluster memory"
211	},
212	{
213		"EventCode": "167",
214		"EventName": "L1I_ONCLUSTER_L3_SOURCED_WRITES_IV",
215		"BriefDescription": "L1I On-Cluster L3 Sourced Writes with Intervention",
216		"PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from On-Cluster Level-3 cache with intervention"
217	},
218	{
219		"EventCode": "168",
220		"EventName": "L1I_OFFCLUSTER_L3_SOURCED_WRITES",
221		"BriefDescription": "L1I Off-Cluster L3 Sourced Writes",
222		"PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Cluster Level-3 cache without intervention"
223	},
224	{
225		"EventCode": "169",
226		"EventName": "L1I_OFFCLUSTER_MEMORY_SOURCED_WRITES",
227		"BriefDescription": "L1I Off-Cluster Memory Sourced Writes",
228		"PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from Off-Cluster memory"
229	},
230	{
231		"EventCode": "170",
232		"EventName": "L1I_OFFCLUSTER_L3_SOURCED_WRITES_IV",
233		"BriefDescription": "L1I Off-Cluster L3 Sourced Writes with Intervention",
234		"PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Cluster Level-3 cache with intervention"
235	},
236	{
237		"EventCode": "171",
238		"EventName": "L1I_OFFDRAWER_L3_SOURCED_WRITES",
239		"BriefDescription": "L1I Off-Drawer L3 Sourced Writes",
240		"PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Level-3 cache without intervention"
241	},
242	{
243		"EventCode": "172",
244		"EventName": "L1I_OFFDRAWER_MEMORY_SOURCED_WRITES",
245		"BriefDescription": "L1I Off-Drawer Memory Sourced Writes",
246		"PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from Off-Drawer memory"
247	},
248	{
249		"EventCode": "173",
250		"EventName": "L1I_OFFDRAWER_L3_SOURCED_WRITES_IV",
251		"BriefDescription": "L1I Off-Drawer L3 Sourced Writes with Intervention",
252		"PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Level-3 cache with intervention"
253	},
254	{
255		"EventCode": "174",
256		"EventName": "L1I_ONDRAWER_L4_SOURCED_WRITES",
257		"BriefDescription": "L1I On-Drawer L4 Sourced Writes",
258		"PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from On-Drawer Level-4 cache"
259	},
260	{
261		"EventCode": "175",
262		"EventName": "L1I_OFFDRAWER_L4_SOURCED_WRITES",
263		"BriefDescription": "L1I Off-Drawer L4 Sourced Writes",
264		"PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from Off-Drawer Level-4 cache"
265	},
266	{
267		"EventCode": "224",
268		"EventName": "BCD_DFP_EXECUTION_SLOTS",
269		"BriefDescription": "BCD DFP Execution Slots",
270		"PublicDescription": "Count of floating point execution slots used for finished Binary Coded Decimal to Decimal Floating Point conversions. Instructions: CDZT, CXZT, CZDT, CZXT"
271	},
272	{
273		"EventCode": "225",
274		"EventName": "VX_BCD_EXECUTION_SLOTS",
275		"BriefDescription": "VX BCD Execution Slots",
276		"PublicDescription": "Count of floating point execution slots used for finished vector arithmetic Binary Coded Decimal instructions. Instructions: VAP, VSP, VMPVMSP, VDP, VSDP, VRP, VLIP, VSRP, VPSOPVCP, VTP, VPKZ, VUPKZ, VCVB, VCVBG, VCVDVCVDG"
277	},
278	{
279		"EventCode": "226",
280		"EventName": "DECIMAL_INSTRUCTIONS",
281		"BriefDescription": "Decimal Instructions",
282		"PublicDescription": "Decimal instructions dispatched. Instructions: CVB, CVD, AP, CP, DP, ED, EDMK, MP, SRP, SP, ZAP"
283	},
284	{
285		"EventCode": "232",
286		"EventName": "LAST_HOST_TRANSLATIONS",
287		"BriefDescription": "Last host translation done",
288		"PublicDescription": "Last Host Translation done"
289	},
290	{
291		"EventCode": "243",
292		"EventName": "TX_NC_TABORT",
293		"BriefDescription": "Aborted transactions in non-constrained TX mode",
294		"PublicDescription": "A transaction abort has occurred in a non-constrained transactional-execution mode"
295	},
296	{
297		"EventCode": "244",
298		"EventName": "TX_C_TABORT_NO_SPECIAL",
299		"BriefDescription": "Aborted transactions in constrained TX mode not using special completion logic",
300		"PublicDescription": "A transaction abort has occurred in a constrained transactional-execution mode and the CPU is not using any special logic to allow the transaction to complete"
301	},
302	{
303		"EventCode": "245",
304		"EventName": "TX_C_TABORT_SPECIAL",
305		"BriefDescription": "Aborted transactions in constrained TX mode using special completion logic",
306		"PublicDescription": "A transaction abort has occurred in a constrained transactional-execution mode and the CPU is using special logic to allow the transaction to complete"
307	},
308	{
309		"EventCode": "448",
310		"EventName": "MT_DIAG_CYCLES_ONE_THR_ACTIVE",
311		"BriefDescription": "Cycle count with one thread active",
312		"PublicDescription": "Cycle count with one thread active"
313	},
314	{
315		"EventCode": "449",
316		"EventName": "MT_DIAG_CYCLES_TWO_THR_ACTIVE",
317		"BriefDescription": "Cycle count with two threads active",
318		"PublicDescription": "Cycle count with two threads active"
319	}
320]
321