xref: /freebsd/share/man/man4/smp.4 (revision 2be1a816)
1.\" Copyright (c) 1997
2.\"	Steve Passe <fsmp@FreeBSD.ORG>.  All rights reserved.
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24.\" $FreeBSD$
25.\"
26.Dd December 17, 2004
27.Dt SMP 4
28.Os
29.Sh NAME
30.Nm SMP
31.Nd description of the FreeBSD Symmetric Multi-Processor kernel
32.Sh SYNOPSIS
33.Cd options SMP
34.Sh DESCRIPTION
35The
36.Nm
37kernel implements symmetric multi-processor support.
38.Sh COMPATIBILITY
39Support for multi-processor systems is present for all Tier-1
40architectures on
41.Fx .
42Currently, this includes amd64, i386, ia64, and sparc64.
43Support is enabled using
44.Cd options SMP .
45It is permissible to use the SMP kernel configuration on non-SMP equipped
46motherboards.
47.Sh I386 NOTES
48For i386 systems, the
49.Nm
50kernel supports motherboards that follow the Intel MP specification,
51version 1.4.
52In addition to
53.Cd options SMP ,
54i386 also requires
55.Cd device apic .
56The
57.Xr mptable 1
58command may be used to view the status of multi-processor support.
59.Pp
60The number of CPUs detected by the system is available in
61the read-only sysctl variable
62.Va hw.ncpu .
63.Pp
64.Fx
65allows specific CPUs on a multi-processor system to be disabled.
66The sysctl variable
67.Va machdep.hlt_cpus
68is an integer bitmask denoting CPUs to halt, counting from 0.
69Setting a bit to 1 will result in the corresponding CPU being
70disabled.
71.Pp
72.Fx
73supports hyperthreading on Intel CPU's on the i386 platform.
74Since using logical CPUs can cause performance penalties under certain loads,
75the logical CPUs can be disabled by setting the
76.Va machdep.hlt_logical_cpus
77sysctl to one.
78.Sh SEE ALSO
79.Xr mptable 1 ,
80.Xr sysctl 8 ,
81.Xr condvar 9 ,
82.Xr msleep 9 ,
83.Xr mtx_pool 9 ,
84.Xr mutex 9 ,
85.Xr sema 9 ,
86.Xr sx 9
87.Sh HISTORY
88The
89.Nm
90kernel's early history is not (properly) recorded.
91It was developed
92in a separate CVS branch until April 26, 1997, at which point it was
93merged into 3.0-current.
94By this date 3.0-current had already been
95merged with Lite2 kernel code.
96.Pp
97.Fx 5.0
98introduced support for a host of new synchronization primitives, and
99a move towards fine-grained kernel locking rather than reliance on
100a Giant kernel lock.
101The SMPng Project relied heavily on the support of BSDi, who provided
102reference source code from the fine-grained SMP implementation found
103in
104.Bsx .
105.Pp
106.Fx 5.0
107also introduced support for SMP on the ia64 and sparc64 architectures.
108.Sh AUTHORS
109.An Steve Passe Aq fsmp@FreeBSD.org
110