xref: /freebsd/sys/amd64/amd64/cpu_switch.S (revision 076ad2f8)
1/*-
2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. Neither the name of the University nor the names of its contributors
18 *    may be used to endorse or promote products derived from this software
19 *    without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * $FreeBSD$
34 */
35
36#include <machine/asmacros.h>
37#include <machine/specialreg.h>
38
39#include "assym.s"
40#include "opt_sched.h"
41
42/*****************************************************************************/
43/* Scheduling                                                                */
44/*****************************************************************************/
45
46	.text
47
48#ifdef SMP
49#define LK	lock ;
50#else
51#define LK
52#endif
53
54#if defined(SCHED_ULE) && defined(SMP)
55#define	SETLK	xchgq
56#else
57#define	SETLK	movq
58#endif
59
60/*
61 * cpu_throw()
62 *
63 * This is the second half of cpu_switch(). It is used when the current
64 * thread is either a dummy or slated to die, and we no longer care
65 * about its state.  This is only a slight optimization and is probably
66 * not worth it anymore.  Note that we need to clear the pm_active bits so
67 * we do need the old proc if it still exists.
68 * %rdi = oldtd
69 * %rsi = newtd
70 */
71ENTRY(cpu_throw)
72	movq	%rsi,%r12
73	movq	%rsi,%rdi
74	call	pmap_activate_sw
75	jmp	sw1
76END(cpu_throw)
77
78/*
79 * cpu_switch(old, new, mtx)
80 *
81 * Save the current thread state, then select the next thread to run
82 * and load its state.
83 * %rdi = oldtd
84 * %rsi = newtd
85 * %rdx = mtx
86 */
87ENTRY(cpu_switch)
88	/* Switch to new thread.  First, save context. */
89	movq	TD_PCB(%rdi),%r8
90	orl	$PCB_FULL_IRET,PCB_FLAGS(%r8)
91
92	movq	(%rsp),%rax			/* Hardware registers */
93	movq	%r15,PCB_R15(%r8)
94	movq	%r14,PCB_R14(%r8)
95	movq	%r13,PCB_R13(%r8)
96	movq	%r12,PCB_R12(%r8)
97	movq	%rbp,PCB_RBP(%r8)
98	movq	%rsp,PCB_RSP(%r8)
99	movq	%rbx,PCB_RBX(%r8)
100	movq	%rax,PCB_RIP(%r8)
101
102	testl	$PCB_DBREGS,PCB_FLAGS(%r8)
103	jnz	store_dr			/* static predict not taken */
104done_store_dr:
105
106	/* have we used fp, and need a save? */
107	cmpq	%rdi,PCPU(FPCURTHREAD)
108	jne	3f
109	movq	PCB_SAVEFPU(%r8),%r8
110	clts
111	cmpl	$0,use_xsave
112	jne	1f
113	fxsave	(%r8)
114	jmp	2f
1151:	movq	%rdx,%rcx
116	movl	xsave_mask,%eax
117	movl	xsave_mask+4,%edx
118	.globl	ctx_switch_xsave
119ctx_switch_xsave:
120	/* This is patched to xsaveopt if supported, see fpuinit_bsp1() */
121	xsave	(%r8)
122	movq	%rcx,%rdx
1232:	smsw	%ax
124	orb	$CR0_TS,%al
125	lmsw	%ax
126	xorl	%eax,%eax
127	movq	%rax,PCPU(FPCURTHREAD)
1283:
129	/* Save is done.  Now fire up new thread. Leave old vmspace. */
130	movq	%rsi,%r12
131	movq	%rdi,%r13
132	movq	%rdx,%r15
133	movq	%rsi,%rdi
134	callq	pmap_activate_sw
135	SETLK	%r15,TD_LOCK(%r13)		/* Release the old thread */
136sw1:
137	movq	TD_PCB(%r12),%r8
138#if defined(SCHED_ULE) && defined(SMP)
139	/* Wait for the new thread to become unblocked */
140	movq	$blocked_lock, %rdx
1411:
142	movq	TD_LOCK(%r12),%rcx
143	cmpq	%rcx, %rdx
144	pause
145	je	1b
146#endif
147	/*
148	 * At this point, we've switched address spaces and are ready
149	 * to load up the rest of the next context.
150	 */
151
152	/* Skip loading user fsbase/gsbase for kthreads */
153	testl	$TDP_KTHREAD,TD_PFLAGS(%r12)
154	jnz	do_kthread
155
156	/*
157	 * Load ldt register
158	 */
159	movq	TD_PROC(%r12),%rcx
160	cmpq	$0, P_MD+MD_LDT(%rcx)
161	jne	do_ldt
162	xorl	%eax,%eax
163ld_ldt:	lldt	%ax
164
165	/* Restore fs base in GDT */
166	movl	PCB_FSBASE(%r8),%eax
167	movq	PCPU(FS32P),%rdx
168	movw	%ax,2(%rdx)
169	shrl	$16,%eax
170	movb	%al,4(%rdx)
171	shrl	$8,%eax
172	movb	%al,7(%rdx)
173
174	/* Restore gs base in GDT */
175	movl	PCB_GSBASE(%r8),%eax
176	movq	PCPU(GS32P),%rdx
177	movw	%ax,2(%rdx)
178	shrl	$16,%eax
179	movb	%al,4(%rdx)
180	shrl	$8,%eax
181	movb	%al,7(%rdx)
182
183do_kthread:
184	/* Do we need to reload tss ? */
185	movq	PCPU(TSSP),%rax
186	movq	PCB_TSSP(%r8),%rdx
187	testq	%rdx,%rdx
188	cmovzq	PCPU(COMMONTSSP),%rdx
189	cmpq	%rax,%rdx
190	jne	do_tss
191done_tss:
192	movq	%r8,PCPU(RSP0)
193	movq	%r8,PCPU(CURPCB)
194	/* Update the TSS_RSP0 pointer for the next interrupt */
195	movq	%r8,COMMON_TSS_RSP0(%rdx)
196	movq	%r12,PCPU(CURTHREAD)		/* into next thread */
197
198	/* Test if debug registers should be restored. */
199	testl	$PCB_DBREGS,PCB_FLAGS(%r8)
200	jnz	load_dr				/* static predict not taken */
201done_load_dr:
202
203	/* Restore context. */
204	movq	PCB_R15(%r8),%r15
205	movq	PCB_R14(%r8),%r14
206	movq	PCB_R13(%r8),%r13
207	movq	PCB_R12(%r8),%r12
208	movq	PCB_RBP(%r8),%rbp
209	movq	PCB_RSP(%r8),%rsp
210	movq	PCB_RBX(%r8),%rbx
211	movq	PCB_RIP(%r8),%rax
212	movq	%rax,(%rsp)
213	ret
214
215	/*
216	 * We order these strangely for several reasons.
217	 * 1: I wanted to use static branch prediction hints
218	 * 2: Most athlon64/opteron cpus don't have them.  They define
219	 *    a forward branch as 'predict not taken'.  Intel cores have
220	 *    the 'rep' prefix to invert this.
221	 * So, to make it work on both forms of cpu we do the detour.
222	 * We use jumps rather than call in order to avoid the stack.
223	 */
224
225store_dr:
226	movq	%dr7,%rax			/* yes, do the save */
227	movq	%dr0,%r15
228	movq	%dr1,%r14
229	movq	%dr2,%r13
230	movq	%dr3,%r12
231	movq	%dr6,%r11
232	movq	%r15,PCB_DR0(%r8)
233	movq	%r14,PCB_DR1(%r8)
234	movq	%r13,PCB_DR2(%r8)
235	movq	%r12,PCB_DR3(%r8)
236	movq	%r11,PCB_DR6(%r8)
237	movq	%rax,PCB_DR7(%r8)
238	andq	$0x0000fc00, %rax		/* disable all watchpoints */
239	movq	%rax,%dr7
240	jmp	done_store_dr
241
242load_dr:
243	movq	%dr7,%rax
244	movq	PCB_DR0(%r8),%r15
245	movq	PCB_DR1(%r8),%r14
246	movq	PCB_DR2(%r8),%r13
247	movq	PCB_DR3(%r8),%r12
248	movq	PCB_DR6(%r8),%r11
249	movq	PCB_DR7(%r8),%rcx
250	movq	%r15,%dr0
251	movq	%r14,%dr1
252	/* Preserve reserved bits in %dr7 */
253	andq	$0x0000fc00,%rax
254	andq	$~0x0000fc00,%rcx
255	movq	%r13,%dr2
256	movq	%r12,%dr3
257	orq	%rcx,%rax
258	movq	%r11,%dr6
259	movq	%rax,%dr7
260	jmp	done_load_dr
261
262do_tss:	movq	%rdx,PCPU(TSSP)
263	movq	%rdx,%rcx
264	movq	PCPU(TSS),%rax
265	movw	%cx,2(%rax)
266	shrq	$16,%rcx
267	movb	%cl,4(%rax)
268	shrq	$8,%rcx
269	movb	%cl,7(%rax)
270	shrq	$8,%rcx
271	movl	%ecx,8(%rax)
272	movb	$0x89,5(%rax)	/* unset busy */
273	movl	$TSSSEL,%eax
274	ltr	%ax
275	jmp	done_tss
276
277do_ldt:	movq	PCPU(LDT),%rax
278	movq	P_MD+MD_LDT_SD(%rcx),%rdx
279	movq	%rdx,(%rax)
280	movq	P_MD+MD_LDT_SD+8(%rcx),%rdx
281	movq	%rdx,8(%rax)
282	movl	$LDTSEL,%eax
283	jmp	ld_ldt
284END(cpu_switch)
285
286/*
287 * savectx(pcb)
288 * Update pcb, saving current processor state.
289 */
290ENTRY(savectx)
291	/* Save caller's return address. */
292	movq	(%rsp),%rax
293	movq	%rax,PCB_RIP(%rdi)
294
295	movq	%rbx,PCB_RBX(%rdi)
296	movq	%rsp,PCB_RSP(%rdi)
297	movq	%rbp,PCB_RBP(%rdi)
298	movq	%r12,PCB_R12(%rdi)
299	movq	%r13,PCB_R13(%rdi)
300	movq	%r14,PCB_R14(%rdi)
301	movq	%r15,PCB_R15(%rdi)
302
303	movq	%cr0,%rax
304	movq	%rax,PCB_CR0(%rdi)
305	movq	%cr2,%rax
306	movq	%rax,PCB_CR2(%rdi)
307	movq	%cr3,%rax
308	movq	%rax,PCB_CR3(%rdi)
309	movq	%cr4,%rax
310	movq	%rax,PCB_CR4(%rdi)
311
312	movq	%dr0,%rax
313	movq	%rax,PCB_DR0(%rdi)
314	movq	%dr1,%rax
315	movq	%rax,PCB_DR1(%rdi)
316	movq	%dr2,%rax
317	movq	%rax,PCB_DR2(%rdi)
318	movq	%dr3,%rax
319	movq	%rax,PCB_DR3(%rdi)
320	movq	%dr6,%rax
321	movq	%rax,PCB_DR6(%rdi)
322	movq	%dr7,%rax
323	movq	%rax,PCB_DR7(%rdi)
324
325	movl	$MSR_FSBASE,%ecx
326	rdmsr
327	movl	%eax,PCB_FSBASE(%rdi)
328	movl	%edx,PCB_FSBASE+4(%rdi)
329	movl	$MSR_GSBASE,%ecx
330	rdmsr
331	movl	%eax,PCB_GSBASE(%rdi)
332	movl	%edx,PCB_GSBASE+4(%rdi)
333	movl	$MSR_KGSBASE,%ecx
334	rdmsr
335	movl	%eax,PCB_KGSBASE(%rdi)
336	movl	%edx,PCB_KGSBASE+4(%rdi)
337	movl	$MSR_EFER,%ecx
338	rdmsr
339	movl	%eax,PCB_EFER(%rdi)
340	movl	%edx,PCB_EFER+4(%rdi)
341	movl	$MSR_STAR,%ecx
342	rdmsr
343	movl	%eax,PCB_STAR(%rdi)
344	movl	%edx,PCB_STAR+4(%rdi)
345	movl	$MSR_LSTAR,%ecx
346	rdmsr
347	movl	%eax,PCB_LSTAR(%rdi)
348	movl	%edx,PCB_LSTAR+4(%rdi)
349	movl	$MSR_CSTAR,%ecx
350	rdmsr
351	movl	%eax,PCB_CSTAR(%rdi)
352	movl	%edx,PCB_CSTAR+4(%rdi)
353	movl	$MSR_SF_MASK,%ecx
354	rdmsr
355	movl	%eax,PCB_SFMASK(%rdi)
356	movl	%edx,PCB_SFMASK+4(%rdi)
357
358	sgdt	PCB_GDT(%rdi)
359	sidt	PCB_IDT(%rdi)
360	sldt	PCB_LDT(%rdi)
361	str	PCB_TR(%rdi)
362
363	movl	$1,%eax
364	ret
365END(savectx)
366
367/*
368 * resumectx(pcb)
369 * Resuming processor state from pcb.
370 */
371ENTRY(resumectx)
372	/* Switch to KPML4phys. */
373	movq	KPML4phys,%rax
374	movq	%rax,%cr3
375
376	/* Force kernel segment registers. */
377	movl	$KDSEL,%eax
378	movw	%ax,%ds
379	movw	%ax,%es
380	movw	%ax,%ss
381	movl	$KUF32SEL,%eax
382	movw	%ax,%fs
383	movl	$KUG32SEL,%eax
384	movw	%ax,%gs
385
386	movl	$MSR_FSBASE,%ecx
387	movl	PCB_FSBASE(%rdi),%eax
388	movl	4 + PCB_FSBASE(%rdi),%edx
389	wrmsr
390	movl	$MSR_GSBASE,%ecx
391	movl	PCB_GSBASE(%rdi),%eax
392	movl	4 + PCB_GSBASE(%rdi),%edx
393	wrmsr
394	movl	$MSR_KGSBASE,%ecx
395	movl	PCB_KGSBASE(%rdi),%eax
396	movl	4 + PCB_KGSBASE(%rdi),%edx
397	wrmsr
398
399	/* Restore EFER. */
400	movl	$MSR_EFER,%ecx
401	movl	PCB_EFER(%rdi),%eax
402	wrmsr
403
404	/* Restore fast syscall stuff. */
405	movl	$MSR_STAR,%ecx
406	movl	PCB_STAR(%rdi),%eax
407	movl	4 + PCB_STAR(%rdi),%edx
408	wrmsr
409	movl	$MSR_LSTAR,%ecx
410	movl	PCB_LSTAR(%rdi),%eax
411	movl	4 + PCB_LSTAR(%rdi),%edx
412	wrmsr
413	movl	$MSR_CSTAR,%ecx
414	movl	PCB_CSTAR(%rdi),%eax
415	movl	4 + PCB_CSTAR(%rdi),%edx
416	wrmsr
417	movl	$MSR_SF_MASK,%ecx
418	movl	PCB_SFMASK(%rdi),%eax
419	wrmsr
420
421	/* Restore CR0, CR2, CR4 and CR3. */
422	movq	PCB_CR0(%rdi),%rax
423	movq	%rax,%cr0
424	movq	PCB_CR2(%rdi),%rax
425	movq	%rax,%cr2
426	movq	PCB_CR4(%rdi),%rax
427	movq	%rax,%cr4
428	movq	PCB_CR3(%rdi),%rax
429	movq	%rax,%cr3
430
431	/* Restore descriptor tables. */
432	lidt	PCB_IDT(%rdi)
433	lldt	PCB_LDT(%rdi)
434
435#define	SDT_SYSTSS	9
436#define	SDT_SYSBSY	11
437
438	/* Clear "task busy" bit and reload TR. */
439	movq	PCPU(TSS),%rax
440	andb	$(~SDT_SYSBSY | SDT_SYSTSS),5(%rax)
441	movw	PCB_TR(%rdi),%ax
442	ltr	%ax
443
444#undef	SDT_SYSTSS
445#undef	SDT_SYSBSY
446
447	/* Restore debug registers. */
448	movq	PCB_DR0(%rdi),%rax
449	movq	%rax,%dr0
450	movq	PCB_DR1(%rdi),%rax
451	movq	%rax,%dr1
452	movq	PCB_DR2(%rdi),%rax
453	movq	%rax,%dr2
454	movq	PCB_DR3(%rdi),%rax
455	movq	%rax,%dr3
456	movq	PCB_DR6(%rdi),%rax
457	movq	%rax,%dr6
458	movq	PCB_DR7(%rdi),%rax
459	movq	%rax,%dr7
460
461	/* Restore other callee saved registers. */
462	movq	PCB_R15(%rdi),%r15
463	movq	PCB_R14(%rdi),%r14
464	movq	PCB_R13(%rdi),%r13
465	movq	PCB_R12(%rdi),%r12
466	movq	PCB_RBP(%rdi),%rbp
467	movq	PCB_RSP(%rdi),%rsp
468	movq	PCB_RBX(%rdi),%rbx
469
470	/* Restore return address. */
471	movq	PCB_RIP(%rdi),%rax
472	movq	%rax,(%rsp)
473
474	xorl	%eax,%eax
475	ret
476END(resumectx)
477