xref: /freebsd/sys/amd64/include/sgxreg.h (revision 069ac184)
1 /*-
2  * Copyright (c) 2017 Ruslan Bukin <br@bsdpad.com>
3  * All rights reserved.
4  *
5  * This software was developed by BAE Systems, the University of Cambridge
6  * Computer Laboratory, and Memorial University under DARPA/AFRL contract
7  * FA8650-15-C-7558 ("CADETS"), as part of the DARPA Transparent Computing
8  * (TC) research program.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29  * SUCH DAMAGE.
30  */
31 
32 /* Machine-defined variables. */
33 
34 #ifndef _MACHINE_SGXREG_H_
35 #define _MACHINE_SGXREG_H_
36 
37 /* Error codes. */
38 #define	SGX_SUCCESS			0
39 #define	SGX_INVALID_SIG_STRUCT		1	/* EINIT */
40 #define	SGX_INVALID_ATTRIBUTE		2	/* EINIT, EGETKEY */
41 #define	SGX_BLSTATE			3	/* EBLOCK */
42 #define	SGX_INVALID_MEASUREMENT		4	/* EINIT */
43 #define	SGX_NOTBLOCKABLE		5	/* EBLOCK */
44 #define	SGX_PG_INVLD			6	/* EBLOCK */
45 #define	SGX_LOCKFAIL			7	/* EBLOCK, EMODPR, EMODT */
46 #define	SGX_INVALID_SIGNATURE		8	/* EINIT */
47 #define	SGX_MAC_COMPARE_FAIL		9	/* ELDB, ELDU */
48 #define	SGX_PAGE_NOT_BLOCKED		10	/* EWB */
49 #define	SGX_NOT_TRACKED			11	/* EWB, EACCEPT */
50 #define	SGX_VA_SLOT_OCCUPIED		12	/* EWB */
51 #define	SGX_CHILD_PRESENT		13	/* EWB, EREMOVE */
52 #define	SGX_ENCLAVE_ACT			14	/* EREMOVE */
53 #define	SGX_ENTRYEPOCH_LOCKED		15	/* EBLOCK */
54 #define	SGX_INVALID_EINIT_TOKEN		16	/* EINIT */
55 #define	SGX_PREV_TRK_INCMPL		17	/* ETRACK */
56 #define	SGX_PG_IS_SECS			18	/* EBLOCK */
57 #define	SGX_PAGE_ATTRIBUTES_MISMATCH	19	/* EACCEPT, EACCEPTCOPY */
58 #define	SGX_PAGE_NOT_MODIFIABLE		20	/* EMODPR, EMODT */
59 #define	SGX_INVALID_CPUSVN		32	/* EINIT, EGETKEY */
60 #define	SGX_INVALID_ISVSVN		64	/* EGETKEY */
61 #define	SGX_UNMASKED_EVENT		128	/* EINIT */
62 #define	SGX_INVALID_KEYNAME		256	/* EGETKEY */
63 
64 /*
65  * 2.10 Page Information (PAGEINFO)
66  * PAGEINFO is an architectural data structure that is used as a parameter
67  * to the EPC-management instructions. It requires 32-Byte alignment.
68  */
69 struct page_info {
70 	uint64_t linaddr;
71 	uint64_t srcpge;
72 	union {
73 		struct secinfo *secinfo;
74 		uint64_t pcmd;
75 	};
76 	uint64_t secs;
77 } __aligned(32);
78 
79 /*
80  * 2.11 Security Information (SECINFO)
81  * The SECINFO data structure holds meta-data about an enclave page.
82  */
83 struct secinfo {
84 	uint64_t flags;
85 #define	SECINFO_FLAGS_PT_S	8	/* Page type shift */
86 #define	SECINFO_FLAGS_PT_M	(0xff << SECINFO_FLAGS_PT_S)
87 	uint64_t reserved[7];
88 } __aligned(64);
89 
90 /*
91  * 2.7.1 ATTRIBUTES
92  * The ATTRIBUTES data structure is comprised of bit-granular fields that
93  * are used in the SECS, CPUID enumeration, the REPORT and the KEYREQUEST
94  * structures.
95  */
96 struct secs_attr {
97 	uint8_t		reserved1: 1;
98 	uint8_t		debug: 1;
99 	uint8_t		mode64bit: 1;
100 	uint8_t		reserved2: 1;
101 	uint8_t		provisionkey: 1;
102 	uint8_t		einittokenkey: 1;
103 	uint8_t		reserved3: 2;
104 #define	SECS_ATTR_RSV4_SIZE	7
105 	uint8_t		reserved4[SECS_ATTR_RSV4_SIZE];
106 	uint64_t	xfrm;			/* X-Feature Request Mask */
107 };
108 
109 /*
110  * 2.7 SGX Enclave Control Structure (SECS)
111  * The SECS data structure requires 4K-Bytes alignment.
112  */
113 struct secs {
114 	uint64_t	size;
115 	uint64_t	base;
116 	uint32_t	ssa_frame_size;
117 	uint32_t	misc_select;
118 #define	SECS_RSV1_SIZE	24
119 	uint8_t		reserved1[SECS_RSV1_SIZE];
120 	struct secs_attr attributes;
121 	uint8_t		mr_enclave[32];
122 #define	SECS_RSV2_SIZE	32
123 	uint8_t		reserved2[SECS_RSV2_SIZE];
124 	uint8_t		mr_signer[32];
125 #define	SECS_RSV3_SIZE	96
126 	uint8_t		reserved3[SECS_RSV3_SIZE];
127 	uint16_t	isv_prod_id;
128 	uint16_t	isv_svn;
129 #define	SECS_RSV4_SIZE	3836
130 	uint8_t		reserved4[SECS_RSV4_SIZE];
131 };
132 
133 /*
134  * 2.8 Thread Control Structure (TCS)
135  * Each executing thread in the enclave is associated with a
136  * Thread Control Structure. It requires 4K-Bytes alignment.
137  */
138 struct tcs {
139 	uint64_t	reserved1;
140 	uint64_t	flags;
141 	uint64_t	ossa;
142 	uint32_t	cssa;
143 	uint32_t	nssa;
144 	uint64_t	oentry;
145 	uint64_t	reserved2;
146 	uint64_t	ofsbasgx;
147 	uint64_t	ogsbasgx;
148 	uint32_t	fslimit;
149 	uint32_t	gslimit;
150 	uint64_t	reserved3[503];
151 };
152 
153 #endif /* !_MACHINE_SGXREG_H_ */
154